JP2007109668A - Manufacturing method of back plate of plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the number of times of baking an AC-type plasma display panel. <P>SOLUTION: At the manufacture of the back plate of the plasma display panel having a plurality of address electrodes and a dielectric layer covering the address electrodes, and barrier ribs in row and column directions formed on the dielectric layer, demarcating a discharging space in a row and a column at every cell, a pattern of the address electrodes is formed on a substrate by using metal paste containing crystallized glass, a layer of low melting point glass serving as the dielectric layer is formed on the pattern of the address electrodes, and further, the pattern of the barrier ribs in the row and column directions is formed on the low melting point glass layer for the dielectric layer by using the low melting point glass, and a black material layer containing crystallized glass is formed between adjacent barrier rib patterns in a row direction corresponding to a part laid between rows of the address electrode pattern. Afterwards, a lamination body of the address electrodes, the dielectric layer, the barrier ribs, and the black material layer is formed on the substrate by baking the address electrode pattern, the low melting point glass layer, the barrier rib pattern and the black material layer, simultaneously. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a rear substrate of a plasma display panel that performs display using gas discharge.

An AC surface discharge type plasma display panel has already been put to practical use in various fields as a flat and large full color display device. The general configuration of this panel is that the discharge gas is sealed between the front substrate and the rear substrate, and the rear surface is exposed to vacuum ultraviolet rays generated by surface discharge between the display electrode pairs formed along the display lines of the front substrate. Color display is performed by emitting a phosphor provided on the substrate. The display electrode pairs on the front substrate are generally covered with a dielectric layer made of low-melting glass, and usually a black belt is provided between the display electrode pairs to improve display contrast. On the upper side, there are provided an address electrode extending under the phosphor and extending in a direction intersecting with the display electrode pair, and a partition wall (also referred to as a barrier rib) for partitioning discharge between adjacent address electrodes.
International Publication No. 01/54159

  However, the conventional plasma display panel is fired after forming electrodes, dielectric layers, barrier ribs, etc., as shown in the flowchart of the manufacturing process of the front substrate and the rear substrate in FIGS. The front substrate having an electrode and a dielectric layer (two-layer structure) requires three times of firing, and the rear substrate having an electrode, a dielectric layer, and a partition wall requires four times of firing. In the flowchart of FIG. 6, the dielectric layer is divided into a lower layer and an upper layer, but the lower layer is fired near the softening point of the dielectric material so as not to react with the electrode, and the upper layer is a dielectric material to smooth the surface. Firing is performed at a temperature about 100 ° C. higher than the softening point. The dielectric layer can be formed as a single layer by changing the electrode material and the like. In this case, the number of times of firing the front substrate is two. As described above, the conventional plasma display panel substrate structure (front substrate, rear substrate) has a large number of firing steps in manufacturing, and the processing time of 4 to 5 hours is required for the firing step. There is a problem that the production yield is poor due to the long number of processes.

  In view of the above problems, the inventors have come to the invention of reducing the firing step by mixing the crystallized glass powder with the metal paste forming the electrode.

  According to a first aspect of the present invention, a plurality of address electrodes and a dielectric layer covering the address electrodes are formed on a substrate, and a discharge space is partitioned on the dielectric layer in rows and columns for each cell. A method of manufacturing a rear substrate for a plasma display panel having a partition wall, wherein the address electrode pattern is formed on a metal paste containing crystallized glass on the substrate, and the dielectric layer and the address electrode pattern are formed on the substrate. A low melting point glass layer is formed, and the row and column barrier rib patterns are formed on the dielectric layer low melting point glass layer using the low melting point glass, and the barrier rib pattern corresponds to the inter-row portion. A black material layer containing crystallized glass is formed between adjacent row direction barrier rib patterns, and then the address electrode pattern, the low melting point glass layer, the barrier rib pattern, and the black material By firing the layers at the same time, it is to form a laminate of the address electrodes and the dielectric layer and the barrier rib and the black material layer on the substrate.

According to the present invention, since the baking process that has been conventionally required four times for the back substrate is only required twice, the process can be greatly shortened. This makes it possible to provide a high-quality plasma display panel at a low cost.

  An exploded perspective view of an AC3 electrode surface discharge type plasma display panel to which the present invention is applied is shown in FIGS. The structure of the plasma display panel shown in FIG. 1 is a typical structure called a so-called stripe rib structure. The front substrate 1 is made of a transparent glass substrate, and a plurality of pairs are formed in pairs on the inner surface. The display electrode pairs 2x and 2y are arranged along virtual display lines, and stripes for improving the display contrast by shielding the light in the so-called reverse slits between the display electrode pairs. A light-shielding layer (hereinafter referred to as a black belt) 12 is disposed. This black belt is formed of a black insulating material layer containing crystallized glass according to the characteristics of the present invention, and details thereof will be described later. The display electrode pairs 2x and 2y and the black belt 12 are covered with a dielectric layer 5 and a surface protective layer 6 of MgO. Each display electrode pair includes a transparent electrode 3 made of ITO and a bus electrode 4 made of a metal layer. The metal layer constituting the bus electrode is formed of a metal paste containing crystallized glass according to the characteristics of the present invention, and details thereof will be described later. The transparent electrode 3 may take not only a straight pattern as shown, but also a T-shaped pattern, an I-shaped pattern, a comb-shaped pattern, or a ladder pattern for each discharge cell region. Further, although the transparent electrode and the bus electrode are configured in the drawing, the transparent electrode portion may be formed only of the bus electrode material.

  A plurality of address electrodes 8 are provided on the upper surface of a rear substrate 7 made of a glass substrate similar to the front substrate in a direction crossing the display electrode pairs 2x, 2y, and a dielectric layer made of low-melting glass (hereinafter described) (Referred to as a back side dielectric layer for convenience) 9. Here, this address electrode is also formed of a metal paste containing crystallized glass according to the feature of the present invention. Further, stripe-like barrier ribs 10 are formed on the back-side dielectric layer 9 corresponding to the positions between adjacent address electrodes, and the three primary color phosphors of red, green, and blue are formed in groove-like portions sandwiched between the barrier ribs. The layers 11R, 11G, and 11B are applied so as to cover the side surfaces of the partition walls.

  FIG. 2 shows a plasma display panel having a barrier rib structure called a waffle or a cross rib, and each discharge cell portion is formed on the back side dielectric layer 9 covering the address electrode 8 of the back substrate 7 instead of the stripe rib of FIG. Correspondingly, a grid-like partition band 13 is provided to define individual discharge spaces 15. The aforementioned discharge space 15 corresponds to the intersection of the display electrode pair 2x, 2y and the address electrode 8 and becomes a discharge cavity or discharge cell, and the inner wall has three primary color phosphor layers of red, green and blue. 11R, 11G, and 11B are repeatedly applied in the longitudinal direction of the display electrode pairs 2x and 2y. The bus electrodes and address electrodes of this panel are formed by a metal layer containing crystallized glass according to a feature of the present invention. The black belt is also formed by a black insulating material layer containing crystallized glass according to the feature of the present invention.

  FIG. 3 shows the structure of a so-called ALIS system plasma display panel that enables full pitch display in an interlace system. A plurality of bus electrodes 21 are arranged at equal intervals along the direction of the display line on the inner surface of the front substrate 1, and T-shaped transparent electrodes 22a and 22b branching to both sides at a predetermined interval are provided. The rear substrate 7 is provided with a grid-like partition band 13 so as to delimit discharge cells for each opposing T-shaped electrode region. The barrier ribs 13 are separately coated with three primary color phosphor layers 11R, 11G, and 11B for each discharge cell, and a black material layer is formed between adjacent barrier ribs, that is, in a groove-like region formed in a portion corresponding to each bus electrode 21. 14 is arranged to improve display contrast. In particular, the black material layer 14 may not be provided. Also in this panel, the bus electrodes on the front substrate and the address electrodes on the rear substrate are formed by a metal layer containing crystallized glass according to the characteristics of the present invention, and the black material layer on the rear substrate is a characteristic of the present invention. Accordingly, the black insulating material layer containing crystallized glass is formed.

  The front substrate manufacturing process of the present invention will be described with reference to the flowchart of the front substrate manufacturing process according to the present invention shown in FIG.

  In step (1), an ITO film is formed on the glass substrate with a thickness of 0.1 to 0.3 μm by a method such as sputtering, and then a predetermined transparent electrode pattern is formed using a photolithography technique. Step (1) is omitted when the display electrode pair is composed only of the bus electrode material.

  In step (2), a bus electrode is formed with a film thickness of about 10 μm using a metal paste composed of crystallized glass powder, silver or silver-palladium powder, an organic binder, and an organic solvent. The bus electrode is formed by an existing forming process such as a method of performing pattern printing by screen printing of a metal paste or a method of forming a pattern by photolithography after applying the metal paste to the entire surface or a part of the substrate. In the case of the latter method, it is preferable to add a photosensitive material to the metal paste. After this bus electrode is formed, a black belt is formed on the substrate between the bus electrodes of the adjacent electrode pair.

  Black band formation is a black insulating material mixed with crystallized glass powder, organic binder, organic solvent, oxide powder of iron, chromium, nickel, manganese, etc., or composite oxide powder of the above metal, similar to bus electrode formation Form with paste. The formation method is the same as the bus electrode formation. As the crystallized glass powder contained in the black insulating material paste, it is preferable to use a glass material having the same composition as that contained in the metal paste forming the bus electrode.

  In step (3), a low-melting glass paste composed of a low-melting glass powder, an organic binder, and an organic solvent is applied onto the substrate on which the bus electrode and the black belt are formed. The coating method is formed using a method such as screen printing, a green sheet method, a roll coater method, or a die coater method. As a characteristic of the low melting point glass powder, it is preferable to use a material having a softening point of about 560 to 590 ° C. The crystallization peak temperature of the crystallized glass in the metal paste is higher than the softening point of the low melting point glass powder. It is preferable to use a lower material. That is, before the low melting point glass powder is softened, the crystallized glass in the metal paste is crystallized so that the metal powders in the metal paste are connected to each other, and at the same time, the bus electrode is fixed to the substrate by connecting with the back substrate. Thus, even if the dielectric layer is subsequently softened, it is possible to prevent meandering, disconnection, and lifting of the bus electrode. The same applies to the black belt. This enables simultaneous firing of the bus electrode, black belt, and dielectric layer in step (4). The conventional metal paste uses amorphous glass powder that is not crystallized glass, so the glass in the metal paste softens as the firing temperature rises. However, if crystallized glass is used, the glass crystallizes as it goes beyond the softening point of the crystallized glass and approaches the crystallization peak temperature. When the crystallized glass crystal mixed in the metal paste grows too much, the conductivity is lowered, so it is necessary to control the crystal grain size by the glass material and firing conditions.

  In the simultaneous firing in the step (4), the firing temperature is set to a temperature of about 570 to 600 ° C. according to the softening point of the low-melting glass powder. The temperature rise rate at the time of temperature rise is the level of the crystallized glass until the crystallization of the bus electrode and black belt crystallized glass powder is completed or the bus electrode and black belt meander, disconnection, and lift are not reached before reaching the firing temperature. Adjust the powder to crystallize. As an adjustment method, there is a method of decreasing the temperature increase rate or providing a keep for keeping the temperature constant during the temperature increase. The time for holding the firing temperature is set to about 10 to 60 minutes.

  Next, according to the flowchart of the manufacturing process of the back substrate according to the present invention shown in FIG. 5, the manufacturing process of the back substrate of the present invention will be described. Content that overlaps with the content described in FIG. 4 is omitted.

  In the address electrode formation in step (5), an address electrode is formed on the back substrate by the same method and material as the bus electrode formation method described in step (2) of FIG.

  In the back side dielectric layer formation in the step (6), the back side dielectric layer is formed on the address electrodes by the same method as the dielectric layer forming method described in the step (3) of FIG. Low melting point glass paste for forming the back side dielectric layer is mixed with commonly known filler materials to improve brightness and to release excess charge accumulated on the back side dielectric layer. To do.

  For the partition formation in the step (7), it is preferable to use the same material as the low-melting glass powder used for the back side dielectric, and in order to maintain the shape of the partition, it is preferable to mix a filler material such as alumina or silica. . As a forming method, a generally known method such as a screen printing method, a sand blasting method, a transfer method, or an embossing method is used. Further, when using the transfer method or the stamping method, the above-mentioned back side dielectric layer formation and partition wall formation may be performed simultaneously. In this case, a paste having the same composition is used for the back side dielectric and the partition material.

  The simultaneous firing of the address electrode, the back-side dielectric, and the partition in the step (8) is the same as the step (4) in FIG. 4, but in the firing of the back substrate, the shape of the partition becomes longer when the firing temperature is maintained longer. Therefore, it is preferable to set the time shorter than the firing time of the front substrate.

  In the step (9) and the step (10), the phosphor paste and the seal paste are applied at predetermined positions by screen printing or a dispenser as in the conventional step, and then baked to complete the rear substrate.

  In the case of application to the ALIS plasma display panel shown in FIG. 3, the black band is not formed in the step (2) of FIG. 4, and the black material layer is formed following the step (7) of FIG. It may be formed and fired together with the address electrode, the back-side dielectric layer, and the barrier ribs, or the black material layer may be formed in the same step as the phosphor formation in step (9) in FIG. This black material layer may be omitted.

The exploded perspective view of the AC3 electrode surface discharge type plasma display panel to which the present invention is applied. The disassembled perspective view of the plasma display panel of the cross-girder rib structure to which this invention is applied. 1 is an exploded perspective view of an ALIS plasma display panel to which the present invention is applied. The flowchart of the manufacturing process of the front substrate which concerns on this invention. The flowchart of the manufacturing process of the back substrate which concerns on this invention. The flowchart of the manufacturing process of the conventional front substrate. The flowchart of the manufacturing process of the conventional back substrate.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Front substrate 2x, 2y Display electrode pair 3 Transparent electrode 4 Bus electrode 5 Dielectric layer 6 Surface protective layer 7 Rear substrate 8 Address electrode 9 Back side dielectric layer 10 Partition 11B Blue phosphor layer 11G Green phosphor layer 11R Red fluorescence Body layer 12 Black belt 13 Bulkhead belt 14 Black material layer

Claims (1)

A plasma display having a plurality of address electrodes on a substrate and a dielectric layer covering the address electrodes, and further provided with row-direction and column-direction partition walls that divide a discharge space into rows and columns for each cell on the dielectric layer. A method for manufacturing a rear substrate for a panel,
A pattern of the address electrode is formed on the substrate with a metal paste containing crystallized glass, a layer of a low melting point glass serving as the dielectric layer is formed on the address electrode pattern, and the low melting point for the dielectric layer is further formed. A black material layer containing crystallized glass is formed between adjacent row direction barrier rib patterns corresponding to the inter-row portions of the barrier rib pattern while forming the row direction and column direction barrier rib patterns on the glass layer using low melting point glass. After that, the address electrode pattern, the low melting point glass layer, the barrier rib pattern, and the black material layer are fired at the same time, so that a laminate of the address electrode, the dielectric layer, the barrier rib, and the black material layer is formed on the substrate. A method for producing a rear substrate for a plasma display panel, comprising: forming a rear substrate for a plasma display panel.

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