JP2007109045A - Reset controller and reset control method for signal processing circuit and reset control circuit insertion method for signal processing circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reset a plurality of function blocks without considering the reset order of those function blocks, and to, even when the prescribed function block is reset, suppress the generation of the influence of signal change due to reset in the other function blocks. <P>SOLUTION: This reset controller of a signal processing circuit is provided with a plurality of function blocks 12A to 12C and a reset management part 11, and the function block 12A is connected through a reset control part 13A to the function block 12B, and the function block 12B is connected through a reset control part 13B to the function block 12C. Block reset signals 112A to 112C generated by the reset management part 11 are supplied to the plurality of function blocks 12A to 12C, and reset is performed in each function block 12A to 12C. The reset control parts 13A and 13B controls whether the propagation of an input signal from the function block as the object of reset to the function block as the object of non-reset should be permitted or blocked. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a reset control device for a signal processing circuit having a plurality of functional blocks, and more particularly to a technique for resetting each functional block.

  In recent signal processing circuits, with the diversification of functions and the increase in circuit scale, the use of IP (Intellectual Property) and other function blocks that have already been developed are reused. More and more are built into. In order for the signal processing circuit to operate normally, it is necessary to consider the reset order of each functional block, and for each designed signal processing circuit, a reset control device for resetting in a predetermined order is designed. The issue of how to efficiently design a block reset control device has become prominent.

  The prior art relating to reset control of the signal processing circuit will be described below.

  Conventionally, as a reset control device of a signal processing circuit, for example, there is a technique described in Patent Document 1.

  FIG. 8 shows a conventional technique related to reset control of a signal processing circuit described in Patent Document 1. In the figure, a signal processing circuit (not shown) includes functional blocks 82A, 82B, and 82C to which block reset signals 812A, 812B, and 812C are supplied. The functional blocks 82A and 82B include inter-block wiring 813AB. The functional blocks 82B and 82C are connected by an inter-block wiring 814BC. The signal processing circuit includes a reset management unit 81 that generates the block reset signals 812A to 812C for each of the functional blocks 82A to 82C and controls reset in a predetermined order.

In such a signal processing circuit, the reset management unit 81 is designed in consideration of the function of each of the functional blocks 82A to 82C, the reset order, and the like, and the reset of the entire signal processing circuit is controlled.
JP-A-5-250072

  However, the signal processing circuit to which the technique described in Patent Document 1 is applied has a drawback that it is necessary to design the reset management unit in consideration of the reset order in accordance with the combined functional blocks. In addition, when resetting a functional block to be reset in the signal processing circuit, an influence of the reset of the functional block to be reset on a functional block to be reset that is supplied with a signal from the functional block to be reset In order not to propagate, there is a drawback that it is necessary to add control to each functional block.

  The present invention has been made paying attention to the above problems, and its purpose is to design a reset management unit in a signal processing circuit including a plurality of functional blocks without considering the reset order of the plurality of functional blocks. In addition, even when the reset functional block is reset, in the non-reset functional block to which a signal is supplied from the reset functional block, the reset functional block The object is to effectively suppress the influence of a signal change caused by a reset.

  In order to achieve the above object, in the present invention, in a reset control device for a signal processing circuit that includes a plurality of functional blocks, and the functional blocks are connected to each other by inter-block wiring, the influence of the reset of the functional block to be reset However, a reset control unit is newly provided between the functional block to be reset and the functional block to be non-reset so as not to propagate to the functional block to be reset that is supplied with a signal from the functional block to be reset. Provided is a configuration that controls signal propagation in the reset control unit.

  Specifically, a reset control device for a signal processing circuit according to a first aspect of the present invention includes a plurality of functional blocks provided in the signal processing circuit, and a reset signal generating means for generating a block reset signal for each of the plurality of functional blocks. Two predetermined functional blocks among the plurality of functional blocks are connected by inter-block wiring, and each of the plurality of functional blocks resets its own functional block according to the block reset signal, and In addition, a signal generated by resetting the functional block to be reset with respect to an input signal via the inter-block wiring from the functional block to be reset to the functional block to be non-reset between the predetermined two functional blocks. The reset is performed so that the influence of the change does not propagate to the non-reset target functional block. Characterized by comprising a reset controller that controls the signal propagation from the functional block of interest to the non-reset target functional block.

  According to a second aspect of the present invention, in the reset control device for a signal processing circuit according to the first aspect, the reset signal generating means includes a reset control signal supplied to the reset control unit, and the block reset signal includes the plurality of block reset signals. The reset control unit receives the reset control signal and controls signal propagation from the functional block to be reset to the functional block to be non-reset. To do.

  According to a third aspect of the present invention, in the reset control device for a signal processing circuit according to the second aspect, the reset signal generating means resets the functional block to be reset before resetting based on the block reset signal. The reset control signal is supplied to the reset control unit so that the control unit operates, and the reset control unit does not propagate the reset signal from the functional block to be reset to the functional block to be non-reset. A state holding unit that holds a state, and the state holding unit releases a state in which a signal from the functional block to be reset before the reset is not propagated after the reset state of the functional block to be reset is released It is characterized by doing.

  According to a fourth aspect of the present invention, in the reset control device for a signal processing circuit according to the third aspect, the state holding unit fixes an output signal to the non-reset target functional block at a predetermined value. And

  According to a fifth aspect of the present invention, in the reset control device for a signal processing circuit according to the fourth aspect, the predetermined value of the output signal fixed by the state holding means is a “0” value.

  According to a sixth aspect of the present invention, in the reset control device for the signal processing circuit according to the fourth aspect, the predetermined value of the output signal fixed by the state holding means is the non-reset immediately before the reset from the functional block to be reset. It is a value of the signal input to the target functional block.

  According to a seventh aspect of the present invention, in the reset control device for a signal processing circuit according to the first aspect, the reset control unit is input from the functional block targeted for reset to the functional block targeted for non-reset immediately before the reset. A signal holding means for holding the received signal, wherein the signal holding means is in a state other than a propagation control state in which the reset control unit prevents signal propagation from the functional block to be reset to the functional block to be non-reset. In this case, a predetermined signal can be written.

  According to an eighth aspect of the present invention, in the reset control device for a signal processing circuit according to the first aspect, the reset control unit is disposed between the plurality of functional blocks, and the plurality of reset control units are Each of the two corresponding functional blocks includes a signal holding unit that holds a signal that has been input to the non-reset target functional block immediately before the reset target functional block, and the plurality of signal holding units sequentially The plurality of signal holding means are connected so as to be able to propagate signals, and the reset control unit is in a state other than the propagation control state in which signal propagation from the functional block to be reset to the functional block to be reset is not controlled. The data can be written sequentially.

  According to a ninth aspect of the present invention, there is provided a signal processing circuit reset control method comprising: a plurality of functional blocks, wherein two predetermined functional blocks of the plurality of functional blocks are connected by inter-block wiring. A reset control method that outputs a block reset signal to any one of the plurality of functional blocks, resets the functional block that has received the block reset signal, and resets between the two predetermined functional blocks The influence of signal change due to reset of the functional block to be reset does not propagate to the functional block to be non-reset with respect to the input signal via the inter-block wiring from the target functional block to the non-reset target functional block. Signal from the functional block targeted for reset to the functional block targeted for non-reset And controlling the seeding.

  According to a tenth aspect of the present invention, in the reset control method of the signal processing circuit according to the ninth aspect, the reset control signal is generated before the block reset signal is supplied to any one of the functional blocks, Signal propagation from the functional block to be reset to the functional block to be non-reset is controlled based on the reset control signal.

  The invention according to claim 11 is the reset control method for a signal processing circuit according to claim 10, wherein the reset signal from the functional block to be reset is not propagated to the functional block to be reset. Then, the reset state of the functional block to be reset is released, and then the state in which a signal from the functional block to be reset before the reset is not propagated is released.

  According to a twelfth aspect of the present invention, in the reset control method of the signal processing circuit according to the eleventh aspect, a state in which a signal after reset from the functional block to be reset is not propagated to the functional block to be reset is held. This is performed by fixing an output signal to the non-reset target functional block to a predetermined value.

  The invention according to claim 13 is the reset control method for a signal processing circuit according to claim 12, wherein the predetermined value for fixing the output signal to the functional block to be reset is a "0" value. To do.

  According to a fourteenth aspect of the present invention, in the reset control method for the signal processing circuit according to the twelfth aspect, the predetermined value for fixing the output signal to the functional block to be reset is immediately before the reset from the functional block to be reset. It is the value of the signal input to the non-reset target functional block.

  According to a fifteenth aspect of the present invention, in the reset control method for the signal processing circuit according to the ninth aspect, a propagation control state in which signal propagation from the reset target functional block to the non-reset target functional block is prevented. Sometimes, the signal input to the non-reset target functional block immediately before the reset from the reset target functional block is held in the signal holding circuit, while the non-reset target functional block from the reset target functional block In a state other than the propagation control state in which signal propagation to is prevented, a predetermined signal is written in the signal holding circuit.

  According to a sixteenth aspect of the present invention, in the reset control method for a signal processing circuit according to the ninth aspect, a signal processing circuit is arranged in each inter-block wiring between the plurality of functional blocks, and the function to be reset In the propagation control state in which signal propagation from the block to the non-reset target functional block is blocked, the signal input from the reset target functional block to the non-reset target functional block immediately before the reset is The signal processing circuit is held between two functional blocks, while the signal processing circuit is in a state other than the propagation control state in which signal propagation from the functional block to be reset to the functional block to be non-reset is blocked, the plurality of signal processing A plurality of predetermined signals are sequentially propagated and written to the circuit.

  According to a seventeenth aspect of the present invention, there is provided a signal processing circuit reset control circuit insertion method for generating circuit data of a signal processing circuit by combining circuit data of a plurality of functional blocks, and thereafter generating the circuit data of the generated signal processing circuit. Based on the above, the connection relation between the predetermined functional block in the signal processing circuit and another functional block is analyzed, and then, based on the analyzed connection relation, the predetermined functional block and the predetermined functional block The circuit data of the reset control circuit for controlling the signal propagation between the two functional blocks is inserted into the circuit data of the signal processing circuit between other functional blocks connected to.

  As described above, in the inventions according to claims 1 to 17, since the reset control unit is connected between the functional block to be reset and the functional block to be reset, the function to be reset from the functional block to be reset Signal propagation to the block is enabled or interrupted by the reset controller.

  In particular, in the invention according to claim 2 or 10, since the reset control unit receives a reset control signal before the functional block to be reset is reset, the reset is performed when the functional block to be reset is reset. The control unit has already been operated and has already determined whether or not to allow signal propagation from the functional block to be reset.

  As described above, according to the reset control device and the reset control method of the signal processing circuit of the inventions according to claims 1 to 17, the functional block to be reset and the functional block to be non-reset are provided via the reset control unit. Since it is connected, it becomes possible to control the signal propagation from the functional block to be reset to the functional block to be non-reset in the reset control unit, so the reset order of a plurality of functional blocks in the signal processing circuit is considered. Therefore, it is possible to design the reset signal generation means without being aware of the reset order of the plurality of functional blocks. In addition, even when only a predetermined functional block in the signal processing circuit is reset, an influence of a signal change due to reset of the predetermined functional block is applied to a non-reset target functional block supplied with a signal from the predetermined functional block. This has the effect of effectively suppressing the occurrence of.

  In particular, according to the reset control device for a signal processing circuit of the invention according to claim 2 or 10, the reset control unit has already been operated, and the function block to be reset is subsequently changed to the function block to be reset. After it is determined whether or not signal propagation is permitted, the reset target functional block is actually reset, so that it is possible to more effectively suppress the influence of the signal change caused by the reset of the reset target functional block.

  A signal processing circuit reset control apparatus, reset control method, and signal processing circuit reset control circuit insertion method according to embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing the overall configuration of a reset control device for a signal processing circuit according to an embodiment of the present invention.

  In the figure, a signal processing circuit (not shown) includes a plurality of functional blocks 12A, 12B, 12C and a reset management unit 11. The reset management unit 11 receives the reset signal 111 and generates block reset signals 112A, 112B, and 112C for each of the functional blocks 12A to 12C that need to be reset. The block reset signals 112A to 112C are respectively supplied to the corresponding functional blocks 12A to 12C, and the plurality of functional blocks 12A to 12C are reset according to the block reset signals 112A to 112C.

  The functional block 12A and the functional block 12B are connected by an inter-block wiring 120AB, and the functional block 12B and the functional block 12C are connected by an inter-block wiring 121BC. Here, a reset management unit 13A is provided between the two functional blocks 12A and 12B, and a reset management unit 13B is provided between the two functional blocks 12B and 12C. The reset management units 13A and 13B are provided. Then, the signal propagation of the input signal from the functional block to be reset to the functional block to be non-reset is controlled.

  Here, the reset management unit 11 receives reset control signals 113AB and 113BC supplied to the reset control units 13A and 13B, and block reset signals 112A to 112C from the plurality of functional blocks 12A to 12C. Is also generated before. The reset control units 13A and 13B receive the reset control signals 113AB and 113BC, and control signal propagation from the functional block to be reset to the functional block to be non-reset.

  FIG. 2 shows a block diagram of the overall configuration of the reset control units 13A and 13B.

  In the figure, signal selection units (reset control units) 13A and 13B control the signal propagation of input signals 211A and 212B from the functional block to be reset to the functional block to be non-reset and hold the signal internally. Circuits 22A and 22B are included. Each of the signal holding circuits 22A and 22B holds a predetermined value in advance. This predetermined value is, for example, a “0” value. The signal propagation is controlled by reset control signals 113AB and 113BC from the reset management unit 11. When signals are propagated, the input signals 211A and 212B themselves are propagated as output signals 211B and 212C. When the input signal is not propagated, a predetermined value held in the signal holding circuits 22A and 22B is propagated to the output signals 211B and 212C.

  FIG. 3 is a block diagram of the overall configuration of the reset management unit 11.

  The reset management unit 11 includes a reset control determination unit 31 and a reset signal generation unit (reset signal generation means) 32. A reset signal 311 and reset control information 312 are input to the reset control determination unit 31, and a reset control signal 113 to be output to the reset control units 13A and 13B is generated based on the reset control information 312. The reset signal generator 32 receives the reset signal 311 and the reset information 315, and generates a block reset signal 112 corresponding to each functional block to be reset based on the reset information 315.

  FIG. 4 shows a reset sequence diagram in the reset control device of the present embodiment.

  First, in step S1, the reset management unit 11 generates a reset control signal 113 based on the reset signal 311 and the reset control information 312 and supplies the reset control signal 113 to the reset control units 13A and 13B. Thereby, for example, the reset control unit 13A sets a state in which a signal is not propagated from the functional block 12A to be reset to the functional block 12B to be reset. Next, in step S2, the reset management unit 11 generates a block reset signal 112 from the reset signal 311 and the reset information 315, and supplies the block reset signal 112 to the functional block 12A to be reset. As a result, the functional block 12A to be reset resets its own functional block 12A in accordance with the block reset signal 112 in step S3. In step S4, after the reset state of the reset target functional block 12A is released, the reset control unit 13A sends a signal from the reset target functional block 12A to the non-reset target functional block 12B in step S5. The state not to be propagated is canceled, and the normal operation state is entered in step S6.

  FIG. 5 shows a block diagram of a modified example of the reset control units 13A and 13B.

  When the signal selection units (reset control units) 13A and 13B permit the propagation of signals from the reset target functional block to the non-reset target functional block, the output signals 211B and 212C to the non-reset target functional block The signals 514A and 514B returned to the reset control units 13A and 13B are held by the signal holding circuits 52A and 52B. According to this configuration, when the functional block to be reset is reset, the values of the signals 211B and 212C input from the functional block to be reset to the functional block to be non-reset immediately before the reset are set as predetermined values. Since it can be output to the non-reset target functional block, the ongoing processing can be executed to the end in the non-reset target functional block.

  Here, the signal holding circuits 52A and 52B and the signal holding circuits 22A and 22B shown in FIG. 2 fix the output signal to the non-reset target functional block to a value immediately before resetting or a “0” value. A state holding unit configured to hold a state in which a signal after reset from the functional block to be reset is not propagated to the functional block to be reset is configured.

  In the present embodiment, the selectors are used as the reset control units 13A and 13B. However, the selectors may be configured using only AND gates or OR gates. It is also possible to insert a flip-flop circuit that latches the input value and control the load hold signal with the reset control signal. At this time, a delay of one cycle occurs between the functional blocks, but it is effective when there is no influence even if a delay of one cycle occurs.

  FIG. 6 is a diagram showing another embodiment of the reset control device for the signal processing circuit of the present invention.

  In the figure, the data read / write unit 64 writes signals 614AB and 614BC, respectively, corresponding to signal holding circuits (not shown in the figure) in the reset control units 63A and 63B. Here, in the propagation control state in which the signal propagation from the functional block to be reset to the functional block to be non-reset is blocked, the signals 614AB and 614BC to the signal holding circuit in the reset control units 63A and 63B. Thus, the functional block 12B can be tested using the reset control units 63A and 63B. Further, even when the connection destination of the input terminal and the output terminal of the functional block is an external terminal, it is possible to perform a test by setting data for the external terminal and comparing it with an expected value.

  FIG. 7 shows still another embodiment of the reset control device for the signal processing circuit of the present invention.

  In the figure, a signal holding circuit (not shown in the figure) in the reset control unit 73A and a signal holding circuit (not shown in the figure) in the reset control unit 73B are connected so that signals can propagate sequentially. Thus, the signal from the signal holding circuit in the reset control unit 73A can be sequentially written into the signal holding circuit in the reset control unit 73B. In the two signal holding circuits, the input of the signal holding circuit in the reset control unit 73A is connected to an external input terminal, and the output of the signal holding circuit in the reset control unit 73B is connected to an external output terminal. By inputting and outputting data, the functional block 12B can be tested without increasing the number of circuits.

Therefore, in the present embodiment, in the signal processing circuit including a plurality of functional blocks, the functional block to be reset and the functional block to be reset are connected via a reset control unit, and the functional block to be reset is Since the reset control unit controls whether to allow or prevent signal propagation to the non-reset target functional block, it is not necessary to consider the reset order of the plurality of functional blocks 12A, 12B, and 12C in the signal processing circuit. Thus, it becomes possible to design the reset management unit 11 without being aware of the reset order of the plurality of functional blocks 12A to 12C, and even when only a predetermined functional block in the signal processing circuit is reset, Stops processing in other functional blocks to which signals are supplied from a given functional block And no, it is possible to reset the predetermined functional block.

  Next, a method for inserting a reset control unit of a signal processing circuit including a plurality of functional blocks will be described. First, based on the data of the signal processing circuit, an output signal from a predetermined functional block to another functional block is extracted, and the circuit data of the reset control unit shown in FIG. 2 or 5 is inserted in the path of this output signal To do. If the input signal to the other functional block is extracted and the circuit data of the reset control unit is inserted, the output signal of the predetermined functional block branches and becomes a functional block different from the other functional block. Even in the case of being supplied, it is possible to control signal propagation between a predetermined functional block and one or more functional blocks connected thereto in a one-to-one manner.

  As described above, since the present invention controls signal propagation between a plurality of functional blocks in a signal processing circuit, a reset control device for a semiconductor integrated circuit that reuses functional blocks that have already been developed, etc. Useful as.

It is a block diagram which shows the whole structure of the reset control apparatus of the signal processing circuit of embodiment of this invention. It is a block diagram which shows the whole structure of the reset control part in the reset control apparatus of the signal processing circuit. It is a block diagram which shows the whole structure of the reset management part in the reset control apparatus of the signal processing circuit. It is a reset sequence diagram in the reset control device of the signal processing circuit. It is a figure which shows the modification of the reset control part in the reset control apparatus of the signal processing circuit. It is a block diagram of the whole structure of other embodiment of the reset control apparatus of this invention. It is a block diagram of the whole structure of further another embodiment of the reset control apparatus of this invention. It is a block diagram which shows the whole structure of the reset control apparatus of the conventional signal processing circuit.

Explanation of symbols

11 Reset management units 12A to 12C Function blocks 13A, 13B, 63A,
63B, 73A, 73B Reset controller 112A-112C Block reset signal 113AB, 113BC Reset control signal 120AB, 121BC Interblock wiring 22A, 22B, 52A, 52B Signal holding circuit (state holding means and signal holding means)
31 Reset control determination unit 32 Reset signal generation unit (reset signal generation means)
64 Data read / write

Claims (17)

A plurality of functional blocks provided in the signal processing circuit;
Reset signal generating means for generating a block reset signal for each of the plurality of functional blocks,
Two of the plurality of functional blocks are connected by inter-block wiring, and each of the plurality of functional blocks resets its own functional block according to the block reset signal,
Furthermore, between the predetermined two functional blocks, the reset target functional block is reset with respect to an input signal from the reset target functional block to the non-reset target functional block via the inter-block wiring. A reset control unit is provided for controlling signal propagation from the functional block to be reset to the functional block to be non-reset so that an influence of a signal change is not propagated to the functional block to be non-reset. Reset control device for signal processing circuit. In the reset control device of the signal processing circuit according to claim 1,
The reset signal generation means generates a reset control signal supplied to the reset control unit before the block reset signal is supplied to the plurality of functional blocks,
The reset control unit, in response to the reset control signal, controls signal propagation from a reset target functional block to a non-reset target functional block. In the reset control device for a signal processing circuit according to claim 2,
The reset signal generating means supplies the reset control signal to the reset control unit so that the reset control unit operates before the functional block to be reset is reset based on the block reset signal.
The reset control unit has state holding means for holding a state in which a signal after reset from the functional block to be reset is not propagated to the functional block to be reset.
The state holding unit releases a state in which a signal from the functional block to be reset before the reset is not propagated after the reset state of the functional block to be reset is released. Control device. In the reset control device for a signal processing circuit according to claim 3,
The signal holding circuit reset control device, wherein the state holding unit fixes an output signal to the non-reset target functional block to a predetermined value. In the reset control device for a signal processing circuit according to claim 4,
The signal control circuit reset control device, wherein the predetermined value of the output signal fixed by the state holding means is a “0” value. In the reset control device for a signal processing circuit according to claim 4,
The predetermined value of the output signal fixed by the state holding unit is a value of a signal input from the functional block targeted for reset to the functional block targeted for non-reset immediately before resetting. Reset control device. In the reset control device of the signal processing circuit according to claim 1,
The reset control unit includes a signal holding unit that holds a signal input to the non-reset target functional block immediately before the reset from the reset target functional block,
The signal holding unit can write a predetermined signal when the reset control unit is in a state other than a propagation control state in which signal propagation from the functional block to be reset to the functional block to be non-reset is blocked. A reset control apparatus for a signal processing circuit. In the reset control device of the signal processing circuit according to claim 1,
The reset control unit is disposed between the plurality of functional blocks,
Each of the plurality of reset control units includes a signal holding unit that holds a signal that has been input to the non-reset target functional block immediately before the reset target functional block from the corresponding two functional blocks.
The plurality of signal holding means are connected so that signals can be propagated sequentially,
Data can be sequentially written to the plurality of signal holding means when the reset control unit is in a state other than the propagation control state in which the signal propagation from the functional block to be reset to the functional block to be reset is not controlled. A reset control device for a signal processing circuit. A signal processing circuit reset control method comprising a plurality of functional blocks, wherein two predetermined functional blocks of the plurality of functional blocks are connected by inter-block wiring;
A block reset signal is output to any of the plurality of functional blocks, and the functional block that has received the block reset signal is reset.
Effect of signal change due to reset of functional block to be reset on input signal from functional block to be reset between predetermined two functional blocks to functional block not to be reset via inter-block wiring A signal control circuit reset control method, wherein signal propagation from the functional block to be reset to the functional block to be non-reset is controlled so as not to propagate to the functional block to be reset. In the reset control method of the signal processing circuit according to claim 9,
Before the block reset signal is supplied to any of the functional blocks, a reset control signal is generated,
A signal control circuit reset control method, comprising: controlling signal propagation from a reset target functional block to a non-reset target functional block based on the reset control signal. The signal processing circuit reset control method according to claim 10,
Holding a state in which a signal after reset from the functional block to be reset is not propagated to the functional block to be non-reset,
Thereafter, the reset state of the functional block to be reset is released,
Next, the signal processing circuit reset control method is characterized by canceling the state in which the signal from the functional block to be reset before the reset is not propagated. The signal processing circuit reset control method according to claim 11,
Maintaining a state in which a signal after reset from the functional block to be reset is not propagated to the functional block to be non-reset is performed by fixing an output signal to the functional block to be non-reset to a predetermined value. A reset control method for a signal processing circuit. In the reset control method of the signal processing circuit according to claim 12,
The signal processing circuit reset control method, wherein the predetermined value for fixing the output signal to the functional block to be reset is a “0” value. In the reset control method of the signal processing circuit according to claim 12,
The predetermined value for fixing the output signal to the functional block to be reset is a value of a signal that has been input from the functional block to be reset to the functional block to be reset immediately before resetting. Processing circuit reset control method. In the reset control method of the signal processing circuit according to claim 9,
In a propagation control state in which signal propagation from the functional block to be reset to the functional block to be non-reset is blocked, the signal is input from the functional block to be reset to the functional block to be non-reset immediately before the reset. Hold the signal in the signal holding circuit,
On the other hand, a signal processing circuit that writes a predetermined signal to the signal holding circuit in a state other than a propagation control state in which signal propagation from the functional block to be reset to the functional block to be non-reset is blocked Reset control method. In the reset control method of the signal processing circuit according to claim 9,
A signal processing circuit is arranged in each inter-block wiring between the plurality of functional blocks,
In a propagation control state in which signal propagation from the functional block targeted for reset to the functional block targeted for non-reset is blocked, the signal is input from the functional block targeted for reset to the functional block targeted for non-reset immediately before the reset. Is held in the signal processing circuit between these two functional blocks,
On the other hand, in a state other than the propagation control state in which signal propagation from the functional block to be reset to the functional block to be non-reset is blocked, a plurality of predetermined signals are sequentially propagated and written to the plurality of signal processing circuits. A reset control method for a signal processing circuit. Create circuit data of signal processing circuit by combining circuit data of multiple functional blocks,
After that, based on the circuit data of the created signal processing circuit, analyze the connection relationship between the predetermined functional block in the signal processing circuit and other functional blocks,
Next, based on the analyzed connection relationship, a reset control for controlling signal propagation between the two functional blocks between the predetermined functional block and another functional block connected to the predetermined functional block Inserting circuit data of a circuit into circuit data of the signal processing circuit. A method for inserting a reset control circuit of a signal processing circuit.

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