JP2007108986A - Semiconductor storage device and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the number of times of rewriting in a flash memory. <P>SOLUTION: A semiconductor storage device, which is mounted with a plurality of semiconductor devices forming semiconductor storage circuits and stores data in these semiconductor devices, has first semiconductor devices and second semiconductor devices as the semiconductor devices for forming the semiconductor storage circuits. The block sizes of the storage circuits of the first semiconductor devices are smaller and rewrite resistance of them are higher than the storage circuits of the second semiconductor devices. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor memory device and a semiconductor device, and more particularly to a technique that is effective when applied to data storage using a nonvolatile memory cell.

  Various data storage systems are used for information processing apparatuses such as computers. Among them, hard disk drives using magnetism are mainly used for storing data for storing relatively large amounts of information continuously. It is used for.

  In this hard disk drive, in order to increase the capacity and increase the processing speed, the disk on which data is recorded and the magnetic head are rotating at high speed while maintaining a very narrow space of about 0.1 μm. For this reason, a crash may occur in which the disk is destroyed due to impact during operation or intrusion of foreign matter, etc. Normally, when the disk is destroyed, all stored data is lost and difficult to repair. .

  In recent years, due to the progress of miniaturization, etc., the capacity of nonvolatile memory that retains information even when the power supply voltage is shut down has been increasing, and semiconductor memory devices equipped with a plurality of such nonvolatile memories have been used as an alternative to hard disk drives. It has begun to be called a flash memory drive or silicon disk drive.

  Compared to hard disk drives, this silicon disk drive is superior in earthquake resistance and shock resistance because there is no drive system, and since it does not require head movement, it does not require seek time and operates at high speed. Thus, there are advantages such as low power consumption and easy miniaturization.

  In systems that require a high degree of reliability, as a countermeasure against the above-mentioned crash, etc., the hard disk drive is set to have a management life after a certain period of use or operation for a certain period of time. We are maintaining and exchanging. In silicon disk drives, since such maintenance is not necessary, the cost of equipment and work required for maintenance can be reduced, and the operation stoppage time for maintenance can be eliminated.

  However, in a flash memory used for a silicon disk drive, information is written or erased by injecting and emitting electrons to a floating gate of a memory cell.

  For this reason, every time information is rewritten, the gate insulating film is affected by the passage of electrons and the gate insulating film gradually deteriorates, and the operation of the memory cell becomes unstable due to repeated information rewriting over time, or Operation may become impossible.

In the flash memory, information is rewritten for each block composed of a plurality of memory cells, and in order to avoid trouble due to malfunction of the memory cell over time, the number of data rewrites is set to 1 × 10 ⁵ for each block, for example. The number of rewrites is limited to about once, and the use of blocks that exceed a certain number of rewrites is stopped.

  For this reason, the following Patent Document 1 proposes a semiconductor disk device having an access destination control means for controlling an access destination so that a plurality of types of flash EEPROM chips having different writing units can be switched according to the data size of the write data. Has been.

  Further, in Patent Document 2 below, an alternative memory area that replaces an area in which an error has occurred in the data memory area and an error memory area having an address of the alternative memory as error information are provided, and read / write control can be performed by the access function of the device driver. An FEEPROM disk management system has been proposed.

JP-A-6-52691 JP 2000-99408 A

  However, in the technique described in Patent Document 2, since the chip is switched only by the block size of the memory chip, the application is limited and the practicality is lowered.

  In the technique described in Patent Document 2, an alternative memory area and an error memory area are required in addition to the data memory area, and the capacity of the disk device is reduced.

  An object of the present invention is to provide a technique capable of solving these problems and reducing the number of rewrites of a nonvolatile memory such as a flash memory. The above and other problems and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.
A semiconductor memory device in which a plurality of semiconductor devices each having a semiconductor memory circuit in which a plurality of memory cells are integrated is mounted and data is stored in the semiconductor device. The semiconductor device in which the semiconductor memory circuit is formed includes: The memory circuit of the first semiconductor device has a smaller block size and higher resistance to rewriting than the memory circuit of the second semiconductor device.

  In a semiconductor device having a semiconductor memory circuit in which a plurality of memory cells are integrated and storing data in the semiconductor memory circuit, the semiconductor memory circuit includes a first semiconductor memory circuit, a second semiconductor memory circuit, The first semiconductor memory circuit has a smaller block size and higher rewrite resistance than the second semiconductor memory circuit.

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
(1) According to the present invention, the flash memory can be selected and written according to the size of data to be stored.
(2) According to the present invention, the effect (1) has an effect that the number of rewrites of the built-in flash memory can be reduced.
(3) According to the present invention, the above effect (1) has the effect of reducing the generation of fragments.
(4) According to the present invention, due to the effects (2) and (3), there is an effect that it is possible to prevent the life of the apparatus from being reduced.

(Embodiment 1)
Embodiments of the present invention will be described below. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  FIG. 1 is a block diagram showing a state in which a silicon disk drive according to an embodiment of the present invention is connected to a host device.

  First, in the host device 1, data necessary for the arithmetic processing of the MPU 2 and data obtained by the arithmetic processing are temporarily recorded in a volatile RAM (Random Access Memory) 3. Of these data, data that needs to be stored is transmitted to the silicon disk drive 5 via the interface 4 and written therein. Similarly, data necessary for arithmetic processing is read from the data stored in the silicon disk drive 5 and transmitted to the MPU 2 via the interface 4.

  1 is a block diagram showing a state in which a silicon disk drive that is a semiconductor storage device of the present embodiment is connected to a host device. FIG. In the silicon disk drive 5, a controller 6 is connected to the interface 4 of the host device 1, and a plurality of flash memories in which a plurality of nonvolatile memory cells are integrated to form a semiconductor memory circuit are connected to the controller 6. Here, as an example, two AND-type flash memories 7a and eight NAND-type flash memories 7b are connected, but an appropriate number can be connected depending on the required capacity and application.

  In the processing of digital information, the minimum unit of data is a byte (hereinafter represented by B), and the capacity of the storage device is represented by this byte. Since 8 bits are 1B, the silicon disk drive 5 requires an 8 gigabit memory in order to obtain a storage capacity of 1 GB. If the NAND flash memory 7b is used, a 2 gigabit memory chip is required. Will be installed. However, if the AND type flash memory 7a manufactured by the equivalent technology is used, the memory cell size is different, so that the equivalent chip size has a capacity of 512 megabits. In order to obtain a storage capacity of 1 GB, a memory chip is required. 16 will be installed.

  Conventional hard disk drives used for data storage are divided into sectors, which are the smallest units for recording data on a disk, and this sector is too small as a unit for managing data. The cluster is a minimum unit of clusters.

  The size of this cluster varies depending on the file system, and is, for example, 512B to 64KB depending on the storage capacity of the apparatus. As the storage capacity of the storage device increases due to data management problems, the cluster size must be increased. Since data is stored in units of clusters, even 1B data requires one cluster for storage.

  Similarly, in a flash memory, a single chip is divided into a plurality of blocks, and data can be erased collectively in units of blocks. Each block is divided into pages, and this page is the minimum unit of writing. For this reason, even 1B data requires one page to store it.

  In addition, if data is simply written, it can be done in units of pages. However, in the case of overwriting that records other data in the data recording area, the data recorded before the writing is recorded. Must be erased, and this erasure must be performed in units of blocks. Therefore, even for 1B data, it is necessary to erase one block to store it.

  In a NAND flash memory, for example, a 2-gigabit memory chip is divided into blocks with a capacity of 128 KB, for example, and each block is divided into pages with a capacity of 1 KB, for example.

  In an AND type flash memory, taking a 512-megabit memory chip as an example, the capacity is divided into, for example, 2 KB blocks, and each block is divided into, for example, 512 B pages.

  For this reason, if there is a fragment in which necessary data and unnecessary data are mixed in the block where data is to be stored, the necessary data will be organized and written together. However, there arises a problem that the writing speed decreases or the number of rewrites increases.

  Therefore, in the present invention, a first flash memory and a second flash memory are mounted as a plurality of types of flash memories, and the first flash memory is compared with the second flash memory. The block size is small and the rewrite resistance is high.

  Specifically, the first semiconductor memory device is an AND type flash memory 7a, and the second semiconductor device is a NAND type flash memory 7b.

  The NAND flash memory 7b can be highly integrated and is suitable for obtaining a large capacity, but has a large block size. Therefore, in combination with the AND type flash memory 7a having a small block size, the generation of fragments can be reduced.

  The AND-type flash memory 7a and the NAND-type flash memory 7b are highly compatible because data access is sequential access and there is no significant difference in write speed. Here, when, for example, a NOR type flash memory is adopted as the first flash memory instead of the AND type, there is a difference in writing speed from the NAND type which is the second flash memory, which is a random access. In addition, it is difficult to use as a single system.

  The controller 6 selects a flash memory according to the size of the data to be stored, and writes data into the AND type flash memory 7a if it is smaller than a preset reference value, and if it is greater than a preset reference value, the NAND type is selected. Write to the flash memory 7b.

  In the AND type flash memory 7a, data can be divided into a plurality of pieces and written in parallel. However, when the data is divided and written, a decrease in writing speed becomes a problem.

  Therefore, for example, if the data size reference value is obtained by multiplying the AND block size by the number of banks, the influence on the writing speed can be suppressed. Taking the above-mentioned 512 megabit memory chip as an example, an AND type flash memory 7a is obtained by multiplying the block size of 2 KB by the number of banks. Since the number of banks is currently about 4 and will be increased to about 8 in the future, up to 8 KB to 16 KB of data can be stored in the AND type flash memory 7a.

  FIG. 2 is a flowchart showing writing to the silicon disk drive of the present embodiment. The controller 6 determines the data size of the data to be stored. If the data is larger than the reference value, the data is written to the NAND flash memory 7b and the program is terminated.

  If the data to be stored is equal to or smaller than the reference value and larger than the block size, the data is divided and written to the AND flash memory 7a, and the program is terminated. If the data to be stored is equal to or smaller than the block size, the data is written as it is into the AND flash memory 7a, and the program is terminated.

  FIG. 3 is a block diagram showing a modification of the present embodiment. In this example, the host device is controlled by an OS (Operating System), and the logic provided in the MPU 2 or the interface 4 of the host device 1 selects the flash memories 7a and 7b according to the size of data to be stored, and each controller 6a. , 6b for writing. In this example, since the controller 6 does not select, a general-purpose controller can be used as it is.

(Embodiment 2)
In the silicon disk drive of the above-described embodiment, a plurality of types of flash memories are mounted. However, in this embodiment, a semiconductor memory circuit in which a plurality of nonvolatile memory cells are integrated is provided. For a semiconductor device for storing data, a plurality of types of storage circuits are formed on a single chip.

  In the present embodiment, the semiconductor memory circuit includes a first semiconductor memory circuit and a second semiconductor memory circuit, and the first semiconductor memory circuit is compared with the second semiconductor memory circuit. The block size is small and the rewrite resistance is high.

  Specifically, the first semiconductor memory circuit is an AND type flash memory area 9a, and the second semiconductor memory circuit is a NAND type flash memory area 9b. The AND type region 9a and the NAND type region 9b can have appropriate storage capacities depending on the required capacity and application.

  The NAND flash memory area 9b can be highly integrated and is suitable for obtaining a large capacity, but has a large block size. Therefore, the generation of fragments can be reduced in combination with the AND type flash memory area 9a having a small block size.

  The controller 6 selects a flash memory according to the size of data to be stored, and writes data in the AND type flash memory area 9a if it is smaller than a preset reference value, and NAND type if it is greater than a preset reference value. The flash memory area 9b is written.

  In the AND type flash memory area 9a, data can be divided into a plurality of pieces and written in parallel. However, when the data is divided and written, a decrease in writing speed becomes a problem. Therefore, for example, if the data size reference value is obtained by multiplying the AND block size by the number of banks, the influence on the writing speed can be suppressed.

  It is also possible to integrate the controller 6 in the semiconductor device 8 so as to be integrated.

  Although the present invention has been specifically described based on the above-described embodiment, the present invention is not limited to the above-described embodiment, and it is needless to say that various changes can be made without departing from the scope of the invention. It is.

  For example, in recent years, in addition to a CPU (Central Processing Unit) that executes arithmetic processing, an MPU (Micro Processing Unit) in which peripheral circuits such as input / output, a cache memory, a ROM in which a program code is written, and the like are integrated on a single chip. A flash memory is used as the ROM. As the semiconductor device described above, the present invention can be applied to such an MPU.

It is a block diagram which shows the state with which the silicon disk drive which is one embodiment of this invention is connected with the host apparatus. FIG. 2 is a flowchart showing writing to the silicon disk drive shown in FIG. 1. It is a block diagram which shows the modification of the silicon disk drive shown in FIG. It is a block diagram which shows the semiconductor device which is other embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Host device, 2 ... MPU, 3 ... RAM, 4 ... Interface, 5 ... Silicon disk drive, 6, 6a, 6b ... Controller, 7a ... AND type flash memory, 7b ... NAND type flash memory, 8 ... Semiconductor device, 9a ... AND type region, 9b ... NAND type region.

Claims (5)

In a semiconductor memory device in which a plurality of semiconductor devices in which a semiconductor memory circuit in which a plurality of memory cells are integrated are formed are mounted and data is stored in the semiconductor device,
The semiconductor device in which the semiconductor memory circuit is formed includes a first semiconductor device and a second semiconductor device, and the memory circuit of the first semiconductor device is compared with the memory circuit of the second semiconductor device. A semiconductor memory device having a small block size and high rewrite resistance.   2. The semiconductor memory device according to claim 1, wherein the first semiconductor device is an AND type flash memory, and the second semiconductor device is a NAND type flash memory.   3. The semiconductor memory device according to claim 1, wherein the first semiconductor device can divide data into a plurality of pieces and perform writing in parallel.   4. The semiconductor according to claim 1, further comprising a controller that selects the first semiconductor device and the second semiconductor device according to a size of the data to be stored. 5. Storage device. In a semiconductor device having a semiconductor memory circuit in which a plurality of memory cells are integrated and storing data in the semiconductor memory circuit,
The semiconductor memory circuit includes a first semiconductor memory circuit and a second semiconductor memory circuit, and the first semiconductor memory circuit is rewritten with a smaller block size than the second semiconductor memory circuit. A semiconductor device characterized by high resistance.

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