JP2007097246A - Controller for self-excited transformer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a controller for a self-excited converter which can output active and reactive power while keeping a DC voltage constant as an entire system while keeping the DC voltage at every converter equally, regardless of the operation point of active power or reactive power, when controlling voltage type self-excited converters whose DC sides are connected in series. <P>SOLUTION: In the case that a plurality of converters 1 and 1' are connected in series on a DC side, a voltage obtained by standardizing the magnitude Edn of a DC voltage at each converter is set as P, and a value Edn<SP>P</SP>is obtained by P-multiplying each active power operation point, or a value (Edn/Edt)<SP>P</SP>is obtained by dividing the ED voltage Edn at each converter with an average voltage Edt, thus correcting the DC voltage of the converter by multiplying or dividing the amplitude of an AC output voltage of the converter by using these values. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a control device for a voltage-type self-excited converter used in a DC power transmission / DC interconnection system, a power supply system, or a static reactive power compensator in a power system.

  When power is interchanged between different power systems, a DC power transmission / DC interconnection system is used in which voltage-type self-excited converters are installed in each AC system and the DC terminals of these converters are connected to each other. A voltage-type self-excited converter is also used for supplying electric power from a DC power source such as a battery to an AC system or for a static reactive power compensator.

  In a self-excited converter system for electric power, a multi-stage system in which a plurality of converters and transformers are connected is often employed in order to reduce switching loss and harmonics. In order to reduce loss by increasing the voltage, the DC circuit side may be connected in series (for example, see Patent Document 1). FIG. 21 is a block diagram of a configuration of a multistage self-excited converter system connected in series on the DC side and a control unit for controlling the same. In the figure, the DC sides of a plurality of self-excited converters 1, 1 ′ are connected in series, and both ends where DC capacitors 2, 2 ′ are connected in series are connected to a DC line, a DC power source, or the like. The alternating current side is connected to the alternating current bus 4 via a plurality of transformers 3, 3 'connected in series to the system side winding. In FIG. 21, a two-stage system is used for easy understanding, but a four-stage, six-stage, or eight-stage system is employed.

  Here, the DC voltage of the entire system, that is, the voltage between the terminals PN is controlled by the active power of the converter so as to be kept constant. For example, when a converter system having two or more terminals is connected via a DC circuit, such as a DC power transmission system or a DC interconnection system, DC voltage control is performed at one of the terminals, and active power is applied to the remaining terminals. Control is performed. In the case of a static reactive power compensator, DC voltage control is always performed, and the voltage is maintained at the rated value by charging and discharging the DC capacitor with appropriate active power. In the case of a DC power supply system, a DC power supply is connected and the voltage between the terminals PN is constant. FIG. 21 shows a configuration of a converter system used as a self-excited converter terminal that performs DC voltage control.

  In FIG. 21, the DC voltage Ed between the terminals PN is detected by the DC voltage detection circuit 5 and associated with the command value Edref, and the difference is input to the DC voltage control circuit 6. On the other hand, the reactive power Q is calculated by the reactive power detector 9 from the AC voltage Vac detected by the AC voltage detecting circuit 7 and the AC current Iac detected by the AC current detecting circuit 8, and is associated with the reactive power command value Qref. The difference is input to the reactive power control circuit 10. The DC voltage control circuit 6 and the reactive power control circuit 10 are each composed of a proportional integration circuit or the like, and output control signals Idref and Iqref so that the difference between the command value and the detection value approaches zero. Idref is applied to the alternating current control circuit 11 as a current command value of the active power component, and Iqref is applied as a current command value of the reactive power component.

In the self-excited converter, active power and reactive power can be controlled independently on the AC output side, and orthogonal axis (dq axis) current control is generally performed as the means. As shown in FIG. 21, the AC voltage phase θ detected by the phase detection circuit 12 and the AC output current of the converter obtained by the current detection circuit 8 are added to the orthogonal axis conversion circuit 19, and the three-phase output current Ir, Is and It are converted into orthogonal axis amounts of the active power component Id and the reactive power component Iq by the following equations (1) and (2).
Iα = (2 × Ir−Is−It) / 3, Iβ = (Is−It) / √3 (1)
Id = 1α × cos θ + Iβ × sin θ, Iq = Iα × sin θ−Iβ × cos θ
... (2)

  Id and Iq are input to the AC current control circuit 11, and AC output voltage signals Vdc and Vqc that follow the command values Idref and Iqref respectively supplied from the DC voltage control circuit 6 and the reactive power control circuit 10 are generated. Based on these signals, a switching pulse is given to each self-excited converter 1, 1 ′ by the pulse generation circuits 14, 14 ′. Vdc is the same phase component as the system voltage, and Vqc is a quadrature component.

FIG. 22 is a block diagram showing a detailed configuration of the pulse generation circuits 14 and 14 ′ in the conventional control device shown in FIG. 21, and performs pulse width modulation (PWM) used in general control of the self-excited converter. Circuit. The AC output voltage signals Vdc and Vqc given from the AC current control circuit 11 are multiplied by the conversion coefficient Kcm by the gain circuits 15 and 15 ', respectively, and the outputs Cmd and Cmq become the peak values of the dq axis components of the PWM sine wave signal. . Kcm is calculated by the following equation from the ratio between the rated AC voltage and the DC voltage.
Kcm = K × Vbase / Ed (3)
Here, K is a constant coefficient determined by the number of PWM pulses, Vbase is a transformer secondary voltage rating, and Ed is a DC voltage rating or detection value. From the Cmd, Cmq and the system voltage phase θ, a sine wave generation circuit 16, 16 ′ generates a three-phase sine wave signal used in PWM control by the following equation.
Cmr = Cm × cos (θ + δ)
Cms = Cm × cos (θ + δ−120 °)
Cmt = Cm × cos (θ + δ + 120 °)
Cm = √ (Cmd2 + Cmq2)
δ = tan ⁻¹ (Cmq / Cmd)) (4)

  That is, as the absolute values of Vdc and Vqc are increased, the peak value of the PWM sine wave signal is increased, and as a result, the converter output voltage is increased. Further, the larger the Vqc with respect to Vdc, the larger the phase difference of the converter output voltage with respect to the system voltage.

  On the other hand, a PWM carrier wave signal is generated by carrier wave generation circuits 17 and 17 ′ using a value obtained by adding phase angles φ and φ ′ having different values for each converter with respect to system voltage phase θ. , 18 ′, a sine wave signal for each phase which is an output of the sine wave generating circuits 16, 16 ′ is matched, and a pulse signal to be given to each arm of the converter is generated according to the magnitude relationship. As a result, a rectangular wave voltage is generated on the AC side of the converter 1, 1 ′, and the fundamental wave component of the rectangular wave increases as the peak value of the PWM sine wave signal increases, and is proportional to the magnitude of the DC voltage. To do. The conversion coefficient expressed by the above equation (3) is for accurately reflecting these relationships.

As a result, the converter controls the phase difference between the peak value of the output voltage and the system voltage so as to output active power that maintains the inter-PN DC voltage Ed at the command value Edref and reactive power that is equal to the command value Qref. Drive while.
JP 2003-33039 A

  In the conventional system shown in FIG. 21, operation is performed such that the DC voltage between terminals PN is maintained at a command value. At this time, the DC voltage for each converter, that is, the voltage between PZ and the voltage between ZN is The values are not necessarily equal, and in an extreme case, an imbalance occurs in which one is a negative value and the other is a value more than twice the rating, and normal operation cannot be performed. In order to prevent this, for example, a method of detecting the DC voltage of each converter and performing DC voltage control on each of them can be considered, but in that case, an AC current control circuit is also required for each converter, There exists a problem that the cost of a control apparatus becomes high. Further, in order to perform the AC current control individually, the primary side of the transformer 3 cannot be connected in series as shown in FIG. 21 and needs to be arranged in multiple rows, and the configuration of the entire system including the main circuit is changed. Necessity comes out.

  In order to control the DC voltage for each converter in a system in which the primary side of the transformer 3 is connected in series, the active capacitor is individually increased or decreased by adjusting the output voltage to adjust the output voltage. 2 'charge / discharge needs to be performed. This operation principle will be described with reference to the vector diagram of FIG. The system voltage is Vs, the converter output voltage is Vi, and the current flowing from the system side to the converter is I. Since the system voltage Vs and the current I are common to each converter and do not change, it is necessary to change the converter output voltage Vi in order to adjust the active power P individually. Since the in-phase component of Vi and I is active power, when it is desired to increase the DC voltage, that is, when it is desired to increase the active power in the forward conversion direction, Vi indicated by dotted lines in FIGS. 23 (a) to 23 (d), respectively. Just change the output voltage of the converter like '. That is, during the forward converter operation of (a) (P> 0), the Vdc component of Vi, that is, the in-phase component of the system voltage, is increased, and the reverse converter operation (P <0) of (b) is reversed. It is necessary to reduce the Vdc component. Further, when the active power is zero and only the reactive power is output, during the inductive operation (c) (Vs> Vi), the Vqc component of Vi, that is, the component orthogonal to the system voltage is increased in the delay direction, During capacitive operation (d) (Vs <Vi), it is necessary to increase the Vqc component in the forward direction. As described above, when the DC voltage of each converter is adjusted, there is a problem that the operation for changing the output voltage differs depending on the operating points of the active power and the reactive power.

  In order to solve this, in Patent Document 1, the DC voltage of each converter is calculated by calculating an appropriate addition value from the command values of active power and reactive power and the deviation of DC voltage and allocating them to Vdc and Vqc. A method of evenly controlling is proposed.

  When the method of Patent Document 1 is used, the output voltage can be manipulated according to the operating point. However, it is necessary to perform a complicated operation to determine the value to be assigned, which is limited by the control speed and is expensive. there is a possibility. Further, according to the principle described with reference to FIG. 23, when both the active power and the reactive power are operated at a point close to zero and the DC voltage is unbalanced, the direction of the vector to be corrected is not determined and the voltage is effectively reduced. There is a problem that equal control cannot be performed.

  An object of the present invention is to provide a voltage-type self-excited converter in which the DC side is connected in series, regardless of the operating point of active power or reactive power, while maintaining the DC voltage of each converter evenly and as a whole system It is an object of the present invention to provide a control device for a self-excited converter capable of outputting necessary effective and reactive power while keeping a DC voltage constant.

The invention according to claim 1
In a control device for a voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The value obtained by standardizing the magnitude of the DC voltage for each converter is P, and the value obtained by dividing each active power operating point to the P power, or the value obtained by dividing the DC voltage for each converter by the average voltage is the P power. According to the calculated value, the amplitude of the AC output voltage of the converter is corrected by multiplication or division. The invention according to claim 2
In a control device for a voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The difference between the DC voltage and the average value of each converter is proportional to the value obtained by multiplying the command value of the reactive current, and the phase difference with respect to the system side voltage of the AC output voltage of the converter is corrected. It is characterized by.

The invention according to claim 3
In the control device of the voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The DC voltage for each converter or the value obtained by multiplying the DC voltage for each converter by the average voltage multiplied by +1 or -1 by the positive / negative of the DC current command value The output voltage is corrected by multiplying or dividing the amplitude of the output voltage.

  According to a fourth aspect of the present invention, in the control device for the self-excited converter according to the third aspect, when the active power operating point is in a certain range close to zero, the amplitude of the AC output voltage is not corrected. It is characterized by controlling.

The invention according to claim 5
In the control device of the voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The system side of the AC output voltage of the converter in a magnitude proportional to a value obtained by multiplying the deviation between the DC voltage and the average value for each converter by +1 or -1 depending on whether the reactive power operating point is positive or negative The phase difference with respect to the voltage is corrected.

  According to a sixth aspect of the present invention, in the control device for the self-excited converter according to the fifth aspect, when the reactive power operating point is in a certain range close to zero, the phase difference is not corrected. It is characterized by that.

The invention according to claim 7 provides:
In the control device of the voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The correction of the amplitude of the AC output voltage according to any one of claims 1, 3, and 4 and the phase difference of the AC output voltage according to any one of claims 2, 5, and 6. Both correction and correction are performed.

  The invention according to claim 8 is the control device for the self-excited converter according to any one of claims 1 to 3, wherein the active power operating point is in a certain range close to zero, and each converter If the voltage deviation of at least one converter out of the deviation between the DC voltage and the average value deviates from a predetermined range for a certain time or longer, the conversion connected via the converter or the DC circuit The command value of the active power control of the device is changed.

  The invention according to claim 9 is the control device for the self-excited converter according to any one of claims 4 to 6, wherein the reactive power operating point is in a certain range close to zero, and for each converter. If the voltage deviation of at least one converter out of the deviation between the DC voltage and the average value deviates from the predetermined range for a certain period of time or longer, the reactive power control command value or the AC voltage control command value It is characterized by changing.

  The invention according to claim 10 is the control device for the self-excited converter according to claim 7, wherein both the active power operating point and the reactive power operating point are in a certain range close to zero, and for each converter. When the voltage deviation of at least one converter out of the deviation between the DC voltage and the average value of the DC voltage deviates from a predetermined range for a certain time or longer, the command value for active power control and the command value for reactive power control Alternatively, any one of the command values for AC voltage control is changed.

  According to the present invention, in the control device for a self-excited converter in which a plurality of converters are operated with the DC side connected in series, when an imbalance occurs between the DC voltages of the converters, the active power By correcting the magnitude of the AC output voltage of each converter in an appropriate direction according to the operating point of the converter, the DC voltage of each converter is kept uniform regardless of the active power operating point, and the entire converter The operation can be stably performed without affecting the direct current voltage or the active power output.

  Hereinafter, the present invention will be described in detail based on preferred embodiments shown in the drawings. However, the components that are the same as the components of the conventional system described in FIG. 21 and are not directly related to the present invention are not shown. Moreover, about the related element, the same code | symbol is attached | subjected and the overlapping description is abbreviate | omitted.

FIG. 1 is a block diagram showing a configuration of a first embodiment of a control device for a self-excited converter according to the present invention, together with a main circuit. This embodiment is different from the conventional apparatus shown in FIG. 21 in that DC voltage detection circuits 19 and 19 ′ for detecting DC voltages Edn and Edn ′ for each converter, and normalization circuits 20 and 20 for the detected values. ', A calculation circuit 21, 21' for calculating the gain K from the current command value Idref of the active power component and the DC voltage detection values Edn, Edn 'for each converter, and the d-axis voltage Vdc using the obtained gain K Further, gain circuits 22 and 22 ′ for multiplying the outputs of the gain circuits 15 and 15 ′ with respect to 1 / K are provided. Although omitted in FIG. 1, the same DC voltage control circuit, reactive power control circuit, AC current control circuit and the like as those of the conventional apparatus shown in FIG. 21 are used. The signals Edn and Edn ′ are different signals for each converter, but the current command value Idref is commonly used by each converter. In the normalization circuits 20 and 20 ′, the detection values are normalized so that the DC voltages Edn and Edn ′ of the respective converters are “1” when they are rated values. That is, it becomes “1” when Edn and Edn ′ are ½ of the rated value of the entire system (between PNs). On the other hand, the current command value Idref is given as a pu value and is substantially equivalent to the active power operating point. In the arithmetic circuits 21, 21 ′,
K = Edn ^P K ′ = Edn ′ ^P (5)
(However, P (pu) = Idref (pu) Forward conversion direction is a positive value)
The gains K and K ′ used in the gain circuits 22 and 22 ′ are determined.

  The dq axis component signals Vdc and Vqc of the converter output voltage given from the AC current control circuit 11 are subjected to gain conversion by Kcm as in the conventional apparatus, and then the above K and K are applied to the d axis component. Further correction is performed by 1 / K times and 1 / K 'times. The obtained result is given to the sine wave generation circuits 16 and 16 'as the d-axis components Cmd and Cmd' of the PWM sine wave signal. The following configuration is the same as that of the conventional apparatus.

  The operation of the first embodiment configured as described above will be described below. In the control device of FIG. 1, the DC voltage Ed of the entire system (between PN) is controlled to a rated value by a DC voltage control circuit. Therefore, the sum of the standardized DC voltages Edn and Edn ′ of each converter is 2. Here, when the DC voltage is equal, that is, when Edn = Edn ′ = 1, the output values of the arithmetic circuits 21 and 21 ′ are “1” regardless of the value of P (= Idref), and correction for Cmd and Cmd ′ is performed. Is not done in particular.

  When the DC voltage becomes unbalanced, for example, Edn> 1, Edn ′ <1, if the converter is operating as a forward converter (P> 0), K on the converter 1 side is EdnP> 1, K ′ on the side of the converter 1 ′ becomes Edn′P <1. Thereby, the d-axis component Cmd of the AC voltage on the converter 1 side is corrected so that the absolute value becomes small, and conversely, on the converter 1 'side, the absolute value of Cmd' is corrected so as to become large. As described with reference to FIG. 23, when P> 0 operation, if the d-axis component is increased, the DC voltage increases so that the converter 1 side becomes smaller in the above operation so that Edn becomes smaller. Is controlled so that Edn 'becomes larger.

  Similarly, when the DC voltage is Edn> 1 and Edn ′ <1, and the converter is in the reverse converter operation (P <0), since P in the equation (5) is a negative value, K on the converter 1 side is EdnP <1, and K ′ on the converter 1 ′ side is Edn′P> 1. As a result, the AC voltage d-axis component Cmd on the converter 1 side is corrected so that the absolute value is increased, and the absolute value of Cmd 'is corrected on the converter 1' side. In FIG. 23, when P <0, the DC voltage increases when the d-axis component is reduced. Therefore, in the above operation, Edn 'is reduced on the converter 1' side so that Edn is reduced on the converter 1 side. Each is controlled to increase.

  Thus, according to the first embodiment, even when the operating point of the active power is the forward converter operation or the reverse converter operation, when the DC voltage of the individual converter becomes larger than the rating. Is controlled to increase the voltage when the voltage is lower than the rated value, and the entire DC voltage is maintained at the rated value by the DC voltage control, regardless of the active power operating point. It is possible to perform stable operation while maintaining the DC voltage of the converter uniform and without affecting the DC voltage and active power output of the entire converter.

FIG. 2 is a block diagram showing the configuration of the second embodiment of the control device for the self-excited converter according to the present invention, and in particular, shows the pulse generation circuit 14. In FIG. 2, only the control circuit for the converter 1 is shown, but the same circuit is also provided on the converter 1 ′ side as in the first embodiment shown in FIG. In the second embodiment, an average value calculation circuit 23 is provided with respect to the first embodiment shown in FIG. 1, and the average value Edt of the DC voltage detection values Edn and Edn ′ of each converter is obtained. The obtained value is given to the arithmetic circuit 21, and in the arithmetic circuit 21, instead of the equation (5),
K = (Edn / Edt) ^P K ′ = (Edn ′ / Edt) ^P (6)
(Where P (pu) = Idref (pu) forward conversion direction is a positive value)
Perform the operation. Other configurations are the same as those of the first embodiment shown in FIG.

  The operation of the second embodiment configured as described above will be described below. In the case of a DC interconnection system that does not use a DC line, such as a static reactive power compensator, a DC power supply system, or a frequency converter, the DC voltage of the entire system is operated at a rated value by voltage control. However, for example, a terminal performing active power control in a long-distance DC power transmission system may be operated at a voltage of, for example, 95% of the rated voltage due to the influence of a voltage drop. When the first embodiment is applied to such a system, the correction coefficient K is not 1 even when the voltages of the converters are equal, and both converters perform correction in the same direction, and the operating point of the entire system varies. There is a risk of it.

  The second embodiment shown in FIG. 2 is applied to such a system, and the correction coefficient K is obtained by raising the ratio of the individual DC voltage with respect to the average voltage to the Pth power as shown in equation (6). Thus, it operates so as to decrease it in a converter whose voltage is higher than the average value and to increase it in a converter whose voltage is lower than the average value, so that the voltage of the entire system does not change.

  Thus, according to the second embodiment, even when the operating point of the active power is the forward converter operation or the reverse converter operation, the DC voltage of the individual converter becomes larger than the average value. Is controlled to increase the voltage when the voltage is lower than the average value, while maintaining the DC voltage of each converter evenly, regardless of the active power operating point. A stable operation can be performed without affecting the DC voltage or the active power output.

  FIG. 3 is a block diagram showing the configuration of the third embodiment of the control device for the self-excited converter according to the present invention, and particularly shows the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in FIG. 3, the same circuit is also provided on the converter 1 'side as in the first embodiment of FIG. In the third embodiment, the standardized DC voltage Ed of the entire system is used instead of the DC voltage average value Edt in the second embodiment shown in FIG. The DC voltage Ed (pu) is a value obtained by standardizing the PN voltage detected by the DC voltage detection circuit 5 as shown in the conventional apparatus of FIG. This value is equivalent to the average voltage Edt in the second embodiment, and the third embodiment operates in the same manner as the second embodiment.

  The operation of the third embodiment configured as described above will be described below. In this embodiment, regardless of whether the operating point of the active power is the forward converter operation or the reverse converter operation, the standardized DC voltage of the individual converter is the standardized DC voltage of the entire system. When the voltage becomes larger, the voltage is reduced, and when the voltage becomes lower than the standardized DC voltage of the entire system, the voltage is raised. Regardless of the active power operating point, the DC of each converter is controlled. The operation can be stably performed while keeping the voltage uniform and without affecting the DC voltage and the active power output of the entire converter.

  FIG. 4 is a block diagram showing the configuration of the fourth embodiment of the control device for the self-excited converter according to the present invention, and more particularly, a diagram showing the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in this embodiment, the same circuit is also provided on the converter 1 'side as in the first embodiment of FIG. This is obtained by inserting the gain circuit 22 into the three-phase sine wave signal path on the output side of the sine wave generation circuit 16 instead of the output part of the gain circuit 15 with respect to the third embodiment shown in FIG. .

  When the fourth embodiment shown in FIG. 4 is used, the DC voltage of the converter increases (Edn> Ed) and K> 1 in the case of forward converter operation, so K> 1, so that the three-phase sine that is the output of the sine wave generation circuit 16 The wave signal has a smaller peak value. If the DC voltage of the converter is increased (Edn> Ed) and the inverse converter is operated, K <1 and the three-phase sine wave signal is increased. When the DC voltage of the converter becomes small, it operates in the reverse direction.

  Thus, according to the fourth embodiment, the DC voltage of the converter increases (Edn> Ed), and K> 1 in the case of forward converter operation, so the three-phase sine wave signal that is the output of the sine wave generation circuit 16 is The peak value becomes smaller. If the DC voltage of the converter is increased (Edn> Ed) and the inverse converter is operated, K <1 and the three-phase sine wave signal is increased. When the DC voltage of the converter becomes small, it operates in the reverse direction.

  FIG. 5 is a block diagram showing the configuration of the fifth embodiment of the control device for the self-excited converter according to the present invention. In particular, FIG. 5 shows the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in this embodiment, the same circuit is also provided on the converter 1 'side as in the first embodiment of FIG. This is a circuit in which the gain circuit 22 is inserted not only into the d-axis component Cmd side of the PWM sine wave signal but also into the path of the q-axis component Cmq in the third embodiment shown in FIG.

  When the fifth embodiment shown in FIG. 5 is used, the d-axis component Cmd and the q-axis component of the PWM sine wave signal are obtained if the DC voltage of the converter increases (Edn> Ed) and the forward converter operates. Cmq is reduced by 1 / K times. If the DC voltage of the converter is increased (Edn> Ed) and the inverse converter is operated, Cmd and the q-axis component Cmq are increased by 1 / K times. That is, from the equation (4), the fifth embodiment is different in configuration from the fourth embodiment, but the operation is the same.

  From the first embodiment to the third embodiment described above, the correction by the gain K is performed only for the PWM sine wave signal, that is, the d-axis component of the AC output voltage (the same phase component as the system voltage). There is a difference that the fourth embodiment and the fifth embodiment are performed for both components of the dq axis. This difference will be described below.

  As described in the vector diagram of FIG. 23, when the reactive power Q = 0 and the active power is operating in the forward direction or the reverse direction, in order to control the active power for each converter, the converter output voltage What is necessary is just to correct | amend a d-axis component. If the q-axis component is also changed here, the reactive power also changes for each converter. However, the reactive power is not always zero in actual operation, and the reactive power may change conversely when correcting only the d-axis component. As described above, in order to obtain a strict optimum correction value, it is necessary to calculate the correction amount for each of the d-axis and the q-axis from the operating points of both the active power and the reactive power. In the state where the voltage is equal, that is, in a state where correction is not performed, when an imbalance is about to occur, an operation for suppressing it is performed. Therefore, it is considered that the same effect can be obtained if the correction direction is correct without calculating a strict correction amount.

  Simulation analysis was performed to confirm this. FIG. 6 shows the waveform of the analysis result. In this case, four-stage converters are connected in series on the DC side, and after starting up with active power P = −0.6 pu (inverse converter operation) and reactive power Q = + 0.5 pu (inductive operation) The reactive power is inverted to -0.5 pu (capacitive operation). FIG. 6A shows the case where no correction is performed, FIG. 6B shows the case where correction according to the third embodiment is performed only on the d-axis component, and FIG. 6C shows the correction according to the fifth embodiment performed on both dq axes. The active / reactive power output waveform and the DC voltage waveform of each converter in the case of From this result, if the correction is not performed, the DC voltage will be different for each converter and stable operation will not be possible. However, in the case of d-axis correction and dq both-axis correction, both cases are effective for the entire system. It was confirmed that the DC voltage can be uniformly controlled without affecting the reactive power output.

  As a result, according to the fourth or fifth embodiment, regardless of whether the operating point of the active power is the forward converter operation or the reverse converter operation, the standardized DC voltage of the individual converter Is controlled to increase the voltage when the voltage is lower than the standardized DC voltage of the entire system, and to increase the voltage when the voltage becomes lower than the standardized DC voltage of the entire system. Regardless of the point, stable operation can be performed while maintaining the DC voltage of each converter equal, and without affecting the DC voltage and active power output of the entire converter.

  By the way, in the fourth embodiment or the fifth embodiment described above, the calculation circuit 21 calculates the gain K using the DC voltage Edn and the inter-PN DC voltage Ed of each converter. The same effect can be obtained even if the calculation is performed using only Edn as in the embodiment, or the calculation using Edn and the average voltage Edt is performed as in the second embodiment. In each embodiment, the active current command value Idref, which is an output signal of the DC voltage control circuit or the active power control circuit, is used as the active power operation point (P). Instead, the active current detection value Id or The same effect can be obtained even if a signal obtained by smoothing Id with a primary delay circuit or the like is used.

  FIG. 7 is a block diagram showing the configuration of the sixth embodiment of the control device for the self-excited converter according to the present invention. In particular, FIG. 7 is a diagram showing the configuration of the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in FIG. 7, the same circuit is also provided on the converter 1 'side as in the first embodiment of claim 1 shown in FIG. This sixth embodiment is different from the conventional device shown in FIG. 21 in that an average value calculation circuit 23 for obtaining an average voltage from DC voltages Edn and Edn ′ for each converter, the obtained average value Edt and each converter An adder 25 for calculating the deviation of the direct current voltage Edn, a gain circuit 26 composed of a proportional circuit, a proportional integration circuit, or the like, an output of the gain circuit 26 and a reactive current which is an output value of the reactive power control circuit 10 A multiplier 27 for multiplying the command value Iqref is provided, and the output value of the multiplier 26 is added to the system voltage phase θ given from the phase detection circuit by the adder 28 inside the pulse generation circuit 14, and the result Is added to the sine wave generation circuit 16 to perform the two-phase → three-phase conversion represented by the equation (4). Other configurations are the same as those of the conventional apparatus.

  The operation of the sixth embodiment configured as described above will be described below. When the DC voltage is equal, that is, when Edn = Edn ′, the average value Edt = Edn, so the deviation, that is, the output of the adder 25 and the gain circuit 26 is zero, and the output of the multiplier 27 is also invalid. It is zero regardless of the power operating point, that is, the value of Iqref (Q). When the DC voltage is unbalanced, for example, Edn> 1, Edn ′ <1, if the converter is inductive reactive power operation (Q> 0), the adder 25 on the converter 1 side, gain The outputs of the circuit 26 and the multiplier 27 become negative values, which are added to the system voltage phase θ by the adder 28 with a negative sign. As a result, the phase of the three-phase sine wave signal generated by the sine wave generation circuit 16, that is, the output voltage of the converter 1, changes in the advance direction. As described with reference to the vector diagram of FIG. 23, when Q> 0 is operated, the DC voltage increases when the phase of the output voltage is changed in the delay direction. Thus, on the contrary, the converter 1 'side is controlled so that Edn' becomes large.

  Similarly, when the DC voltage is Edn> 1, Edn ′ <1, and the converter is in the capacitive reactive power operation (Q <0), the outputs of the adder 25 and the gain circuit 26 on the converter 1 side are negative. However, since the output of the multiplier 27 becomes a positive value and is added to the system voltage phase θ by the adder 28 with a negative sign, the output voltage changes in the delay direction. As described with reference to the vector diagram of FIG. 23, when Q <0, the DC voltage increases when the phase of the output voltage is changed in the advance direction. Therefore, the Edn decreases on the converter 1 side in the above operation. Thus, on the contrary, the converter 1 'side is controlled so that Edn' becomes large.

  Thus, according to the sixth embodiment, even if the reactive power operating point is inductive or capacitive, the voltage is lowered when the DC voltage of the individual converter becomes larger than the rating. When the voltage is lower than the rated value, the voltage is controlled to be increased, and the overall DC voltage is maintained at the rated value by the DC voltage control, so that the DC voltage of each converter is equalized regardless of the reactive power operating point. The operation can be stably performed while maintaining the DC voltage and reactive power output of the entire converter.

  FIG. 8 is a block diagram showing the configuration of the seventh embodiment of the power converter according to the present invention, and in particular, shows the configuration of the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in FIG. 8, the same circuit is applied to the converter 1 'side as in the first embodiment of FIG. The configuration of the seventh embodiment shown in FIG. 8 is different from the sixth embodiment shown in FIG. 7 in that the DC voltage detection value of the entire system, that is, the inter-PN DC voltage Ed (pu) is used instead of the average value Edt. ). Since the average value Edt is equivalent to Ed if it is a normalized value, the seventh embodiment operates in the same manner as the sixth embodiment, and an equivalent effect can be obtained.

  Both the sixth and seventh embodiments use the reactive current command value Iqref, which is the output signal of the reactive power control circuit, as the reactive power operating point (Q), but the AC voltage control is performed. In the converter system, an equivalent effect can be obtained by using the reactive current command value Iqref which is an output signal of the AC voltage control circuit. The same effect can be obtained even when the reactive current detection value Iq or a signal obtained by smoothing the Iq with a first-order lag circuit or the like is used.

  FIG. 9 is a block diagram showing the configuration of the eighth embodiment of the power converter according to the present invention. In particular, the configuration of the pulse generation circuit 14 is shown. Although only the control circuit for the converter 1 is shown in FIG. 9, the same circuit is provided on the converter 1 'side as in the first embodiment of claim 1 shown in FIG. This embodiment is different from the third embodiment shown in FIG. 3 in that the arithmetic circuit 30 is based on the outputs of the positive / negative determination circuit 29, the arithmetic circuits 30 and 31, and the positive / negative determination circuit 29 for determining the positive / negative of the active current command value Idref And a switch circuit 32 that performs switching so as to select either one of the outputs of the arithmetic circuit 31. The arithmetic circuit 30 calculates the value of Edn / Ed as a gain K from the standardized DC voltage Edn (pu) of each converter and the standardized DC voltage Ed (pu) of the entire system. The arithmetic circuit 31 calculates the value of Ed / Edn as the gain K. Each value is added to the input terminal of the switch circuit 32. The switch circuit 32 selects the output of the arithmetic circuit 30 when the signal given from the positive / negative determination circuit 29 is “positive”, and selects the output of the arithmetic circuit 31 when it is “negative”, and adds the value to the gain circuit 22. Other configurations are the same as those of the third embodiment shown in FIG.

  The operation of the eighth embodiment configured as described above will be described. When the DC voltage is equal, Ed (pu) = Edn (pu), so that the output values of the arithmetic circuits 30 and 31 are both “1”. Therefore, the value given to the gain circuit 22 is “1” regardless of the operating point of the active power, and the output voltage signal is not corrected. When the DC voltage becomes unbalanced, for example, when Edn> Ed and Edn ′ <Ed, the output of the arithmetic circuit 30> 1 and the output of the arithmetic circuit 31 <1 on the converter 1 side. Here, if the converter is operating as a forward converter (P> 0), the output of the arithmetic circuit 30 is selected by the switch circuit 32 and applied to the gain circuit 22, and therefore the value of the AC output voltage d-axis component Vdc. Is corrected to be smaller.

  Similarly, when the DC voltage is Edn> 1 and Edn ′ <1, and the converter is in the reverse converter operation (P <0), the output of the arithmetic circuit 31 is selected by the switch circuit 32 and added to the gain circuit 22. Therefore, the value of the d-axis component Vdc of the output voltage is corrected so as to increase. As described in the vector diagram of FIG. 23, when P> 0, the DC voltage decreases if the d-axis component is reduced, and when P <0, the DC voltage decreases when the d-axis component is increased. On the other hand, the converter 1 'operates to increase the DC voltage. As described above, correction is performed on the AC output voltage so as to lower the DC voltage of the converter and to increase the DC voltage of the converter.

  Thus, according to the eighth embodiment, regardless of whether the operating point of the active power is the forward converter operation or the inverse converter operation, the standardized DC voltage of the individual converter is When the voltage becomes larger than the standardized DC voltage, the voltage is reduced, and when the voltage becomes smaller than the standardized DC voltage of the entire system, the voltage is raised. In addition, it is possible to stably operate while maintaining the DC voltage of each converter evenly and without affecting the DC voltage and active power output of the entire converter.

  FIG. 10 is a block diagram showing the configuration of the ninth embodiment of the power converter according to the present invention. In particular, FIG. 10 shows the configuration of the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in FIG. 10, the same circuit is also provided on the converter 1 side as in the first embodiment of FIG. The ninth embodiment shown in FIG. 10 uses only the DC voltage Edn of each converter in the arithmetic circuits 30 and 31 as compared with the eighth embodiment shown in FIG. 9, and K = Edn, K = 1 / Edn is calculated. Other configurations are the same. The voltage of the entire DC circuit is maintained at the rated (1 pu) in the DC voltage control system, the DC power supply system, or the DC interconnection system that does not go through the DC line. Therefore, Ed = 1, and even when the ninth embodiment is used, the same effect as that of the eighth embodiment can be obtained. This is the same as the relationship of the first embodiment with respect to the third embodiment.

  In the eighth and ninth embodiments described above, an average value calculation circuit for obtaining the average value Edt of the DC voltage of each converter is provided, and the calculation circuits 30 and 31 perform calculations using Edn and Edt. The same effect can be obtained. This is the same as the relationship of the second embodiment with respect to the third embodiment. Similarly to the fourth embodiment, when the correction by the gain circuit 22 is performed on the three-phase sine wave signal that is the output signal of the sine wave generation circuit 16, the gain circuit is the same as in the fifth embodiment. The same effect can be obtained when the correction by 22 is performed on both the d-axis and the q-axis.

  FIG. 11 is a block diagram showing the configuration of the tenth embodiment of the power conversion apparatus according to the present invention, and in particular, shows the configuration of the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in FIG. 11, the same circuit is also provided on the converter 1 'side as in the first embodiment shown in FIG. In this embodiment, a level determination circuit 33 and a switch circuit 34 are provided with respect to the eighth embodiment shown in FIG. In the level determination circuit 33, when the operating point of the active current P, that is, the active current command value Idref is within a certain range close to zero, for example, in the range of −0.1 <Idref <0.1, “1”. Is supplied to the switch circuit 34. When the output of the switch circuit 32 and “1” are given to the input terminal of the switch circuit 34 and the signal of the level determination circuit 33 is “0”, the output of the switch circuit 32 is the signal of the level determination circuit 33. Is “1”, K = 1 is selected and added to the gain circuit 22. Other configurations are the same as those of the eighth embodiment shown in FIG.

  The operation of the tenth embodiment configured as described above will be described below. When the DC voltage is equal, Ed (pu) = Edn (pu), so that the output values of the arithmetic circuits 30 and 31 are both “1”. Therefore, the value applied to the gain circuit 22 is “1” regardless of the operating point of the active power, and the output voltage signal is not corrected. When the DC voltage becomes unbalanced and, for example, Edn> Ed and Edn ′ <Ed, the output of the arithmetic circuit 30> 1 and the output of the arithmetic circuit 31 <1 on the converter 1 side. Here, if the converter operates in the forward converter operation (P> 0) and operates at a value larger than the value set by the level determination circuit 33, the output of the arithmetic circuit 30 is selected by the switch circuit 32 and given to the gain circuit 22. Therefore, the value of the AC output voltage d-axis component Vdc is corrected to be small.

  Similarly, if the DC voltage is Edn> 1, Edn ′ <1, and the converter is operated at a value larger than the value set by the level determination circuit 33 in the inverse converter operation (P <0), the switch circuit 32 is used. Since the output of the arithmetic circuit 31 is selected and applied to the gain circuit 22, the value of the d-axis component Vdc of the output voltage is corrected so as to increase.

  On the other hand, when the converter is operating with an active power close to zero within the range set by the level determination circuit 33, K = 1 is selected by the switch circuit 34 and applied to the gain circuit 22, so that the output No correction is made to the voltage. In the case of a system in which the converter may continue to operate with zero active power, the actual operating point of active power goes back and forth between small positive values and negative values near zero. Accordingly, when the switch circuit 32 is switched, the switching is frequently repeated and the operation becomes unstable. If this embodiment is used, a non-operation range is provided and unnecessary switching operation is not performed.

  Thus, according to the tenth embodiment, regardless of whether the operating point of the active power is the forward converter operation or the reverse converter operation, the standardized DC voltage of the individual converter is When the voltage becomes larger than the standardized DC voltage, the voltage is lowered. When the voltage becomes smaller than the standardized DC voltage of the entire system, the voltage is raised, and the active power is near zero. Prevents frequent switching of compensation operation in some cases, affects the DC voltage and active power output of the entire converter while maintaining the DC voltage of each converter equal regardless of the active power operating point It is possible to operate stably without any problems.

  It should be noted that, as in the ninth embodiment, the above-described tenth embodiment is the same as described above even if a circuit that provides gain K = 1 to the gain circuit 22 when the active power is near zero is added. The same effect can be obtained.

  FIG. 12 is a block diagram showing the configuration of the eleventh embodiment of the power conversion apparatus according to the present invention, and in particular, shows the configuration of the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in FIG. 12, the same circuit is also provided on the converter 1 'side as in the first embodiment shown in FIG.

  This embodiment is different from the sixth embodiment shown in FIG. 7 in that “+1” and “−1” are output by the positive / negative determination circuit 29 for determining the positive / negative of the reactive current command value Iqref and the output of the positive / negative determination circuit 29. A switch circuit 35 that performs switching so as to select one of them is provided. The switch circuit 35 selects “+1” when the signal given from the positive / negative judgment circuit 29 is “positive”, and selects “−1” when it is “negative”, and adds the value to the multiplier 27. Other configurations are the same as those of the sixth embodiment shown in FIG.

  The operation of the eleventh embodiment configured as described above will be described below. When the DC voltage is equal, Ed (pu) = Edn (pu), so that the outputs of the adder 25 and the gain circuit 26 are zero, and the output of the multiplier 27 is also zero. Therefore, the value applied to the adder 28 is “0” regardless of the reactive power operating point, and the output voltage phase is not corrected. When the DC voltage becomes unbalanced and, for example, Edn> Ed and Edn ′ <Ed, the outputs of the adder 25 and the gain circuit 26 become negative values on the converter 1 side. If the converter is in inductive reactive power operation (Q> 0), “+1” is selected by the switch circuit 35 and supplied to the multiplier 27, and the output of the multiplier 27 becomes a negative value. Since it is added with a negative sign in the adder 28, the phase of the AC output voltage is corrected in the advance direction.

  Similarly, when the DC voltage is Edn> 1, Edn ′ <1, and the converter is in the capacitive reactive power operation (Q <0), “−1” is selected by the switch circuit 35 and supplied to the multiplier 27. Thus, the output of the multiplier 27 becomes a positive value. Since it is added with a negative sign in the adder 28, the phase of the AC output voltage is corrected in the delay direction. As explained in the vector diagram of FIG. 23, when Q> 0, the DC voltage decreases if the output voltage phase is advanced, and when Q <0, the DC voltage decreases if the phase is delayed. On the other hand, the converter 1 'operates to increase the DC voltage. As described above, correction is performed on the AC output voltage so as to lower the DC voltage of the converter and to increase the DC voltage of the converter.

  Thus, according to the eleventh embodiment, even if the reactive power operating point is inductive or capacitive, the voltage is lowered when the DC voltage of the individual converter becomes larger than the average voltage. Thus, when the voltage becomes lower than the average voltage, the voltage is controlled to increase, regardless of the reactive power operating point, while maintaining the DC voltage of each converter equal, and the DC voltage and reactive power of the entire converter. Stable operation can be performed without affecting the output.

  In the eleventh embodiment shown in FIG. 12, the same effect can be obtained even if the standardized DC voltage Ed of the entire system is used instead of the DC voltage average value Edt. This is the same as the relationship of the seventh embodiment shown in FIG. 8 with respect to the sixth embodiment shown in FIG.

  FIG. 13 is a block diagram showing the configuration of the twelfth embodiment of the control device for the self-excited converter according to the present invention. In particular, FIG. 13 is a diagram showing the configuration of the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in FIG. 13, the same circuit is also provided on the converter 1 side as in the first embodiment shown in FIG.

  In this embodiment, a level determination circuit 36 and a switch circuit 37 are provided with respect to the eleventh embodiment shown in FIG. In the level determination circuit 36, the operating point of the reactive power Q, that is, the reactive current command value Iqref is in a certain range close to zero, for example, in the range of −0.1 <Iqref <0.1, and in the case of more than that, Iqref> 1 and lower, Iqref <−0.1 is determined at three levels, and the result is sent to the switch circuit 37 as h05. give. “+1”, “0”, “−1” is given to the input terminal of the switch circuit 37, and “+1” is determined when the determination of the level determination circuit 36 is “Iqref> 0.1”, and the determination is “− When 0.1 <Iqref <0.1, “0” is selected, and when determination is “Iqref <−0.1”, “−1” is selected and supplied to the multiplier 27. Other configurations are the same as those of the eleventh embodiment shown in FIG.

  The operation of the twelfth embodiment configured as described above will be described below. When the DC voltage is equal, Ed (pu) = Edn (pu), so that the output values of the adder 25 and the gain circuit 26 are zero. Therefore, the value applied to the adder 28 is “0” regardless of the reactive power operating point, and the output voltage signal phase is not corrected. When the DC voltage becomes unbalanced, for example, when Edn> Ed and Edn ′ <Ed, the outputs of the adder 25 and the gain circuit 26 are negative values on the converter 1 side. If the converter is operated at a value larger than 0.1 pu in inductive reactive power operation (Q> 0), “+1” is selected by the switch circuit 37 and added to the multiplier 27, so that its output Is a negative value, and the AC output voltage phase is corrected in the advance direction.

  Similarly, if the DC voltage is Edn> 1, Edn ′ <1, and the converter is operating at a value less than −0.1 pu in capacitive reactive power operation (Q <0), the switch circuit 37 sets “−1”. "Is selected and supplied to the multiplier 27, and the AC output voltage phase is corrected in the delay direction. On the other hand, when the converter is operated with a reactive power in the range of −0.1 pu <Iqref <0.1 pu, “0” is selected by the switch circuit 37 and is supplied to the multiplier 27, so that the output There is no correction for the voltage phase. In the case of a system in which the converter may continue to operate with zero reactive power, the actual reactive power operating point goes back and forth between small positive and negative values near zero. As a result, if only positive / negative determination is performed, the switching is frequently repeated and the operation becomes unstable. If this embodiment is used, a non-operation range is provided and unnecessary switching operation is not performed.

  Thus, according to the twelfth embodiment, even if the reactive power operating point is inductive or capacitive, the voltage is increased when the DC voltage of the individual converter becomes larger than the average DC voltage. The voltage is controlled to increase when the voltage becomes lower than the average DC voltage, and frequent switching of the compensation operation when the reactive power is near zero is prevented. Therefore, it is possible to stably operate while maintaining the DC voltage of each converter equal and without affecting the DC voltage and reactive power output of the entire converter.

  In the twelfth embodiment, the same effect can be obtained by adding a circuit that gives “0” to the multiplier 27 when the reactive power is near zero.

  FIG. 14 is a block diagram showing the configuration of the thirteenth embodiment of the power converter according to the present invention, and in particular, shows the configuration of the pulse generation circuit 14. FIG. 14 shows only the control circuit for the converter 1, but the same circuit is also provided on the converter 1 'side as in the first embodiment shown in FIG. In this embodiment, both the circuit of the third embodiment shown in FIG. 3 and the circuit of the seventh embodiment shown in FIG. 8 are added to the conventional apparatus shown in FIG. That is, as in the third embodiment, the gain K is obtained from the DC voltage Edn for each converter, the DC voltage Ed for the entire system (DC voltage between PNs), and the active current command value Idref corresponding to the active power operating point P. An arithmetic circuit 21 for calculating and a gain circuit 22 for correcting 1 / K times the d-axis component of the PWM sine wave in the pulse generating circuit are provided. On the other hand, similarly to the seventh embodiment shown in FIG. 8, an adder 25 for obtaining a deviation between Ed (pu) and Edn (pu), a gain circuit 26 including a proportional circuit or a proportional integration circuit, A multiplier 27 that multiplies the output of the gain circuit 26 and the reactive current command value Iqref corresponding to the reactive power operating point Q, and an addition that adds the output of the multiplier 27 with a negative sign to the phase signal in the pulse generation circuit. The configuration of the device 28 is different from that of the conventional device.

  The operation of the thirteenth embodiment configured as described above will be described below. This embodiment has the functions of both the third embodiment shown in FIG. 3 and the seventh embodiment shown in FIG. That is, when the DC voltage is uniform and Edn = Ed, the gain K that is the output of the arithmetic circuit 21 is “1”, and the correction by the gain circuit 22 is performed regardless of the active power operating point, that is, the value of Idref (P). Not done. Further, the deviation of Edn and Ed, that is, the outputs of the adder 25 and the gain circuit 26 are zero, and the output of the multiplier 27 is also zero regardless of the reactive power operating point, that is, the value of Iqref (Q). The voltage phase is not corrected. When the DC voltage becomes unbalanced and a difference occurs between Edn and Ed, the gain circuit 22 corrects the magnitude of the output voltage by the active power operating point and the magnitude relationship between Edn and Ed, as in the first embodiment. In the same manner as in the second embodiment, the operation of the adder 28 corrects the phase of the output voltage according to the reactive power operating point and the magnitude relationship between Edn and Ed.

  Thus, according to the thirteenth embodiment, the magnitude and phase of the output voltage are corrected according to the operating point of the active power and the operating point of the reactive power, so that the DC voltage of each converter regardless of the operating point. Can be stably operated without affecting the DC voltage and active / reactive power output of the entire converter.

  In addition, although 13th Embodiment shown in FIG. 14 was set as the structure which combined 7th Embodiment shown in FIG. 3 and 3rd Embodiment shown in FIG. Any one of the first to fifth embodiments shown in FIGS. 1 to 5, the eighth or ninth embodiment shown in FIGS. 9 and 10, and the tenth embodiment shown in FIG. By arbitrarily combining any one of the sixth embodiment shown in FIG. 7, the seventh embodiment shown in FIG. 8, and the eleventh embodiment shown in FIG. The same effects as those of the thirteenth embodiment shown in FIG.

  FIG. 15 is a block diagram showing the configuration of the fourteenth embodiment of the control device for the self-excited converter according to the present invention, and in particular, shows the configuration of the control circuit related to the pulse generation circuit 14. In FIG. 15, only the control circuit for the converter 1 is shown, but the same circuit is provided on the converter 1 'side as in the first embodiment shown in FIG. This embodiment is different from the first embodiment shown in FIG. 1 in that an adder that outputs a deviation between the standardized DC voltages Edn and Edn ′ of each converter and the standardized DC voltage Ed of the entire system. 38, 38 ', level detectors 39, 39' for performing level judgment on the outputs of these adders 38, 38 ', an OR circuit 40 for each level detector output, and commands used in the active power control circuit A level detector 41 for the value Pref, an OR circuit 40 and an AND circuit 42 for the output of the level detector 41, a counter circuit 43, a level detector 44, and a switch circuit 45 that opens and closes by an output signal of the level detector 44; An adder 46 for adding the output of the switch circuit 45 to the active power command value is added. The level detectors 39 and 39 ′ output “1” when the deviation of the DC voltage deviates from a certain range, for example, when ΔEd <−0.2 or ΔEd> +0.2. On the other hand, the level detector 41 outputs “1” when the command value Pref applied to the active power control circuit 24 is within a certain range close to zero, for example, −0.1 <Pref <+0.1. The counter circuit 43 accumulates the output of the AND circuit 42, and the level detector 44 gives an input command to the switch circuit 45 when the accumulated value exceeds a certain value. The switch circuit 45 is given a value ΔPref of the change in the active power command value, for example, 0.2 pu. When the switch is turned on, the value is added to the command value Pref, and the final value for the active power control circuit 24 is obtained. Used as a command value. The configuration of other parts such as the internal configuration of the pulse generation circuit 14 is the same as that of any one of the first to fifth embodiments shown in FIGS. 1 to 5.

  The operation of the fourteenth embodiment configured as described above will be described below. If the DC voltage is balanced and the voltage value of each converter is substantially equal to the voltage value of the entire system, the outputs of the level detectors 39 and 39 'and the OR circuit 40 are "0", so the output of the level detector 44 And the switch circuit 45 is not turned on, and the control operates in the same manner as in the first to fifth embodiments. When the active power is accommodated in a certain amount in the forward direction or the reverse direction, the output of the level detector 41 becomes zero, so the switch circuit 45 is not turned on, and the control is performed in the first to fifth implementations. Works in the same way as the form.

  The present embodiment operates differently from the first to fifth embodiments when the active power is operated near the zero point and an imbalance between the converters occurs in the DC voltage. . In this case, since the active power command value Pref is within a certain range close to zero, the output of the level detection value 41 is “1”. On the other hand, when the deviation between the DC voltage and the voltage of the entire system increases in any one of the plurality of converters, the outputs of the OR circuit 40 and the AND circuit 42 become “1”. When this state continues, the output of the counter circuit 43 increases, and when the predetermined time is exceeded, the level detector 44 operates and the switch circuit 45 is turned on. As a result, the active power command value changes from the initial value by ΔPref = 0.2 pu, and the operating point shifts to a point that is not near zero.

  According to the fifteenth embodiment shown in FIG. 15, as explained in the vector diagram of FIG. 23 and the first to fifth embodiments, the magnitude of the converter output voltage is corrected to correct the DC voltage. When canceling the balance, the method of correcting the magnitude differs depending on the direction of the active power.However, if the active power is zero, appropriate correction cannot be performed. There is a possibility of correction. There is no problem in a system that always allows a certain amount of active power during operation, but in a system that has a high possibility of operating with zero active power, by applying this embodiment, an operating point where the active power is near zero is achieved. When a DC voltage imbalance occurs, correction control in an appropriate direction can be performed by temporarily changing the operating point of the active power, and the DC voltage imbalance can be suppressed.

  As described above, according to the present embodiment, the output voltage is corrected in accordance with the operating point of the active power, and is effective when the operating power is at an operating point where the correction cannot be performed in the vicinity of zero. By changing the power operating point, it is possible to operate stably while maintaining the DC voltage of each converter equal regardless of the operating point.

  FIG. 16 is a block diagram showing the configuration of the fifteenth embodiment of the self-excited converter according to the present invention, and in particular, shows the configuration of the control circuit related to the pulse generation circuit 14. Although only the control circuit for the converter 1 is shown in FIG. 16, the same circuit is also provided on the converter 1 'side as in the first embodiment of FIG. This embodiment uses the current command value Idref of the active component instead of the active power command value Pref as a signal used for the determination of the active power operating point by the level detector 41, compared to the fourteenth embodiment shown in FIG. To do. Pref is an input signal of the active power control circuit 24, and Idref is an output signal. The effective power is obtained by multiplying the effective component current by the magnitude of the voltage (P = V × Id). In the case of a standardized signal used in a control circuit or the like, the voltage V is approximately 1 pu. The Idref signal is almost equivalent.

  Note that the command value to be switched is not Idref but a command value for the upper control system, that is, Pref. When Idref is switched, the active power operating point changes, but the active power command value does not change, so an error occurs, and problems such as saturation of the integrating circuit in the active power control circuit 24 occur. The command value for the host control circuit is appropriate.

  Thus, according to the fifteenth embodiment shown in FIG. 16, the same effects as in the fourteenth embodiment shown in FIG. 15 are obtained.

  By the way, the internal configuration of the pulse generation circuit 14 is the same as that of the first to fifth embodiments, the eighth embodiment, the ninth embodiment, and the tenth embodiment. By providing the same active power command value switching circuit as that of the embodiment or the second embodiment, the same effect can be obtained.

  Also, in DC power transmission systems and DC interconnection systems, etc., the converter performs DC voltage control, and when the active power control is performed by the counterpart converter via the DC circuit, the counterpart converter A similar effect can be obtained by switching the active power command value. Further, in the circuit of FIG. 15 or FIG. 16, by inserting a first-order lag circuit between the switch circuit 45 and the adder 46, the switching of the command value can be made gradual and the operating point can be shifted more stably.

  FIG. 17 is a block diagram showing the configuration of the sixteenth embodiment of the control device for the self-excited converter according to the present invention, and in particular, the configuration of the control circuit related to the pulse generation circuit 14. This embodiment is different from the seventh embodiment shown in FIG. 8 in that an adder that outputs the deviation between the standardized DC voltages Edn and Edn ′ of each converter and the standardized DC voltage Ed of the entire system. 38, 38 ′, level detectors 39, 39 ′ for performing level determination on the outputs of the adders 38, 38 ′, an OR circuit 40 for the output of each level detector, and a command value Qref used in the reactive power control circuit. Level detector 41, logical sum circuit 40 and logical product circuit 42 for the output of level detector 41, counter circuit 43, level detector 44, and switch circuit 47 that opens and closes according to the output signal of level detector 44, An adder 48 for adding the output of the switch circuit 47 to the reactive power command value is added.

  The level detectors 39 and 39 ′ output “1” when the deviation of the DC voltage deviates from a certain range, for example, when ΔEd <−0.2 or ΔEd> +0.2. On the other hand, the level detector 41 outputs “1” when the command value Qref applied to the reactive power control circuit 10 is within a certain range close to zero, for example, −0.1 <Qref <+0.1. The counter circuit 43 accumulates the output of the AND circuit 42, and the level detector 44 gives an input command to the switch circuit 47 when the accumulated value exceeds a certain value. The change amount ΔQref of the reactive power command value, for example, a value of 0.2 pu, is given to the switch circuit 47. When the switch is turned on, the value is added to the command value Qref and finally the reactive power control circuit 10 Used as a correct command value. The configuration of other parts such as the internal configuration of the pulse generation circuit 14 is the same as that of the sixth embodiment shown in FIG. 7 or the seventh embodiment shown in FIG.

  The operation of the sixteenth embodiment configured as described above will be described below. In this embodiment, if the DC voltage is balanced and the voltage value of each converter is substantially equal to the voltage value of the entire system, the level detectors 39, 39 ′ and the output of the OR circuit 40 are “0”. The output of the detector 44 is also zero, the switch circuit 47 is not turned on, and the control operates in the same manner as in the sixth embodiment shown in FIG. 7 or the seventh embodiment shown in FIG. When the reactive power is output in a certain amount inductively or capacitively, the output of the level detector 41 becomes zero, so the switch circuit 47 is not turned on, and the control is the sixth shown in FIG. This embodiment operates in the same way as the seventh embodiment or the seventh embodiment shown in FIG.

  This embodiment operates differently from the sixth embodiment shown in FIG. 7 or the seventh embodiment shown in FIG. 8 because the reactive power is operated near the zero point and is converted to a DC voltage. This is a case where an imbalance occurs. In this case, since the reactive power command value Qref is within a certain range close to zero, the output of the level detection value 41 is “1”. On the other hand, when the deviation between the DC voltage and the voltage of the entire system increases in any one of the plurality of converters, the outputs of the OR circuit 40 and the AND circuit 42 become “1”. When this state continues, the output of the counter circuit 43 increases, and when the predetermined time is exceeded, the level detector 44 operates and the switch circuit 47 is turned on. As a result, the reactive power command value changes from the initial value by ΔQref = 0.2 pu, and the operating point shifts to a point that is not near zero.

  As described in the vector diagram of FIG. 23 and the sixth embodiment shown in FIG. 7 or the seventh embodiment shown in FIG. 8, the DC voltage imbalance is eliminated by correcting the phase of the converter output voltage. If the reactive power is zero, appropriate correction cannot be performed if the reactive power is zero.In some cases, the reactive power direction is misrecognized and the reverse correction is performed. There is a possibility. There is no problem in a system that always outputs a certain amount of reactive power during operation, but in a system that is highly likely to operate with zero reactive power, applying this embodiment allows direct current at an operating point near zero reactive power. When voltage imbalance occurs, correction control in an appropriate direction can be performed by temporarily changing the operating point of reactive power, and DC voltage imbalance can be suppressed.

  Therefore, when this embodiment is used, the reactive power operating point is set when the phase of the output voltage is corrected in accordance with the reactive power operating point and the reactive power is at an operating point where the reactive power cannot be corrected near zero. By changing, it is possible to stably operate while keeping the DC voltage of each converter equal regardless of the operating point.

  FIG. 18 is a block diagram showing a configuration of a seventeenth embodiment of the self-excited converter according to the present invention, and in particular, a configuration of a control circuit related to the pulse generation circuit 14. The embodiment shown in FIG. 18 differs from the sixteenth embodiment shown in FIG. 17 in that the level detector 41 uses a reactive component current command instead of the reactive power command value Qref as a signal used to determine the reactive power operating point. The value Iqref is used. Qref is an input signal of the reactive power control circuit 10, and Iqref is an output signal. The reactive power is obtained by multiplying the reactive component current by the magnitude of the voltage (Q = V × Iq). In the case of a standardized signal used in a control circuit or the like, the voltage V is approximately 1 pu. The Iqref signal is almost equivalent.

  Note that the command value to be switched is not Iqref but a command value for the upper control system, that is, Qref. When Iqref is switched, the reactive power operating point changes, but the reactive power command value does not change, so that an error occurs and problems such as saturation of the integrating circuit in the reactive power control circuit 10 occur. The command value for the host control circuit is appropriate. As a result, an effect similar to that of the sixteenth embodiment shown in FIG. 17 is obtained.

  The internal configuration of the pulse generation circuit 14 is the sixth embodiment shown in FIG. 7, the seventh embodiment shown in FIG. 8, the eleventh embodiment shown in FIG. 12, and the twelfth embodiment shown in FIG. Whichever of these is used, the same effect can be obtained by providing the same reactive power command value switching circuit as in the sixteenth or seventeenth embodiment.

  When AC voltage control is performed instead of reactive power control, the same effect can be obtained by switching the reactive power command value for obtaining the slope characteristic used in general AC voltage control. Is obtained. Further, in the embodiment shown in FIG. 17 or FIG. 18, by inserting a first-order lag circuit between the switch circuit 47 and the adder 48, the switching of the command value can be made gradual and the operating point can be shifted more stably. it can.

  FIG. 19 is a block diagram showing the configuration of the eighteenth embodiment of the control device for the self-excited converter according to the present invention, and in particular, shows the configuration of the control circuit related to the pulse generation circuit 14. This embodiment is different from the thirteenth embodiment shown in FIG. 14 in that an adder that outputs a deviation between the standardized DC voltages Edn and Edn ′ of each converter and the standardized DC voltage Ed of the entire system. 38, 38 ', level detectors 39, 39' for performing level judgment on the outputs of the adders 38, 38 ', a logical sum circuit 40 for each level detector output, and a command value Pref used in the active power control circuit. Level detector 41, level detector 41 ′ for command value Qref used in the reactive power control circuit, logical sum circuit 40 and level detector 41, logical product circuit 42 for the output of detector 41 ′, counter circuit 43, Level detector 44, switch circuit 47 that opens and closes according to the output signal of level detector 44, and the output of switch circuit 47 for adding to the reactive power command value It is obtained by adding the adder 48.

  Here, the level detectors 39 and 39 ′ output “1” when the deviation of the DC voltage deviates from a certain range, for example, when ΔEd <−0.2 or ΔEd> +0.2. On the other hand, in the level detectors 41 and 41 ′, the command value Pref applied to the active power control circuit 24 and the command value Qref applied to the reactive power control circuit 10 are within a certain range close to zero, for example, −0.1 When <Pref <+0.1, −0.1 <Qref <+0.1, “1” is output. The counter circuit 43 accumulates the output of the AND circuit 42, and the level detector 44 gives an input command to the switch circuit 47 when the accumulated value exceeds a certain value. The change amount ΔQref of the reactive power command value, for example, a value of 0.2 pu, is given to the switch circuit 47, and when the switch is turned on, the value is added to the command value Qref and is applied to the reactive power control circuit 10. Used as final command value. Other parts such as the internal structure of the pulse generation circuit 14 are the same as those in the thirteenth embodiment shown in FIG.

  The operation of the eighteenth embodiment configured as described above will be described below. In this embodiment, if the DC voltage is balanced and the voltage value of each converter is substantially equal to the voltage value of the entire system, the outputs of the level detectors 39 and 39 ′ and the OR circuit 40 are “0”. The output of the level detector 44 is also zero, the switch circuit 47 is not turned on, and the control operates in the same manner as in the embodiment of (Claim 7). When the active power or reactive power is output to a certain level, the output of at least one of the level detectors 41 or 41 ′ becomes zero, so the output of the AND circuit 42 becomes “0”, and the switch circuit 47 is not input, and the control operates in the same manner as in the thirteenth embodiment shown in FIG.

  This embodiment operates differently from the thirteenth embodiment when both the active power and the reactive power are operated near the zero point, and the DC voltage is unbalanced between the converters. It is. In this case, since the active power command value Pref is within a certain range close to zero, the output of the level detection value 41 is “1”, and since the reactive power command value Qref is within a certain range near zero, the level detection value 41 The output of “1” is “1”. On the other hand, when the deviation between the DC voltage and the voltage of the entire system increases in any one of the plurality of converters, the outputs of the OR circuit 40 and the AND circuit 42 become “1”. When this state continues, the output of the counter circuit 43 increases, and when the predetermined time is exceeded, the level detector 44 operates and the switch circuit 47 is turned on. As a result, the reactive power command value changes from the initial value by ΔQref = 0.2 pu, and the reactive power operating point shifts to a point that is not near zero.

  As is clear from the vector diagram of FIG. 23, if either active power or reactive power is operated at a certain level, the DC voltage imbalance is suppressed by correcting the magnitude or phase of the output voltage. Can be controlled. However, when both active power and reactive power are zero, the reference current does not flow, and the voltage magnitude and phase correction direction cannot be determined. There is no problem in a system that outputs a certain amount of active power or reactive power at all times during operation, but in a system that has a high possibility of operating both at zero, by applying the embodiment of this claim, effective / reactive power can be obtained. When DC voltage imbalance occurs at an operating point near Kazero, phase correction control in an appropriate direction can be performed by temporarily changing the operating point of reactive power, thereby suppressing DC voltage imbalance. Can do.

  Thus, according to the present embodiment, the operating point where the magnitude and phase of the output voltage are corrected according to the operating points of the active power and reactive power, and both the active power and reactive power cannot be corrected near zero. In this case, by changing the reactive power operating point, it is possible to stably operate while maintaining the DC voltage of each converter equal regardless of the operating point.

  FIG. 20 is a block diagram showing the configuration of the nineteenth embodiment of the control device for the self-excited converter according to the present invention, and in particular, shows the configuration of the control circuit related to the pulse generation circuit 14. This embodiment is different from the eighteenth embodiment shown in FIG. 19 in the switch for adding the output of the level detector 44 and the command value that is changed by turning on the switch. In the eighteenth embodiment, the reactive power command value Qref is changed by turning on the switch circuit 47 when the output of the level detector 44 becomes “1”, whereas in the nineteenth embodiment, the level detector When the output of 44 becomes “1”, the switch circuit 45 is turned on to change the active power command value Pref.

  As a result, by applying this embodiment, when an imbalance occurs in the DC voltage at the operating point near the active / reactive power zero, the voltage in the appropriate direction can be changed by temporarily changing the operating point of the active power. Can be corrected, and DC voltage imbalance can be suppressed.

  Thus, according to the nineteenth embodiment, the magnitude and phase of the output voltage are corrected according to the operating points of active power and reactive power, and both active power and reactive power cannot be corrected near Zego. By changing the active power operating point when the operating point is at a stable operating point, stable operation can be performed while maintaining the DC voltage of each converter equal regardless of the operating point.

  Whether to apply the eighteenth embodiment or the nineteenth embodiment is determined by the purpose of each system and the connected system. For example, when it is desired to reduce the voltage fluctuation of the connected AC system, the effective power is changed according to the nineteenth embodiment, and when it is desired to reduce the fluctuation of the active power accommodated at the other end in the DC power transmission system or the like, the eighteenth embodiment. A method of changing the reactive power can be considered according to the embodiment.

  By the way, the switch circuit 47 and the adder 48 in the eighteenth embodiment shown in FIG. 19 and the switch circuit 45 and the adder 46 in the nineteenth embodiment shown in FIG. Even when the switch circuits 45 and 47 are both turned on in the case of “1”, the same effect can be obtained. At this time, if the direction of change of the active power and the reactive power, that is, the positive / negative of ΔPref and ΔQref is appropriately selected, it is possible to minimize the voltage fluctuation of the connected AC system.

  Further, the internal configuration of the pulse generation circuit 14 is the same active power command value and reactive power command value as those in the eighteenth embodiment or the nineteenth embodiment even if the thirteenth embodiment shown in FIG. 14 is used. By providing the switching circuit, the same effect can be obtained. In the eighteenth or nineteenth embodiment, the command value can be switched more slowly by threatening the first-order lag circuit between the switch circuit 47 and the adder 48 and between the switch circuit 45 and the adder 46. The operating point can be transferred stably.

The block diagram which showed the structure of 1st Embodiment of the self-excited converter which concerns on this invention with the main circuit. The block diagram which shows the structure of 2nd Embodiment of the control apparatus of the self-excited converter based on this invention, The figure which showed the pulse generation circuit especially. The block diagram which shows the structure of 3rd Embodiment of the control apparatus of the self-excited converter based on this invention, The figure which showed the pulse generation circuit especially. The block diagram which shows the structure of 4th Embodiment of the control apparatus of the self-excited converter based on this invention, and the figure which showed the pulse generation circuit especially. FIG. 9 is a block diagram showing a configuration of a fifth embodiment of a control device for a self-excited converter according to the present invention, and more particularly a diagram showing a pulse generation circuit. The wave form diagram which shows an example of the simulation analysis result performed in order to demonstrate the effect of 1st thru | or 5th embodiment. FIG. 10 is a block diagram showing a configuration of a sixth embodiment of a control device for a self-excited converter according to the present invention, and more particularly a diagram showing a pulse generation circuit. FIG. 10 is a block diagram showing a configuration of a seventh embodiment of a control device for a self-excited converter according to the present invention, and more particularly a diagram showing a pulse generation circuit. The block diagram which shows the structure of 8th Embodiment of the control apparatus of the self-excited converter based on this invention, and the figure which showed the pulse generation circuit especially. It is a block diagram which shows the structure of 9th Embodiment of the control apparatus of the self-excited converter based on this invention, and the figure which showed the pulse generation circuit especially. It is a block diagram which shows the structure of 10th Embodiment of the control apparatus of the self-excited converter based on this invention, It is the figure which showed the pulse generation circuit especially, The block which shows 1st Embodiment of a relevant part Figure. The block diagram which shows the structure of 11th Embodiment of the control apparatus of the self-excited converter based on this invention, and the figure which showed the pulse generation circuit especially. It is a block diagram which shows the structure of 12th Embodiment of the control apparatus of the self-excited converter based on this invention, and the figure which showed the pulse generation circuit especially. It is a block diagram which shows the structure of 13th Embodiment of the control apparatus of the self-excited converter based on this invention, and the figure which showed the pulse generation circuit especially. It is a block diagram which shows the structure of 14th Embodiment of the control apparatus of the self-excited converter based on this invention, and is a figure which shows the structure of the control circuit especially related with a pulse generation circuit. It is a block diagram which shows the structure of 15th Embodiment of the control apparatus of the self-excited converter based on this invention, and is a figure which shows the structure of the control circuit especially related with a pulse generation circuit. It is a block diagram which shows the structure of 16th Embodiment of the control apparatus of the self-excited converter based on this invention, and is a figure which shows the structure of the control circuit relevant to a pulse generation circuit especially. It is a block diagram which shows the structure of 17th Embodiment of the control apparatus of the self-excited converter based on this invention, and is a figure which shows the structure of the control circuit relevant to a pulse generation circuit especially. It is a block diagram which shows the structure of 18th Embodiment of the control apparatus of the self-excited converter based on this invention, and is a figure which shows the structure of the control circuit especially related with a pulse generation circuit. It is a block diagram which shows the structure of 19th Embodiment of the control apparatus of the self-excited converter based on this invention, and is a figure which shows the structure of the control circuit especially related with a pulse generation circuit. The block diagram which showed the structure of the control apparatus of the conventional self-excited converter in which several converters were connected in series at the direct current | flow side with the main circuit. The block diagram which shows the internal structure of the pulse generation circuit which comprises the control apparatus of the conventional self-excited converter. In order to explain the operation when the active power is increased or decreased for each converter in a conventional self-excited converter control device in which a plurality of converters are connected in series on the DC side, the relationship between voltage and current is shown. Tied figure.

Explanation of symbols

1, 1 ′ self-excited converter 2, 2 ′ DC capacitor 3, 3 ′ transformer 4 AC bus 5 DC voltage detection circuit 6 DC voltage control circuit 7 AC voltage detection circuit 8 AC current detection circuit 9 reactive power detection circuit 10 invalid Power control circuit 11 AC current control circuit 12 Phase detection circuit 13 Orthogonal axis conversion circuit 14, 14 'Pulse generation circuit 15, 15' Gain circuit 16, 16 'Sine wave generation circuit 17, 17' Carrier wave generation circuit 18, 18 'Large or small Comparison circuit 19, 19 'DC voltage detection circuit 20, 20' Normalization circuit 21, 21 'arithmetic circuit 22, 22' gain circuit 23 average value arithmetic circuit 24 active power control circuit 25 adder 26 gain circuit 27 multiplier 28 addition 29 Positive / negative judgment circuit 30 Arithmetic circuit 31 Arithmetic circuit 32 Switch circuit 33 Level circuit 34 Switch circuit 35 Switch circuit 36 Level detector 37 Switch H circuit 38, 38 'adder 39, 39' level detector 40 OR circuit 41, 41 'level detector 42 AND circuit 43 counter circuit 44 level detector 45 switch circuit 46 adder 47 switch circuit 48 adder

Claims (10)

In the control device of the voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The value obtained by standardizing the magnitude of the DC voltage for each converter is P, and the value obtained by dividing each active power operating point to the P power or the value obtained by dividing the DC voltage for each converter by the average voltage is the P power. A control device for a self-excited converter, wherein the amplitude of the AC output voltage of the converter is corrected by multiplying or dividing by the calculated value. In the control device of the voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The difference between the DC voltage and average value of each converter is proportional to the value obtained by multiplying the command value of the reactive current, and the phase difference of the AC output voltage of the converter with respect to the system side voltage is corrected. A control device for a self-excited converter, characterized in that In the control device of the voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The DC voltage for each converter or the value obtained by multiplying the DC voltage for each converter by the average voltage multiplied by +1 or -1 by the positive / negative of the DC current command value A control device for a self-excited converter, wherein the amplitude of the output voltage is corrected by multiplication or division.   4. The control device for a self-excited converter according to claim 3, wherein control is performed so as not to correct the amplitude of the AC output voltage when the active power operating point is in a certain range close to zero. In the control device of the voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The system side of the AC output voltage of the converter in a magnitude proportional to a value obtained by multiplying the deviation between the DC voltage and the average value for each converter by +1 or -1 depending on whether the reactive power operating point is positive or negative A control device for a self-excited converter, wherein a phase difference with respect to a voltage is corrected.   6. The control device for a self-excited converter according to claim 5, wherein when the reactive power operating point is in a certain range close to zero, control is performed so as not to correct the phase difference. In the control device of the voltage type self-excited converter in which a plurality of converters are connected in series on the DC side,
The correction of the amplitude of the AC output voltage according to any one of claims 1, 3, and 4 and the phase difference of the AC output voltage according to any one of claims 2, 5, and 6. A control device for a self-excited converter, characterized in that both correction and correction are performed.   The active power operating point is in a certain range close to zero, and the voltage deviation of at least one converter among the deviations between the DC voltage and the average value for each converter continues for a certain time or longer. 4. The command value for active power control of the converter or the converter connected via the DC circuit is changed when the value deviates from the above, or any one of claims 1 to 3. Self-excited converter control device.   The reactive power operating point is in a certain range close to zero, and the voltage deviation of at least one converter among the deviations between the DC voltage and the average value for each converter continues for a certain time or longer. The control device for a self-excited converter according to any one of claims 4 to 6, wherein the command value for reactive power control or the command value for AC voltage control is changed when deviating from .   Both the active power operating point and the reactive power operating point are in a certain range close to zero, and the voltage deviation of at least one converter among the deviations between the DC voltage and the average value for each converter is a certain time. 8. The command value for active power control, the command value for reactive power control, or the command value for AC voltage control is changed when continuously deviating from the predetermined range. Control device of self-excited converter as described in 1.

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