JP2007096051A - Cathode-coupling plasma cvd equipment and thin film manufacturing method by it - Google Patents

Cathode-coupling plasma cvd equipment and thin film manufacturing method by it Download PDF

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JP2007096051A
JP2007096051A JP2005284461A JP2005284461A JP2007096051A JP 2007096051 A JP2007096051 A JP 2007096051A JP 2005284461 A JP2005284461 A JP 2005284461A JP 2005284461 A JP2005284461 A JP 2005284461A JP 2007096051 A JP2007096051 A JP 2007096051A
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cathode
plasma cvd
film
bias voltage
cvd apparatus
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Atsufumi Ogishi
厚文 大岸
Daisuke Katayama
大介 片山
Yutaka Kusuda
豊 楠田
Shinichi Motoyama
慎一 本山
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Samco Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To suppress the temperature rise of a deposition substrate, and to reduce membrane stress in a formed film by controlling high frequency power and a self bias voltage independently to an arbitrary value in cathode-coupling plasma CVD equipment. <P>SOLUTION: A low pass filter coil and a variable resistor are connected in series between a cathode electrode and a coupling capacitor and grounded. Consequently, the self bias voltage is reduced without decreasing the high frequency voltage. Accordingly, it becomes possible to prevent the temperature rise of the deposition substrate, and to form a low stress film while keeping plasma density as high as that of a conventional cathode-coupling plasma CVD. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、一方の電極を接地し、被コーティング物を載置する他方の電極に高周波電力を投入するカソードカップリング型プラズマCVD装置に関する。   The present invention relates to a cathode-coupled plasma CVD apparatus in which one electrode is grounded and high-frequency power is supplied to the other electrode on which an object to be coated is placed.

従来のカソードカップリング型プラズマCVD装置(以下カソードCVD装置とする)を図1に示す(特許文献1)。反応室1内に上部電極2と下部電極3がほぼ平行に置かれ、上部電極2は接地され、下部電極3は、カップリングコンデンサ4およびマッチングユニット(MU)5を介して高周波電源6に接続される。上部電極2にはガス導入路7が接続され、反応室1にはガス排出口8が設けられる。   A conventional cathode coupling type plasma CVD apparatus (hereinafter referred to as a cathode CVD apparatus) is shown in FIG. 1 (Patent Document 1). An upper electrode 2 and a lower electrode 3 are placed in the reaction chamber 1 substantially in parallel, the upper electrode 2 is grounded, and the lower electrode 3 is connected to a high frequency power source 6 via a coupling capacitor 4 and a matching unit (MU) 5. Is done. A gas introduction path 7 is connected to the upper electrode 2, and a gas discharge port 8 is provided in the reaction chamber 1.

成膜は次のようにして行われる。成膜すべき基板9を下部電極3上に置き、ガス導入路7を通して供給される成膜ガスを上部電極2に設けられた多数の小穴から反応室1内にシャワー状に導入する。そして高周波電源6から下部電極3に高周波電力を投入すると、両電極2、3間の成膜ガスがプラズマ化し、正イオンである成膜ガスイオンと電子とに分離する。このうち成膜ガスイオンが基板9上に堆積して膜が形成される。   Film formation is performed as follows. A substrate 9 to be deposited is placed on the lower electrode 3, and a deposition gas supplied through the gas introduction path 7 is introduced into the reaction chamber 1 from a large number of small holes provided in the upper electrode 2 in a shower shape. When high-frequency power is supplied from the high-frequency power source 6 to the lower electrode 3, the film-forming gas between the electrodes 2 and 3 is turned into plasma and separated into film-forming gas ions and electrons that are positive ions. Among these, film forming gas ions are deposited on the substrate 9 to form a film.

カソードCVD装置内での両電極2、3間のプラズマの電位分布を図3に示す。両電極2、3の間に生成されたプラズマのうち、電子は軽量であるため高速で運動し、短時間でプラズマから抜け出して装置壁などに衝突し、消滅する。一方、正イオンは電子に比べて遙かに質量が大きく、移動速度が遅いため、プラズマ中に長時間存在し続ける。このため、プラズマは全体として正の電荷を帯びるようになる。この現象は、特に高周波投入電極である下部電極近傍において著しい。この部分をイオンシースと呼ぶ。イオンシースの正電荷に誘引されて下部電極には負電荷が蓄積され、負の自己バイアス電圧が発生する。従って、下部電極はカソード電極とも呼ばれる。   FIG. 3 shows the plasma potential distribution between the electrodes 2 and 3 in the cathode CVD apparatus. Of the plasma generated between the electrodes 2 and 3, electrons are light and move at a high speed, escape from the plasma in a short time, collide with the device wall, and disappear. On the other hand, positive ions have a much larger mass than electrons and have a slower moving speed, so they continue to exist in plasma for a long time. For this reason, the plasma has a positive charge as a whole. This phenomenon is particularly remarkable in the vicinity of the lower electrode, which is a high-frequency input electrode. This part is called an ion sheath. Attracted by the positive charge of the ion sheath, negative charges are accumulated in the lower electrode, and a negative self-bias voltage is generated. Therefore, the lower electrode is also called a cathode electrode.

プラズマ中の正イオン(成膜ガスイオン)は、この負の自己バイアス電圧によって加速され、下部電極3上に載置された成膜基板9に衝突する。カソードCVD装置では、このイオン加速による物理的な力が化学反応に加わることにより、高速に緻密な膜が形成される。   Positive ions (film formation gas ions) in the plasma are accelerated by the negative self-bias voltage and collide with the film formation substrate 9 placed on the lower electrode 3. In the cathode CVD apparatus, a physical force by this ion acceleration is applied to the chemical reaction, so that a dense film is formed at high speed.

特開平07-058103号公報JP 07-058103 A 特開平06-002121号公報Japanese Patent Laid-Open No. 06-002121 特開平08-176854号公報Japanese Unexamined Patent Publication No. 08-176854

基板9上に生成される膜の特性を向上させるためには、高周波電力を強めてプラズマ密度を高め、成膜ガスの分解を促進させる必要がある。しかしながら、従来のカソードCVD装置では、自己バイアス電圧はカソード電極3に供給する高周波電力により一義的に決まり、高周波電力を上昇させると、プラズマ密度は高まるが、同時に自己バイアス電圧が負に増大する。すると、成膜ガスの分解は促進されるが、基板9に入射するイオンのエネルギーが大きくなり、基板温度の上昇を招く。また、入射イオンのエネルギーが増加すると、基板9上の成膜内での膜応力が大きくなり、基板9の反りや膜剥離の原因となる。   In order to improve the characteristics of the film produced on the substrate 9, it is necessary to increase the high frequency power to increase the plasma density and promote the decomposition of the film forming gas. However, in the conventional cathode CVD apparatus, the self-bias voltage is uniquely determined by the high-frequency power supplied to the cathode electrode 3, and when the high-frequency power is increased, the plasma density increases, but at the same time, the self-bias voltage increases negatively. Then, although the decomposition of the film forming gas is promoted, the energy of ions incident on the substrate 9 is increased, and the substrate temperature is increased. Further, when the energy of incident ions increases, the film stress in the film formation on the substrate 9 increases, causing the substrate 9 to warp or peel off.

一方、基板9の耐熱温度が低い場合、高周波電力を下げて基板温度が上昇することを防止する必要があるが、高周波電力を下げると装置壁に付着した膜の密度が下がって剥れやすくなる。剥れた膜は細かい箔片(パーティクル)となって基板9上に落下し、成膜の品質を大きく低下させる。また、連続して成膜できる積算膜厚も小さくなり、生産性や安定性に大きな障害となる。   On the other hand, when the heat-resistant temperature of the substrate 9 is low, it is necessary to reduce the high-frequency power to prevent the substrate temperature from rising. . The peeled film becomes fine foil pieces (particles) and falls on the substrate 9, and the quality of the film is greatly reduced. In addition, the integrated film thickness that can be continuously formed is reduced, which is a major obstacle to productivity and stability.

そこで、本発明は高周波電力と自己バイアス電圧とを独立して任意の値に制御することにより、成膜基板の温度上昇を低減し、膜特性の向上と膜応力の低下をはかることを目的とする。   Therefore, the present invention aims to reduce the temperature rise of the film-forming substrate by independently controlling the high-frequency power and the self-bias voltage to an arbitrary value, thereby improving the film characteristics and reducing the film stress. To do.

上記課題を解決するために成された本発明に係るカソードカップリング型プラズマCVD装置は、
a) 反応室内に略平行に設けた、接地電極及び被コーティング物を載置する高周波投入電極、
b) カップリングコンデンサを介して高周波投入電極に接続される高周波電源、
c) 高周波投入電極とカップリングコンデンサの間と接地との間に接続されたローパスフィルタ、
を備える。
The cathode coupling type plasma CVD apparatus according to the present invention, which has been made to solve the above problems,
a) A high-frequency input electrode for placing a ground electrode and an object to be coated provided substantially in parallel in the reaction chamber,
b) a high frequency power source connected to the high frequency input electrode via a coupling capacitor;
c) a low-pass filter connected between the high-frequency input electrode and the coupling capacitor and ground,
Is provided.

このローパスフィルタに直列に可変抵抗を接続することにより、更に制御性が高まる。   Controllability is further enhanced by connecting a variable resistor in series with this low-pass filter.

なお、本発明において、被コーティング物を高周波投入電極に「載置する」という操作は、高周波投入電極が下にあり、その上に被コーティング物を置くことを指すばかりではなく、接地電極を下部に、高周波投入電極を上部に配置して、その上部の高周波投入電極の接地電極側の表面に被コーティング物を固定する場合や、両電極を平行に立設し、被コーティング物を高周波投入電極側に固定することも指す。   In the present invention, the operation of “putting” the object to be coated on the high-frequency input electrode not only indicates that the high-frequency input electrode is below and the object to be coated is placed thereon, In addition, when a high frequency input electrode is arranged on the top and the object to be coated is fixed on the surface of the upper side of the high frequency input electrode on the ground electrode side, or both electrodes are erected in parallel and the object to be coated is a high frequency input electrode. Also refers to fixing to the side.

高周波投入電極(カソード電極)とカップリングコンデンサの間と接地との間にローパスフィルタを接続することにより、高周波電圧を減少させることなく、直流電圧である自己バイアス電圧を低減することが可能となる。これによりプラズマ密度を高く保ちつつ、成膜基板の温度上昇を防ぎ、膜特性を向上させつつ膜応力の低下をはかることが可能となる。   By connecting a low-pass filter between the high-frequency input electrode (cathode electrode) and the coupling capacitor and the ground, the self-bias voltage, which is a DC voltage, can be reduced without reducing the high-frequency voltage. . As a result, it is possible to prevent the temperature rise of the film formation substrate while keeping the plasma density high and to reduce the film stress while improving the film characteristics.

また、このローパスフィルタに可変抵抗を直列接続し、この抵抗値を適宜調節することにより、自己バイアス電圧の大きさを任意に制御することが可能となる。これにより、高周波投入電極上の基板に生成される膜の機能又は特性を制御することができる。例えば、アノードカップリング型プラズマCVD装置と同等の特性を持つ膜と、通常のカソードカップリング型CVD装置で作成される膜とを1つの反応室で連続的に積層することができる。   In addition, by connecting a variable resistor in series with the low-pass filter and adjusting the resistance value as appropriate, the magnitude of the self-bias voltage can be arbitrarily controlled. Thereby, the function or characteristic of the film | membrane produced | generated by the board | substrate on a high frequency input electrode is controllable. For example, a film having characteristics equivalent to those of an anode coupling type plasma CVD apparatus and a film formed by a normal cathode coupling type CVD apparatus can be continuously laminated in one reaction chamber.

なお、特許文献2には、高周波電源8と高周波コイル6の間にコイル9及び可変抵抗10を設けた装置が開示されているが、これは上記本願発明に係るカソードカップリング型プラズマCVD装置とは全く異なる原理で作動する、イオンプレーティング装置である。すなわち、イオンプレーティング装置では、自己バイアスは高周波コイル周辺に生じるのに対し、カソードカップリング型プラズマCVD装置では自己バイアスは基板を載置する電極の近傍に生じる。このため、カソードカップリング型プラズマCVD装置では基板を載置する電極の近傍に生じる自己バイアスを利用して基板上に高速に緻密な膜形成が可能となる効果を奏する。
また、特許文献3には、下部電極3に高周波電源9が接続され、下部電極3と高周波電源9の間と接地との間にローパスフィルタを介して直流電源が接続されたプラズマCVD装置が開示されている。この装置では下部電極近傍に生じる自己バイアス電圧の制御がある程度可能となるものの、直流電源が必要となり、装置の構成が複雑となる。
Patent Document 2 discloses an apparatus in which a coil 9 and a variable resistor 10 are provided between a high-frequency power source 8 and a high-frequency coil 6, and this is the same as the cathode-coupled plasma CVD apparatus according to the present invention. Is an ion plating device that operates on a completely different principle. That is, in the ion plating apparatus, the self-bias is generated around the high-frequency coil, whereas in the cathode coupling type plasma CVD apparatus, the self-bias is generated in the vicinity of the electrode on which the substrate is placed. Therefore, the cathode coupling type plasma CVD apparatus has an effect that a dense film can be formed on the substrate at high speed by using a self-bias generated in the vicinity of the electrode on which the substrate is placed.
Patent Document 3 discloses a plasma CVD apparatus in which a high frequency power source 9 is connected to the lower electrode 3 and a DC power source is connected between the lower electrode 3 and the high frequency power source 9 and a ground via a low pass filter. Has been. Although this device can control the self-bias voltage generated in the vicinity of the lower electrode to some extent, it requires a direct current power source, which complicates the configuration of the device.

[実施例1]
本発明に係るカソードカップリング型プラズマCVD装置の一構成例を図2に示す。図1と比較すると明らかな通り、装置の基本的構成は従来のカソードカップリング型プラズマCVD装置と同様であるが、本発明に係る装置では、高周波電力が投入される下部電極(カソード電極)3とカップリングコンデンサ4との間に、ローパスフィルタコイル10を接続し、さらに自己バイアス電圧を調節するためのの可変抵抗11を直列接続して接地している。なお、ローパスフィルタコイル10と可変抵抗11は、スイッチ12により下部電極3から切り離すこともできる。切り離すと、従来のカソードカップリング型プラズマCVD装置(図1)と同じとなる。
[Example 1]
One structural example of the cathode coupling type plasma CVD apparatus according to the present invention is shown in FIG. As is clear from comparison with FIG. 1, the basic configuration of the apparatus is the same as that of the conventional cathode coupling type plasma CVD apparatus, but in the apparatus according to the present invention, a lower electrode (cathode electrode) 3 to which high-frequency power is input. And a coupling capacitor 4, a low-pass filter coil 10 is connected, and a variable resistor 11 for adjusting the self-bias voltage is connected in series and grounded. The low-pass filter coil 10 and the variable resistor 11 can be separated from the lower electrode 3 by the switch 12. When separated, it becomes the same as the conventional cathode coupling type plasma CVD apparatus (FIG. 1).

両電極2、3間に生成されるプラズマを発電の場と考えた場合、カップリングコンデンサ4は、時定数(カップリングコンデンサ容量Cと自己バイアス電圧制御用可変抵抗の抵抗値Rの積:CR積)の値によっては過負荷になる。ローパスフィルタコイル10は直流電圧を自由に通すため、カップリングコンデンサ4に蓄積された負電荷は、ローパスフィルタコイル10から抵抗11を介して接地される。このため、自己バイアス電圧の絶対値は低下する。また、CR積が変化することにより、接地へ流れ込む負電荷の量を制御できる。そのため、可変抵抗11の値を調節することで、自己バイアス電圧の大きさを任意に設定することが可能となる。   When the plasma generated between the electrodes 2 and 3 is considered as a power generation field, the coupling capacitor 4 has a time constant (the product of the coupling capacitor capacitance C and the resistance value R of the variable resistor for self-bias voltage control: CR Depending on the value of (product), it becomes overloaded. Since the low-pass filter coil 10 allows DC voltage to pass freely, negative charges accumulated in the coupling capacitor 4 are grounded from the low-pass filter coil 10 via the resistor 11. For this reason, the absolute value of the self-bias voltage decreases. In addition, the amount of negative charge flowing into the ground can be controlled by changing the CR product. Therefore, the magnitude of the self-bias voltage can be arbitrarily set by adjusting the value of the variable resistor 11.

自己バイアス電圧の値により、成膜基板9の表面に衝突するイオンのエネルギーが変化し、生成する膜の性質に影響を与える。従って、可変抵抗値を調節することにより、成膜基板9の温度上昇を制御し、生成する膜の機能又は特性を制御することができる。
具体的には、可変抵抗値を変化させて自己バイアス電圧を制御することにより、アノードカップリング型プラズマCVD装置と同等の特性を持つ膜を作成することができ、また通常のカソードカップリング型CVD装置で作成される膜を作成することもできる。また、これらを交互に作成することにより、1つの反応室で両者を交互にかつ連続的に積層することができる。
Depending on the value of the self-bias voltage, the energy of ions that collide with the surface of the film-forming substrate 9 changes and affects the properties of the film to be generated. Therefore, by adjusting the variable resistance value, the temperature rise of the film formation substrate 9 can be controlled, and the function or characteristic of the film to be generated can be controlled.
Specifically, by changing the variable resistance value and controlling the self-bias voltage, it is possible to create a film with characteristics equivalent to those of an anode-coupled plasma CVD device, and to use a normal cathode-coupled CVD. It is also possible to create a membrane that is created with an apparatus. Further, by alternately producing them, both can be alternately and continuously stacked in one reaction chamber.

高周波電圧と自己バイアス電圧の高周波電力依存性を、以下の3通りの装置構成において測定した。
(1)ローパスフィルタコイル10と抵抗11を接続しない(切り離した)、従来の装置構成。
(2)ローパスフィルタコイル10(L=102μH)を接続し、可変抵抗11の大きさを19 kΩとした装置構成。
(3)ローパスフィルタコイル10(L=102μH)を接続し、可変抵抗11の大きさを1.9 kΩとした装置構成。
The high frequency power dependence of the high frequency voltage and the self-bias voltage was measured in the following three device configurations.
(1) A conventional apparatus configuration in which the low-pass filter coil 10 and the resistor 11 are not connected (separated).
(2) Device configuration in which a low-pass filter coil 10 (L = 102 μH) is connected and the size of the variable resistor 11 is 19 kΩ.
(3) Device configuration in which the low-pass filter coil 10 (L = 102 μH) is connected and the size of the variable resistor 11 is 1.9 kΩ.

測定条件は、O2流量680 sccm,圧力100 Pa,アノード電極2の温度、およびカソード電極3の温度は共に100 ℃とし、高周波電力を50〜400 Wの間で変化させた。 The measurement conditions were an O 2 flow rate of 680 sccm, a pressure of 100 Pa, a temperature of the anode electrode 2 and a temperature of the cathode electrode 3 of 100 ° C., and the high-frequency power was changed between 50 and 400 W.

図4に高周波電力(RF)と高周波電圧(Vpp)の関係、図5に高周波電力(RF)と自己バイアス電圧(Vdc)の関係をそれぞれ示す。高周波電力(RF)の増加に伴い高周波電圧は増加するが、その値は3つの装置構成の間に殆ど差が無い。一方、自己バイアス電圧(Vdc)は、いずれの装置構成においても高周波電力(RF)の増加に伴い負に増加するが、全ての高周波電力の範囲で(1)が最も負にバイアスされており、(2)、(3)と直列抵抗値が小さくなるに従って自己バイアス電圧の絶対値が小さくなる。すなわち、装置構成(3)によれば自己バイアス電圧Vdcの絶対値を最も小さくすることができる。   FIG. 4 shows the relationship between the high frequency power (RF) and the high frequency voltage (Vpp), and FIG. 5 shows the relationship between the high frequency power (RF) and the self-bias voltage (Vdc). Although the high frequency voltage increases as the high frequency power (RF) increases, there is almost no difference between the three device configurations. On the other hand, the self-bias voltage (Vdc) increases negatively with the increase of high-frequency power (RF) in any device configuration, but (1) is most negatively biased in the range of all high-frequency power, The absolute value of the self-bias voltage decreases as the series resistance value decreases with (2) and (3). That is, according to the device configuration (3), the absolute value of the self-bias voltage Vdc can be minimized.

以上の結果から、下部電極3を、ローパスフィルタコイル10および抵抗11を介して接地することにより、高周波電力と高周波電圧の関係を変化させることなく、自己バイアス電圧の絶対値を大きく低減できることが判明した。さらに抵抗値を小さくするほど、自己バイアス電圧の絶対値は大きく低下した。これは、ローパスフィルタと抵抗の接続により、高いプラズマ密度を維持しつつ、イオン引込力を抑え、成膜基板9の温度上昇等の不都合を低下させうることを示す。さらに、抵抗値を任意に設定することで、0 Vから-300 Vの範囲内で、高周波電圧と自己バイアス電圧とを独立して所望の値とすることが可能であることも、図5より明らかである。   From the above results, it is found that the absolute value of the self-bias voltage can be greatly reduced by grounding the lower electrode 3 through the low-pass filter coil 10 and the resistor 11 without changing the relationship between the high-frequency power and the high-frequency voltage. did. The absolute value of the self-bias voltage greatly decreased as the resistance value was further reduced. This indicates that the connection of the low-pass filter and the resistor can suppress the ion drawing force while maintaining a high plasma density, and can reduce inconveniences such as a temperature rise of the film formation substrate 9. Furthermore, by arbitrarily setting the resistance value, it is possible to independently set the high frequency voltage and the self-bias voltage to desired values within the range of 0 V to −300 V, as shown in FIG. it is obvious.

[実施例2]
本発明のカソードカップリング型プラズマCVD装置を用いた成膜例を、従来の装置を用いた成膜例と比較しつつ示す。
実施例1で示した3通りの装置構成で、テトラエトキシシランと酸素O2を用いてSiO2膜を作成し、得られた膜の応力を測定した。高周波電力は300 Wで固定した。このとき、自己バイアス電圧は、(1)で-272 V、(2)で-198 V、(3)で-95 Vである。成膜条件は、テトラエトキシシラン流量20 sccm,O2流量680 sccm,圧力100 Pa、アノード電極2およびカソード電極3の温度は共に150℃とした。成膜時間は5分とした。
[Example 2]
A film formation example using the cathode coupling type plasma CVD apparatus of the present invention will be shown in comparison with a film formation example using a conventional apparatus.
With the three apparatus configurations shown in Example 1, an SiO 2 film was prepared using tetraethoxysilane and oxygen O 2, and the stress of the obtained film was measured. The high frequency power was fixed at 300 W. At this time, the self-bias voltage is -272 V in (1), -198 V in (2), and -95 V in (3). The film formation conditions were as follows: tetraethoxysilane flow rate 20 sccm, O 2 flow rate 680 sccm, pressure 100 Pa, and the temperatures of the anode electrode 2 and the cathode electrode 3 were both 150 ° C. The film formation time was 5 minutes.

図6に、自己バイアス電圧(Vdc)と生成膜の膜応力(Stress)の関係を示す。(1)の装置構成により作成した膜は、自己バイアス電圧が高いため大きい圧縮応力-220 MPaを有する。一方、(2)、(3)の装置構成により作成した膜は、自己バイアス電圧の低減により、膜応力は減少した。   FIG. 6 shows the relationship between the self-bias voltage (Vdc) and the film stress (Stress) of the generated film. The film prepared by the device configuration of (1) has a large compressive stress of −220 MPa because of a high self-bias voltage. On the other hand, in the films prepared by the device configurations of (2) and (3), the film stress decreased due to the reduction of the self-bias voltage.

図7に、自己バイアス電圧(Vdc)と成膜基板温度の関係を示す。(1)では、設定温度の150℃から、5分成膜後に190℃まで上昇していた。一方、(2)では170℃,(3)では160℃となっており、自己バイアス電圧を低下させることで、成膜基板の温度上昇を低減できる。
以上の結果から、自己バイアス電圧を低下させることで、低応力膜を作成することができるとともに、成膜基板温度を上昇させることなく成膜することができることがわかった。
FIG. 7 shows the relationship between the self-bias voltage (Vdc) and the deposition substrate temperature. In (1), the temperature rose from the set temperature of 150 ° C. to 190 ° C. after film formation for 5 minutes. On the other hand, the temperature is 170 ° C. in (2) and 160 ° C. in (3), and the temperature rise of the film formation substrate can be reduced by lowering the self-bias voltage.
From the above results, it was found that by reducing the self-bias voltage, a low-stress film can be formed and a film can be formed without increasing the film formation substrate temperature.

[実施例3]
本発明のカソードカップリング型プラズマCVD装置を用いて作成した膜と、アノードカップリング型プラズマCVD装置(以下アノードCVD装置とする)を用いて作成した膜とを比較する。
実施例1の(3)の装置構成で低応力SiCN膜を作成し、アノードCVD装置で得られたSiCN膜との比較を行った。成膜ガスとして、1,1,1,3,3,3-ヘキサメチルジシラザン(以下HMDSとする)と水素H2を用いた。成膜条件は、HMDS流量10 sccm,H2流量200 sccm,圧力67 Pa,アノード電極2の温度、およびカソード電極3の温度は共に70℃とした。
[Example 3]
A film prepared using the cathode coupling type plasma CVD apparatus of the present invention is compared with a film prepared using an anode coupling type plasma CVD apparatus (hereinafter referred to as an anode CVD apparatus).
A low stress SiCN film was prepared with the apparatus configuration of Example 1 (3) and compared with the SiCN film obtained with the anode CVD apparatus. As a film forming gas, 1,1,1,3,3,3-hexamethyldisilazane (hereinafter referred to as HMDS) and hydrogen H 2 were used. The film formation conditions were as follows: HMDS flow rate 10 sccm, H 2 flow rate 200 sccm, pressure 67 Pa, anode electrode 2 temperature, and cathode electrode 3 temperature were both 70 ° C.

図8に、アノードCVD装置で作成したSiCN膜とカソードCVD装置で作成したSiCN膜のFT-IRスペクトルを示す。両者は定量的には多少の差異はあるものの、現われたピークの波数はほぼ同じであり、定性的には同等のSiCN膜が得られている。また、膜応力はアノードCVD装置で作成したものが-5.5 MPa,カソードCVD装置で作成したものが-6.6 MPaであり、ほぼ同値である。   FIG. 8 shows FT-IR spectra of the SiCN film prepared by the anode CVD apparatus and the SiCN film prepared by the cathode CVD apparatus. Although there is a slight difference between the two, the wave numbers of the peaks that appear are almost the same, and qualitatively equivalent SiCN films are obtained. The film stress produced by the anode CVD apparatus is -5.5 MPa, and that produced by the cathode CVD apparatus is -6.6 MPa, which is almost the same value.

以上のことから、ローパスフィルタコイルと抵抗を接続し、自己バイアス電圧を低減させることでアノードCVD装置と同等の低応力SiCN膜を得ることが可能であると結論できる。   From the above, it can be concluded that a low stress SiCN film equivalent to the anode CVD apparatus can be obtained by connecting a low-pass filter coil and a resistor and reducing the self-bias voltage.

本実施例で接続したローパスフィルタコイル10と可変抵抗11を、スイッチ12により下部電極3から電気的に切断すれば、容易に従来の装置構成(図1)に戻すことが可能である。従って、アノードCVDで作成される膜と同等の特性を有する膜と、通常のカソードCVDで作成される膜と同等な膜とを1つの反応室で連続的に積層できることは明らかである。   If the low-pass filter coil 10 and the variable resistor 11 connected in this embodiment are electrically disconnected from the lower electrode 3 by the switch 12, it is possible to easily return to the conventional device configuration (FIG. 1). Therefore, it is obvious that a film having characteristics equivalent to those of a film formed by anode CVD and a film equivalent to a film formed by normal cathode CVD can be continuously stacked in one reaction chamber.

すなわち、実施例2及び3の結果は、可変抵抗11の値を変化させることにより、成膜される膜の機能又は特性を変化させることができることを示している。   That is, the results of Examples 2 and 3 indicate that the function or characteristics of the film to be formed can be changed by changing the value of the variable resistor 11.

これを具現化した装置を図9に示す。このカソードカップリング型プラズマCVD装置では、電圧計13により下部電極(カソード電極)3の自己バイアス電圧をモニタしつつ、その値が所定の値となるように可変抵抗11の値を調節する自己バイアス電圧制御装置14が設けられている。この自己バイアス電圧制御装置14に予め所定のプログラムを入れておくことにより、所望の特性を有する均質な膜を生成することもでき、また、特性が連続的に変化する膜や特性の異なる層が積層した膜等も生成することができる。   An apparatus embodying this is shown in FIG. In this cathode coupling type plasma CVD apparatus, the self-bias for adjusting the value of the variable resistor 11 so that the value becomes a predetermined value while monitoring the self-bias voltage of the lower electrode (cathode electrode) 3 by the voltmeter 13. A voltage control device 14 is provided. By putting a predetermined program in the self-bias voltage control device 14 in advance, it is possible to generate a homogeneous film having desired characteristics. In addition, films having different characteristics or layers having different characteristics can be formed. A laminated film or the like can also be generated.

本発明は、平行平板型のリアクティブエッチング装置にも適用することが可能であり、この場合にも、高周波電圧とは独立に自己バイアス電圧(Vdc)を制御することができる。また、図10に示すように、誘導結合コイルを有するCVD装置又はRIE装置にも本発明を適用することが可能であり、この場合にも高周波電圧とは独立に自己バイアス電圧(Vdc)を制御することができる。この場合には更に、コイル電圧を低下させることができ、例えばコイルの下に設置された誘電板がプラズマのイオンによって損傷を受ける度合いを低減することができる。   The present invention can also be applied to a parallel plate type reactive etching apparatus. In this case as well, the self-bias voltage (Vdc) can be controlled independently of the high-frequency voltage. As shown in FIG. 10, the present invention can also be applied to a CVD apparatus or RIE apparatus having an inductively coupled coil. In this case, the self-bias voltage (Vdc) is controlled independently of the high-frequency voltage. can do. In this case, the coil voltage can be further reduced, and for example, the degree to which the dielectric plate installed under the coil is damaged by plasma ions can be reduced.

従来のカソードカップリング型プラズマCVD装置の一例の概略構成図。The schematic block diagram of an example of the conventional cathode coupling type plasma CVD apparatus. 本発明に係るカソードカップリング型プラズマCVD装置の一例の概略構成図。1 is a schematic configuration diagram of an example of a cathode coupling type plasma CVD apparatus according to the present invention. カソードカップリング型プラズマCVD装置における両電極間のプラズマの電位分布を表すグラフ。The graph showing the electric potential distribution of the plasma between both electrodes in a cathode coupling type plasma CVD apparatus. カソードカップリング型プラズマCVD装置における、高周波電力(RF)と高周波電圧(Vpp)との関係を示すグラフ。The graph which shows the relationship between high frequency electric power (RF) and high frequency voltage (Vpp) in a cathode coupling type plasma CVD apparatus. カソードカップリング型プラズマCVD装置における、高周波電力(RF)と自己バイアス電圧(Vdc)との関係を示すグラフ。The graph which shows the relationship between high frequency electric power (RF) and self-bias voltage (Vdc) in a cathode coupling type plasma CVD apparatus. カソードカップリング型プラズマCVD装置における、自己バイアス電圧(Vdc)と膜応力との関係を示すグラフ。The graph which shows the relationship between the self-bias voltage (Vdc) and film | membrane stress in a cathode coupling type plasma CVD apparatus. カソードカップリング型プラズマCVD装置における、自己バイアス電圧(Vdc)と成膜基板温度との関係を示すグラフ。The graph which shows the relationship between the self-bias voltage (Vdc) and the film-forming substrate temperature in a cathode coupling type plasma CVD apparatus. アノードCVD装置で作成したSiCN膜とカソードCVD装置で作成したSiCN膜のFTIRスペクトルのグラフ。The graph of the FTIR spectrum of the SiCN film produced with the anode CVD apparatus and the SiCN film produced with the cathode CVD apparatus. 本発明に係るカソードカップリング型プラズマCVD装置の第二の例の概略構成図。The schematic block diagram of the 2nd example of the cathode coupling type plasma CVD apparatus which concerns on this invention. 本発明を適用した誘導結合コイルを有するCVD装置の概略構成図。The schematic block diagram of the CVD apparatus which has the inductive coupling coil to which this invention is applied.

符号の説明Explanation of symbols

1…プラズマCVD反応室
2…上部電極(アノード電極)
3…下部電極(カソード電極)
4…カップリングコンデンサー
5…マッチングユニット
6…高周波電源
7…ガス導入路
8…排気口
9…成膜基板
10…ローパスフィルタコイル
11…可変抵抗
1 ... Plasma CVD reaction chamber 2 ... Upper electrode (anode electrode)
3. Lower electrode (cathode electrode)
DESCRIPTION OF SYMBOLS 4 ... Coupling capacitor 5 ... Matching unit 6 ... High frequency power supply 7 ... Gas introduction path 8 ... Exhaust port 9 ... Film-forming board | substrate 10 ... Low pass filter coil 11 ... Variable resistance

Claims (5)

a) 反応室内に略平行に設けた、接地電極及び被コーティング物を載置する高周波投入電極、
b) カップリングコンデンサを介して高周波投入電極に接続される高周波電源、
c) 高周波投入電極とカップリングコンデンサの間と接地との間に接続されたローパスフィルタ、
を備えるカソードカップリング型プラズマCVD装置。
a) A high-frequency input electrode for placing a ground electrode and an object to be coated provided substantially in parallel in the reaction chamber,
b) a high frequency power source connected to the high frequency input electrode via a coupling capacitor;
c) a low-pass filter connected between the high-frequency input electrode and the coupling capacitor and ground,
Cathode coupling type plasma CVD device with
ローパスフィルタに直列に可変抵抗を接続した請求項1に記載のカソードカップリング型プラズマCVD装置。   The cathode coupling type plasma CVD apparatus according to claim 1, wherein a variable resistor is connected in series with the low-pass filter. 高周波投入電極の電位を測定する電圧計と、該電圧計による検出値に基づいて前記可変抵抗を制御する自己バイアス電圧制御手段を備える請求項2に記載のカソードカップリング型プラズマCVD装置。   3. The cathode coupling type plasma CVD apparatus according to claim 2, further comprising: a voltmeter that measures a potential of the high-frequency input electrode; and a self-bias voltage control unit that controls the variable resistance based on a value detected by the voltmeter. 反応室内に接地電極及び高周波投入電極を略平行に設け、高周波投入電極にカップリングコンデンサを介して高周波電源を接続して、高周波投入電極上に載置した被コーティング物の表面に薄膜を形成するカソードカップリング型プラズマCVD装置による薄膜製造方法において、
高周波投入電極とカップリングコンデンサの間と接地との間にローパスフィルタと可変抵抗を直列に接続し、
該可変抵抗の値を変化させることにより高周波投入電極の自己バイアス電圧を調節する
ことを特徴とするカソードカップリング型プラズマCVD装置による薄膜製造方法。
A ground electrode and a high-frequency input electrode are provided in the reaction chamber substantially in parallel, and a high-frequency power source is connected to the high-frequency input electrode via a coupling capacitor to form a thin film on the surface of the coating object placed on the high-frequency input electrode. In a thin film manufacturing method using a cathode coupling type plasma CVD apparatus,
A low pass filter and a variable resistor are connected in series between the high frequency input electrode and the coupling capacitor and the ground.
A method for producing a thin film by a cathode coupling type plasma CVD apparatus, characterized in that a self-bias voltage of a high frequency input electrode is adjusted by changing a value of the variable resistance.
層毎に該可変抵抗の値を変化させ、高周波投入電極の自己バイアス電圧を変化させることにより、特性の異なる膜を積層する請求項4に記載のカソードカップリング型プラズマCVD装置による薄膜製造方法。
5. The method of manufacturing a thin film by a cathode coupling type plasma CVD apparatus according to claim 4, wherein films having different characteristics are laminated by changing the value of the variable resistance for each layer and changing the self-bias voltage of the high-frequency input electrode.
JP2005284461A 2005-09-29 2005-09-29 Cathode-coupling plasma cvd equipment and thin film manufacturing method by it Pending JP2007096051A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009120881A (en) * 2007-11-13 2009-06-04 Tsukishima Kikai Co Ltd Plasma cvd system and method for forming plastic surface protective film
JP2009120880A (en) * 2007-11-13 2009-06-04 Tsukishima Kikai Co Ltd Plasma treatment device, and method for forming plastic surface protective film
JP2010123627A (en) * 2008-11-17 2010-06-03 Mitsubishi Heavy Ind Ltd Vacuum processing equipment
JP2014177688A (en) * 2013-03-15 2014-09-25 Toyo Seikan Kaisha Ltd Film-forming method by high-frequency plasma cvd
JP2017504955A (en) * 2013-11-06 2017-02-09 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated Particle generation suppression device by DC bias modulation

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH049465A (en) * 1990-04-27 1992-01-14 Ube Ind Ltd Method and device for controlling dc potential in thin film forming device
JPH04357829A (en) * 1991-06-04 1992-12-10 Matsushita Electric Ind Co Ltd Method and apparatus for dry etching
JPH09167765A (en) * 1995-08-01 1997-06-24 Texas Instr Inc <Ti> Insulation layer and method of forming it

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH049465A (en) * 1990-04-27 1992-01-14 Ube Ind Ltd Method and device for controlling dc potential in thin film forming device
JPH04357829A (en) * 1991-06-04 1992-12-10 Matsushita Electric Ind Co Ltd Method and apparatus for dry etching
JPH09167765A (en) * 1995-08-01 1997-06-24 Texas Instr Inc <Ti> Insulation layer and method of forming it

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009120881A (en) * 2007-11-13 2009-06-04 Tsukishima Kikai Co Ltd Plasma cvd system and method for forming plastic surface protective film
JP2009120880A (en) * 2007-11-13 2009-06-04 Tsukishima Kikai Co Ltd Plasma treatment device, and method for forming plastic surface protective film
JP2010123627A (en) * 2008-11-17 2010-06-03 Mitsubishi Heavy Ind Ltd Vacuum processing equipment
JP2014177688A (en) * 2013-03-15 2014-09-25 Toyo Seikan Kaisha Ltd Film-forming method by high-frequency plasma cvd
JP2017504955A (en) * 2013-11-06 2017-02-09 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated Particle generation suppression device by DC bias modulation
JP2019024090A (en) * 2013-11-06 2019-02-14 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated Particle generation suppressing device by DC bias modulation
US10504697B2 (en) 2013-11-06 2019-12-10 Applied Materials, Inc. Particle generation suppresor by DC bias modulation

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