JP2007095763A - Flip chip mounting method and method of connection between substrates - Google Patents

Flip chip mounting method and method of connection between substrates Download PDF

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JP2007095763A
JP2007095763A JP2005279695A JP2005279695A JP2007095763A JP 2007095763 A JP2007095763 A JP 2007095763A JP 2005279695 A JP2005279695 A JP 2005279695A JP 2005279695 A JP2005279695 A JP 2005279695A JP 2007095763 A JP2007095763 A JP 2007095763A
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substrate
resin
semiconductor chip
connection
electrode
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JP4710513B2 (en
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Seiichi Nakatani
誠一 中谷
Yasuharu Karashima
靖治 辛島
Takashi Kitae
孝史 北江
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a flip chip mounting method which is applicable to flip chip mounting of next generation LSIs and which is superior in productivity and reliability. <P>SOLUTION: While the connection terminal 11 of a circuit substrate 21 and the electrode terminal 12 of a semiconductor chip 20 are kept in contact with each other; the semiconductor chip 20 is arranged opposite to the substrate, and a resin 30 containing conductive particles is applied into a gap between the semiconductor chip 20 and the circuit substrate 21. The gap therebetween is made larger until it becomes a specified gap, thereby self-gathering the resin 30 between the facing terminals by boundary tension, and then the self-gathered resin 30 therein is cured. At this time, the assembly of the conductive particles included in the self-gathered resin 30 forms a connection body for electrically connecting the facing terminals. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、半導体チップを回路基板に実装するフリップチップ実装方法、及び複数の電極が形成された基板間を接続する基板間接続方法に関する。   The present invention relates to a flip chip mounting method for mounting a semiconductor chip on a circuit board, and an inter-substrate connection method for connecting substrates on which a plurality of electrodes are formed.

近年、電子機器に使用される半導体集積回路(LSI)の高密度、高集積化に伴い、LSI用半導体チップの電極端子の多ピン、狭ピッチ化が急速に進んでいる。これら半導体チップの回路基板への実装には、配線遅延を少なくするために、フリップチップ実装が広く用いられている。そして、このフリップチップ実装においては、半導体チップの電極端子上にはんだバンプを形成し、当該はんだバンプを介して、回路基板上に形成された接続端子に一括接合されるのが一般である。   In recent years, with the increase in the density and integration of semiconductor integrated circuits (LSIs) used in electronic devices, the number of electrode terminals of an LSI semiconductor chip and the narrowing of the pitch are rapidly increasing. For mounting these semiconductor chips on a circuit board, flip chip mounting is widely used in order to reduce wiring delay. In this flip-chip mounting, solder bumps are generally formed on electrode terminals of a semiconductor chip, and are generally joined together to connection terminals formed on a circuit board via the solder bumps.

しかしながら、電極端子数が5,000を超えるような次世代LSIを回路基板に実装するためには、100μm以下の狭ピッチに対応したバンプを形成する必要があるが、現在のはんだバンプ形成技術では、それに適応することが難しい。   However, in order to mount a next-generation LSI with more than 5,000 electrode terminals on a circuit board, it is necessary to form bumps corresponding to a narrow pitch of 100 μm or less. Difficult to adapt to it.

また、電極端子数に応じた多数のバンプを形成する必要があるので、低コスト化を図るためには、1チップ当たりの搭載タクトの短縮による高い生産性も要求される。   Further, since it is necessary to form a large number of bumps corresponding to the number of electrode terminals, high productivity is also required by shortening the mounting tact per chip in order to reduce the cost.

同様に、半導体集積回路は、電極端子の増大でペリフェラル電極端子からエリア配置の電極端子に変化している。さらに、高密度化、高集積化の要求で半導体プロセスが90nmから65nm、45nmへと進展していくことが予想される。   Similarly, the semiconductor integrated circuit changes from the peripheral electrode terminal to the area-arranged electrode terminal due to an increase in the electrode terminals. Furthermore, it is expected that the semiconductor process will progress from 90 nm to 65 nm and 45 nm due to demands for higher density and higher integration.

その結果、配線の微細化が更に進み、配線間の容量が増大することにより、高速化、消費電力ロスの問題が深刻になり、配線層間の絶縁膜の低誘電率化(Low−K)の要求が更に高まっている。このような絶縁膜のLow−K化の実現は、絶縁層材料の多孔質化(ポーラス化)によって得られるため、機械的強度が弱く、半導体の薄型化の障害になっている。   As a result, the miniaturization of the wiring further progresses, and the capacitance between the wirings increases, so the problems of high speed and power consumption loss become serious, and the dielectric constant (Low-K) of the insulating film between the wiring layers is reduced. There is a growing demand. Realization of such a low-K insulating film is obtained by making the insulating layer material porous (porous), so that the mechanical strength is weak, which is an obstacle to thinning the semiconductor.

加えて、上述のように、エリア配置の電極端子を構成する場合、Low−K化による多孔質膜上の強度に問題があるため、エリア配置電極上にバンプを形成すること、およびフリップチップ実装そのものが困難となっている。それ故、今後の半導体プロセスの進展に対応した薄型・高密度半導体に適した低荷重フリップチップ実装法が要求されている。   In addition, as described above, when an area-arranged electrode terminal is configured, there is a problem with the strength on the porous film due to the low-K conversion, so that bumps are formed on the area-arranged electrode, and flip-chip mounting It has become difficult. Therefore, there is a demand for a low-load flip-chip mounting method suitable for thin and high-density semiconductors corresponding to future progress of semiconductor processes.

従来、バンプの形成技術としては、めっき法やスクリ−ン印刷法などが開発されている。めっき法は狭ピッチには適するものの、工程が複雑になる点、生産性に問題があり、また、スクリーン印刷法は、生産性には優れているが、マスクを用いる点で、狭ピッチ化には適していない。   Conventionally, as a bump forming technique, a plating method, a screen printing method, or the like has been developed. Although the plating method is suitable for narrow pitches, the process is complicated and there are problems with productivity. The screen printing method is excellent in productivity, but the mask is used to reduce the pitch. Is not suitable.

こうした中、最近では、半導体チップや回路基板の電極上に、はんだバンプを選択的に形成する技術がいくつか開発されている。これらの技術は、微細バンプの形成に適しているだけでなく、バンプの一括形成ができるので、生産性にも優れており、次世代LSIの回路基板への実装に適応可能な技術として注目されている。   Under these circumstances, recently, several techniques for selectively forming solder bumps on electrodes of a semiconductor chip or a circuit board have been developed. These technologies are not only suitable for the formation of fine bumps, but also allow for the formation of bumps at a time, so they are excellent in productivity and attract attention as technologies that can be applied to circuit boards for next-generation LSIs. ing.

例えば、特許文献1に記載された技術は、導電性粒子とフラックスの混合物によるソルダーペーストを、表面に電極が形成された基板上にベタ塗りし、基板を加熱することによって、導電性粒子を溶融させ、濡れ性の高い電極上に選択的にはんだバンプを形成させる方法である。   For example, in the technique described in Patent Document 1, a solder paste made of a mixture of conductive particles and flux is solidly applied on a substrate on which electrodes are formed, and the conductive particles are melted by heating the substrate. And solder bumps are selectively formed on electrodes with high wettability.

また、特許文献2に記載された技術は、有機酸鉛塩と金属錫を主要成分とするペースト状組成物(化学反応析出型はんだ)を、電極が形成された基板上にベタ塗りし、基板を加熱することによって、PbとSnの置換反応を起こさせ、Pb/Snの合金を基板の電極上に選択的に析出させる方法である。   Moreover, the technique described in Patent Document 2 is a method in which a paste-like composition (chemical reaction deposition solder) mainly composed of an organic acid lead salt and metallic tin is applied onto a substrate on which an electrode is formed. Is heated to cause a substitution reaction between Pb and Sn, and a Pb / Sn alloy is selectively deposited on the electrode of the substrate.

ところで、従来のバンプ形成技術を用いたフリップチップ実装は、バンプが形成された回路基板に半導体チップを搭載した後、半導体チップを回路基板に固定するために、アンダーフィルと呼ばれる樹脂を、半導体チップと回路基板の間に注入する工程をさらに必要とする。   By the way, the flip chip mounting using the conventional bump forming technique is such that after mounting the semiconductor chip on the circuit board on which the bump is formed, a resin called underfill is used to fix the semiconductor chip to the circuit board. And a step of injecting between the circuit board and the circuit board.

そこで、半導体チップと回路基板の対向する電極端子間の電気的接続と、半導体チップの回路基板への固定を同時に行う方法として、異方性導電材料を用いたフリップチップ実装技術(例えば、特許文献3参照)が開発されている。これは、回路基板と半導体チップの間に、導電性粒子を含有させた熱硬化性樹脂を供給し、半導体チップを加圧すると同時に、熱硬化性樹脂を加熱することによって、半導体チップと回路基板の電極端子間の電気的接続と、半導体チップの回路基板への固定を同時に実現する方法である。
特開2000−94179号公報 特開平1−157796号公報 特開2000−332055号公報
Therefore, flip chip mounting technology using an anisotropic conductive material (for example, patent document) as a method of simultaneously performing electrical connection between opposing electrode terminals of a semiconductor chip and a circuit board and fixing the semiconductor chip to the circuit board. 3) has been developed. This is because a thermosetting resin containing conductive particles is supplied between a circuit board and a semiconductor chip, and the semiconductor chip and the circuit board are heated by simultaneously pressing the semiconductor chip and heating the thermosetting resin. This is a method of simultaneously realizing electrical connection between the electrode terminals and fixing of the semiconductor chip to the circuit board.
JP 2000-94179 A Japanese Patent Laid-Open No. 1-157796 JP 2000-332055 A

しかしながら、上述した異方性導電材料を用いたフリップチップ実装では、樹脂中に均一に分散された導電性粒子の機械的な接触により、対向する電極端子間の導通を得ているため、電極端子間の導通に寄与する導電性粒子は、樹脂中に含まれる一部の導電性粒子に限られる。また、導電性材料と対向する電極端子の確実な電気接続には、一定の荷重が必要であり、多孔質膜(Low−K)を利用したエリア配置の半導体集積回路の実装には向かない。   However, in the flip-chip mounting using the anisotropic conductive material described above, conduction between the opposing electrode terminals is obtained by mechanical contact of the conductive particles uniformly dispersed in the resin. The conductive particles contributing to the conduction between them are limited to some conductive particles contained in the resin. In addition, a certain load is required for reliable electrical connection between the electrode terminals facing the conductive material, which is not suitable for mounting an area-arranged semiconductor integrated circuit using a porous film (Low-K).

さらに、対向する電極端子間の導通に寄与しない導電性粒子は、隣接する電極端子間の絶縁性を阻害する要因ともなる。   Furthermore, the conductive particles that do not contribute to the conduction between the opposing electrode terminals also become a factor that hinders the insulation between the adjacent electrode terminals.

すなわち、異方性導電材料を用いたフリップチップ実装は、接続端子数が5,000を超えるような次世代LSI用の半導体チップに適用するためには、生産性や信頼性の面で、解決すべき課題を多く残している。   In other words, flip chip mounting using anisotropic conductive material is a solution in terms of productivity and reliability in order to be applied to semiconductor chips for next-generation LSIs with more than 5,000 connection terminals. There are many issues to be solved.

本発明は、かかる点に鑑みてなされたもので、次世代LSIのフリップチップ実装に適用可能な、生産性及び信頼性の高いフリップチップ実装方法、及び当該方法と基本工程を一にする基板間接続方法を提供することを目的とする。   The present invention has been made in view of the above points, and can be applied to flip chip mounting of next-generation LSIs, and can be applied to flip chip mounting with high productivity and reliability. An object is to provide a connection method.

本発明のフリップチップ実装方法は、複数の接続端子を有する基板に対向させて、複数の電極端子を有する半導体チップを配置し、基板の接続端子と半導体チップの電極端子とを接続体を介して電気的に接続するフリップチップ実装方法であって、基板の接続端子と半導体チップの電極端子とを互いに接触させた状態で、半導体チップを基板に対向させて配置し、半導体チップと基板の隙間に、導電性粒子を含有した樹脂を供給する第1の工程と、半導体チップと基板のギャップを、所定の間隔になるまで拡大することによって、樹脂を基板の接続端子と半導体チップの電極端子間に界面張力で自己集合させる第2の工程と、端子間に自己集合した樹脂を硬化させる第3の工程とを有し、当該自己集合した樹脂中に含有する導電性粒子の集合体が、基板の接続端子と半導体チップの電極端子とを電気的に接続する接続体を構成していることを特徴とする。   In the flip chip mounting method of the present invention, a semiconductor chip having a plurality of electrode terminals is arranged facing a substrate having a plurality of connection terminals, and the connection terminals of the substrate and the electrode terminals of the semiconductor chip are connected via a connection body. A flip chip mounting method for electrical connection, wherein a semiconductor chip is disposed opposite to a substrate in a state where a connection terminal of the substrate and an electrode terminal of the semiconductor chip are in contact with each other, and the gap is formed between the semiconductor chip and the substrate. A first step of supplying a resin containing conductive particles, and expanding the gap between the semiconductor chip and the substrate until a predetermined interval is reached, whereby the resin is placed between the connection terminal of the substrate and the electrode terminal of the semiconductor chip. A second step of self-assembling by interfacial tension and a third step of curing the self-assembled resin between the terminals, and collecting conductive particles contained in the self-assembled resin But it characterized in that it constitutes a connection member for electrically connecting the electrode terminals of the connection terminal and the semiconductor chip of the substrate.

ある好適な実施形態において、上記導電性粒子の集合体は、該導電性粒子が互いに接触して接続体を構成している。   In a preferred embodiment, the aggregate of conductive particles constitutes a connection body by contacting the conductive particles with each other.

ある好適な実施形態において、上記第2の工程において、樹脂を、基板の接続端子と半導体チップの電極端子間に自己集合させた後、樹脂を加熱し、該樹脂中に含有する導電性粒子を溶融させる工程をさらに含む。   In a preferred embodiment, in the second step, after the resin is self-assembled between the connection terminal of the substrate and the electrode terminal of the semiconductor chip, the resin is heated, and the conductive particles contained in the resin are contained. The method further includes a step of melting.

ある好適な実施形態において、上記第1の工程は、基板上に樹脂を供給した後、半導体チップを、基板の接続端子と半導体チップの電極端子とが互いに接触するように、基板に対向させて配置する工程からなる。   In a preferred embodiment, after the resin is supplied onto the substrate, the first step is such that the semiconductor chip is opposed to the substrate such that the connection terminal of the substrate and the electrode terminal of the semiconductor chip are in contact with each other. It consists of the process of arranging.

ある好適な実施形態において、上記第3の工程の後、基板と半導体チップの隙間にアンダーフィル材を供給し、その後、該アンダーフィル材を硬化させる工程をさらに含む。   In a preferred embodiment, after the third step, the method further includes a step of supplying an underfill material to a gap between the substrate and the semiconductor chip and then curing the underfill material.

ある好適な実施形態において、上記第1の工程において、接続端子以外の基板表面が、予め撥水化処理されていることが好ましい。   In a preferred embodiment, in the first step, the substrate surface other than the connection terminals is preferably subjected to a water repellent treatment in advance.

ある好適な実施形態において、上記樹脂は、上記第3の工程において、該樹脂が硬化する際、収縮する材料で構成されることで導電性粒子の接触が強化されることが好ましい。   In a preferred embodiment, the resin is preferably made of a material that contracts when the resin is cured in the third step, whereby the contact of the conductive particles is preferably strengthened.

ある好適な実施形態において、上記接続端子は、基板表面にアレイ状に配列されている。   In a preferred embodiment, the connection terminals are arranged in an array on the substrate surface.

ある好適な実施形態において、上記第2の工程を繰り返すことが好ましい。   In a preferred embodiment, it is preferable to repeat the second step.

ある好適な実施形態において、上記基板は、回路基板で構成されており、基板上に複数の半導体チップがフリップチップ実装されている。   In a preferred embodiment, the substrate is a circuit board, and a plurality of semiconductor chips are flip-chip mounted on the substrate.

本発明の基板間接続方法は、複数の電極を有する第1の基板に対向させて、複数の電極を有する第2の基板を配置し、第1の基板の電極と第2の基板の電極とを接続体を介して電気的に接続する基板間接続方法であって、第1の基板の電極と第2の基板の電極とを互いに接触させた状態で、第2の基板を第1の基板に対向させて配置し、第1の基板と第2の基板の隙間に、導電性粒子を含有した樹脂を供給する第1の工程と、第1の基板と第2の基板のギャップを、所定の間隔になるまで徐々に拡大することによって、樹脂を第1の基板の電極と第2の基板の電極間に界面張力で自己集合させる第2の工程と、電極間に自己集合した樹脂を硬化させる第3の工程とを有し、当該自己集合した樹脂中に含有する導電性粒子の集合体が、第1の基板の電極と第2の基板の電極とを電気的に接続する接続体を構成していることを特徴とする基板間接続方法である。   According to the inter-substrate connection method of the present invention, a second substrate having a plurality of electrodes is disposed so as to face a first substrate having a plurality of electrodes, and an electrode of the first substrate, an electrode of the second substrate, The inter-substrate connection method for electrically connecting the first substrate and the second substrate with the electrode of the first substrate and the electrode of the second substrate in contact with each other. A first step of supplying a resin containing conductive particles into a gap between the first substrate and the second substrate, and a gap between the first substrate and the second substrate. The second step of self-assembling the resin by interfacial tension between the electrode of the first substrate and the electrode of the second substrate, and curing the self-assembled resin between the electrodes An aggregate of conductive particles contained in the self-assembled resin is a first group. It is inter-board connection method comprising the electrode and has an electrode of the second substrate to constitute a connection member for electrically connecting.

ある好適な実施形態において、上記第2の工程において、樹脂を、第1の基板の電極と第2の基板の電極間に自己集合させた後、樹脂を加熱し、該樹脂中に含有する導電性粒子を溶融させる工程をさらに含む。   In a preferred embodiment, in the second step, after the resin is self-assembled between the electrode of the first substrate and the electrode of the second substrate, the resin is heated and the conductive material contained in the resin is contained. A step of melting the conductive particles.

本発明のフリップチップ実装体は、複数の接続端子を有する基板に対向させて、複数の電極端子を有する半導体チップが配置され、基板の接続端子と半導体チップの電極端子とが接続体を介して電気的に接続されたフリップチップ実装体において、当該接続体は、接続端子と電極端子とが互いに接触した状態で配置された基板と半導体チップの隙間に供給された導電性粒子を含有する樹脂が、基板と半導体チップのギャップを拡大することによって、接続端子と電極端子間に自己集合し、該自己集合した樹脂中に含有する導電性粒子の集合体で構成されていることを特徴とする。   In the flip chip mounting body of the present invention, a semiconductor chip having a plurality of electrode terminals is arranged facing a substrate having a plurality of connection terminals, and the connection terminals of the substrate and the electrode terminals of the semiconductor chip are interposed via the connection body. In the electrically connected flip chip mounting body, the connection body includes a resin containing conductive particles supplied to a gap between the substrate and the semiconductor chip arranged in a state where the connection terminal and the electrode terminal are in contact with each other. Further, it is characterized in that it is composed of an aggregate of conductive particles which are self-assembled between the connection terminal and the electrode terminal by enlarging the gap between the substrate and the semiconductor chip and contained in the self-assembled resin.

ある好適な実施形態において、上記フリップチップ実装体は、基板と半導体チップとの隙間に供給されたアンダーフィル材で固定されている。   In a preferred embodiment, the flip chip mounting body is fixed with an underfill material supplied to a gap between the substrate and the semiconductor chip.

本発明に係るフリップチップ実装方法は、半導体チップと基板との隙間に供給された導電性粒子を含有する樹脂が、対向する端子間に界面張力で自己集合し、当該自己集合した樹脂中に含有する導電性粒子の集合体が、端子間を電気的に接続する接続体を構成する。それ故、樹脂中に含有する導電性粒子を有効に利用することができる。また、隣接する端子間には、導電性粒子を含有する樹脂は存在しないため、隣接端子間の絶縁性を高めることができ、信頼性の高いフリップチップ実装体を実現することができる。   In the flip chip mounting method according to the present invention, the resin containing the conductive particles supplied to the gap between the semiconductor chip and the substrate is self-assembled by the interfacial tension between the opposing terminals, and contained in the self-assembled resin. The aggregate | assembly of the electroconductive particle which comprises comprises the connection body which electrically connects between terminals. Therefore, the conductive particles contained in the resin can be used effectively. Further, since there is no resin containing conductive particles between adjacent terminals, the insulation between adjacent terminals can be improved, and a highly reliable flip chip mounting body can be realized.

さらに、端子間を電気的に接続する接続体(導電性粒子を含有する樹脂)を自己集合的に形成することができるので、次世代LSIの狭ピッチのフリップチップ実装にも適用可能である。   Furthermore, since the connection body (resin containing conductive particles) that electrically connects the terminals can be formed in a self-assembled manner, it can also be applied to the narrow-pitch flip chip mounting of the next generation LSI.

加えて、端子間に導電性粒子を含有する樹脂を自己集合させるとともに、自己集合した樹脂を硬化させることによって、半導体チップと基板の端子間の電気的接続と、半導体チップの基板への固定が同時にでき、生産性の高いフリップチップ実装体を実現することができる。   In addition, by self-assembling the resin containing conductive particles between the terminals and curing the self-assembled resin, the electrical connection between the semiconductor chip and the terminal of the substrate and the fixing of the semiconductor chip to the substrate can be achieved. At the same time, a flip-chip mounting body with high productivity can be realized.

また、同様に、本発明に係る基板間接続法においても、基板間の隙間に供給された導電性粒子を含有する樹脂が、対向する電極間に界面張力で自己集合し、当該自己集合した樹脂中に含有する導電性粒子の集合体が、電極間を電気的に接続する接続体を構成する。それ故、樹脂中に含有する導電性粒子を有効に利用することができる。また、隣接する電極間には、導電性粒子を含有する樹脂は存在しないため、隣接電極間の絶縁性を高めることができ、信頼性の高い基板間接続を実現することができる。   Similarly, also in the inter-substrate connection method according to the present invention, the resin containing conductive particles supplied to the gap between the substrates is self-assembled by the interfacial tension between the opposing electrodes, and the self-assembled resin The aggregate of conductive particles contained therein constitutes a connection body that electrically connects the electrodes. Therefore, the conductive particles contained in the resin can be used effectively. In addition, since there is no resin containing conductive particles between the adjacent electrodes, the insulation between the adjacent electrodes can be improved, and a highly reliable inter-substrate connection can be realized.

本願出願人は、次世代LSI用の半導体チップに適応可能なフリップチップ実装について検討を行ない、均一性よく微細バンプを形成できる新規なフリップチップ実装方法を提案している(特願2004−267919号)。   The applicant of the present application has studied flip-chip mounting applicable to semiconductor chips for next-generation LSIs and has proposed a novel flip-chip mounting method capable of forming fine bumps with high uniformity (Japanese Patent Application No. 2004-267919). ).

図1(a)〜(c)は、本願出願人が上記特許出願明細書で開示したフリップチップ実装方法の基本工程を示す工程断面図である。   FIGS. 1A to 1C are process cross-sectional views showing the basic process of the flip chip mounting method disclosed by the present applicant in the above-mentioned patent application specification.

まず、図1(a)に示すように、複数の接続端子11が形成された回路基板21上に、はんだ粉(不図示)及び対流添加剤15を含有する樹脂13を供給する。   First, as shown in FIG. 1A, a resin 13 containing solder powder (not shown) and a convection additive 15 is supplied onto a circuit board 21 on which a plurality of connection terminals 11 are formed.

次に、図1(b)に示すように、回路基板21上に供給された樹脂13の表面を半導体チップ20で当接させる。このとき、複数の電極端子12を有する半導体チップ20は、複数の接続端子11を有する回路基板21と対向させて配置される。そして、この状態で樹脂13を加熱し、樹脂13中に分散しているはんだ粉を溶融させる。   Next, as shown in FIG. 1B, the surface of the resin 13 supplied on the circuit board 21 is brought into contact with the semiconductor chip 20. At this time, the semiconductor chip 20 having the plurality of electrode terminals 12 is arranged to face the circuit board 21 having the plurality of connection terminals 11. In this state, the resin 13 is heated to melt the solder powder dispersed in the resin 13.

溶融したはんだ粉は、図1(c)に示すように、樹脂13中で互いに結合し、濡れ性の高い接続端子11と電極端子12間に自己集合することによって、接続体18を形成する。最後に、樹脂13を硬化させて、半導体チップ20を回路基板21に固定させ、フリップチップ実装体を完成させる。   As shown in FIG. 1C, the melted solder powder is bonded to each other in the resin 13 and self-assembles between the connection terminal 11 and the electrode terminal 12 having high wettability, thereby forming a connection body 18. Finally, the resin 13 is cured, and the semiconductor chip 20 is fixed to the circuit board 21 to complete the flip chip mounting body.

この方法の特徴は、はんだ粉を含有した樹脂13に、はんだ粉が溶融する温度で沸騰する対流添加剤15をさらに含有させた点にある。すなわち、はんだ粉が溶融した温度において、樹脂13中に含有した対流添加剤15が沸騰し、当該沸騰した対流添加剤15が樹脂13中を対流することによって、樹脂13中に分散されている溶融したはんだ粉の移動が促進され、溶融したはんだ粉の均一な結合が進行する。その結果、均一に成長した溶融したはんだ粉が、濡れ性の高い回路基板21の接続端子11と半導体チップ20の電極端子12との間に自己集合することによって、接続端子11と電極端子12との間に、均一性の高い接続体18を形成することができる。   This method is characterized in that the resin 13 containing solder powder further contains a convection additive 15 that boils at a temperature at which the solder powder melts. That is, at the temperature at which the solder powder is melted, the convection additive 15 contained in the resin 13 boils, and the boiled convection additive 15 convects in the resin 13, thereby melting the resin 13. The movement of the solder powder is promoted, and uniform bonding of the molten solder powder proceeds. As a result, the molten solder powder that has grown uniformly self-assembles between the connection terminal 11 of the circuit board 21 having high wettability and the electrode terminal 12 of the semiconductor chip 20, whereby the connection terminal 11 and the electrode terminal 12 In the meantime, the connection body 18 with high uniformity can be formed.

また、本願出願人は、上記対流添加剤に代えて、気泡発生剤を含有させた樹脂を用い、溶融したはんだ粉を端子間に自己集合させ、均一な接続体を形成する方法を別途提案している(特願2005−094233号)。   In addition, the applicant of the present application separately proposed a method for forming a uniform connection body by using a resin containing a bubble generating agent instead of the convection additive and self-assembling molten solder powder between terminals. (Japanese Patent Application No. 2005-094233).

図2(a)〜(d)は、本願出願人が上記特許出願明細書で開示したフリップチップ実装方法の基本工程を示す工程断面図である。   2A to 2D are process cross-sectional views showing the basic process of the flip chip mounting method disclosed by the applicant of the present application in the above patent application specification.

図2(a)は、図1(b)に示した工程に対応するもので、回路基板21と半導体チップ20の隙間に、はんだ粉16と気泡発生剤を含有した樹脂14が供給された状態を示す。樹脂14には、対流添加剤15の代わりに、気泡発生剤(不図示)が含有されている点が異なる。   FIG. 2A corresponds to the process shown in FIG. 1B, and a state where the resin 14 containing the solder powder 16 and the bubble generating agent is supplied to the gap between the circuit board 21 and the semiconductor chip 20. Indicates. The resin 14 is different in that a bubble generating agent (not shown) is contained instead of the convective additive 15.

この状態で、樹脂14を加熱すると、樹脂14中に含有する気泡発生剤から気泡19が発生する。そして、図2(b)に示すように、樹脂14は、発生した気泡19が成長することで、この気泡19外に押し出される。同時に、はんだ粉16は樹脂14とともに気泡19外に押し出される。これは、はんだ粉16を含有する樹脂14が、はんだ粉16との濡れ性に優れるため、気泡中に存在できず、樹脂14とともに移動するからである。   When the resin 14 is heated in this state, bubbles 19 are generated from the bubble generating agent contained in the resin 14. Then, as shown in FIG. 2B, the resin 14 is pushed out of the bubbles 19 as the generated bubbles 19 grow. At the same time, the solder powder 16 is pushed out of the bubble 19 together with the resin 14. This is because the resin 14 containing the solder powder 16 is excellent in wettability with the solder powder 16 and therefore cannot exist in the bubbles and moves together with the resin 14.

気泡19の成長により押し出された樹脂14は、図2(c)に示すように、回路基板21の接続端子11、及び半導体チップ20の電極端子12間に自己集合し、接続端子11、電極端子12の端部を境とした柱状樹脂が形成される。   The resin 14 pushed out by the growth of the bubbles 19 is self-assembled between the connection terminals 11 of the circuit board 21 and the electrode terminals 12 of the semiconductor chip 20 as shown in FIG. A columnar resin with the 12 ends as a boundary is formed.

樹脂14をさらに加熱すると、図2(d)に示すように、端子間に自己集合した樹脂14中に含有するはんだ粉16が溶融し、はんだ粉16同士が溶融結合する。このとき、接続端子11及び電極端子12は、溶融し結合したはんだ粉16に対して濡れ性が高いので、端子間に溶融したはんだ粉16よりなる接続体18が形成される。これにより、半導体チップが回路基板に搭載されたフリップチップ実装体が得られる。   When the resin 14 is further heated, as shown in FIG. 2D, the solder powder 16 contained in the resin 14 self-assembled between the terminals is melted, and the solder powders 16 are melt-bonded. At this time, since the connection terminal 11 and the electrode terminal 12 have high wettability with respect to the melted and bonded solder powder 16, the connection body 18 made of the melted solder powder 16 is formed between the terminals. Thereby, the flip chip mounting body in which the semiconductor chip is mounted on the circuit board is obtained.

なお、端子間に接続体18を形成した後、端子間に残存する樹脂14を硬化させることによって、あるいは、半導体チップ20と回路基板21の隙間にアンダーフィル材を注入、硬化させることによって、半導体チップ20を回路基板21に固定させてもよい。   In addition, after forming the connection body 18 between the terminals, the resin 14 remaining between the terminals is cured, or an underfill material is injected into the gap between the semiconductor chip 20 and the circuit board 21 and cured, thereby making the semiconductor The chip 20 may be fixed to the circuit board 21.

この方法の特徴は、はんだ粉を含有した樹脂14を、樹脂14中に含有する気泡発生剤を発泡させることによって、回路基板21の接続端子11と半導体チップ20の電極端子12との間に自己集合させる点にある。すなわち、端子間に自己集合した樹脂14をさらに加熱し、樹脂14中に含有するはんだ粉16を溶融させることによって、接続端子11と電極端子12との間に接続体18を形成することができる。   The feature of this method is that the resin 14 containing solder powder is foamed with a bubble generating agent contained in the resin 14 so that the self-adhesion between the connection terminal 11 of the circuit board 21 and the electrode terminal 12 of the semiconductor chip 20 occurs. It is in the point to gather. That is, the connection body 18 can be formed between the connection terminal 11 and the electrode terminal 12 by further heating the resin 14 self-assembled between the terminals and melting the solder powder 16 contained in the resin 14. .

本願出願人が提案した上記二つの方法において、1番目の方法は、樹脂中を対流する対流添加剤が、樹脂中に含有する溶融したはんだ粉に直接作用することによって、当該溶融したはんだ粉を端子間に自己集合させるのに対し、2番目の方法は、樹脂中に含有する気泡発生剤から発生した気泡が、その成長過程で樹脂に作用することによって、当該樹脂を端子間に自己集合させてから、樹脂中に含有するはんだ粉を溶融させる点で異なる。   In the above two methods proposed by the applicant of the present application, the first method is that the convection additive that convects in the resin directly acts on the molten solder powder contained in the resin, so that the molten solder powder is removed. In contrast to the self-assembly between the terminals, the second method allows the bubbles generated from the bubble generating agent contained in the resin to act on the resin during its growth process, causing the resin to self-assemble between the terminals. The solder powder contained in the resin is melted.

しかしながら、両方法とも、樹脂中に含有する対流添加剤を沸騰させるために、あるいは、気泡発生剤から気泡を発生させるために、対流添加剤または気泡発生剤が含有された樹脂を加熱する工程が必要となる。   However, in both methods, there is a step of heating the resin containing the convection additive or the bubble generating agent in order to boil the convective additive contained in the resin or to generate bubbles from the bubble generating agent. Necessary.

本願発明者は、樹脂を加熱することなく、室温においても、端子間に接続体を自己集合的に形成してフリップチップ実装体を得る方法を検討し、本発明を想到するに至った。   The inventor of the present application has come up with the present invention by studying a method of forming a connection body between terminals in a self-assembled manner at room temperature without heating the resin to obtain a flip chip mounting body.

以下に、本発明の実施の形態について、図面を参照しながら説明する。以下の図面においては、説明の簡略化のため、実質的に同一の機能を有する構成要素を同一の参照符号で示す。本発明は以下の実施形態に限定されない。   Embodiments of the present invention will be described below with reference to the drawings. In the following drawings, components having substantially the same function are denoted by the same reference numerals for the sake of simplicity. The present invention is not limited to the following embodiments.

図3(a)〜(c)、及び図4(a)〜(c)は、本発明の実施形態におけるフリップチップ実装方法の基本的な工程を示す工程断面図である。   FIGS. 3A to 3C and FIGS. 4A to 4C are process cross-sectional views illustrating basic processes of the flip chip mounting method according to the embodiment of the present invention.

まず、図3(a)に示すように、複数の接続端子11を有する回路基板21上に、導電性粒子(不図示)を含有した樹脂30を供給する。ここで、導電性粒子は、樹脂30中に均一に分散されており、樹脂30は、室温において流動可能な程度の粘性を有していることが好ましい。   First, as shown in FIG. 3A, a resin 30 containing conductive particles (not shown) is supplied onto a circuit board 21 having a plurality of connection terminals 11. Here, it is preferable that the conductive particles are uniformly dispersed in the resin 30 and the resin 30 has a viscosity that can flow at room temperature.

次に、図3(b)に示すように、回路基板21の接続端子11と半導体チップ20の電極端子12とが互いに接触するように、複数の電極端子12を有する半導体チップ20を、回路基板21に対向させて配設する。このとき、回路基板21の接続端子11上にあった樹脂30は、押し出され、その結果、半導体チップ20と回路基板21の隙間は、樹脂30で充填された状態になる。   Next, as shown in FIG. 3B, the semiconductor chip 20 having the plurality of electrode terminals 12 is mounted on the circuit board so that the connection terminals 11 of the circuit board 21 and the electrode terminals 12 of the semiconductor chip 20 are in contact with each other. 21 is arranged opposite to 21. At this time, the resin 30 on the connection terminal 11 of the circuit board 21 is pushed out, and as a result, the gap between the semiconductor chip 20 and the circuit board 21 is filled with the resin 30.

なお、回路基板21の接続端子11と半導体チップ20の電極端子12との接触は、必ずしも樹脂30を完全に押し出した状態にまでなる必要はなく、対向する端子間に樹脂30が残存していても構わない。   Note that the contact between the connection terminal 11 of the circuit board 21 and the electrode terminal 12 of the semiconductor chip 20 does not necessarily have to be a state where the resin 30 is completely extruded, and the resin 30 remains between the opposing terminals. It doesn't matter.

また、樹脂30の供給は、回路基板21と半導体チップ20を、対向する接続端子11、電極端子12とが互いに接触するように対向させて配置した後、半導体チップ20と回路基板21の隙間を埋めるように後で行ってもよい。   Further, the resin 30 is supplied by arranging the circuit board 21 and the semiconductor chip 20 so that the connection terminals 11 and the electrode terminals 12 facing each other face each other, and then the gap between the semiconductor chip 20 and the circuit board 21 is set. It may be done later to fill.

この状態から、図3(c)に示すように、半導体チップ20と回路基板21のギャップDを、所定の間隔になるまで拡大することによって、樹脂30を、回路基板21の接続端子11と半導体チップ20の電極端子12間に界面張力で自己集合させる。   From this state, as shown in FIG. 3C, the gap 30 between the semiconductor chip 20 and the circuit board 21 is increased to a predetermined distance, whereby the resin 30 is replaced with the connection terminal 11 of the circuit board 21 and the semiconductor. The electrode 20 is self-assembled between the electrode terminals 12 of the chip 20 by interfacial tension.

以下、図4(a)〜(c)、及び図5(a)〜(d)を参照しながら、樹脂30が、回路基板21の接続端子11と半導体チップ20の電極端子12間に界面張力で自己集合するメカニズムを説明する。   Hereinafter, with reference to FIGS. 4A to 4C and FIGS. 5A to 5D, the resin 30 has an interfacial tension between the connection terminal 11 of the circuit board 21 and the electrode terminal 12 of the semiconductor chip 20. Explains the mechanism of self-assembly.

図4(a)〜(c)は、半導体チップ20と回路基板21のギャップをD1からD3まで拡大していったときの工程断面図(一部拡大)を示し、図5(a)〜(d)は、その工程に対応する半導体チップ20の平面図を示す。 4A to 4C show process cross-sectional views (partially enlarged) when the gap between the semiconductor chip 20 and the circuit board 21 is expanded from D 1 to D 3 , and FIG. -(D) shows the top view of the semiconductor chip 20 corresponding to the process.

図5(a)は、半導体チップ20の電極端子12が、回路基板21の接続端子11と互いに接触している状態を示し、電極端子12以外の半導体チップ20と回路基板21の隙間に、樹脂30が充填されている。   FIG. 5A shows a state where the electrode terminals 12 of the semiconductor chip 20 are in contact with the connection terminals 11 of the circuit board 21, and a resin is formed in the gap between the semiconductor chip 20 other than the electrode terminals 12 and the circuit board 21. 30 is filled.

この状態から、半導体チップ20と回路基板21のギャップを徐々に拡大していく。図4(a)は、ギャップD1のときの状態を示し、ギャップの拡大に伴い、対向する端子間に樹脂30が侵入する一方、半導体チップ20と回路基板21の隙間にあった樹脂30の一部に、空洞40が発生している。 From this state, the gap between the semiconductor chip 20 and the circuit board 21 is gradually enlarged. FIG. 4A shows the state at the gap D 1 , and as the gap expands, the resin 30 enters between the terminals facing each other, while the resin 30 in the gap between the semiconductor chip 20 and the circuit board 21. A part of the cavity 40 is generated.

これは、端子間に小さなギャップが生じると、毛細管現象により、ギャップ内に樹脂30が侵入し始め、ギャップがさらに拡大しても、樹脂30と接続端子11、電極端子12間の界面張力により、端子間に侵入した樹脂30は、端子間にそのまま維持されるからである。   This is because when a small gap occurs between the terminals, the resin 30 begins to enter the gap due to capillary phenomenon, and even if the gap further expands, due to the interfacial tension between the resin 30 and the connection terminals 11 and electrode terminals 12, This is because the resin 30 that has entered between the terminals is maintained as it is between the terminals.

また、半導体チップ20と回路基板21の隙間の容積は、ギャップの拡大に伴い増大するのと同時に、半導体チップ20と回路基板21の隙間にあった樹脂30の一部が、端子間に移動することにより、半導体チップ20と回路基板21の隙間に残った樹脂30に空洞40が発生する。   In addition, the volume of the gap between the semiconductor chip 20 and the circuit board 21 increases as the gap increases, and at the same time, a part of the resin 30 in the gap between the semiconductor chip 20 and the circuit board 21 moves between the terminals. As a result, a cavity 40 is generated in the resin 30 remaining in the gap between the semiconductor chip 20 and the circuit board 21.

図5(b)は、図4(a)の状態のときの半導体チップ20の平面図を示す。図5(b)に示すように、半導体チップ20の周辺まであった樹脂30は、アレイ状に配列した電極端子12の最外列近傍まで縮小するとともに、隣接する電極端子12間に、樹脂30の空洞40が発生している。   FIG. 5B is a plan view of the semiconductor chip 20 in the state of FIG. As shown in FIG. 5B, the resin 30 that has reached the periphery of the semiconductor chip 20 is reduced to the vicinity of the outermost row of the electrode terminals 12 arranged in an array, and the resin 30 is interposed between the adjacent electrode terminals 12. The cavity 40 is generated.

さらに、半導体チップ20と回路基板21のギャップを拡大していくと、図4(b)に示すように、樹脂30の空洞40が大きくなり、図5(c)に示すように、樹脂30は、電極端子12の周辺を取り囲むように集合する。   Further, as the gap between the semiconductor chip 20 and the circuit board 21 is increased, the cavity 40 of the resin 30 becomes larger as shown in FIG. 4B, and as shown in FIG. The electrode terminals 12 are assembled so as to surround the periphery.

そして、半導体チップ20と回路基板21のギャップを所定の間隔(D3)になるまで拡大すると、図4(c)、及び図5(d)に示すように、樹脂30は、回路基板21の接続端子11と半導体チップ20の電極端子12間に自己集合する。 Then, when the gap between the semiconductor chip 20 and the circuit board 21 is increased to a predetermined distance (D 3 ), the resin 30 is formed on the circuit board 21 as shown in FIGS. 4 (c) and 5 (d). Self-assembly occurs between the connection terminal 11 and the electrode terminal 12 of the semiconductor chip 20.

なお、上述した樹脂30の端子間に自己集合するメカニズムは、樹脂30と端子間の界面張力を利用したプロセスによることから、半導体チップ20と回路基板21のギャップの拡大は、所定のスピードでゆっくり行うことが好ましい。また、場合によっては、途中で一旦ギャップを狭めたり広げたりして、より確実に自己集合させる工程を入れてもよい。   Note that the mechanism of self-assembly between the terminals of the resin 30 described above is based on a process using the interfacial tension between the resin 30 and the terminals, so that the gap between the semiconductor chip 20 and the circuit board 21 is slowly expanded at a predetermined speed. Preferably it is done. In some cases, a step of narrowing or widening the gap once in the middle to make self-assembly more surely may be included.

また、端子間に侵入した樹脂30を、端子間にそのまま維持されるために、樹脂30の接続端子11、電極端子12との界面張力の大きさは、樹脂30と半導体チップ20、回路基板21との界面張力の大きさよりも大きいことが好ましい。   In addition, since the resin 30 that has entered between the terminals is maintained as it is between the terminals, the magnitude of the interfacial tension between the connection terminal 11 and the electrode terminal 12 of the resin 30 is as follows: the resin 30, the semiconductor chip 20, and the circuit board 21. It is preferable that the interfacial tension is larger than that.

図6は、樹脂30が、半導体チップ20の電極端子12と、回路基板21の接続端子11との間に自己集合す状態を示した拡大断面図である。   FIG. 6 is an enlarged cross-sectional view showing a state where the resin 30 self-assembles between the electrode terminal 12 of the semiconductor chip 20 and the connection terminal 11 of the circuit board 21.

端子間に自己集合した樹脂30を硬化させることによって、半導体チップ20が回路基板21に固定されるとともに、自己集合した樹脂30に含有する導電性粒子16の集合体が、半導体チップ20の電極端子12と、回路基板21の接続端子11とを電気的に接続する接続体を構成する。   By curing the resin 30 self-assembled between the terminals, the semiconductor chip 20 is fixed to the circuit board 21, and the aggregate of the conductive particles 16 contained in the self-assembled resin 30 becomes an electrode terminal of the semiconductor chip 20. 12 and the connection body which electrically connects the connection terminal 11 of the circuit board 21 are comprised.

図6に示すように、導電性粒子16が互いに接触するとともに、接続端子11及び電極端子12に接触することによって、対向端子間の電気的な接続を図っている。これにより、フリップチップ実装体が得られる。   As shown in FIG. 6, the conductive particles 16 are in contact with each other and are in contact with the connection terminal 11 and the electrode terminal 12, thereby achieving electrical connection between the opposing terminals. Thereby, a flip chip mounting body is obtained.

本発明によれば、半導体チップ20と回路基板21との隙間に供給された導電性粒子16を含有する樹脂30は、対向する端子間に界面張力で自己集合し、当該自己集合した樹脂中に含有する導電性粒子16の集合体は、端子間を電気的に接続する接続体を構成する。それ故、樹脂30中に含有する導電性粒子16を有効に利用することができる。また、隣接する端子間には、導電性粒子16を含有する樹脂30は存在しないため、隣接端子間の絶縁性を高めることができ、信頼性の高いフリップチップ実装体を実現することができる。   According to the present invention, the resin 30 containing the conductive particles 16 supplied to the gap between the semiconductor chip 20 and the circuit board 21 self-assembles with the interfacial tension between the opposing terminals, and the self-assembled resin The aggregate | assembly of the electroconductive particle 16 to contain comprises the connection body which electrically connects between terminals. Therefore, the conductive particles 16 contained in the resin 30 can be used effectively. Further, since the resin 30 containing the conductive particles 16 does not exist between adjacent terminals, the insulation between the adjacent terminals can be improved, and a highly reliable flip chip mounting body can be realized.

さらに、端子間を電気的に接続する接続体(導電性粒子16を含有する樹脂30)を自己集合的に形成することができるので、次世代LSIの狭ピッチのフリップチップ実装にも適用可能である。   Furthermore, since the connection body (resin 30 containing the conductive particles 16) that electrically connects the terminals can be formed in a self-assembled manner, it can also be applied to narrow-pitch flip chip mounting of next-generation LSIs. is there.

加えて、端子間に導電性粒子16を含有する樹脂30を自己集合させるとともに、自己集合した樹脂30を硬化させることによって、半導体チップ20と回路基板21の端子間の電気的接続と、半導体チップ20の回路基板21への固定が同時にでき、生産性の高いフリップチップ実装体を実現することができる。   In addition, the resin 30 containing the conductive particles 16 is self-assembled between the terminals, and the self-assembled resin 30 is cured, so that the electrical connection between the terminals of the semiconductor chip 20 and the circuit board 21, and the semiconductor chip 20 can be fixed to the circuit board 21 at the same time, and a highly productive flip chip mounting body can be realized.

また、本発明の方法は、上述した本願出願人が提案するフリップチップ実装方法と異なり、樹脂30中に対流添加剤や気泡発生剤を含有させる必要がないため、樹脂30を加熱することなく、室温において、端子間に接続体を自己集合的に形成してフリップチップ実装体を得ることができる。   Further, unlike the above-described flip chip mounting method proposed by the applicant of the present invention, the method of the present invention does not need to contain a convection additive or a bubble generating agent in the resin 30, so that the resin 30 is not heated. At room temperature, the connection body can be formed in a self-assembled manner between the terminals to obtain a flip chip mounting body.

なお、上記の方法において、端子間に自己集合した樹脂30に含有する導電性粒子16の集合体が、半導体チップ20の電極端子12と、回路基板21の接続端子11とを電気的に接続する接続体を構成している。これは、導電性粒子16が互いに接触することによって電気的な接続を図る方法であるが、この接続の信頼性をより高めるために、端子間に自己集合した樹脂30を硬化させて、半導体チップ20を回路基板21に固定させる工程において、樹脂30が収縮するような材料を使用してもよい。樹脂30が収縮することによって、導電性粒子16の接触が強まり、これにより、接続の信頼性が向上する。   In the above method, the aggregate of conductive particles 16 contained in the resin 30 self-assembled between the terminals electrically connects the electrode terminals 12 of the semiconductor chip 20 and the connection terminals 11 of the circuit board 21. Constructs a connection body. In this method, the conductive particles 16 are brought into contact with each other to make an electrical connection. In order to further improve the reliability of the connection, the resin 30 that is self-assembled between the terminals is cured to form a semiconductor chip. In the step of fixing 20 to the circuit board 21, a material that the resin 30 contracts may be used. As the resin 30 contracts, the contact of the conductive particles 16 is strengthened, thereby improving the connection reliability.

あるいは、端子間に樹脂30を自己集合させた後、樹脂30を加熱し、樹脂30中に含有する導電性粒子16を溶融させることによって、図7に示すように、溶融した導電性粒子16が結合した接続体18を形成してもよい。これにより、接続体18の抵抗値が下がり、接続の信頼性も向上する。なお、この場合、導電性粒子16の全部が溶融しなくても、導電性粒子16の表面だけが溶融して、導電性粒子16同士の界面が金属結合された状態であってもよい。   Alternatively, after the resin 30 is self-assembled between the terminals, the resin 30 is heated and the conductive particles 16 contained in the resin 30 are melted, so that the molten conductive particles 16 are formed as shown in FIG. A coupled connection 18 may be formed. Thereby, the resistance value of the connection body 18 falls and the connection reliability is also improved. In this case, even if not all of the conductive particles 16 are melted, only the surface of the conductive particles 16 may be melted and the interface between the conductive particles 16 may be in a metal-bonded state.

上記の方法によれば、端子間に自己集合した樹脂30を硬化させることによって、半導体チップ20を回路基板21に固定させているが、図8(a)、(b)に示すように、回路基板21と半導体チップ20の隙間にアンダーフィル材を供給することによって、より信頼性の高い固定をすることができる。   According to the above-described method, the semiconductor chip 20 is fixed to the circuit board 21 by curing the resin 30 that is self-assembled between the terminals. However, as shown in FIGS. By supplying the underfill material to the gap between the substrate 21 and the semiconductor chip 20, it is possible to fix with higher reliability.

図8(a)は、導電性粒子を含有する樹脂を、半導体チップ20の電極端子12と、回路基板21の接続端子11間に自己集合させ、端子間に接続体18を形成した状態を示す断面図である。   FIG. 8A shows a state in which a resin containing conductive particles is self-assembled between the electrode terminal 12 of the semiconductor chip 20 and the connection terminal 11 of the circuit board 21 to form the connection body 18 between the terminals. It is sectional drawing.

その後、図8(b)に示すように、回路基板21と半導体チップ20の隙間にアンダーフィル材50を供給し、その後、アンダーフィル材50を硬化することによって、半導体チップ20の回路基板21への固定をより強固にすることができる。   Thereafter, as shown in FIG. 8B, the underfill material 50 is supplied to the gap between the circuit board 21 and the semiconductor chip 20, and then the underfill material 50 is cured, so that the circuit board 21 of the semiconductor chip 20 is cured. Can be more firmly fixed.

本発明の方法によれば、導電性粒子16を含有する樹脂30は、樹脂30と端子間の界面張力の作用により、端子間に自己集合するが、接続端子11、電極端子12以外の回路基板21(または半導体チップ20)表面を予め撥水化処理しておくことによって、樹脂30の端子間への自己集合がよりスムーズに行なわれる。   According to the method of the present invention, the resin 30 containing the conductive particles 16 is self-assembled between the terminals by the action of the interfacial tension between the resin 30 and the terminals, but a circuit board other than the connection terminals 11 and the electrode terminals 12. By subjecting the surface of 21 (or semiconductor chip 20) to a water repellent treatment in advance, self-assembly of the resin 30 between the terminals is performed more smoothly.

すなわち、樹脂30が端子間に自己集合するし易さは、樹脂30と回路基板21(または、半導体チップ20)との界面張力の大きさにも依存する。従って、接続端子11以外の回路基板21(または、電極端子12以外の半導体チップ20)表面を予め撥水化処理しておくことによって、樹脂30と回路基板21(または半導体チップ20)との界面張力を小さくでき、これによって、樹脂30の端子間への自己集合がよりスムーズになる。   That is, the ease with which the resin 30 self-assembles between the terminals depends on the magnitude of the interfacial tension between the resin 30 and the circuit board 21 (or the semiconductor chip 20). Therefore, the interface between the resin 30 and the circuit board 21 (or the semiconductor chip 20) is obtained by preliminarily treating the surface of the circuit board 21 other than the connection terminals 11 (or the semiconductor chip 20 other than the electrode terminals 12). The tension can be reduced, which makes the self-assembly of the resin 30 between the terminals smoother.

接続端子11以外の回路基板21(または、電極端子12以外の半導体チップ20)表面の撥水化処理は、例えば、図9(a)〜(c)に示すような方法で行うことができる。   The water repellency treatment on the surface of the circuit board 21 other than the connection terminals 11 (or the semiconductor chip 20 other than the electrode terminals 12) can be performed, for example, by a method as shown in FIGS.

図9(a)に示すように、回路基板21の表面に、接続端子11となる金属膜を形成した後、レジスト60を塗布する。   As shown in FIG. 9A, after forming a metal film to be the connection terminal 11 on the surface of the circuit board 21, a resist 60 is applied.

次に、図9(b)に示すように、接続端子となる領域を残して、レジスト60をパターニングし、その後、レジスト60をマスクとして、接続端子11となる金属膜をエッチング除去する。この状態で、回路基板21の表面に撥水塗膜用の塗料(例えば、EGC−1700エレクトロニックコーティング剤;住友スリーエム製)を塗布した後、レジスト60をリフトオフする。   Next, as shown in FIG. 9B, the resist 60 is patterned leaving a region to be a connection terminal, and then the metal film to be the connection terminal 11 is removed by etching using the resist 60 as a mask. In this state, after applying a paint for water repellent coating (for example, EGC-1700 electronic coating agent; manufactured by Sumitomo 3M) to the surface of the circuit board 21, the resist 60 is lifted off.

その結果、図9(c)に示すように、接続端子11以外の回路基板21の表面に撥水塗膜70が残存し、当該表面と樹脂30との界面張力を極めて低くすることができる。   As a result, as shown in FIG. 9C, the water-repellent coating film 70 remains on the surface of the circuit board 21 other than the connection terminals 11, and the interfacial tension between the surface and the resin 30 can be made extremely low.

ここで、本発明のフリップチップ実装方法に使用する樹脂30、及び導電性粒子16は、特に限定されないが、それぞれ、以下のような材料を使用することができる。   Here, the resin 30 and the conductive particles 16 used in the flip chip mounting method of the present invention are not particularly limited, but the following materials can be used.

樹脂30としては、エポキシ樹脂、フェノール樹脂、シリコーン樹脂等の熱硬化性樹脂、フッソ樹脂、ポリイミド樹脂、ポリアミド樹脂等の熱可塑性樹脂、若しくは光(紫外線)硬化性樹脂等、またはそれらを組み合わせた材料を使用することができるが、室温において、流動可能な程度の粘度を有していることが好ましい。   Examples of the resin 30 include a thermosetting resin such as an epoxy resin, a phenol resin, and a silicone resin, a thermoplastic resin such as a fluorine resin, a polyimide resin, and a polyamide resin, or a light (ultraviolet) curable resin, or a combination thereof. However, it is preferable to have a viscosity that allows fluidization at room temperature.

また、導電性粒子16としては、Sn−Bi系、Sn−Pb系、Sn−Ag系等のはんだ合金、あるいは、Cu、Ag、AgCu等の金属を使用することができる。なお、本発明においては、導電性粒子同士の接触によって端子間の電気的接続を図ることから、導電性粒子の表面は、できるだけ酸化膜が成長しないようにしておくことが好ましい。また、互いに接触する導電性粒子同士の表面だけ溶融して、互いの界面で金属結合をなすような状態であってもよい。   Further, as the conductive particles 16, a solder alloy such as Sn—Bi, Sn—Pb, or Sn—Ag, or a metal such as Cu, Ag, or AgCu can be used. In the present invention, since the electrical connection between the conductive particles is achieved by the contact between the conductive particles, it is preferable that the oxide film grow as little as possible on the surface of the conductive particles. Moreover, the state which melt | dissolves only the surface of the electroconductive particles which mutually contact, and makes a metal bond in a mutual interface may be sufficient.

以上説明したフリップチップ実装方法において、回路基板21は、回路基板で構成され、回路基板21上に複数の半導体チップ20がフリップチップ実装されていてもよい。また、半導体チップ20は、半導体チップが複数の電極端子(ランド)を有するインターポーザに搭載された構成(例えば、CSP、BGA等)であってもよい。   In the flip chip mounting method described above, the circuit board 21 may be formed of a circuit board, and a plurality of semiconductor chips 20 may be flip chip mounted on the circuit board 21. Further, the semiconductor chip 20 may have a configuration in which the semiconductor chip is mounted on an interposer having a plurality of electrode terminals (lands) (for example, CSP, BGA, etc.).

本発明は、フリップチップ実装だけでなく、それぞれ複数の電極を有する基板同士の電極間を電気的に接続する基板間接続にも適用することができる。基板間接続は、以下の方法でできる。   The present invention can be applied not only to flip-chip mounting but also to inter-substrate connection for electrically connecting electrodes of substrates each having a plurality of electrodes. Inter-board connection can be made by the following method.

まず、第1の基板の電極と第2の基板の電極とを互いに接触させた状態で、第2の基板を第1の基板に対向させて配置し、第1の基板と第2の基板の隙間に、導電性粒子を含有した樹脂を供給する。   First, in a state where the electrode of the first substrate and the electrode of the second substrate are in contact with each other, the second substrate is arranged to face the first substrate, and the first substrate and the second substrate are arranged. A resin containing conductive particles is supplied into the gap.

次に、第1の基板と第2の基板のギャップを、所定の間隔になるまで徐々に拡大することによって、樹脂を、第1の基板の電極と第2の基板の電極間に界面張力で自己集合させる。その後、電極間に自己集合した前記樹脂を硬化させる。   Next, by gradually widening the gap between the first substrate and the second substrate until a predetermined distance is reached, the resin is caused to have an interfacial tension between the electrodes of the first substrate and the second substrate. Self-assemble. Thereafter, the resin self-assembled between the electrodes is cured.

ここで、自己集合した樹脂中に含有する導電性粒子の集合体は、第1の基板の電極と第2の基板の電極とを電気的に接続する接続体を構成している。   Here, the aggregate of conductive particles contained in the self-assembled resin constitutes a connection body that electrically connects the electrode of the first substrate and the electrode of the second substrate.

なお、第1の基板又は第2の基板としては、回路基板、半導体ウエハ、半導体チップ(ベアチップ、実装チップを含む)等を使用することができる。   Note that as the first substrate or the second substrate, a circuit board, a semiconductor wafer, a semiconductor chip (including a bare chip and a mounting chip), or the like can be used.

以上、本発明を好適な実施形態により説明してきたが、こうした記述は限定事項ではなく、もちろん、種々の改変が可能である。例えば、樹脂30は、室温において流動可能な粘度を有していることが好ましいとしたが、加熱することによって、流動可能な粘度に低下するものであってもよい。   As mentioned above, although this invention was demonstrated by suitable embodiment, such description is not a limitation matter and of course various modifications are possible. For example, the resin 30 preferably has a flowable viscosity at room temperature, but may be reduced to a flowable viscosity by heating.

本発明によれば、次世代LSIのフリップチップ実装に適用可能な、生産性及び信頼性の高いフリップチップ実装方法、及び基板間接続方法を提供することができる。   According to the present invention, it is possible to provide a flip-chip mounting method and a substrate-to-substrate connection method that are applicable to flip-chip mounting of next-generation LSIs and have high productivity and reliability.

(a)〜(c)は、対流添加剤を含有する樹脂を用いたフリップチップ実装方法を示す工程断面図(A)-(c) is process sectional drawing which shows the flip-chip mounting method using resin containing a convection additive (a)〜(d)は、気泡発生剤を含有する樹脂を用いたフリップチップ実装方法を示す工程断面図(A)-(d) is process sectional drawing which shows the flip chip mounting method using resin containing a bubble generating agent. (a)〜(c)は、本発明の実施形態におけるフリップチップ実装方法を示す工程断面図(A)-(c) is process sectional drawing which shows the flip chip mounting method in embodiment of this invention. (a)〜(c)は、本発明における樹脂の端子間への自己集合のメカニズムを説明する工程断面図(A)-(c) Process sectional drawing explaining the mechanism of the self-assembly between the terminals of resin in this invention (a)〜(d)は、本発明における樹脂の端子間への自己集合のメカニズムを説明する工程平面図(A)-(d) is a process top view explaining the mechanism of the self-assembly between the terminals of resin in the present invention. 本発明における樹脂が端子間に自己集合した状態を示した拡大断面図The expanded sectional view which showed the state which the resin in this invention self-assembled between terminals 本発明における接続体の形成方法を示した拡大断面図The expanded sectional view which showed the formation method of the connection object in the present invention (a)〜(b)は、本発明における他のフリップチップ実装方法を示す工程断面図(A)-(b) is process sectional drawing which shows the other flip-chip mounting method in this invention. (a)〜(c)は、本発明における基板表面の撥水化処理の方法を示す工程断面図(A)-(c) is process sectional drawing which shows the method of the water-repellent treatment of the substrate surface in this invention

符号の説明Explanation of symbols

11 接続端子
12 電極端子
13、14、30 樹脂
15 対流添加剤
16 導電性粒子(はんだ粉)
18 接続体
19 気泡
20 半導体チップ
21 回路基板
40 空洞
50 アンダーフィル材
60 レジスト
70 撥水塗膜
DESCRIPTION OF SYMBOLS 11 Connection terminal 12 Electrode terminal 13, 14, 30 Resin 15 Convection additive 16 Conductive particle (solder powder)
18 connection body 19 bubble 20 semiconductor chip 21 circuit board 40 cavity 50 underfill material 60 resist 70 water repellent coating film

Claims (14)

複数の接続端子を有する基板に対向させて、複数の電極端子を有する半導体チップを配置し、前記基板の接続端子と前記半導体チップの電極端子とを接続体を介して電気的に接続するフリップチップ実装方法であって、
前記基板の接続端子と前記半導体チップの電極端子とを互いに接触させた状態で、前記半導体チップを前記基板に対向させて配置し、前記半導体チップと前記基板の隙間に、導電性粒子を含有した樹脂を供給する第1の工程と、
前記半導体チップと前記基板のギャップを、所定の間隔になるまで拡大することによって、前記樹脂を、前記基板の接続端子と前記半導体チップの電極端子間に界面張力で自己集合させる第2の工程と、
前記端子間に自己集合した前記樹脂を硬化させる第3の工程とを有し、
前記自己集合した樹脂中に含有する導電性粒子の集合体が、前記基板の接続端子と前記半導体チップの電極端子とを電気的に接続する前記接続体を構成していることを特徴とするフリップチップ実装方法。
A flip chip in which a semiconductor chip having a plurality of electrode terminals is arranged facing a substrate having a plurality of connection terminals, and the connection terminals of the substrate and the electrode terminals of the semiconductor chip are electrically connected via a connecting body. An implementation method,
In a state where the connection terminal of the substrate and the electrode terminal of the semiconductor chip are in contact with each other, the semiconductor chip is disposed to face the substrate, and conductive particles are contained in the gap between the semiconductor chip and the substrate. A first step of supplying a resin;
A second step of self-assembling the resin between the connection terminal of the substrate and the electrode terminal of the semiconductor chip by expanding the gap between the semiconductor chip and the substrate until a predetermined distance is reached; ,
A third step of curing the resin self-assembled between the terminals,
A flip characterized in that an aggregate of conductive particles contained in the self-assembled resin constitutes the connection body that electrically connects the connection terminal of the substrate and the electrode terminal of the semiconductor chip. Chip mounting method.
前記導電性粒子の集合体は、前記導電性粒子が互いに接触して前記接続体を構成していることを特徴とする、請求項1に記載のフリップチップ実装方法。 2. The flip chip mounting method according to claim 1, wherein the conductive particle aggregate forms the connection body by contacting the conductive particles with each other. 3. 前記第2の工程において、前記樹脂を、前記基板の接続端子と前記半導体チップの電極端子間に自己集合させた後、前記樹脂を加熱し、前記樹脂中に含有する導電性粒子を溶融させる工程をさらに含むことを特徴とする、請求項1に記載のフリップチップ実装方法。 In the second step, the resin is self-assembled between the connection terminal of the substrate and the electrode terminal of the semiconductor chip, and then the resin is heated to melt the conductive particles contained in the resin. The flip chip mounting method according to claim 1, further comprising: 前記第1の工程は、前記基板上に前記樹脂を供給した後、前記半導体チップを、前記基板の接続端子と前記半導体チップの電極端子とが互いに接触するように、前記基板に対向させて配置する工程からなることを特徴とする、請求項1に記載のフリップチップ実装方法。 In the first step, after the resin is supplied onto the substrate, the semiconductor chip is disposed so as to face the substrate so that the connection terminal of the substrate and the electrode terminal of the semiconductor chip are in contact with each other. The flip-chip mounting method according to claim 1, comprising the steps of: 前記第3の工程の後、前記基板と前記半導体チップの隙間にアンダーフィル材を供給し、その後、前記アンダーフィル材を硬化させる工程をさらに含むことを特徴とする、請求項1に記載のフリップチップ実装方法。 2. The flip according to claim 1, further comprising a step of supplying an underfill material to a gap between the substrate and the semiconductor chip after the third step and then curing the underfill material. Chip mounting method. 前記第1の工程において、前記接続端子以外の前記基板表面が、予め撥水化処理されていることを特徴とする、請求項1に記載のフリップチップ実装方法。 2. The flip chip mounting method according to claim 1, wherein in the first step, the surface of the substrate other than the connection terminals is subjected to a water repellent treatment in advance. 前記樹脂は、前記第3の工程において、前記樹脂が硬化する際、収縮する材料で構成されることで導電性粒子の接触が強化されることを特徴とする、請求項1に記載のフリップチップ実装方法。 2. The flip chip according to claim 1, wherein the resin is made of a material that shrinks when the resin is cured in the third step, whereby contact of conductive particles is reinforced. 3. Implementation method. 前記接続端子は、前記基板表面にアレイ状に配列されていることを特徴とする、請求項1に記載のフリップチップ実装方法。 2. The flip chip mounting method according to claim 1, wherein the connection terminals are arranged in an array on the substrate surface. 前記第2の工程を繰り返すことを特徴とする請求項1に記載のフリップチップ実装方法。 2. The flip chip mounting method according to claim 1, wherein the second step is repeated. 前記基板は、回路基板で構成されており、
前記基板上に複数の半導体チップがフリップチップ実装されていることを特徴とする、請求項1に記載のフリップチップ実装方法。
The board is composed of a circuit board,
2. The flip chip mounting method according to claim 1, wherein a plurality of semiconductor chips are flip chip mounted on the substrate.
複数の電極を有する第1の基板に対向させて、複数の電極を有する第2の基板を配置し、前記第1の基板の電極と前記第2の基板の電極とを接続体を介して電気的に接続する基板間接続方法であって、
前記第1の基板の電極と前記第2の基板の電極とを互いに接触させた状態で、前記第2の基板を前記第1の基板に対向させて配置し、前記第1の基板と前記第2の基板の隙間に、導電性粒子を含有した樹脂を供給する第1の工程と、
前記第1の基板と前記第2の基板のギャップを、所定の間隔になるまで徐々に拡大することによって、前記樹脂を、前記第1の基板の電極と前記第2の基板の電極間に界面張力で自己集合させる第2の工程と、
前記電極間に自己集合した前記樹脂を硬化させる第3の工程とを有し、
前記自己集合した樹脂中に含有する導電性粒子の集合体が、前記第1の基板の電極と前記第2の基板の電極とを電気的に接続する前記接続体を構成していることを特徴とする基板間接続方法。
A second substrate having a plurality of electrodes is arranged to face a first substrate having a plurality of electrodes, and the electrodes of the first substrate and the electrodes of the second substrate are electrically connected via a connecting body. Board-to-board connection method,
The second substrate is disposed to face the first substrate in a state where the electrode of the first substrate and the electrode of the second substrate are in contact with each other, and the first substrate and the first substrate A first step of supplying a resin containing conductive particles to a gap between the two substrates;
By gradually widening the gap between the first substrate and the second substrate until a predetermined distance is reached, the resin can be interfaced between the electrode of the first substrate and the electrode of the second substrate. A second step of self-assembling with tension;
A third step of curing the resin self-assembled between the electrodes,
The aggregate of conductive particles contained in the self-assembled resin constitutes the connection body that electrically connects the electrode of the first substrate and the electrode of the second substrate. The inter-board connection method.
前記第2の工程において、前記樹脂を、前記第1の基板の電極と前記第2の基板の電極間に自己集合させた後、前記樹脂を加熱し、前記樹脂中に含有する導電性粒子を溶融させる工程をさらに含むことを特徴とする、請求項11に記載の基板間接続方法。 In the second step, after the resin is self-assembled between the electrode of the first substrate and the electrode of the second substrate, the resin is heated and conductive particles contained in the resin are contained. The inter-substrate connection method according to claim 11, further comprising a melting step. 複数の接続端子を有する基板に対向させて、複数の電極端子を有する半導体チップが配置され、前記基板の接続端子と前記半導体チップの電極端子とが接続体を介して電気的に接続されたフリップチップ実装体において、
前記接続体は、前記接続端子と前記電極端子とが互いに接触した状態で配置された前記基板と前記半導体チップの隙間に供給された導電性粒子を含有する樹脂が、前記基板と前記半導体チップのギャップを拡大することによって、前記接続端子と前記電極端子間に自己集合し、前記自己集合した樹脂中に含有する導電性粒子の集合体で構成されていることを特徴とするフリップチップ実装体。
A flip in which a semiconductor chip having a plurality of electrode terminals is arranged facing a substrate having a plurality of connection terminals, and the connection terminals of the substrate and the electrode terminals of the semiconductor chip are electrically connected via a connection body In the chip mounting body,
In the connection body, a resin containing conductive particles supplied to a gap between the substrate and the semiconductor chip arranged in a state where the connection terminal and the electrode terminal are in contact with each other is formed of the substrate and the semiconductor chip. A flip-chip mounting body comprising an aggregate of conductive particles that are self-assembled between the connection terminal and the electrode terminal by enlarging the gap and contained in the self-assembled resin.
前記フリップチップ実装体は、前記基板と前記半導体チップとの隙間に供給されたアンダーフィル材で固定されていることを特徴とする、請求項13に記載のフリップチップ実装体。 The flip chip mounting body according to claim 13, wherein the flip chip mounting body is fixed by an underfill material supplied to a gap between the substrate and the semiconductor chip.
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