JP2007094911A - Storage device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a storage device with stronger hacking resistance by equipping a security lock mechanism with variety. <P>SOLUTION: This storage device is provided with a nonvolatile memory 1, the security lock mechanism 2 determining permission/prohibition of access to the nonvolatile memory 1 according to a previously decided type of authentication procedure, a means writing deletion data for deleting data inside the nonvolatile memory 1, and an I/F 3 accessible to the nonvolatile memory 1 when access is allowed by the security lock mechanism 2. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a storage device having a security lock mechanism.

  In recent years, a storage device using an external storage medium such as an SD card has been used. A nonvolatile memory, for example, a NAND flash memory, is used for the storage device body of the storage medium.

  Here, it has been proposed to use a security lock mechanism for stored information to restrict access to information that can be used only by appropriate users (see, for example, Patent Document 1). This method relates to a memory card, and more particularly to a technology effective when applied to a memory card with a security function in which a nonvolatile memory such as a flash memory (flash EEPROM) is mounted.

  The content is a memory that can prevent data leakage to a third party who does not have access authority by forcibly erasing data by limiting the number of password verifications to protect user data with security Cards are to be provided.

  The means is a system comprising a multimedia card 1 and a host device 2 that is electrically connected to the multimedia card 1 and controls the operation of the multimedia card 1, and stores the number of password verification failures. A retry counter 51 is provided, and an upper limit value 52 of the number of failures is set in the register. The input of the password is repeated first time,..., N times. When the upper limit value 52 is reached, the data is forcibly erased so that no data remains on the flash memory 11. That is, a memory card is provided that can prevent data leakage to a third party who does not have access authority by forcibly erasing data by limiting the number of password verifications.

However, in this usage mode, only the password is targeted as the security lock mechanism. That is, since the data is erased due to a password authentication error, there is a problem that hacking resistance by a third party is weak.
Japanese Patent Laying-Open No. 2005-11151 (1 page, claim 1).

  It is an object of the present invention to provide a storage device that is more resistant to hacking by providing a variety of security lock mechanisms.

  To achieve the above object, according to the present invention, a non-volatile memory, a security lock mechanism for determining whether or not the non-volatile memory can be accessed by a predetermined type of authentication procedure, and release of the security lock mechanism are provided. If it fails continuously for a certain number of times, it can access the non-volatile memory when it becomes accessible by means of writing the data for erasure to the non-volatile memory and the security lock mechanism. Provided is a storage device including an I / F.

  According to the present invention, a storage device having higher hacking resistance can be obtained by providing diversity to the security lock mechanism.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

A first embodiment of the present invention will be described with reference to FIGS.
FIG. 1 is a schematic block diagram of a secure storage device. The nonvolatile memory 1 is a NAND flash memory. Elements of security lock mechanism 2, as a procedure, use CPRM (Content Protection for Recordable Media) and password, and by combining them, it is possible to access non-volatile memory via I / F 3 after unlocking, and security lock When the release failure is detected, the data in the nonvolatile memory is erased. The I / F 3 is an interface for accessing the nonvolatile memory 1 from the outside through the security lock mechanism 2. Note that access is a general read or write of data, but here it is a read.

  For example, in an SD (Secure Digital) memory card, the security lock mechanism 2 is configured by software in a card controller provided with an MPU (Micro Processing Unit) 2a.

  FIG. 2 shows a processing flowchart of the storage device. The following control is performed by the MPU 2a. Setting elements of the security lock mechanism include n types of authentication methods and m times of failure tolerance, and none of them can be set from the outside through the I / F 3. In the figure, n = 3 and m = i (a positive integer) is set, and i is set in advance in a dedicated register. The n types of contents include password, CPRM, fingerprint authentication, and the like. In general, authentication methods of different types are different from each other.

  In step S201, it is determined whether erasing is being performed, that is, whether erasing data is being written to the non-volatile memory 1. Normally, since erasing processing is not performed, the process proceeds to the next step S202. In step S202, A-type authentication means among the three kinds of authentication means is handled, and a unique procedure 1 is performed. In the next step S203, it is determined whether the security lock release by the authentication result by the A type authentication means is successful. If successful, the process proceeds to the next step S204. In step S204, the second type B authentication unit of the three types of authentication units is handled and a unique procedure 2 is performed. In the next step S205, it is determined whether the security lock release by the authentication result by the B type authentication means is successful. If successful, the process proceeds to the next step S206. In step S206, the third of the three types of authentication means, that is, the last C type of authentication means is handled and a unique procedure 3 is performed. In the next step S207, it is determined whether the release of the security lock based on the authentication result by the C type authentication means is successful, and if successful (in general, the process proceeds to the next authentication means, but here is the last authentication means). Proceed to S208.

  In step S208, the continuous denial count counter is initialized (number of times 0), and in the next step S209, a memory access permission notification is given to the outside, and external memory access is enabled thereafter.

  If it is determined in step S203, step S205, or step S207 that the security lock release is denied, the process branches to step S210. In step S210, the continuous denial count counter is counted up. In the next step S211, the counter value is compared with a fixed i value placed in the dedicated register. If it is determined that the former is equal to or greater than i, the process proceeds to the next step S212. In step S212, data erasure processing is performed. The erasing data includes random data, all 0, all 1 patterns, and the like. When step S212 ends, the process proceeds to the next step S213, and a notification that the data has been erased is issued to the outside. In step S214, a memory access denial notification is issued to the outside.

  If the continuous denial count counter value is smaller than the fixed i value placed in the dedicated register in step S211, the process branches to step S214. That is, data erasure and notification are not performed, but only memory access denial is notified.

  After step S214, the process returns to step S202. If it is determined in the first step S201 that the erasing process is being performed, the process branches to step S215, and in step S215, the data erasing process is performed, and the process proceeds to step S202. The process in step S215 is to continue or complete the process when the power is turned on again when the power is cut off during the data erasing process.

  As described above, according to the present invention, at the moment when an information hacker fails to hack information, information that can be physically hacked can be erased without being known to the hacker, thus preventing information leakage. It becomes possible.

  In addition, there is an effect that it can be applied to a generally distributed product such as an SD card without changing the HW.

1 is a schematic block diagram illustrating a storage device according to a first embodiment of the present invention. 3 is a processing flowchart of the storage device according to the first embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Nonvolatile memory, 2 ... Security lock mechanism, 3 ... I / F.

Claims (6)

Non-volatile memory;
A security lock mechanism that determines whether or not the non-volatile memory is accessible by a predetermined type of authentication procedure;
Means for writing data for erasure in the nonvolatile memory for erasing the data in the nonvolatile memory when the unlocking of the security lock mechanism has failed a certain number of times in succession;
A storage device comprising: an I / F that can access a nonvolatile memory when access is possible by a security lock mechanism.   The storage device according to claim 1, wherein the means notifies the outside of failure to release the security lock mechanism and data erasure after the erasure data is written in the nonvolatile memory.   When the power is cut off while the means is writing the erasure data to the non-volatile memory, the erasure data is written again after the power is turned on again, and BUSY or RETRY is notified to the outside until the completion. The storage device according to claim 1, wherein the storage device continues.   The storage device according to claim 1, wherein the erasing data is random data.   2. The storage device according to claim 1, wherein all of the erasing data are 0.   2. The storage device according to claim 1, wherein all of the erasing data are one.

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