TW201203092A - Recording apparatus, writing apparatus, reading apparatus, and method of controlling recording apparatus - Google Patents

Abstract

According to one embodiment, a recording apparatus includes a memory and a controller. The memory is capable of recording data. The controller divides the memory into a first region and a second region and controls the recording of the data. The controller writes externally supplied data into the first region without performing error correction coding and address conversion of a logical address into a physical address for the externally supplied data, and performs the error correction coding and the address conversion for the data, and then writes resulting data into the second region.

Description

201203092 VI. Description of the Invention: Field of the Invention The embodiments described herein relate generally to a recording apparatus, a writing apparatus, a reading apparatus, and a method of controlling the recording apparatus. The present application is based on and claims the benefit of priority to the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the disclosure of the disclosure of [Prior Art] It is known to spread the content using a recording medium such as an sdtm memory card. In this content distribution system, content protection technology for preventing illegal content copying is important. [Embodiment] The device has a memory, in general, according to an embodiment and a controller. This memory is capable of recording data. The controller divides the memory into a - region and a second region and controls the recording of the data. The controller writes the externally supplied resource 'to the first-region t' and the controller does not perform error correction coding on the externally supplied data and a logic: address-to-physical address conversion Perform error correction on the data: encoding and address conversion' and then write the obtained data to the second region n vtc, r\T\ j to receive the method of "% clothing. SD memory card (hereinafter, For example, the memory card is exemplified by the recording device, the seed device, and a method for controlling the recording device according to the first embodiment; 154867.doc 201203092 The recording device. Configuration of the Card The configuration of the memory card according to the first embodiment will be briefly described with reference to Fig. 1. The configuration of the memory card will be described in detail later in a second embodiment. Fig. 1 is a memory card And a block diagram of a writing device. As shown in FIG. 1, a memory card 1 includes a memory controller 1 and a NAND flash memory u. The film can be formed on a separate substrate or on a single substrate. Memory controller NAND and NAND flash memory 丨 j. ° The memory controller 1 executes the necessary programs to write data into the NAND flash memory, read data from the NAND flash memory u, or erase according to access from one of the host devices. The data in the NAND flash memory 11 is connected to the host device (one of the writing devices or a reading device in this embodiment). The memory controller 10 includes a first verification module. 2 and a second verification module 21. The first verification module 20 and the second verification module 21 cooperate with the host device to execute the verification program of the memory card 1. The verification program permits the host device to save The memory card 1 is further divided into a memory area of the NAND flash memory u into at least three areas and managed. The three areas are a dedicated area 30 and a security area 31. And a user area 32. When the host device is verified at the first verification module 20, the memory controller (8) permits the host device to access the dedicated area 3G. When in the second verification module 21 When verifying that the host I is set, the memory controls the H1G standard. The host device accesses the secure area 31. The host device does not need to be authenticated to access the 154867.doc 201203092 user area 3 2. In the secure area 31, the record device specific information is recorded (hereinafter, simply referred to as Unique information). The unique information is the unique information of the NAND flash memory 11 of each memory card. More specifically, when writing data to: NAND flash memory 11 may have a mistake. Information on the location. The unique information is generated by the writing device 2 of the memory card and recorded in the secure area 31. The dedicated area 3 is an area used by the writing device 2 to generate unique information. The user area 32 is an area in which a net user data is stored. Various content materials (including music materials and movie materials) are recorded in the user area 32. One of the encryption keys used to encrypt the content material can be recorded in the user area 32. In addition, another encryption key can be recorded in the secure area 31. 2. Configuration of Writing Device 2 Next, the configuration of the writing device 2 according to the first embodiment will be explained with reference to Fig. 1 . The writing device 2 generates unique information and writes the information into the memory card 1 and further writes various contents into the memory card. For example, the writing device 2 can provide one of various content information station terminals or a content provider. The writing device 2 can be used for recording and reproducing a device of content (such as a movie) distributed via an internet network or the like. As shown in FIG. 1, the writing device 2 roughly includes a cpU4, a generating module 41, a first verification module 42, a second verification module 43, and a content encryption module 44. . When the writing device writes and when the writing device reads the CPU 40 to control the operation data of the entire writing device 2, the CPU 40 issues a write command, 154867.doc 201203092, when the data is fetched, the CPU 40 issues a read. Taking the command β when the writing device accesses the dedicated area 3G of the NAND flash memory of the memory card 1 'the first verification module 42 and the first verification module 20 of the controller 1G Collaborative execution—verification procedures. When the writing device accesses the security area 31 of the NAND memory 1 of the 1 memory card, the second verification module 43 cooperates with the second verification module 21 of the controller Execution—verification procedure. The generating module 41 generates unique information based on an instruction from the cpu 4 and writes the information to the memory card 1. The generating module 41 includes a signature generating module 45, an error location information processing module (hereinafter referred to as - processing module 46), and a write data providing module 4, hereinafter referred to as - providing Module 47). When a unique f signal is generated, the providing module 47 generates data to be written to the dedicated area 3 of the NAND flash memory u. Here, the data generated by the providing module 47 is written into the dedicated area 3 and the written data is read. Then, the processing module 46 generates unique information based on the difference between the data of the writer and the read data, and transmits the unique information to the signature generation module 45. The signature generation module 45 generates a secret record based on an externally supplied (or internally generated) signature and attaches the signature to the unique information. Then, the special generation information of the signature generation module 45 in the inch to the digital sign is written into the security area 31 of the NAND flash memory 11. The area secret module 44 encrypts the content of the user to be recorded in the memory B and a content. The method of the content encryption module 44 is applicable to the method of the content encryption module 44. The method of the present invention is disclosed in the specification of the present application. One example of this will be described later as a third embodiment. 3. Configuration of Reading Device Next, the configuration of the reading device according to the first embodiment will be described with reference to Fig. 2 . Figure 2 is a block diagram of the memory card and reading device.

The reading device reproduces a device provided by, for example, a kiosk terminal or a content providing content. In a system via the Internet or the like: a valley (including a movie), the reading device and the writing device can be combined to form a single device (or integrated into a single device). It is obvious that the read line set 3 roughly includes - cpu 5G, "shirt module I - first verification module 52, - second verification module 53 and - content decryption module 54. ·" The lion (four) reads The line device 31 writes the data to the reading device to pull the CPU 50 to issue a write command, and when the read device reads the data, the CPU 50 issues a read command. = The read device accesses the memory. When the Nand flash memory of the card is in the dedicated area 3G, the first verification module (4) cooperates with the first verification module 20 of the (4) device 1 to perform a verification procedure. Accessing the memory card 1 The second verification module 53 cooperates with the first verification module 21 of the controller 10 to execute a verification program. The group 51_ is generated from the cpU5 (^. Recording: Unique: News (below), referred to as unique information). Based on information and by the writer device = 154867.doc 201203092 疋And 51 determines whether the memory card is - human, cough 2 bridge +, θ especially θ 〇 method of recording media, change +. Whether the hidden card 1 is a pirated media. Wu. Write device generated The unique information and the unique information generated by the 'ill, ^^ device by the '4' are uniquely generated by the writing device, which is called the first capital of the Jingyi renting window 1 and the The unique information generated is referred to as the second: "The decision module 51 includes a signature verification module 55. Figure 2: The processing module 56 (hereinafter referred to as a processing module Μ), -:: The providing module 57 (hereinafter referred to as the providing module 57 for short) and the comparing module generate the second unique information, the providing module 57 generates the dedicated to be written to the ND flashing Δ ** The data in the area 3G ^ the processing group 56 writes the data generated by the providing module 57 to the dedicated area 30 and reads the written data. Then, the processing module 56 is based on the written data and The second unique information is generated by the difference between the read data and the second unique asset is transmitted to the comparison module 58. The signature The verification module reads the first unique information from the dedicated area 3 of the NAND flash memory u, and then based on an externally supplied (or internally generated) signature verification key, the signature verification module 55. Detecting whether the digital signature attached to the first unique information is correct and outputting the verification result to the CPU 50. The comparison module 58 reads the security area 31 from the nAND flash memory First, the comparison module 58 compares the first unique information with the second unique information supplied by the processing module 56 and determines whether the memory card 1 is a legal recording medium based on the comparison result. Then, the comparison module 58 outputs the determination result to the cpu 5〇β 154867.doc -9- 201203092. The content decryption module 54 reads the inner valley and the inner valley of the user area 32 from the memory card i. Record and then decrypt this information. The method disclosed in Japanese Patent Application Laid-Open No. Hei. No. Hei. No. Hei. No. Hei. An example of this method will be explained later as a third embodiment. 4. Operation of writing device 2 Next, Fig. 3 illustrates the operation of the writing device 2 when the first unique information is generated and the first unique information is written into the memory card. Figure 3 is a flow chart illustrating the operation of the writing device 2. As shown in Figure 3, 'First, in response to an instruction from the CPU 40, the first-verification module 42 and the memory card! The first verification module 2 cooperates with the verification-verification program (step S10). A device (the writing device 2 of the first embodiment) and, for example, a reference slot (cpRM (10) out (five) (10) ~ SD Memory Card 4C Entity, LLCj < URL: http://www.4centity.c 〇m>) A verification procedure performed between the SD memory cards can be used as the verification. The verification procedure will be briefly described. The writing device 2 is the same as the memory and the same as the confidential information called a media unique key. The writing device; and each of the 5 memory cards 1 to Jiang Bei & * Λ ^ to pass a random number generated by the mother-person to the other party, by a specific method based on a specific media-specific secret recording The value is returned to the skewed Gula - 』 value will be the other party, check the return value. If the test card does execute the program, it is judged to be "., not approved. "The other party has the same confidential information. That is, the other party is judged - the verified recipient. In the reference document order, the § memory card 1 Recording a media secret block and a media ID and using the device 154867.doc 201203092 to have a specific device key group to implement a specific program, thereby forming a media-specific secret. The same value as the media-specific key The value is also stored in the memory card. The verification procedure can be implemented by a public key infrastructure (pki) method. In the PKI method, when the device verifies the legitimacy of the receiver, the device performs the following Program. When the device cooperates with the receiver to perform communication, the device has a pair of secret keys and an open key with a non-stereo cryptographic algorithm. The device transmits a random number generated each time to X. Receiver. The recipient then encrypts the received random number with a secret key and sends back the encrypted random number and a public key. When the device receives this, the 5H device utilizes the public key. Recording and decrypting the encrypted random number. # decrypted random number character ♦ When a random number generated by the device is determined, the recipient is determined to be one of the owners of the secret key. That is, the party is determined to be verified. Receiver. This program is executed at each of the device side and the receiver side. As an example, the reference document (Advanced Access Content System (AACS) Intr〇ducti〇n and

Common Cryptographic Elements Book <URL:http://www.aacsla.c〇m/specificati〇ns/AACS_Spec^C〇mm〇„_FINAL_0 9Sl.pdf>) 中写# Implemented between a host device and a drive unit After the verification process is carried out by the above method, the providing module 47 generates and prepares to write data according to one of the commands from the CPU 40. The data may be predetermined specific materials or per The data generated by a random number is used. The providing module 47 transmits the generated data to the processing module 46. 154867.doc • 11 · 201203092 / Then, according to the instruction from the CPU 40, the processing module 46 The received data is written into the dedicated area 30 of the NAND flash memory 11 via the first verification modules 4 2, 20 (step S12). At this time, the cpu 4 〇 the dedicated area 3 Then, a write command and an address are issued. Then, according to an instruction from the CPU 40, the processing module 46 reads the data from the dedicated area 30 (step S13). At this time, the cpu is dedicated to the dedicated area. Area 30 issues - read commands and one (four). Of course, The data read in step (1) is immediately followed by the data written in the previous step S12. A verification procedure can be performed between step S12 and step S 13. Next, the processing module 46 compares the data read in step S13 with step S12. The data to be written (step S14). In the comparison, the processing module α detects that the former data does not meet the data location of the latter, that is, the data is not correctly written into the memory card (and/or from the memory card) The position of the correct reading (or a position of B error) ^ Next, the processing module 46 records the position information in the temporary memory 46a (step S15). The temporary memory 46a can be positioned in the processing module. In addition, the temporary memory 46& can be a volatile semiconductor memory (such as a DRAM or an SRAM) or a non-volatile semiconductor memory (such as a NOR flash memory). The device 2 repeats the procedures in steps SU to S15 a specific number of times (n times, where η is not less than 2 a natural number) (step S16) ^When the programs are repeated each time, an error position is additionally written To the temporary memory 46a For each of the n writes, an error location is recorded in the temporary memory 46a. Before repeatedly writing the dedicated area 3, the CPU 40 issues an erase command and an address to the dedicated The area 3〇 erases the data in advance I54867.doc •12·201203092. Thereafter, according to an instruction from the CPU 40, the processing module 46 refers to the temporary memory 46a and determines that the writing failure in n writes does not occur. The position which is less than one of the claws (m is a natural number of not less than 2) is the first unique information (step S17). In addition, according to an instruction from the CPU 40, the signature generation module 45 generates a digital signature using a digital signature generation key to the writing device 2 to prevent the first unique information from being changed and The digital signature is attached to the first unique information (step S18). ^ - The digital signature is attached to one of the digital information that can be generated by a person having only certain confidential information. It is based on a general information theory approach that allows others to verify that the signature is correct but prevents it from falsifying the signature. For example, the method described in (1)(4)(4) Signature Standard, FIPS186, <URL:http://www.itl.nist.goWfipspubs/index.htm>) can be applied to a digital signature. In a digital signature, a digest value is encrypted based on an asymmetric algorithm, wherein one encryption key and one decryption key are different from each other and the encrypted data is regarded as a signature. data. The digital signature is based on a method of decrypting the signature data by using a decryption key during verification, and if the decrypted data conforms to the assembly value of the data to be signed, it is determined that the digital signature is true. The methods described in the referenced documents above are generally used. Thereafter, the signature generation module 45 writes the first unique information of the attached signature generated in step S18 to the security area of the NANE) flash memory 11 according to an instruction from the CPU 40. Medium (step s丨9). At this time, the CPU 40 issues a write command and an address to the secure area 31. 154867.doc -13- 201203092 Since the security is accessed in step S19 and a verification procedure is performed between step S19. 43 The program β area 31 is executed, so that the second verification module 21 can be written to the memory card 1 by the second verification module 21 in step (10) to the program in step S10. Then the writing device 2 then writes the content to the memory card. This writing can be performed by a well known method. 5. Operation of the Selling Device 3 Referring to Figure 4, the detailed description of the reading device 3 is based on whether the first unique information and the second = (4) memory b are legal recording media. Figure 4 is a diagram showing the operation of the reading device 3 - the flow is shown in Figure 4, in response to an instruction from the cpu 5, the first 2 module 5 2 and the first verification mode of the memory card i The group 2 〇 collaborative execution check-out procedure (step S2 〇) e is similar to the verification method attached to step S illustrated in FIG. 3, and the verification method can be applied to the verification program. Then, based on an instruction from the CPU 50, the providing module 57 generates a backup writer profile (step S21). The specific data or the parental use may be predetermined by a random number (4). Moreover, the data may be equal to or different from the data generated by the providing module 47 of the writing device 2. The provisioning module 57 then transmits the generated data to the processing module 56. Looking at the instruction from one of the C p U 5 ,, the processing module 56 writes the person to the dedicated area pair of the nand flash memory 11 via the data received by the 'the first verification module 52 and the shoulder ( Step S22). At this time, the CPU 5 issues a write command and a address to the dedicated area 3Q. 154867.doc 201203092 Next, according to an instruction from the CPU 5, the processing module 56 reads the data from the dedicated area 30 (step S23). At this time, the CPU 5 sends a read to the dedicated area 30. Take the command and an address. Of course, the data read in step s23 is immediately followed by the data written in the previous step S22. A verification procedure can be performed between step S22 and step S23. Then, according to an instruction from the CPU 5, the processing module % compares the data read in step S23 with the data written in step S22 (step S24). In the comparison, the processing module 56 detects The data to the former does not match the data location of the latter, that is, the data is not correctly written to the memory card (and/or correctly read from the memory card 1) (or a wrong location). Next, the processing module 56 records the location information in the temporary memory 56 & (step S25). The temporary memory 56a can be positioned inside or outside the processing module. In addition, the temporary memory 56a can be a volatile semiconductor memory (such as a DRAM or an SRAM) or a non-volatile semiconductor memory ( Such as a NOR flash memory. The s reading device 3 repeats the steps in steps S21 to S25 a specific number of times (n times, where n is not less than 2 a natural number) (step s26) ^ repeat each time At the time of the program, an error location is additionally written to the temporary memory 56: because t' is an error location for each of the n writes: recorded in the temporary memory 56a. Here, n&m may be equal to or different from n&m used in the writing device 2. The CPU 50 may issue an erase command and an address to the dedicated before repeatedly writing to the dedicated area button. The area module 3 pre-erased the data. The processing module 56 refers to the temporary memory 56a according to the instruction from the CPU 5, 154867.doc 15 201203092 and determines that the writing fails in n times of writing. Less than the mere owe On is not less than 2 - the natural number - the wrong bit The second special qualification is (step S27). The specific procedure in steps S20 to S27 is the same as the procedure in steps S10 to S17 executed by the device 2, and then the signature verification module 55 is compared with Module 58 reads (4)

The first unique information of the security area 31 of the N-N flash memory U is S7). At this time, the CPU 5 clears the security area and calls the write command and the address. Since the (4) security zone_ is stored in step S28, the verification procedure can be executed between step S27 and step S28. This program is executed by the second verification modules 21,53. Α Next, based on the instruction from the CPU 50, the signature verification module 55 verifies the legitimacy of the digital signature attached to the read first-specific information. If the result of the check indicates that the digital signature is not authentic, the CPU 5G interrupts the program and determines that the memory card is an illegal recording medium or a pirated card (^; S29). Therefore, the reading device 3 is prevented from accessing the memory card. In addition, based on an instruction from the CPU 50, the comparison module 58 compares the read first-specific information with the second unique information supplied by the processing module 56. If the comparison result shows that the former does not comply with the latter, the CPU 5 interrupts the program and determines that the memory card i is an illegal recording medium or a pirated card (step S30 thus "prevents the reading device 3 from accessing the memory card" Next, if it is determined in steps S29 and S30 that the memory card is a legal recording medium, the reading device 3 starts reproducing the content recorded in the user area 32 of the NAND flash memory u. It can be executed by a well-known method. This reproduction 0 154 867.doc • 16 - 201203092 6. Specific example of a method of verifying the memory card 1 Next, a specific example of the operation described in FIGS. 3 and 4 will be explained. As described above, in order to verify the memory card 丨Whether it is a legal recording medium, the first unique information and the second unique information M are used to generate such information by using the written data generated by the providing modules 47, 57. The written data is not limited thereto. For example, the amount of data written is approximately megabytes. Thereafter, to simplify the explanation and facilitate understanding, it will be explained that the write data contains 16 bits and the write device 2 and the readout Device 3 One is based on the assumption that one of n=5 and m=3. First, the writing device 2 records the first unique information. This recording procedure will be explained with reference to Fig. 5. Fig. 5 illustrates the steps of repeating each time. The data written in su to si5, the read data, the data in the temporary memory 56a, and a table of the first unique body. In FIG. 5, the underlined and written data items in the read data item are underlined. The bit positions in the bits are different. As shown in Figure 5, it is assumed that the write data generated by the providing module in a first write is (0〇〇〇-〇〇〇〇_ The system (0000-0100_〇〇〇〇一〇〇〇1) read from the dedicated area 3〇 after the write data is written into the area 30 β, that is, one of the sixth digits and one sixteenth digit from the beginning of the reading data is inverted (there is an error, therefore, the wrong position (sixth and sixteenth digits) is recorded in the Temporary memory 46 & In the following, it is assumed that a system that reads and reads data is generated in a second write (1111 - 1011 - 1 - 11) Therefore, the error position (sixth bit, tenth bit, fifteenth bit, and sixteenth bit) is additionally recorded in the temporary memory 46a. 154867.doc 201203092 Then, assume In the case of a 篦-glucoside λ a female, a spear is produced (1111 - 〇〇〇〇 _ 〇〇〇〇 - 〇〇〇〇) as a data written and read (1) 〇 1 〇 1 〇〇〇 〇〇〇—〇〇〇... Therefore, the wrong position (third bit, sixth bit, and sixteenth bit) is additionally recorded in the temporary memory 46a. Hereinafter, the fourth-fourth write, one The fifth write and read system is shown in Fig. 5. Then, it is seen that the bit has been inverted by not less than m=3 times, and the error is set to the /, the bit and the 16th bit. Therefore, the processing module writes the error location as the first-specific f-signal to the secure area η. Then, the reading device 3 generates a first: unique credit to compare the first unique asset with the first unique information. The comparison procedure will be explained with reference to FIG. Fig. 6 is a table in which the data written in the steps S21 to S25, the read data, the data in the temporary memory 56a, and the second unique information are repeated each time. In Fig. 6, the underline has the same meaning as the underline in Fig. 5. As shown in Fig. 6, it is assumed that the type of the written data is the same as that of the written data of Fig. 5. Suppose that a sixth bit is placed in a first read and a tenth: bit is inverted in the second read - the third bit, the sixth bit, the tenth bit, and a tenth Six bits, and the rest are shown in Figure 6. Then, the error position where the bit has been inverted mm=3 times is the sixth bit and the sixteenth bit of the temporary memory. Therefore, the processing module 56 transmits the error locations as the second unique information to the comparison module 58. The comparison module 58 compares the first unique information of FIG. 5 with the second material information of FIG. 6. Then, the first-specific information and the second unique feature are in the wrong position of the six-digit and the sixteen-thousand-thousands. Therefore, the 154867.doc 201203092 comparison module 5 (four) determines the memory card system - legal record (four) body. 7. Effect of the first embodiment As described above, the unauthorized use of the content material can be suppressed by the recording apparatus according to the first embodiment and the control method thereof. This effect is explained below. With the recent development of the capital society, the dissemination of content (such as computerized books, newspapers, music, or moving images) to the user terminal and enabling the user to view the content has been widely used. Computerized content can be easily copied (hereinafter referred to as content), and thus illegal actions can be made by copyright infringement. In order to protect the content from the violation of illegal activities, the content is encrypted using the __ encrypted secret and the content is recorded. The encrypted content is decrypted at the time of reproduction. This type of content protection technology includes recordable media content protection (10)譲). Further, an encryption double key method in which a content key is double-encrypted by two types of keys has been considered (for example, refer to Japanese Patent Application K〇KAI Publication No. 2 No. 5-341156). For example, 'this type of encryption double key method is used in MQbic (-registered trademark for one of these encryption keys, one of the recording medium-specific keys (such as a media-specific key) is securely stored in one of the storage media) In the hidden area, there is no external access at all. Therefore, for example, even if the content key material is only encrypted and copied, the illegal copying person cannot use the content material without the media unique key. If the media-specific key has been illegally read and transmitted to an illegal card manufacturer by some methods, the pirated card made by copying a legal card begins to appear, and as a result, the content material can be illegally used. 154867.doc -19-201203092 In this aspect, with the memory card according to the first embodiment, it is determined whether the memory card is a legal recording device based on the recording device-specific information. If the media-specific key has been illegally read, It can prevent access to the inside and therefore 'can suppress the circulation of pirated cards and can effectively protect the content materials. The recording device unique information indicates that the data will be Write to the _ gate. The position of the bit in the hidden body and then read the data to make the frequency of inconsistency between the written data and the read data become higher. That is, the information display has formed = (10) flash memory The position of a particularly low-performance memory saponin in one of the memory chips. Of course, the position of the memory cell in the memory chip is different in each memory chip. Accordingly, the recording device is unique. The information is also information for each NAND flash memory (10). For example, when writing content, the first unique information is generated and written to the memory card. Thereafter, when the content is reproduced, The second special fund: two:: compared with the first-specific information. If the second unique information 4 σ σ The first special right a. ° 丨δ recall card is regarded as a legal recording device. Consider the situation shown in Figure 7. Figure 7 shows a legal memory card 1-1 and - illegal copy (four) record Mu " in the hidden card M, the content 90 is recorded in a user area 32- 1

And a controller 1 〇 · 1 保存 saves a media unique key 92 at BA 1. —Safe Area ^” Saves the first unique 杳 information 91. The information 91 conforms to the error location in the area 30-1 of one of the memory cards. It is assumed that the content 9 〇, the touch μ + 纽 κ 媒体 media unique secret 92 and the first unique information 91 have been copied. I have recalled the card 2 in it. When the content 154867.doc 201203092 90 in the memory card 1 - 2 is reproduced, a dedicated area 3 〇 2 of the memory card 2 is used to generate -J. rt _ special-- then the dedicated area 3 ( The characteristic spread of the memory unit in M is different from the characteristic spread of the memory unit in the dedicated area 30_2. Therefore, of course, the second unique information 93 is different from the first unique information Μ: This determines the memory card I-2 is an illegal card' to prevent reproduction of the inside: in the first embodiment, when the first unique information and the second special information are generated, the dedicated area writes and reads several times. The method of the first embodiment is made more efficient. Specifically, if the first-specific information and the second unique information are generated in the only-time write and sell #, the chances of the former and the latter are in accordance with each other. Very low. Therefore, although it is a legal recording medium 'but it is possible to determine that the memory card is __ illegally copied card. However, 'many writes and read operations are performed and only the number of errors is exceeded:: specific value Location 'from this first unique information and The second special bellows excludes the location of the bit that is less prone to error. In addition, the unique information and the second unique information are generated based on the location (or location) of the data in which the error occurred, thereby making the above method easier. Use: In one of the write/read failure areas, there are many defective memory cells. Therefore, consider using a memory block that is forbidden (so-called bad block when S, it is expected that the NAND flash memory should have as few as possible. Bad block. There is a product with very few bad blocks or no bad blocks. In this case, the right use of the bad block to generate the first unique information and the second special fund A will all be meaningless information. And therefore a digital signature will also be meaningless. Instead, from a small data unit (such as a bit unit) point of view 154867.doc • 21- 201203092 see 'no doubt there are two or more errors. Therefore, the expectation should be used According to one of the methods of the first embodiment, in addition, attaching a digital signature to the first unique information 91 facilitates content protection. In this way, the expansion of the pirated card is prevented, thereby effectively protecting Although in the first embodiment, the explanation has been given using one of the first loaded information and the second unique information that are completely in accordance with each other, the first special information and the second unique information may each other Incompletely conforming, that is, when the first-specific information and the second unique information meet each other at a specific ratio, the memory card can be determined to be a legitimate product. Specifically, the number of incorrect positions in the first unique information When compared with the error location in the second unique information, the memory card can be determined if the percentage of each other that matches each other is equal to a certain percentage of the total number of error locations in the information. Is a legal product. The example W-acceptable as described with reference to FIG. 5 and FIG. 6 determines that the memory card is legally produced, even if it contains the sixth unique information or the sixteenth tyrr. However, from a high-level content protection point of view, the ratio is better. The required information of the ribbed question 1 The data written in the memory card 1 can be changed with the ratio of gold & Correspondingly, the sigh is less than 100%, which makes it easy to use. The system of the first embodiment of the ruler furthermore 'not only meets the ratio but also the information of the first special consultation and the relationship between the error positions of the second special 154867.doc -22-201203092 poor news package 3, pre-determined The difference between the wrong positions: inside. For example, the first unique information is not in compliance with (4) 1 • The determined product is in the wrong position, and if there is f5fl, the wrong product is obtained. Having a specific amount, material (4) The memory card is, for example, understood to have the second unique increase more than the number of error positions of the τ - the number of error positions in μ in / μ. The reason is that each field intrusion/erase is dedicated [When the temperature is degraded... 0, the characteristics of the memory units are B, when the number of added error positions or when the increase ratio is not more than "the number of #疋# A specific number of eight P*...X first unique information in the number of wrong positions of the knife ^ B, can be determined that the memory card is a legitimate product. In the case of the bamboo - in the application 'has used unique information The position of the inverted position of the .^ position is given. However, the unique information is not limited to the bit position, ^ ^ , and the information represents the position of the bit. For example, ° i represents unique information. The address is generated - the error - the regional entity address. The address specifies one of the smallest memory regions (eg, clusters) that can be accessed by the write device 2 and the read 3. [Second implementation Example] A method of recording a recording device, a writing split, a beating device, and controlling the recording device according to the second embodiment is explained. The second embodiment relates to an SD memory card of the first embodiment. Details of i. Therefore, one of the writing device 2 and the reading device 3 will be omitted. Detailed description 1. The configuration of the memory card, an overall configuration of a memory card will be explained first with reference to Fig. 8. Fig. 8 is a 154867.doc -23-201203092 one of the memory cards 1 according to the second embodiment The memory card 1 can be connected to a host device 4 via a bus interface 5. When the memory card 1 is connected to the host device 4, power is supplied to the memory card 1' and then the memory card 1 is The access operation of the host device 4 and the processing is performed. The host device 4 corresponds to the writing device 2 and the reading device 3 set forth in the first embodiment. The memory card 1 roughly contains the memory mentioned above. The controller 丨〇, the nand flash memory 11 and a data bus 丨 2. The memory controller NAND and the NAND flash memory U are connected to each other by the data bus a. 11 Memory controller 10 Configuration Next, the details of the memory controller 10 will be explained with reference to Fig. 8. As shown in Fig. 8, the memory controller 1 includes an SD card interface 70, an MPU 71, and a pre-recorded media copy protection ( CPRM) circuit 72, a ROM 73, a RAM 74 and a NAND interface 75. The same is formed on a single semiconductor substrate and connected to each other via an internal bus bar 76 to communicate with each other. The SD card interface 70 connected to the host device 4 can be regulated via a bus interface 5 (SD card bus) Communication with the host device 4. The Nand interface 75 connected to the NAND flash memory via the data bus 12 regulates communication with the NAND flash memory 11. The MPU 71 controls the operation of the entire memory card 1. For example, when power is supplied to the memory card 1, the MPU 71 reads out the Xerox (control program) stored in the ROM 73 onto the RAM 74 and performs specific processing, thereby creating on the RAM 74. Various tables. In addition, the MPU 71 receives a write command, a read command or an erase command from the host 154867.doc -24 - 201203092 device 4 to perform a specific process or control on the NAND flash memory 11 Data transfer program. One of the specific functions that the MPU 71 has will be described in detail later. The R〇M 73 stores a control program controlled by the MPU 71 and other components. The RAM 74, which is a work area of one of the MPUs 71, stores the control program and various tables. The CPRM circuit 72 supervises one of the copyright protection functions of the memory card 1. That is, when the host device 4 accesses the information that should be secret in the N a N D flash memory, the CPRM circuit 72 determines whether the access is permitted. 1.2 Configuration of NAND Flash Memory u Next, the configuration of the NAND flash memory U will be explained with reference to FIG. As shown in FIG. 8, the NAND flash memory cartridge includes a memory cell array 80, a column decoder 81, a page buffer 82, and a NAND interface 83. The memory cell array 8A includes a plurality of memory blocks BLk. Each of the memory blocks is capable of holding a group of memory cells of the data. The memory cells are arranged in a matrix. A plurality of memory cells in the same column are connected to the same word line. The data is written in one block to or read from the memory cells connected to the same word line. Each of the memory units can hold 1-bit data (2-level mode) or 2-bit data (4-level mode). Erase the data in the memory block BLK. A Hai NAND interface 8 3 Supervisor § έ έ έ 体 体 控制器 控制器 控制器 〇 NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND NAND Next, the nanD interface 83 transfers a list of addresses given by the memory controller 10 to the column decoder 8 [154867.doc -25 - 201203092 to write data to the page buffer 82. In addition, the interface 传输 transfers the data transferred from the page buffer H82 to the memory controller 10 〇 the column decoder 81 decodes a list of addresses given by the NAND interface 83. Based on the decoding result, the column decimator 81 selects one of the column directions of any of the memory blocks BLK in the memory cell array 80. That is, the column decoder 81 selects any of the pages. The page buffer 82 for inputting data to the memory cell array 8 or outputting data from the memory cell array 80 temporarily stores data. The page buffer 82 inputs data to the memory cell array 8 by a page or outputs data from the memory cell array 80. When data is written, the page buffer 82 temporarily holds the write data given by the NAND interface 83 and writes the data to the memory unit. When the material is read, the page buffer 82 temporarily saves the read data and transfers the data to the NAND interface 83. 1.3 Function of Memory Controller 1〇 As described in the first embodiment, the memory controller divides the memory region of the NAND flashback 3 into a plurality of regions (clearly speaking' A dedicated area 30, a secure area 31, and a user area 32) are managed and managed. The function of the MPU 71 of the memory controller 10 for accessing the divided area will be specifically explained hereinafter with reference to FIG. Figure 9 is a functional block diagram of the memory card 1 showing the functions and divided regions of the mpu 71. As shown in Figure 9, the MPU 71 of the memory controller 不仅0 includes not only I54867.doc. 26 - 201203092 The first verification module 20 and the second verification module 21 described in the first embodiment further include a write control module 22 and a logical address to physical address conversion module (hereinafter , referred to as an L2P processing module) 23, an error correction coding module (hereinafter referred to as an ECC module) 24, a wear leveling control module 25, and a randomization control module 26. The MPU 71 can perform such functions by implementing software or by using hardware or software independent of the MPU 71. The first verification module 20 and the second verification module 2 are as described in the first embodiment and thus the description thereof will be omitted. The L2P processing module 23 converts a logical address given by the host device 4 into a physical address (this program is referred to as an L2P program). The ECC module 24 subjects the data to error correction coding. Specifically, when writing data, the ECC module 24 subjects the data supplied by the host device 4 to error correction coding to generate a parity check bit and add it to the data. The ECC module 24 generates a syndrome based on data read from the NAND flash memory 11. Based on the syndrome, the ECC module 24 detects an error location in the data and corrects the error data. The wear leveling control module 25 subjects the NAND flash memory 11 to wear leveling. The wear leveling manages the number of rewrites of each of the memory blocks BLK in order to prevent the data access from being concentrated at a particular memory block BLK. For example, when writing data to the memory block blk丨, if the writing frequency in the memory block BLK1 is high, the data is written to another memory block BLK2f having a lower writing frequency, and The data that has been written into the memory block BLK1 is copied to the memory block BLK2. The randomization control module 26 randomizes the data supplied by the host device 154867.doc -27-201203092 4 in the written data to thereby prevent M" <"〇" from continuing. The randomized data is executed based on, for example, a pseudo-random number generated by a pseudo-random number generator and a logically exclusive or exclusive operation of the data. When the data is read, the randomized control module 26 decodes the read data supplied by the NAND flash memory. The write control module 22 controls the L2P processing module 23, the ECC module 24, the wear leveling control module 25, and the randomization control module %. When writing data, the write control module 22 generates a write command defined in the NAND interface and outputs the write command to the physical address and write data to be written to an area to the NANd flash memory 1丨. When the data is read, the write control module 22 generates a read command defined in the NAND interface and outputs the read command to the NAND flash with the physical address of a region to be read. Memory 11. With this configuration, the memory controller 10 causes the first verification module 2 to verify the legitimacy of access from the host device 4 to the dedicated area. The [2卩 processing module 23, the ECC module 24, the wear leveling control module 25, and the randomization control module 26 do not perform processing. That is, the dedicated area 3 is not subjected to an L2P procedure, an ECC procedure, and wear leveling. In addition, the data for the dedicated area 3〇 is not randomized. In other words, the host device 4 accesses the dedicated area 30 using a physical address. In other words, the memory card i treats the address received from the host device 4 as a physical address rather than a logical address. Then, when writing the data, the write control module 22 outputs the physical address, the data supplied by the host device 4, and a write command defined by the NAND interface to the NAND flash memory. . At this time, the write control mode 154867.doc •28·201203092 Group 22 writes the person data in the 4-level mode. When the data is read, the write control module 22 outputs a physical address and a read command to the nand flash memory 11. Further, the memory controller 1 causes the second verification module 21 to verify the legitimacy of the access from the host device 4 to the secure area 31. Then, under the control of the write control module 22, the L2P processing module a, the ECC module 24, the wear leveling control module 25, and the randomization control module % perform processing. That is, an L2P program, an ECC program, and wear leveling are performed. In addition, the information is randomly adapted. At least one of the Ecc program, wear leveling, and data randomization may be omitted depending on the situation. Then, when writing data, the write control module 22 adds a physical address obtained at the L2P processing module 23, a randomized data of a parity check bit (if needed), and a write command. Output to the NAND flash memory U. At this time, the write control module 22 writes data in the 2-level mode. When the data is read, the write control module 22 outputs a physical address and a read command to the nand flash memory 11 and access to the user area 32 and the security area 31. The same is true, except that one of the verification procedures at the second verification module 21 is not required. The above description has been summarized as shown in FIG. Fig. 1 is a table showing a difference between the dedicated area 30 controlled by the memory controller 10 and other areas (the security area 31 and the user area 32). As shown in Figure 10, the dedicated area 3 is subjected to a verification procedure, but is not subjected to an ECC procedure, wear leveling, and randomization. The I54867.doc is controlled in 4-level mode. • 29· 201203092 Private area 30 ^ In contrast, the other areas 31, 32 are subjected to a verification procedure (if required). Other areas are also subject to an L2p procedure, an ECC procedure, wear leveling and randomization. The data for these areas 3丨, 32 is controlled in a 2-level mode. In the write mode, the amount of data stored in the memory cells of the dedicated area 3 is greater than the amount of data stored in the other areas 31, 32. For example, no less than three levels of data may be stored in the dedicated area and the two levels of data may be stored in the other areas 31,32. That is, the dedicated area 30 can be controlled in an M-bit mode (the river system is not less than 2 one natural number) and can be a bit mode (the N system is not less than ι and satisfies the arithmetic formula N<M a natural number) Controlling the other regions 3 j, 32 ° for the host device 4 to access the dedicated region 30 command (a command defined on the SD interface) may be different from accessing the other regions 31, 32 One order. This enables the memory controller 10 to easily recognize that the access system has access to one of the dedicated areas 30. Even if the same command is used, one of the areas to be accessed can be distinguished based on the address. 1 .4 Memory Space of NAND Flash Memory 11 FIG. 11 is a conceptual diagram of a memory space of the NAND flash memory 11 showing information stored in the NAND flash memory 11. " As shown in Figure 11, the NAND flash memory u stores a boot sector, FATUAT2, - root directory entry, first unique information, and usage information. Further, in the NAND flash memory i i, the 疋 area % is fixed as a dedicated area 30. As described above, in this Ue domain, write / 154867.doc • 30· 201203092 is used to generate the first unique information and the second unique information. The boot section, FAT1, FAT2, and root directory items are used to manage management information of files (data) recorded in the NAND flash memory u. Figure 11 shows a file allocation table (FAT) file system as an example. The user profile contains inner valleys (including music and movies) and encrypted secrets for encrypting/decrypting the content. As described above, the first unique information is written into the secure area, and the FAT1, FAT2, root directory entries, and user data are written into the user area 32. When the dedicated area 30 is accessed, neither an L2p program nor a wear leveling is performed. That is, the memory block allocated to the dedicated area y is fixed (for example, BLKUBLK14). Therefore, when data is written to the dedicated area 3, data is written to any of the memory blocks BLK11 to BLK14. A place where the data to be written is directly selected by the host device 4. In other words, a plurality of write and read operations performed to generate the first and second unique information are performed on the same memory unit each time. In contrast, the memory block BLK assigned to other areas is not fixed. When updating the data or completing the wear leveling, the memory block of the person who writes the material always changes 1 ' although the logical address itself does not change, but the physical address of the entity changes with time. 2. Operation of Memory Card 1 Following ', the operation of the memory card 1 when the first unique information is generated and recorded will be explained with reference to FIG. Figure 12 is a diagram showing the operation of the Mpu 71 of the memory controller 1 154867.doc • 31-201203092 As shown in FIG. 12, firstly, the first verification module 2 is implemented by the request of the writing device 2. A verification procedure (step si of Figure 3 and step S40 of Figure 12). If the verification fails, the memory controller 丨0 prohibits the writing device 2 from accessing the memory card 1. If the verification is successful, the memory card 1 receives the write command, data, and address (physical address) from the writing device 2 (step S41). Next, the token controller 10 writes the received material into an area corresponding to the received address (i.e., the dedicated area 30) (step S42). As described above, a randomization procedure of an L2P program, an ECC program, wear leveling, and (randomized data writing) is not performed. The memory card 1 further receives a read command and a bit (physical address) from the writing device 2 (step S43). Next, the memory controller 1 retrieves data from an area corresponding to the received address (ie, the dedicated area (step S44). As described above, the L2p program, the ecc program, and the randomization program are not implemented. (or converting one of the read randomized data back to the original data: a decoding program repeats a specific number of times (n times) of the above reading and writing operations (step S45). Before 3(), the memory (4) (4) sends an erase command and the address to the dedicated area 3G and erases the data once. The CPU 4G of the writer device 2 can issue an erase command and a dedicated area. 30. Deleting the data-time. Due to the above procedure, the device 2 generates the first unique information. After the B is written, the first unique information is written, and the request is written to the memory card 1 by the writing device 2. It is clear that the second verification module 21 cooperates with the 154867.doc •32-201203092 into the device 2 to execute the verification program (step (10)). If the verification fails, the writing device 2 is prohibited from accessing the memory from this time. Kabu if the test is also completed; 6 ben Recalling the card] receiving a write command, data (first unique information) and an address (logical address) from the host device 2 (step S47). Then the memory controller 1() will receive the data. Write to the area corresponding to the received address (ie, the security area 31) (step state). The L2P program, ECC program, wear leveling, and randomization are performed at this time. After the above procedure, various content records In the memory card, the program for accessing the memory card by the reading device 3 is almost the same. That is, after the procedures of steps S40 to S46, the memory card i receives the read command and the address ( The memory card 1 reads the first unique information from the secure area 31 and outputs information to the reading device 3. 3. The role of the second embodiment is according to one of the second embodiments The memory card can not only efficiently generate unique information but also suppress illegal copying of unique information. First, when accessing the dedicated area 3, the memory card of the second embodiment does not implement an L2P program on the dedicated area 30. Does not perform wear leveling That is, the memory block BLK assigned to the dedicated area 30 is fixed. Therefore, the memory cells to be written/read are always the same during the time from the generation of the first unique information to the generation of the second unique information. Therefore, the reliability of the method for verifying the memory card of the second embodiment can be improved (ie, the method of verifying the memory card by comparing the first unique information with the second unique information with each other). Focusing solely on generating the first unique information, it is expected that an error should occur in the '154867.doc -33-201203092 multi-bit. The reason is that if an error does not occur in any of the bits, then There is no target to attach a digital signature. In this aspect, by using the memory card i of the second embodiment, the dedicated area 3 is not subjected to an ECC program and/or a randomization procedure. In addition, data having a larger number of bits than the number of bits in the memory cells of the user area 32 and the security area 31 is written into the memory cells of the dedicated area 3〇. Accordingly, the error occurrence rate in the dedicated area 3 can be increased, which enables the recording device specific information to be efficiently generated. The method of increasing the error occurrence rate in the dedicated area 30 can be implemented in another manner. For example, one method changes the voltage applied to the word lines WL of the memory cells connected to the dedicated area 30 compared to the other areas 3, 32. Specifically, the read voltage applied to one of the word lines to be read can be changed to a value higher than usual. Alternatively, the verify voltage in the write can be changed to a value lower than usual by not changing the read voltage. Further, the method of increasing the error occurrence rate in the dedicated area 30 may be to write a data pattern which is considered to have a higher error occurrence rate into the memory cells in the dedicated area 30. With the memory card of the second embodiment, since randomization is not performed on the dedicated area 30, any data pattern can be directly written into the memory unit. Alternatively, if there is a word line with a high error rate in the block of the dedicated area 30, only these words can be used. Further, in the second embodiment, the writing and reading of the data have been repeatedly performed in steps S41 to S45 of Fig. 12. However, it is not necessary to write data each time. That is, after the data is written to the dedicated area 30, the data can be read a certain number of times by reading 154867.doc •34·201203092. Therefore, based on the error occurring in the read data, it can be determined whether the memory card is a pirated card. In this case, the effect of preventing deterioration of the recording element is obtained. This also applies to the operation of the recording apparatus (steps S21 to S25 of Fig. 4). Further, when writing is performed to generate unique information (step S12 in Fig. 3 and step S22 in Fig. 4), one part (but not all) of the dedicated area 3 can be used. Then, depending on the situation thereafter, one of the materials to be written for the unique information can be changed. For example, changing one of the criteria is one of the ECC error correction rates. Specifically, when the number of error corrections of the ECC in the data written to a certain place exceeds a certain number of times, it is considered that the area is one of the places where the error occurs too frequently. Thereafter, another place is used as an area for generating unique information. In this second embodiment, unique information has been written into the secure area ^. However, the unique information can be written into the normal user area. Or the 'specific information can be pre-determined to be specific information between the recording devices and not = recorded in the memory card can be pre-determined (4) for the unique information should be written The input device and the reading device can share the information. When the reading #= special tr, 'permit the memory card to be saved as unique information: the next two outs are read when the unique information is not recorded in the memory card The device can know the unique information in advance. [Third embodiment]: The recording device device, the reading device, and the control device are written in accordance with a third embodiment to display the first meeting. The wire is as singular. The third embodiment and the content of the second embodiment are encrypted and solved by an example of I54867.doc -35-201203092. 1. Encryption method First, a description will be made with reference to FIG. Figure 13 is a block diagram of a memory card writing device 2, which specifically shows the flow of processing and processing necessary for encryption. As shown in Figure 13, the writing device 2 has a preset device key. 4 and the memory card 1 has key management MKB (Media Key Block). The writing device 2 reads one MKB from the memory card and executes an MKB program using its own device key Kd, thereby obtaining a media key Km (step S50). Then, the writing device 2 reads the media identifier IDm from one of the memory cards 1 and executes a hashing program using the media identifier IDm and the media key Km (step S51). Since the hashing program ' The writing device 2 obtains a media unique key Kmu. For example, the above program is executed by the CPU 40. Thereafter, based on the obtained media unique key Kmu, the writing device 2 performs a cooperation with the memory card 1 Verification procedure and key exchange "For example, this is performed by the second verification modules 43, 21. The writing device 2 shares a session key Ks with the memory card 1 due to authentication and key exchange. When the media unique key Kmu of the writing device 2 conforms to the media unique key Kmu stored in the memory 1, the program succeeds, and the result is that the session secret record Ks is shared, and the writing device 2 Encrypt a user's secret record Ku with the media unique key Kmu (step Step S52) and writing the encrypted key to the secure area 31 of the memory card 1 by using the password communication of the session key Ks. 154867.doc • 36 - 201203092 In FIG. 13, The user key Ku encrypted by the media specific key 1 (:1) 111 is represented as Enc (KmU, Ku). Any one of the encryption modules (not shown) of the content encryption module 44 of FIG. In addition, the writing device 2 encrypts a content key Kc using the user key Ku (step S53) and writes the encrypted key to the user area 32 of the memory card. The content key Kc encrypted by Ku's encrypted user in Figure 13 is represented as Enc(Ku, Kc)e. For example, the encryption is performed by a first encryption module 48. Further, the writing device 2 encrypts the content using the content key Kc (step S54) and writes the encrypted content into the user area 32 of the memory card i. In Figure 13, the content key is used. Encrypted content is expressed as

Enc (Ku, content). For example, the encryption is performed by a second encryption module hook. 2. Decryption Method Next, a decryption method will be explained with reference to FIG. Figure 14 is a block diagram of a memory card i and a reading device 3, which specifically shows the flow of information and processing necessary for decryption. As shown in Fig. 14, the reading device 3 performs the verification process and key exchange as if it were cooperating with the memory card during the encryption process. The current program is executed by the CPU 50 and the second verification module S3. Then, the reading device 3 reads the user key Enc (Kmu, Ku) from the security area 31 of the memory card 1 and decrypts it using a media-specific secret Kmu stored in itself. The encrypted key (step S55), thereby obtaining the user key Ku. The decryption is performed by the decryption module (not shown) of the 154867.doc • 37-201203092 in the content decryption module 54 of FIG. 2 . In addition, the readout slot 3 reads the encrypted content Enc (Ku, Kc) from the memory card in the user area 32 and decrypts the encrypted content key using the user secret KU. (Step S56), thereby obtaining a content secret record KC. For example, the Bu-Decryption Module 59 performs the decryption. Next, the reading device 3 reads the content Enc (Kc, content) encrypted from the memory card with one of the user areas 32 (step S57), thereby obtaining an internal example 5, by a second decryption mode Group 6〇 performs the decryption. In addition, the recorded data can be read a certain number of times without overwriting the 'reading data' to the private area 30. Therefore, the error occurred in the read data can be used. In this case, since writing is not performed, deterioration of the recording element can be prevented. This is the same as that described in the second embodiment. 3. Effect of the third embodiment The above-mentioned method can be applied to Encrypting and decrypting the content. However, the third embodiment is merely illustrative and various suitable methods may be used. Further, the media identifier IDm of the memory card 1 may be generated based on the first unique Shenkun Taidou bucket 5fl. Specifically, after the program of FIG. 3 described in the 6th embodiment of the present invention, the first saved woman &Λ上弟# has information to process the media saved in the memory card i. The identifier IDm. Alternatively, a J may newly generate a media identifier IDm based on the first unique information. Alternatively, the Ganji L* has shai-specific information available as a media identifier 1Dm. Step to increase the protection of the content. In addition' The writing device can record the serial number assigned to each writing device, the time, and the value obtained by serializing the serial number in the digital signature, 154867.doc -38.201203092 and can use the value as a Media identifier. This enables the writing device to prevent its media identifier from accidentally matching the value of another media. [Fourth Embodiment] Next, a recording apparatus according to a fourth embodiment will be explained. The fourth embodiment is such that the recording apparatus is applied to the solid state drive (SSD) of the first embodiment to the third embodiment. Fig. 15 is a block diagram showing the configuration of an SSD 100. As shown in Fig. 15, The SSD 100 includes a plurality of NAND flash memories (NAND memory) 10 for data storage, a DRAM 101 for data transfer or a work area, and one of the drive control circuits 1 and 2 for controlling the data. a power supply circuit 103. The drive control circuit 112 outputs a control signal for controlling a status display LED externally provided by the SSD 100. The ferroelectric random access memory (FeRAM) can be used instead of the DRAM. The SSD 100 via one The interface (ATA I/F) transmits data to and receives data from a host device (such as a personal computer). The SSD 100 transmits data to a debug unit via an RS232C interface (RS232C I/F). Receiving data from the debug unit. The power supply circuit 103 receives an external power source and uses the external power source to generate a plurality of internal power sources. The internal power sources are supplied to respective portions of the SSE). The circuit 103 detects the rise of the external power source and generates a power-on reset signal. The power-on reset signal is sent to the drive control circuit 102. Fig. 16 is a block diagram showing the configuration of the drive control circuit 1-2. The drive control circuit 102 includes a data access bus 104, a first circuit 154867.doc • 39-201203092 control bus 105 and a second circuit control bus 1〇6. A processor 1〇7, which controls one of the entire drive control circuits 102, is connected to the first circuit control busbar 105. The boot ROM 108, which is one of the boot programs stored for various management programs (Fw: Firmware), is also connected to the first circuit control bus 1 to 5 via a ROM controller 109. Further connected to the first circuit control bus 105 is a clock controller 丨丨〇, the clock controller 110 receives a power-on reset signal from the power supply circuit 1 且 3 and supplies a reset signal and One clock signal to each part. The second circuit control bus 106 is coupled to the first circuit control bus 105. Connected to the second circuit control bus 丨06, a state display signal is supplied to one of the status display LEDs, and the 〇 circuit (111) and the RS232C interface are connected to one another. 112. An interface controller (ΑΤΑ controller) 113, a first error checking and correction (ECC) circuit 114, a NAND controller 115, and a DRAM controller 119 are connected to the data access busbars 1 and 4 A circuit controls both busses 105. The UI controller 113 transmits data to and receives data from the host device via the UI interface. The SRAM 120 is connected to the data access bus 104 via the SRAM controller 121 as one of the data work areas. The NAND controller 115 includes a NAND interface circuit (NAND I/F) 118 interfacing with four NAND memories, a second ECC circuit 117, and a DMA controller 116 for DMA transfer control. The DMA controller 116 performs access control between the NAND memory and the DRAM. Figure 17 is a block diagram showing the configuration of the processor 1 〇7. The processor 154867.doc • 40-201203092 107 includes a data management module 122, a command processing module 123, a security management module 124, a boot loader 125, an initialization management module 126, and a Error support module 127. The data management module 122 controls data transfer between the NAND memory and the DRAM and various functions related to a NAND chip via the first ECC circuit. The command processing module 123 cooperates with the data management module 122 to execute a data transfer program via the UI controller 11 3 and the DRAM controller 119. The security management module 124 cooperates with the data management module 122 and the command processing module 123 to manage various security information. The security management module 124 executes programs executed by, for example, the first verification module 20 and the second verification module set forth in the second embodiment. The boot loader 125 loads various management programs (FWs) from the NAND memory 10 into the SRAM 120 when the power is turned on. The initialization management module 126 initializes various controllers/circuits in the drive control circuit 102. The debug support module 127 processes debug data supplied externally via the RS232C interface. 18 is a perspective view of one of the portable computers 200 in which the SSD 100 is embedded. The portable computer 200 includes a body 201 and a display unit 202. The display unit 202 includes a display housing 203 and a display device 204 disposed in the display housing 203. The body 201 includes a bottom plate 205, a keyboard 206, and a touch pad 207 serving as an indicator device. The backplane 205 houses a main circuit board, an optical disk drive (ODD) unit, a card slot, the SSD 100, and the like. 154867.doc •41 · 201203092 The peripheral wall of the bottom plate 205 is provided in the card slot, and an opening 208 is formed to face the card slot. The outside of the plate 205 passes through the opening 208 to be a Ca. The peripheral wall user can insert the additional device from the bottom into the card slot. The SSD 100 can be used by being embedded in the portable computer 2

The reading device 3 can be embedded in the portable computer. The portable computer 2 can be used as a content recording and reproducing device such as a movie distributed through the Internet and the like. Figure 19 shows a system configuration of the portable computer 2 embedded with the SSD 100. The portable computer 200 includes a CPU 301, a north bridge 3, a main memory 303, a video controller 304, an audio controller 3〇5, a south bridge 306, a BIOS-ROM 307, and an SSD 100. An ODD unit 308, an embedded controller/keyboard controller ic (ec/KBC) 309, and a network controller 310. The CPU 301 (which is a processor for controlling the operation of the portable computer 200) performs an operation system (OS) loaded from the SSD 1 to the main memory 3〇3. Further, when the ODD unit 308 enables execution of at least one of a reading program and a writing program on the mounted optical disc, the CPU 301 executes the program. In addition, the 〇卩1; 301 also executes a system based input/output system (BIOS) stored in the 81〇5-11〇]^ 3 07. The system BIOS is used to control one of the hardware of the portable computer 200. I54867.doc • 42· 201203092 The north bridge 302 is connected to a local bus of the CPU 301 and a bridge device of the south bridge 306. The north bridge 302 houses a memory controller that performs an access operation of the main memory 303. The Northbridge 302 also has the functionality to communicate with the video controller 304 via an accelerated graphics port (AGP) bus and further communicate with the audio controller 305. The main memory 303 temporarily stores a program or data and functions as a work area of the CPU 301. For example, the main memory 303 is a DRAM. The video controller 304 controls a video reproduction controller used as one of the display units (LCDs) 202 of one of the display monitors of the portable computer 200. The audio controller 305 controls an audio reproduction controller of one of the speakers 3 11 of the portable computer 200. The south bridge 306 controls each device on a low pin count (LPC) bus and a device on a peripheral component interconnect (PCI) bus. The south bridge 306 also controls the SSD 100 via the UI interface for storing various types of software and data storage units. The portable computer 200 accesses the SSD 100 in sections. A write command, a read command, a flash command, and the like are input to the SSD 100 via the UI interface. The south bridge 306 also has the function of performing access control of the BIOS-ROM 307 and the ODD unit 308. The EC/KBC 309 is a single-chip microcomputer for embedded controllers for power management and for controlling one of the keyboard (KB) 206 and the touchpad 207. 154867.doc •43·201203092 Keyboard controller has been integrated To the single-chip microcomputer. The 忒EC/KBC 309 has a function of turning on or off the power of the portable computer 2 according to a user operation of a power button 312. The network controller 310 is a communication device that communicates with an external network, such as the Internet. In the above configuration, at least one of the NAND flash memories 1 显示 shown in Fig. 15 has a dedicated area 3 (and a security area 31). Next, the writing device 2 and the reading device 3 access the dedicated area (and the Ahn area 3 1) of the SSD and determine whether the SSD is a legal recording medium. The first embodiment to the third embodiment are applicable not only to the SSD but also to other recording media, including a hard disk or a DVD. [Modification and Others] As described above, the recording apparatus according to the first to fourth embodiments includes: a memory 11 capable of recording data; and a controller 10' which divides the memory 11 into one The first area 30 and the second area 31 control the recording of the data. The controller 1 writes the externally supplied data into the first area 3 without performing error correction coding on the externally supplied data and address conversion of a logical address to a physical address. The data is subjected to error correction coding and address conversion and the resulting data is written into the second area 31. Further, the write tape set 2 according to the first to fourth embodiments includes a supply module 47 and a processing module 46. The processing module 46 writes the data provided by the providing module 47 into the first area 30 of the recording device 1, reads the written data, compares the written data with the read data, and is different based on the former. The information on the latter's data location (No. 154, 867.doc • 44 - 201203092) is written into the second area 31 of the recording device 1. Further, the reading device 3 according to the first to fourth embodiments includes a supply module providing module 57, a processing module 56 and a comparison module 58. The processing module 56 writes the data provided by the providing module 57 into the first area 3 of the recording device 1, reads the written data, compares the written data with the read data, and is based on the former The data location different from the latter produces the first information (second unique information). The comparison module reads the second information (the first unique information) from the second area 31 of the recording device 1, compares the second information with the second information and the first information generated by the processing module 56 (second Specifically, based on the comparison result, it is determined whether the recording device i is a legal recording device. With the above configuration, unauthorized use of content material can be suppressed. The embodiment is not limited to the above embodiments and can be variously modified. As described above, the recording device is not limited to an SD memory card and may be other recording medium capable of storing data. The semiconductor memory is not limited to a NAND flash memory and is referred to as an ugly flash memory or other suitable semiconductor suffix. The recording device 1jt is not limited to a card device and can be applied to a plurality of 5 recorded media, including a magnetic recording medium and an optical recording medium. In addition, Xiao Wang should generate a certain number of errors when generating the first unique information and the second unique information. Therefore, it is preferable to use a method in which the error is more likely to occur in the private area 31 and the user area η as a method of writing data to or reading from the dedicated area 30. One method of data. Although in one of the embodiments, 154867.doc •45·201203092 one method that does not perform wear averaging, ECC processing, or randomization has been described as one example of the above method, another method may be applied. For example, in a flash memory, the voltage applied to the gate (word line) of a memory cell can be made higher in the dedicated area 30 than the security area 31 and the user area 32. This can increase the stress on the memory cells in the dedicated area 30. In addition, writing data with a series of "i" or "〇" can also increase the error rate. Accordingly, it is possible to use information in which all bits are "1" or all bits are "〇". Alternatively, no less than a specific number of consecutive "1" or "〇" materials may be used. Although in the above embodiment, a kiosk terminal, a content provider or a content reproducing device has been used as an example of the writing device 2, another suitable device may be used. For example #, one of the makers of the memory h can be used as an example of the writer device 2. In this case, the manufacturer writes the first unique information to the memory card 1 and sells the card. One suitable device of the organization of the inner glutinous donor can be used as an example of the writing device 2. In this case, the first-specific information can be written to the memory card 7 purchased by a user via the Internet or the like. The content encryption module 44 is not required when the writing device 2 provides only the first unique information without providing content. In addition, a content reproducing device has been used as the reading. However, another simplification k can be used and the thief is used as an example of the reading device 3. If the -content reproducing device is not used, decryption molding is not required. In addition, the time, the flood season and the ambient temperature are as far as the first 脬 咨 4A J 匕 3 is attached to the special number of signatures. For example, when the time or J54867.doc -46 - 201203092 period is included and since the time or period is included in the signature, the period has been passed - the assumption is not considered - the unique information and the comparison result 'And should be more surely blocked - the period of illegal copying has passed' then the signature verification module 55 can permit the reproduction of the content. Or, at this time, the digital signature can be updated. That is, a new signature can be generated and the newly generated digital signature is written to the recording device. In addition, when the temperature information is included in the chapter (4), the first unique information can be generated in a plurality of degrees. For example, the first unique information generated at a high temperature and the __specific information generated at a low temperature can be recorded in the dedicated area 30. • When the inspection is performed at the reading device 3, the use can be used closer. The current temperature is the first - the first special information. Depending on the situation, first, when the inspection is performed at the reading device 3, the temperature in the digital signature can be checked and the procedure of Figure 4 can be carried out at an ambient temperature at which the temperature is set to U. When the temperature information is included in the digit, a temperature sensor is required in each of the writer device 2 and the reader device 3. Although neither the writing device 2 nor the reading device 3 has a temperature sensor, temperature information can be obtained from another device. For example, in the fourth embodiment, the coffee machine has a temperature sensor. Therefore, in the procedures of Figs. 3 and 4, the temperature measured at the SDD can be output to the writer device 2 and the reading device 3. Further, information about the voltage used to write the data to the dedicated area 3 (e.g., word line voltage) may be included in the digital signature. In this case, in the readout means 3, first, the word line voltage from the digital signature can be checked and data can be written into the dedicated area 30 using the word line voltage. 154867.doc -47- 201203092 Further In the third embodiment, the first special media identifier IDm. However, "the surname t Λ is also used as - using your u ▲, and the first unique information can be used in various applications. In addition, it is included in the first special message and the second unique The content of the information is not limited to the wrong location and may be based on the wrong location - any suitable information specific to the memory card 1. Although certain embodiments have been described, these embodiments are presented by way of example only and are not intended to limit the invention The novel embodiments described herein may be embodied in a variety of other forms; further, various omissions, substitutions and changes in the form of the embodiments described herein can be made without departing from the spirit of the invention. The equivalents are intended to cover such forms or modifications within the scope and spirit of the invention. [FIG. 1] FIG. 1 is a block diagram of a recording device and a writing device according to a first embodiment. Figure 2 is a block diagram of a recording device and a reading device according to the first embodiment; Figure 3 and Figure 4 are respectively for explaining the writing device according to the first embodiment and FIG. 5 and FIG. 6 are respectively a conceptual diagram illustrating a specific example of a writing method and a reading method according to the first embodiment; FIG. 7 is based on the first FIG. 8 and FIG. 9 are block diagrams of a recording apparatus according to a second embodiment; FIG. 10 is a diagram showing a method of controlling the recording apparatus according to the second embodiment. 1 154867.doc -48- 201203092 FIG. 11 is a conceptual diagram of a memory space of the recording apparatus according to the second embodiment; FIG. 12 is a diagram for describing the recording apparatus according to the second embodiment FIG. 13 is a block diagram of a recording apparatus and a writing apparatus according to a third embodiment; FIG. 14 is a recording apparatus and a reading apparatus according to the third embodiment. Figure 15 is a block diagram of a recording apparatus according to a fourth embodiment; Figure 16 is a block diagram of a driving control circuit according to a fourth embodiment of the fourth embodiment, Figure 17 is based on the a block diagram of one of the processors of the four embodiments; Figure 18 is a perspective view of a personal computer according to the fourth embodiment, showing the appearance of a personal computer; and Figure 19 is a block diagram showing an internal configuration of one of the personal computers according to the fourth embodiment. Explanation of main component symbols] 1 Memory card. 1-1 Memory card 12 Illegal copy of memory card/memory card 2 Write device 3 Readout device 4 Host device 5 Bus interface 154867.doc -49- 201203092 ίο 10-1 11 12 20 21 22 23 24 25 26 30 30-1 30- 2 31 31- 1 32 32- 1 40 41 42 43 44 Memory controller NAND flash memory data bus first verification module second verification Module write control module logic address to physical address conversion module (L2P processing module) error correction coding module / ECC module wear average control module randomization control module dedicated area dedicated area dedicated area security area Safe area user area user area

CPU generation module first verification module second verification module content encryption module 154867.doc -50- 201203092 45 signature generation module 46 error location information processing module / processing module 46a temporary memory 47 write data Module/providing module 48 first encryption module 49 second encryption module 50 CPU 51 decision module 52 first verification module 53 second verification module 54 content decryption module 55 signature check Wu group 56 Error location information processing module/processing module 56a temporary memory 57 write data providing module/providing module 58 comparison module 59 first decryption module 60 second decryption module 70 SD card interface 71 MPU 72 pre-recording Media Copy Protection (CPRM) Circuit 73 ROM 74 RAM 75 NAND Interface 154867.doc -51 - 201203092 76 Internal Bus 80 Memory Cell Array 81 Column Decoder 82 Page Buffer 83 NAND Interface 90 Content 91 First Unique Information 92 Media Unique key 93 second unique information 100 SSD 101 DRAM 102 drive control circuit 103 power supply circuit 104 data access bus 105 first circuit control sink Row 106 second circuit control bus 107 processor 108 boot ROM 109 ROM controller 110 clock controller 111 parallel IO (PIO) circuit 112 serial IO (SIO) circuit 113 ΑΤΑ interface controller (ΑΤΑ controller) 114 An error check and correction (ECC) circuit 154867.doc -52 - 201203092 115 N AND controller 116 DMA controller 117 second ECC circuit 118 NAND interface circuit (NAND I/F) 119 DRAM controller 120 SRAM 121 SRAM controller 122 Data Management Module 123 ΑΤΑ Command Processing Module 124 Security Management Module 125 Boot Loader 126 Initialization Management Module 127 Debug Support Module 200 Portable Computer 201 Body 202 Display Unit 203 Display Shell 204 Display Device 205 Chassis 206 Keyboard 207 Touchpad 208 Opening 301 CPU 302 North Bridge-53-154867.doc 201203092 303 Main Memory 304 Video Controller 305 Audio Controller 306 South Bridge

307 BIOS-ROM 308 Optical Disc Device (ODD) Unit 309 Embedded Controller/Keyboard Controller IC (EC/KBC) 310 Network Controller 311 Speaker 312 Power Button IDm Media Identifier

Kc content key

Km media key

Kmu media unique key

Ks session key

Ku User Password MKB Media Key Block 154867.doc •54-

Claims (1)

201203092 VII. Patent application scope: 1. A recording device comprising: a memory capable of recording data; and a controller's dividing the memory into a first-region and a second region and controlling the recording of the data , "The controller writes the externally supplied data to the first area _ without performing error correction coding on the externally supplied data and - logical address to physical address translation", and The controller performs error correction coding and address translation on the data, and then writes the resulting data into the second region. 2. A recording apparatus comprising: a delta memory capable of recording data; and a controller dividing the memory into a first area and a second area and controlling recording of the data, wherein The controller writes the content data and the write/read error information about the first area into the second area, and the write or read error information is used to determine whether to permit or prohibit access to the memory. 3. The apparatus of claim 1 or 2, wherein the controller does not perform wear leveling on the first area and perform wear leveling on the second area. 4. The device of claim 1 or 2, wherein the memory comprises a plurality of memory cells each capable of storing data, and the controller writes the meta-data (a natural number of not less than 2) to Each of the memory cells in the first region writes 1^[bit 154867.doc 201203092 metadata (N is not less than 1 and satisfies one of the natural numbers of the expression) to the second region In these memory cells. 5. The device of claim 1 or 2, wherein the memory comprises a plurality of memory cells each capable of storing data, and the controller causes the memory cells in the domain to be stored in a small size=3 level data And causing each of the memory units in the second area to hold 2 levels of data. 6. The device of claim 2, wherein the controller randomizes the data in the second region without randomizing the data in the first region. 7. The device of claim 1, wherein the controller has a -first-operation mode and a second mode of operation, wherein in the first mode of operation, one of the physical addresses of the memory is accepted from the outside - inputting and accessing an area directly designated by the physical address, and in the second mode of operation, accepting the input of the memory from the outside and accessing the funeral knee ##斑& Access ^ An area known by the conversion of the data address into a physical address. 8. A writing device, comprising: a providing module that provides data; and a processing module that writes a first area of the recording device provided by the providing module to the written data... * b The data to be written, the comparison with the data, and the data to be based on the write eight: the data is taken from one of the data locations of the 5 recorded devices in the second area. To the device of claim 9, wherein the processing module performs a plurality of writes, 154867.doc • 2 - 201203092 5 and compares and does not generate a data based on the write and the Read the information in one of the different locations of the data. 10. The device of claim 8, wherein the processing module accesses the UI region by using a physical bit and accesses the second region by using a logical address. -U. The device of claim 8, further comprising: an early sign generating module that generates a digital signature for the asset generated by the processing module and attaches the signature to the information, wherein The processing module writes information attached to the digital signature to the recording device. 12' The device of claim 11 wherein the digital signature comprises - at least one of a date, a time, and an ambient temperature at which the signature is attached. 13. A reading device comprising: a providing module for providing data; and a processing module for writing the data provided by the providing module. In the "first" area of the recorded device, reading the data of the writer, comparing the data written by the 5 Hai and the read data, and generating one of the data based on the written information and the captured data are different from each other The first information of the data location; and a comparison module 'reading the second information from the second area of the recording device, comparing the second information with the first capital generated by the processing module. And determining whether the recording device is an incoming recording device based on the comparison result. & 14. The apparatus of claim 13, wherein the processing module performs a plurality of writes, "selling and comparing and generating no less than a specific number of times based on the write 154867.doc 201203092 The first information of the location where the read data is different from each other. 15. The apparatus of claim 13, wherein the processing module accesses the first region by using a physical address and accesses the second region by using a logical address. The device of claim 13 further comprising: a signature verification module, wherein the verification of the digital signature attached to the second information is positive or not, and determining whether the recording device is a legal record based on the inspection result Device. 17. The apparatus of claim 13, wherein the second information is generated based on information that the data was sent to the first region or failed to read data from the first region and is earlier than the first information. A method of controlling a recording device, comprising: writing data to a first area of a recording device; reading the written data; comparing the written data with the read data And detecting the material and the read data are different from each other; wherein the ''' is based on the detected location of the data to generate the first information; and writing the first information to the recording device In the second area. 19. A method of controlling a recording device, comprising: Writing data to a record|setting a first area towel; reading the written data; comparing the writing A & data with the read # data and the tilting material and the read data are different from each other a data location; the resource generates the first information based on the detected location of the data; reads the 154867.doc from the second region of the recording device, and determines that the plurality of times are written to 20. The 201202392 compares the first The information and the second information are based on whether the recording device is a legal recording device. In the method of claim 18 or 19, the method includes: reading the data and detecting the location of the data, 21. The result is based on the result of multiple detection of the data position As in the method of claim 20, it is entered into the same memory unit, which will have the same address each time. Information written 154867.doc