JP2007088434A - Photovoltaic device - Google Patents

Photovoltaic device Download PDF

Info

Publication number
JP2007088434A
JP2007088434A JP2006219167A JP2006219167A JP2007088434A JP 2007088434 A JP2007088434 A JP 2007088434A JP 2006219167 A JP2006219167 A JP 2006219167A JP 2006219167 A JP2006219167 A JP 2006219167A JP 2007088434 A JP2007088434 A JP 2007088434A
Authority
JP
Japan
Prior art keywords
layer
type layer
conductivity type
lower electrode
transparent conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006219167A
Other languages
Japanese (ja)
Inventor
Toshimitsu Kariya
俊光 狩谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2006219167A priority Critical patent/JP2007088434A/en
Publication of JP2007088434A publication Critical patent/JP2007088434A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/546—Polycrystalline silicon PV cells

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a shape and a manufacturing method of a photovoltaic device made of hydrogenated polycrystalline silicon, which enhances the light collection efficiency and the conversion efficiency while preventing reduction in the open circuit voltage due to texturization. <P>SOLUTION: A photovoltaic device comprises at least a lower electrode, a first-conductivity-type layer made of non-single-crystalline silicon, a second-conductivity-type layer made of polycrystalline silicon, a third-conductivity-type layer made of non-single-crystalline silicon, and an upper electrode. The surface of the lower electrode in contact with the first-conductivity-type layer has a shape interspersed with multiple projections. The lower limit and the upper limit of the density of the projections interspersed on the surface of the lower electrode satisfy the following equations, provided that the thickness of the second-conductivity-type layer is t μm: "lower limit = 0.312 exp(-0.60t) pieces/μm<SP>2</SP>" and "upper limit = 0.387 exp(-0.39t) pieces/μm<SP>2</SP>". <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、光起電力素子、とりわけ光電変換層が多結晶シリコンからなる太陽電池（多結晶シリコン太陽電池）に関するものである。また、本発明は、特に光起電力素子のテクスチャー化に伴う開放電圧の低下を防ぎつつ、短絡電流を向上し、変換効率向上を実現しうる光起電力素子の構造に関するものである。   The present invention relates to a photovoltaic element, in particular, a solar cell (polycrystalline silicon solar cell) in which a photoelectric conversion layer is made of polycrystalline silicon. The present invention also relates to the structure of a photovoltaic device that can improve the short-circuit current and improve the conversion efficiency while preventing a decrease in open-circuit voltage associated with the texturing of the photovoltaic device.

１９９６年スイスのルシャテル大学により、光電変換層が微結晶シリコンからなる太陽電池（微結晶シリコン太陽電池）に関する発表（非特許文献１）がなされてから、微結晶シリコン太陽電池が注目されるようになった。その理由は、光電変換層に微結晶シリコンを用いることにより短絡電流が大きくなり、非晶質シリコンと積層化することで高い変換効率が可能になるからである。さらに、微結晶シリコン太陽電池では、従来非晶質シリコンで問題となっていた光劣化現象も見られなくなった。   In 1996, the University of Lechâtel, Switzerland, announced that a photovoltaic cell with a photoelectric conversion layer made of microcrystalline silicon (microcrystalline silicon solar cell) (Non-Patent Document 1), so that microcrystalline silicon solar cells are attracting attention. became. The reason is that the use of microcrystalline silicon for the photoelectric conversion layer increases the short-circuit current, and high conversion efficiency is possible by stacking with amorphous silicon. Further, in the microcrystalline silicon solar cell, the photodegradation phenomenon that has been a problem with conventional amorphous silicon is no longer observed.

ここで、微結晶シリコンとは、粒径の小さなシリコンを意味する。微結晶シリコンと多結晶シリコンの関係については、微結晶シリコンと多結晶シリコンとを明確に区別する考え方と、微結晶シリコンを多結晶シリコンの一種と捉える考え方とがある。前者の考え方は、微結晶シリコンは多結晶シリコンの理論の延長線上に乗らない材料であるとの理解に基づくものであり、後者の考え方は、微結晶シリコンは粒径の小さな多結晶シリコンであるとの理解に基づくものである。   Here, microcrystalline silicon means silicon having a small particle size. Regarding the relationship between microcrystalline silicon and polycrystalline silicon, there are a concept of clearly distinguishing microcrystalline silicon and polycrystalline silicon and a concept of capturing microcrystalline silicon as a kind of polycrystalline silicon. The former concept is based on the understanding that microcrystalline silicon is a material that does not fall on the extension of the theory of polycrystalline silicon. The latter concept is that microcrystalline silicon is polycrystalline silicon with a small grain size. It is based on the understanding.

なお、本明細書及び特許請求の範囲では、後者の考え方を採用することにする。したがって、本明細書及び特許請求の範囲では、「多結晶シリコン」は「微結晶シリコン」を当然に含む概念である。なお、本明細書および特許請求の範囲における多結晶とは、多数の結晶粒が集合してできあがったものである。そして、本明細書および特許請求の範囲においては、平均結晶粒径が５ｎｍ〜１００μｍのものを多結晶とする。そのうち、平均結晶粒径が５ｎｍ〜５μｍのものを微結晶と呼ぶ。平均結晶粒径は、Ｘ線回折の（２２０）ピークの半値幅からＳｃｈｅｒｒｅｒの式を用いて計算することにより決定することができる。   In the present specification and claims, the latter concept is adopted. Therefore, in the present specification and claims, “polycrystalline silicon” is a concept that naturally includes “microcrystalline silicon”. Note that the term “polycrystal” in the present specification and claims refers to a collection of a large number of crystal grains. In the present specification and claims, those having an average crystal grain size of 5 nm to 100 μm are defined as polycrystals. Among them, those having an average crystal grain size of 5 nm to 5 μm are called microcrystals. The average crystal grain size can be determined by calculating from the full width at half maximum of the (220) peak of X-ray diffraction using the Scherrer equation.

また、非特許文献２には、下部電極の凹凸と開放電圧（Ｖｏｃ）との関係、及び凹凸形状と粒界発生のメカニズムとの関係についての考察が記載されている。   Non-Patent Document 2 describes the relationship between the unevenness of the lower electrode and the open circuit voltage (Voc) and the relationship between the unevenness shape and the mechanism of grain boundary generation.

平坦な基板上には、多結晶シリコンが基板面にほぼ垂直に成長するため、結晶粒界は基板面にほぼ垂直に発生する。この場合、基板面にほぼ垂直な方向に移動する光キャリアは、結晶粒界をほとんど横切らない。一方、凹凸基板の上では、多結晶シリコンは凹凸の傾斜面にほぼ垂直に成長するため、隣り合う傾斜面から発生した結晶どおしがぶつかり合い、ランダムな方向に多数の結晶粒界が発生する。この場合、光キャリアはこの多数の結晶粒界を通過しなければならないため、Ｖｏｃと曲線因子（Ｆ．Ｆ．）の低下が生じるのである。   Since polycrystalline silicon grows substantially perpendicular to the substrate surface on a flat substrate, the crystal grain boundary is generated substantially perpendicular to the substrate surface. In this case, optical carriers that move in a direction substantially perpendicular to the substrate surface hardly cross the crystal grain boundary. On the other hand, on the concavo-convex substrate, polycrystalline silicon grows almost perpendicular to the concavo-convex inclined surface, so that crystals generated from adjacent inclined surfaces collide with each other, and a large number of grain boundaries are generated in random directions. To do. In this case, since the optical carrier has to pass through the large number of crystal grain boundaries, the Voc and the fill factor (FF) are reduced.

以上のように、多結晶シリコン太陽電池に適したテクスチャー構造の下部電極を用いる場合、結晶成長を同時に考慮する必要がある。   As described above, when using a lower electrode having a texture structure suitable for a polycrystalline silicon solar cell, it is necessary to consider crystal growth at the same time.

次に、特許文献１には、下部電極の凹凸形状を規定することによって多結晶シリコンの（２２０）配向性を制御する技術が開示されている。この方法によれば、下部電極として酸化錫と酸化亜鉛を使用して、Ｖｏｃ ０．５２５Ｖ Ｊｓｃ ２２．８ｍＡ／ｃｍ２ 変換効率８．４４％の結果を得ている。しかし、この方法においても短絡電流はさほど大きくなく、光収集効率が十分であるとは言えない。 Next, Patent Document 1 discloses a technique for controlling the (220) orientation of polycrystalline silicon by defining the uneven shape of the lower electrode. According to this method, the result of Voc 0.525V Jsc 22.8 mA / cm 2 conversion efficiency 8.44% was obtained by using tin oxide and zinc oxide as the lower electrode. However, even in this method, the short-circuit current is not so large, and it cannot be said that the light collection efficiency is sufficient.

また、特許文献２には、基板表面角度を規定することによって変換効率を向上させる技術が開示されている。この技術は、下部電極（明細書中には裏電極層と記載）の多角錐の傾斜角度を８°から４０°としていることから、粒界発生に伴うリーク電流を抑えることができるものの、開放電圧は平坦基板ほど高いものにはならないと考えられる。さらに、下部電極が上記の形状をなし、かつ結晶質シリコン層（明細書中には半導体層と記載）が厚いため、上部電極層（明細書中には透明導電膜と記載）が平坦になっており、光収集効率が十分であるとは考えにくい。   Patent Document 2 discloses a technique for improving the conversion efficiency by defining the substrate surface angle. In this technology, since the inclination angle of the polygonal pyramid of the lower electrode (described as the back electrode layer in the specification) is set to 8 ° to 40 °, the leakage current caused by the generation of the grain boundary can be suppressed. The voltage is considered not to be as high as that of a flat substrate. Furthermore, since the lower electrode has the above shape and the crystalline silicon layer (described as a semiconductor layer in the specification) is thick, the upper electrode layer (described as a transparent conductive film in the specification) becomes flat. It is difficult to think that the light collection efficiency is sufficient.

特許文献３には、基板上にレーザー法、フォトリソグラフィー法により突起を形成し、該突起部上のみに非晶質シリコンを形成し、次に熱ＣＶＤ法で該非晶質シリコンを核として多結晶シリコン層を成長させる技術が開示されている。しかしレーザー法、フォトリソグラフィー法は非常に高価な工程であり、光起電力素子のコストアップになると考えられる。
Ｍａｔｅｒｉａｌ Ｒｅｓｅａｒｃｈ Ｓｏｃｉｅｔｙ Ｓｙｍｐｏｓｉｕｍ Ｐｒｏｃｅｅｄｉｎｇｓ ｖｏｌ．４２０ １９９６“ＯＮ ＴＨＥ ＷＡＹ ＴＯＷＡＲＤＳ ＨＩＧＨ ＥＦＦＩＣＩＥＮＣＹ ＴＨＩＮ ＦＩＬＭ ＳＩＬＩＣＯＮ ＳＯＬＡＲ ＣＥＬＬＳ ＢＹ ＴＨＥ ＭＩＣＲＯＭＯＲＰＨ ＣＯＮＣＥＰＴ”Ｊ．Ｍｅｉｅｒ，Ａ．Ｓｈａｈ ｅｔ．ａｌ． シャープ技報 第８３号２００２年８月「シリコン結晶薄膜太陽電池」 特開２００２−１５１７１５公報 特開２００２−２９９６６０公報 特許第２７７１６６７号公報 In Patent Document 3, protrusions are formed on a substrate by a laser method or a photolithography method, amorphous silicon is formed only on the protrusions, and then polycrystalline by using the amorphous silicon as a nucleus by a thermal CVD method. A technique for growing a silicon layer is disclosed. However, the laser method and the photolithography method are very expensive processes, and it is considered that the cost of the photovoltaic device is increased.
Material Research Society Symposium Proceedings vol. 420 1996 "ON THE WAY TOWARDS HIGH EFFICIENCY THIN FILM SILICON SOLAR CELLS BY THE MICROMORPH CONCEPT" J. Meier, A.M. Shah et. al. Sharp Technical Report No. 83 August 2002 "Silicon Crystalline Thin Film Solar Cell" JP 2002-151715 A JP 2002-299660 A Japanese Patent No. 2771667

本発明は、下部電極上にシリコン系薄膜を積層してなる光起電力素子、とりわけ多結晶シリコン層をｉ層（光電変換層）とする光起電力素子に関するものである。本発明の目的は、光起電力素子のテクスチャー化に伴う開放電圧の低下を防ぎつつ、短絡電流を向上し、変換効率向上を実現しうる光起電力素子の構造を提供することである。   The present invention relates to a photovoltaic element formed by laminating a silicon-based thin film on a lower electrode, and more particularly to a photovoltaic element having a polycrystalline silicon layer as an i layer (photoelectric conversion layer). The objective of this invention is providing the structure of the photovoltaic element which can improve a short circuit current and can implement | achieve conversion efficiency improvement, preventing the fall of the open circuit voltage accompanying texturing of a photovoltaic element.

本発明は、下部電極と、非単結晶シリコンからなる第１の導電型層と、多結晶シリコンからなる第２の導電型層と、非単結晶シリコンからなる第３の導電型層と、上部電極とを少なくとも有する光起電力素子において、前記下部電極の前記第１の導電型層との接触面が、複数の突起が点在する形状をなしており、前記下部電極表面に点在する突起の密度の下限値および上限値が、前記第２の導電型層の膜厚をｔμｍとしたときに、
下限値＝０．３１２ｅｘｐ（−０．６０ｔ）個／μｍ２
上限値＝０．３８７ｅｘｐ（−０．３９ｔ）個／μｍ２
であることを特徴とする光起電力素子である。 The present invention includes a lower electrode, a first conductive type layer made of non-single crystal silicon, a second conductive type layer made of polycrystalline silicon, a third conductive type layer made of non single crystal silicon, In the photovoltaic device having at least an electrode, a contact surface of the lower electrode with the first conductive type layer has a shape in which a plurality of protrusions are scattered, and the protrusions scattered on the surface of the lower electrode When the film thickness of the second conductivity type layer is t μm, the lower limit and the upper limit of the density of
Lower limit = 0.312exp (−0.60 t) / μm 2
Upper limit value = 0.387exp (-0.39t) number / μm 2
It is a photovoltaic device characterized by being.

また、本発明は、前記光起電力素子において、前記第３の導電型層の前記上部電極との接触面が、複数の上に凸な曲面を有していることを特徴とする光起電力素子である。   In the photovoltaic device, the contact surface of the third conductivity type layer with the upper electrode has a plurality of upwardly curved surfaces. It is an element.

また、本発明は、前記光起電力素子において、前記下部電極が、反射層、第１の透明導電層、及び第２の透明導電層を有し、前記第２の透明導電層が前記第１の導電型層と接し、かつ前記突起が前記第２の透明導電層の表面に存在することを特徴とする光起電力素子である。   In the photovoltaic device, the lower electrode may include a reflective layer, a first transparent conductive layer, and a second transparent conductive layer, and the second transparent conductive layer may be the first transparent conductive layer. The photovoltaic element is in contact with the conductive type layer, and the protrusion is present on the surface of the second transparent conductive layer.

また、本発明は、前記光起電力素子において、前記第３の導電型層が複数の層からなり、前記第２の導電型層と接する層が水素化非晶質シリコンからなるバッファー層であることを特徴とする光起電力素子である。   In the photovoltaic device, the third conductive type layer may be a buffer layer in which the third conductive type layer is formed of a plurality of layers and the layer in contact with the second conductive type layer is formed of hydrogenated amorphous silicon. This is a photovoltaic device characterized by the above.

また、本発明は、前記光起電力素子において、前記下部電極が電析法で形成した酸化亜鉛からなる層を含むことを特徴とする光起電力素子である。   The present invention is also the photovoltaic element, wherein the lower electrode includes a layer made of zinc oxide formed by an electrodeposition method.

本発明によれば光起電力素子、とりわけ多結晶シリコン太陽電池の光収集効率向上により短絡電流密度及び開放電圧が向上する。また、この２つの作用により変換効率が向上する。   According to the present invention, the short-circuit current density and the open-circuit voltage are improved by improving the light collection efficiency of a photovoltaic device, particularly a polycrystalline silicon solar cell. Further, the conversion efficiency is improved by these two actions.

以下に図を用いて、本発明を実施するための最良の形態の例について詳細に説明するが、本発明の光起電力素子はこれにより何ら限定されるものではない。   Hereinafter, an example of the best mode for carrying out the present invention will be described in detail with reference to the drawings. However, the photovoltaic element of the present invention is not limited thereto.

図１および図２は本発明の光起電力素子の一例を示す模式的な断面図である。図１は下部電極の第１の導電型層と接する表面が平滑な面に複数の突起が点在する形状を有する光起電力素子の例を示すものである。本例の光起電力素子１００は、基板１０１、その上に形成された下部電極１１０、第１の導電型層１０５、第２の導電型層１０６、第３の導電型層１０７、上部電極１０８、集電電極１０９で構成される。下部電極１１０は単一の層であってもよいし、図１に示すように複数の層からなる積層構造であってもよい。   1 and 2 are schematic cross-sectional views showing an example of the photovoltaic element of the present invention. FIG. 1 shows an example of a photovoltaic device having a shape in which a plurality of protrusions are scattered on a surface having a smooth surface in contact with the first conductivity type layer of the lower electrode. The photovoltaic element 100 of this example includes a substrate 101, a lower electrode 110 formed thereon, a first conductivity type layer 105, a second conductivity type layer 106, a third conductivity type layer 107, and an upper electrode 108. The current collector electrode 109 is configured. The lower electrode 110 may be a single layer or may be a laminated structure including a plurality of layers as shown in FIG.

以下に、各部の詳細を説明する。基板１０１は光起電力素子１００の支持体としての機能を有するものなら何でも良いが、ガラス、ステンレス、樹脂やこれらのシート状のものなどが好ましい。また、下部電極の一部又は全部が基板の役割を果たしても良い。この場合、基板１０１は存在しないことになる。下部電極１１０の少なくとも一部には、電極としての機能を有する程度の抵抗率の低い材料を用いる。該下部電極の第１の導電型層と接する表面は、平滑な面に複数の突起が点在する形状を有している。また、図１に示す例では、下部電極はＡｇ、Ａｕ、Ａｌなどの金属からなる反射層１０２、ＺｎＯなどからなる第１透明導電層１０３、ＺｎＯなどからなる第２の透明導電層１０４により構成される。図１に示す例では、突起部は第２の透明導電層の第１の導電型層と接する表面に形成されている。ここで、第１の透明導電層は基板面に対してほぼ垂直にｃ軸が配向していることが好ましい。   Details of each unit will be described below. The substrate 101 may be anything as long as it has a function as a support for the photovoltaic element 100, but glass, stainless steel, resin, or a sheet thereof is preferable. Further, part or all of the lower electrode may serve as a substrate. In this case, the substrate 101 does not exist. For at least a part of the lower electrode 110, a material having a low resistivity enough to function as an electrode is used. The surface of the lower electrode in contact with the first conductivity type layer has a shape in which a plurality of protrusions are scattered on a smooth surface. In the example shown in FIG. 1, the lower electrode is composed of a reflective layer 102 made of a metal such as Ag, Au, or Al, a first transparent conductive layer 103 made of ZnO or the like, and a second transparent conductive layer 104 made of ZnO or the like. Is done. In the example shown in FIG. 1, the protrusion is formed on the surface of the second transparent conductive layer that is in contact with the first conductive type layer. Here, the first transparent conductive layer preferably has a c-axis oriented substantially perpendicular to the substrate surface.

反射層、第１の透明導電層はスパッタリング法などにより形成できる。第１の透明導電層をスパッタリング法で形成した場合には、第１の透明導電層のｃ軸を基板面に対してほぼ垂直に配向させることが容易となる。一方、第２の透明導電層は電析法などにより形成することができる。   The reflective layer and the first transparent conductive layer can be formed by a sputtering method or the like. When the first transparent conductive layer is formed by a sputtering method, it becomes easy to orient the c axis of the first transparent conductive layer almost perpendicularly to the substrate surface. On the other hand, the second transparent conductive layer can be formed by an electrodeposition method or the like.

第２の透明導電層の膜厚が薄い場合は、突起部の成長が十分とはならず、膜厚が厚い場合は、突起部がいたるところで成長し、従来の凹凸基板と変わらないものとなってしまう。図５は第２の透明導電層の膜厚と突起部の密度との関係を示したものである。この図から、膜厚の増加とともに突起密度が増加していることがわかる。膜厚の増加とともに突起密度が増加するメカニズムは以下のとおりであると考えられる。   When the thickness of the second transparent conductive layer is thin, the growth of the protrusions is not sufficient, and when the film thickness is large, the protrusions grow everywhere and are not different from the conventional uneven substrate. End up. FIG. 5 shows the relationship between the film thickness of the second transparent conductive layer and the density of the protrusions. From this figure, it can be seen that the protrusion density increases as the film thickness increases. The mechanism by which the protrusion density increases with increasing film thickness is considered as follows.

図５の元になっている実験例では、第１の透明導電層はスパッタリング法で形成されているため、基板面に対してほぼ垂直にｃ軸が配向している。また、本実験例では第２の透明導電層は電析法で形成しており、第２の透明導電層のうち第１透明導電層との界面に近い、形成の初期段階の層は第１の透明導電層の配向と同じ配向を有している。一方、第２の透明導電層の成長が進行するうちに、異なる面方位を有する核が発生し、図６または図７に示すように、表面の突起５０１を形成するようになる。そのため、第２の透明導電層の膜厚が増加するにつれ、突起密度が増加すると考えられる。   In the experimental example that is the basis of FIG. 5, the first transparent conductive layer is formed by the sputtering method, and therefore the c-axis is oriented substantially perpendicular to the substrate surface. In the present experimental example, the second transparent conductive layer is formed by electrodeposition, and the first transparent conductive layer of the second transparent conductive layer that is close to the interface with the first transparent conductive layer is the first layer. The transparent conductive layer has the same orientation as that of the transparent conductive layer. On the other hand, as the growth of the second transparent conductive layer progresses, nuclei having different plane orientations are generated, and surface protrusions 501 are formed as shown in FIG. Therefore, it is considered that the protrusion density increases as the thickness of the second transparent conductive layer increases.

そこで、突起の密度を精度よく制御するために、第２の透明導電層を形成する初期段階では電流密度を下げて核発生を抑え、平滑な表面を形成し、その後電流密度を上げて核発生を促進させて表面上に突起を形成することが好ましい。ここで、本特許請求の範囲および本明細書において、「突起」とは、周囲より高く突き出ている部分のことである。具体的には、下部電極の凹凸を平均化した平面を仮想して、その平面に垂直な断面に現れる突起の頂点の角度が２０度以上７０度以下の範囲内にあるもののことである。突起の形状は角錐、円錐またはこれらに類似する形状が好ましく、突起の高さは第２の導電型層の膜厚の１／１００以上、１／５以下が好ましい範囲である。第１の導電型層はＮ型またはＰ型の導電性を示す非単結晶シリコンからなる。このような非単結晶シリコンとしては、水素化非晶質シリコンまたは水素化多結晶シリコンが好ましい。第１の導電型層は単一の層であってもよいし、水素化非晶質シリコンまたは水素化多結晶シリコンが積層された構造であってもよい。この層を形成するには、通常ＲＦプラズマＣＶＤ法またはＶＨＦプラズマＣＶＤ法が使用されるが、これに限定されない。第１の導電型層の膜厚は、通常５ｎｍから２０ｎｍである。なお、図１は下部電極の第１の導電型層との接触面が、平滑な面に突起を点在させた形状であるが、下部電極の表面の形状は前述した定義を有する突起が点在していれば、突起部以外の部分は平滑でなくても良い。例えば、上に凸な曲面からなる形状でも良く、下に凸な曲面からなる形状であっても良い。なお、下部電極の第１の導電型層との接触面が下に凸の曲面からなる形状を有しているもののうち、下に凸の曲面が連結した形状であるものを図２に示す。   Therefore, in order to accurately control the density of the protrusions, in the initial stage of forming the second transparent conductive layer, the current density is lowered to suppress nucleation, a smooth surface is formed, and then the current density is raised to raise the nucleation. It is preferable to promote protrusions to form protrusions on the surface. Here, in the claims and the specification, the “projection” refers to a portion protruding higher than the surroundings. Specifically, it is assumed that a plane obtained by averaging the unevenness of the lower electrode is hypothesized and the angle of the apex of the protrusion appearing in the cross section perpendicular to the plane is in the range of 20 degrees to 70 degrees. The shape of the protrusion is preferably a pyramid, a cone, or a shape similar to these, and the height of the protrusion is preferably in the range of 1/100 or more and 1/5 or less of the film thickness of the second conductivity type layer. The first conductivity type layer is made of non-single-crystal silicon exhibiting N-type or P-type conductivity. Such non-single crystal silicon is preferably hydrogenated amorphous silicon or hydrogenated polycrystalline silicon. The first conductivity type layer may be a single layer or a structure in which hydrogenated amorphous silicon or hydrogenated polycrystalline silicon is stacked. In order to form this layer, an RF plasma CVD method or a VHF plasma CVD method is usually used, but it is not limited thereto. The film thickness of the first conductivity type layer is usually 5 nm to 20 nm. In FIG. 1, the contact surface of the lower electrode with the first conductivity type layer is a shape in which protrusions are scattered on a smooth surface, but the shape of the surface of the lower electrode is a protrusion having the above-described definition. As long as it exists, parts other than a projection part do not need to be smooth. For example, the shape may be a curved surface that is convex upward, or may be the shape that is a curved surface that is convex downward. FIG. 2 shows a shape in which the contact surface of the lower electrode with the first conductivity type layer has a shape of a downwardly convex curved surface, and a shape in which the downwardly convex curved surface is connected.

第２の導電型層としては、実質的にイントリンジックな導電型を示す水素化多結晶シリコンが好適に用いられる。第２の導電型層としてはＰ−や、Ｎ−の導電性を示す水素化多結晶シリコンを用いてもよい。この層は光キャリアを発生する層であるから、欠陥準位密度が十分低いことが要求される。この層を形成するには、通常プラズマＣＶＤ法が使用され、中でも周波数の高い、ＶＨＦプラズマＣＶＤ法、マイクロ波プラズマＣＶＤ法が好ましい。その理由は、周波数が低いとプラズマ中のイオンエネルギーが上がり、膜成長表面へのイオンダメージが増大し、結晶化が阻害されるためと考えられる。非特許文献３にあるように、水素化多結晶シリコンは基板表面に垂直に結晶成長する性質がある。そのため、平滑面のない通常の凹凸基板では結晶粒の衝突に起因した欠陥の発生を防ぐことが困難である。しかし、本発明の光起電力素子における下部電極は、突起部が点在しており、突起部以外の部分が平滑もしくは平滑に近い形状であるため、上記欠陥の発生を防ぐことができる。したがって、本発明の光起電力素子は通常の凹凸基板を使用した光起電力素子よりも高い開放電圧と曲線因子を有する。また下部電極表面に凹凸が少ないので、以下の３つの点で有利である。
１）下部電極内での光路長の拡大が抑制できる。
２）下部電極表面での反射が増大する。
３）下部電極内部での光閉じ込めが抑制できる。
これらの効果により、本発明の光起電力素子は有効に光を吸収することができる。 As the second conductivity type layer, hydrogenated polycrystalline silicon having a substantially intrinsic conductivity type is preferably used. As the second conductivity type layer P - and, N - it may be used hydrogenated polysilicon exhibiting conductivity of. Since this layer is a layer that generates optical carriers, the defect level density is required to be sufficiently low. In order to form this layer, plasma CVD is usually used, and among them, high frequency VHF plasma CVD and microwave plasma CVD are preferable. The reason is considered to be that when the frequency is low, the ion energy in the plasma increases, ion damage to the film growth surface increases, and crystallization is inhibited. As described in Non-Patent Document 3, hydrogenated polycrystalline silicon has the property of crystal growth perpendicular to the substrate surface. Therefore, it is difficult to prevent the occurrence of defects due to the collision of crystal grains with a normal concavo-convex substrate having no smooth surface. However, since the lower electrode in the photovoltaic device of the present invention is interspersed with protrusions and the portions other than the protrusions have a smooth or nearly smooth shape, the occurrence of the defects can be prevented. Therefore, the photovoltaic element of the present invention has a higher open-circuit voltage and a fill factor than a photovoltaic element using a normal concavo-convex substrate. Further, since the surface of the lower electrode is less uneven, it is advantageous in the following three points.
1) Expansion of the optical path length in the lower electrode can be suppressed.
2) Reflection on the lower electrode surface increases.
3) Light confinement inside the lower electrode can be suppressed.
Due to these effects, the photovoltaic device of the present invention can absorb light effectively.

なお、第２の導電型層の膜厚をｔμｍとしたときの突起密度の好適な範囲の下限値および上限値は以下である。
下限値＝０．３１２ｅｘｐ（−０．６０ｔ）個／μｍ２
上限値＝０．３８７ｅｘｐ（−０．３９ｔ）個／μｍ２
突起密度がこの範囲内にあることで、第２の導電型層の結晶性を向上させることができる。なお、これらの数式の導き方などについては後ほど実施例で詳細に述べる。 In addition, the lower limit value and upper limit value of the preferable range of the protrusion density when the film thickness of the second conductivity type layer is t μm are as follows.
Lower limit = 0.312exp (−0.60 t) / μm 2
Upper limit = 0.387exp (−0.39 t) / μm 2
When the protrusion density is within this range, the crystallinity of the second conductivity type layer can be improved. In addition, how to derive these mathematical formulas will be described in detail later in Examples.

また本発明の好適な光起電力素子の作製方法では、前述したような下部電極上に、プラズマＣＶＤ法により、第１の導電型層、第２の導電型層の順に形成している。このような本発明の好適な光起電力素子の作製方法によると、上部電極と第３の導電型層との接触面は複数の上に凸な曲面を有するようになる。また、本発明の好適な光起電力素子の作製方法によると、水素化多結晶シリコン層である第２の導電型層と第３の導電型層との接触面も複数の上に凸な曲面を有することとなる。しかし、本発明の要件である下部電極を用いず、従来の下部電極上に同じくプラズマＣＶＤ法を用いて水素化多結晶シリコン層を形成しても、同じような表面形状にはならない。この理由はプラズマＣＶＤ法で水素化多結晶シリコン層を形成すると下部電極に垂直に（１１０）面が成長することと関係していると考えられるが、そのメカニズムは不明である。本発明に好適に使用される水素化多結晶シリコンは、比較的低温、より具体的には３５０℃以下で形成されたものであるため、結晶粒界の多くは水素で終端されたものである。したがって、ダングリングボンドなどの欠陥が非常に少なく、キャリアの再結合が抑制される。   In the preferred method for producing a photovoltaic device of the present invention, the first conductive type layer and the second conductive type layer are formed in this order on the lower electrode as described above by plasma CVD. According to such a preferable method for producing a photovoltaic element of the present invention, the contact surface between the upper electrode and the third conductivity type layer has a plurality of upwardly curved surfaces. Further, according to the preferred method for manufacturing a photovoltaic device of the present invention, the contact surface between the second conductive type layer and the third conductive type layer, which are hydrogenated polycrystalline silicon layers, has a plurality of upwardly convex curved surfaces. It will have. However, even if a hydrogenated polycrystalline silicon layer is formed on the conventional lower electrode by the same plasma CVD method without using the lower electrode which is a requirement of the present invention, the surface shape is not the same. The reason for this is considered to be related to the growth of the (110) plane perpendicular to the lower electrode when the hydrogenated polycrystalline silicon layer is formed by plasma CVD, but the mechanism is unknown. Since hydrogenated polycrystalline silicon suitably used in the present invention is formed at a relatively low temperature, more specifically, 350 ° C. or less, most of the grain boundaries are terminated with hydrogen. . Therefore, there are very few defects such as dangling bonds, and recombination of carriers is suppressed.

第３の導電型層は第１の導電型層とは逆の導電型を有するものである。第３の導電型層としては水素化非晶質シリコンまたは水素化多結晶シリコンが好ましい。第３の導電型層を形成するには、通常ＲＦプラズマＣＶＤ法またはＶＨＦプラズマＣＶＤ法が使用される。膜厚は、通常５ｎｍから２０ｎｍが好ましい。   The third conductivity type layer has a conductivity type opposite to that of the first conductivity type layer. The third conductivity type layer is preferably hydrogenated amorphous silicon or hydrogenated polycrystalline silicon. In order to form the third conductivity type layer, an RF plasma CVD method or a VHF plasma CVD method is usually used. The film thickness is usually preferably 5 nm to 20 nm.

第１の導電型層、第２の導電型層、第３の導電型層はそれぞれが複数の層で構成されていても良い。そのような例としては、例えば、第３の導電型層が複数の層からなり、それらのうち、前記第２の導電型層と接する層が水素化非晶質シリコンからなるバッファー層である場合などである。また、第１の導電型層が複数の層からなり、それらの層のうち、第２の透明導電層と接する層がバッファー層である場合には、このバッファー層の導電型が第１の導電型層の他の部分の導電型と異なる場合であったとしても、本発明及び本明細書中では第１の導電型層の一部であることとする。なお、バッファー層の厚さは１０ｎｍ程度が好ましい。   Each of the first conductivity type layer, the second conductivity type layer, and the third conductivity type layer may be composed of a plurality of layers. As such an example, for example, the third conductivity type layer is composed of a plurality of layers, and the layer in contact with the second conductivity type layer is a buffer layer made of hydrogenated amorphous silicon. Etc. Further, when the first conductivity type layer is composed of a plurality of layers, and the layer in contact with the second transparent conductive layer is the buffer layer, the conductivity type of the buffer layer is the first conductivity type. Even if it is different from the conductivity type of the other part of the mold layer, it is assumed that it is a part of the first conductivity type layer in the present invention and this specification. The thickness of the buffer layer is preferably about 10 nm.

上部電極の材料としては透明かつ導電率が高いものを使用する。このような材料としては、例えばＩＴＯ、ＺｎＯ、ＳｎＯ２などが挙げられ、中でもＩＴＯが好ましい。上部電極はスパッタリング法または真空蒸着法により形成することが好ましい。また、波長５５０ｎｍの光の反射を防止するように上部電極の膜厚を設定することが好ましい。通常、上部電極の膜厚は、６０ｎｍから７０ｎｍ程度の第１反射防止条件となるように設定する。本例では、上部電極は第３の導電型層表面全面に設けることを前提として、透明かつ導電率の高い電極（透明電極）を使用している。しかしながら、第３の導電型層がハイドープシリコン層などの十分に抵抗率が低い層である場合には、上部電極を第３の導電型層表面全てに設ける必要はなくなる。その場合、第３の導電型層表面に部分的に設けられた集電電極を上部電極とすることが好ましい。なお、第３の導電型層の抵抗率の大小を問わず、上部電極として透明電極と集電電極とを併用しても構わない。 As the material of the upper electrode, a transparent material having high conductivity is used. Examples of such a material include ITO, ZnO, SnO 2 and the like, and ITO is particularly preferable. The upper electrode is preferably formed by sputtering or vacuum evaporation. Moreover, it is preferable to set the film thickness of the upper electrode so as to prevent reflection of light having a wavelength of 550 nm. Usually, the film thickness of the upper electrode is set to satisfy the first antireflection condition of about 60 nm to 70 nm. In this example, a transparent electrode with high conductivity (transparent electrode) is used on the premise that the upper electrode is provided on the entire surface of the third conductivity type layer. However, when the third conductivity type layer is a layer having a sufficiently low resistivity such as a highly doped silicon layer, it is not necessary to provide the upper electrode on the entire surface of the third conductivity type layer. In that case, it is preferable to use the current collecting electrode partially provided on the surface of the third conductivity type layer as the upper electrode. Note that a transparent electrode and a collecting electrode may be used in combination as the upper electrode regardless of the resistivity of the third conductivity type layer.

本発明の好適な光起電力素子の作製方法によると、本発明の光起電力素子は、上部電極と第３の導電型層との接触面は複数の上に凸な曲面を有することとなる。したがって以下の３つの点で有利である。
４）第２の導電型層内での光路長の拡大ができる。
５）上部電極表面での反射が減少する。
６）第２の導電型層内部での光閉じ込めが増大できる。
これらの効果により、本発明の好適な光起電力素子は、有効に光を吸収することができる。 According to the preferred method for manufacturing a photovoltaic device of the present invention, the contact surface between the upper electrode and the third conductivity type layer of the photovoltaic device of the present invention has a plurality of upwardly curved surfaces. . Therefore, it is advantageous in the following three points.
4) The optical path length in the second conductivity type layer can be increased.
5) Reflection on the upper electrode surface is reduced.
6) Light confinement inside the second conductivity type layer can be increased.
Due to these effects, the preferred photovoltaic element of the present invention can effectively absorb light.

集電電極１０９は発生した光起電力による電流を効率的に集める機能を果たし、光入射方向からみると櫛形形状をなす。集電電極は抵抗率の低い材料であるＡｇ、Ｃｕ、Ａｌなどを用い、スパッタリング法、真空蒸着法などの方法を使用して形成することができる。銀ペーストなどの導電性ペーストをスクリーン印刷することにより、集電電極を形成してもよい。   The current collecting electrode 109 has a function of efficiently collecting current generated by the generated photovoltaic force, and has a comb shape when viewed from the light incident direction. The current collecting electrode can be formed by using a low resistivity material such as Ag, Cu, Al or the like and using a method such as sputtering or vacuum deposition. The current collecting electrode may be formed by screen printing a conductive paste such as a silver paste.

以上は、基板上に、下部電極、第１の導電型層、第２の導電型層、第３の導電型層、上部電極、集電電極の順に積層した光起電力素子の作製方法の例である。この光起電力素子では上部電極から基板の方向へ光が入射する。なお、本例では、反射層を下部電極の一部としているが、本発明の別の例では反射層が上部電極の一部となっていても良い。反射層が上部電極の一部となっている例としては、基板から上部電極の方向に光が入射する素子構造とする場合が挙げられる。この例では、基板上に、下部電極、第１の導電型層、第２の導電型層、第３の導電型層、反射層を含む上部電極の順に、各層を形成する。この場合、光は基板から入射し、基板、下部電極、第１の導電型層、第２の導電型層、第３の導電型層、上部電極の順に到達する。したがって、基板と下部電極は透明でなければならない。また、いずれの場合においても、素子がタンデム構造（ｐｉｎ接合等の半導体接合が複数直列化した構造）となっていても良い。そのようなタンデム構造となっている場合、下部電極と接する導電型層を第１の導電型層、前記第１の導電型層に接する導電型層を第２の導電型層、上部電極に接する導電型層を第３の導電型層と呼ぶこととする。なお、本発明の光起電力素子を用いて、一部の光が透過する太陽電池（いわゆるシースルー太陽電池）を形成する場合、反射層は設けない。   The above is an example of a method for manufacturing a photovoltaic element in which a lower electrode, a first conductive type layer, a second conductive type layer, a third conductive type layer, an upper electrode, and a collecting electrode are stacked in this order on a substrate. It is. In this photovoltaic element, light enters from the upper electrode toward the substrate. In this example, the reflective layer is part of the lower electrode, but in another example of the present invention, the reflective layer may be part of the upper electrode. As an example in which the reflective layer is a part of the upper electrode, there is an element structure in which light enters from the substrate in the direction of the upper electrode. In this example, each layer is formed on a substrate in the order of a lower electrode, a first conductivity type layer, a second conductivity type layer, a third conductivity type layer, and an upper electrode including a reflective layer. In this case, light enters from the substrate and reaches the substrate, the lower electrode, the first conductivity type layer, the second conductivity type layer, the third conductivity type layer, and the upper electrode in this order. Therefore, the substrate and the lower electrode must be transparent. In any case, the element may have a tandem structure (a structure in which a plurality of semiconductor junctions such as pin junctions are connected in series). In such a tandem structure, the conductive layer in contact with the lower electrode is in contact with the first conductive layer, the conductive layer in contact with the first conductive layer is in contact with the second conductive layer, and the upper electrode. The conductive type layer will be referred to as a third conductive type layer. In addition, when forming the solar cell (what is called a see-through solar cell) which a part of light permeate | transmits using the photovoltaic element of this invention, a reflection layer is not provided.

以下に本発明の光起電力素子の実施例を示すが、以下の実施例で本発明の内容が限定されるものではない。   Examples of the photovoltaic device of the present invention are shown below, but the content of the present invention is not limited by the following examples.

（実施例１）
図１の光起電力素子を以下のような手順で作製した。大きさ８０ｃｍ×３０ｃｍ、厚さ０．１５ｍｍで、表面が平滑なステンレス製の基板を酸洗浄、有機洗浄した。ＤＣマグネトロンスパッタ法を用いて、洗浄した基板上にＡｇからなる厚さ３００ｎｍの反射層を形成した。その反射層の上にＺｎＯからなる厚さ０．１μｍの第１の透明導電層を形成した。形成条件を表１にまとめて示した。 Example 1
The photovoltaic element shown in FIG. 1 was produced by the following procedure. A stainless steel substrate having a size of 80 cm × 30 cm and a thickness of 0.15 mm and a smooth surface was subjected to acid cleaning and organic cleaning. Using a DC magnetron sputtering method, a 300 nm thick reflective layer made of Ag was formed on the cleaned substrate. A 0.1 μm thick first transparent conductive layer made of ZnO was formed on the reflective layer. The formation conditions are summarized in Table 1.

次に電析法にて第２の透明導電層を形成した。まずは浴槽に純水を満たし、硝酸亜鉛の濃度が０．１ｍｏｌ／ｌ、デキストリンの濃度が０．１ｇ／ｌとなるように硝酸亜鉛とデキストリンをそれぞれ添加し、温度を８３℃とした。温度が安定したところで浴槽内に第１の透明導電層の形成工程が終了した基板を浸漬し、予め浴槽内に設けた亜鉛板からなる対向電極にプラス電圧を印加し、電流密度が７ｍＡ／ｃｍ２となるように調節した。第１の透明導電層上に厚さ０．２μｍのＺｎＯからなる第２の透明導電層を形成したところで電源を切り、第２の透明導電層の形成を終了させた。温風乾燥装置で十分に乾燥を行い、第２透明導電層中の水分を除去した後、電子顕微鏡を用いて突起の密度を計数したところ、０．４７個／μｍ２であることが分かった。 Next, a second transparent conductive layer was formed by electrodeposition. First, the bath was filled with pure water, and zinc nitrate and dextrin were added so that the concentration of zinc nitrate was 0.1 mol / l and the concentration of dextrin was 0.1 g / l, and the temperature was 83 ° C. When the temperature is stabilized, the substrate after the first transparent conductive layer forming step is immersed in the bathtub, a positive voltage is applied to the counter electrode made of a zinc plate provided in the bathtub in advance, and the current density is 7 mA / cm. It was adjusted to be 2 . When the second transparent conductive layer made of ZnO having a thickness of 0.2 μm was formed on the first transparent conductive layer, the power supply was turned off to finish the formation of the second transparent conductive layer. After sufficiently drying with a hot air dryer and removing the water in the second transparent conductive layer, the density of the protrusions was counted using an electron microscope and found to be 0.47 / μm 2 . .

次にＲＦプラズマＣＶＤ法、ＶＨＦプラズマＣＶＤ法を用いて第１の導電型層、第２の導電型層、第３の導電型層を、真空状態を継続したまま同じ真空チャンバー内で形成した。形成条件を表２にまとめて示した。   Next, the first conductive type layer, the second conductive type layer, and the third conductive type layer were formed in the same vacuum chamber while the vacuum state was maintained by using the RF plasma CVD method and the VHF plasma CVD method. The formation conditions are summarized in Table 2.

Figure 2007088434
Figure 2007088434

Figure 2007088434
Figure 2007088434

第３の導電型層を形成した後、電子顕微鏡で第３の導電型層の断面形状を調べたところ、図１のように複数の上に凸な曲面を有していることが分かった。次に第３の導電型層上にＩＴＯからなる上部電極をＤＣマグネトロンスパッタ法で形成した。さらに電子顕微鏡で上部電極の断面形状を調べ、図１のように複数の上に凸な曲面を有していることを確認した。形成条件を表１に示す。次に上部電極まで形成した基板を５ｃｍ×５ｃｍの大きさに切断し、切断後の基板それぞれの上部電極上に櫛形電極がパターン化されたマスクを乗せて膜厚３００ｎｍの集電電極を真空蒸着した。以上で本実施例の光起電力素子の製造工程を終了した。ソーラーシミュレーターを用いて光起電力素子の太陽電池特性を測定したところ、平均特性は表３のような結果となった。また切断部付近を電子顕微鏡で観察したところ、膜剥がれは発生していなかった。   After forming the third conductivity type layer, the cross-sectional shape of the third conductivity type layer was examined with an electron microscope. As a result, it was found that a plurality of upwardly curved surfaces were formed as shown in FIG. Next, an upper electrode made of ITO was formed on the third conductivity type layer by DC magnetron sputtering. Further, the cross-sectional shape of the upper electrode was examined with an electron microscope, and it was confirmed that the upper electrode had a plurality of convex curved surfaces as shown in FIG. Table 1 shows the formation conditions. Next, the substrate formed up to the upper electrode is cut into a size of 5 cm × 5 cm, and a collector electrode having a thickness of 300 nm is deposited on the upper electrode of each of the cut substrates by vacuum deposition. did. Thus, the manufacturing process of the photovoltaic element of this example was completed. When the solar cell characteristics of the photovoltaic device were measured using a solar simulator, the average characteristics were as shown in Table 3. Further, when the vicinity of the cut portion was observed with an electron microscope, no film peeling occurred.

Figure 2007088434
Figure 2007088434

（比較例１）
図４に示す従来の光起電力素子を製造した。ここで、図４のうち、３００は従来の光起電力素子、３０１は基板、３０２は反射層、３０３は第１の透明導電層、３０５は第１の導電型層、３０６は第２の導電型層、３０７は第３の導電型層、３０８は上部電極、３０９は集電電極、３１０は下部電極を示している。実施例１において第２の透明導電層を形成しない他は実施例１と同様な方法で光起電力素子を製造し、測定した。その結果、その平均特性は表３のようになった。第１の透明導電層を形成し終わったところで、表面の電子顕微鏡観察を行ったところ、第１の透明導電層表面は目視で図４のように平滑な表面をしていた。第３の導電型層、上部電極を形成し終わったところで、第３の導電型層および上部電極の断面形状を電子顕微鏡観察したところ、第３の導電型層および上部電極の断面形状は図４に示すように平滑な表面であることが分かった。また、切断部付近を電子顕微鏡で観察したところ、９６枚中、５枚に膜剥がれが発生していた。 (Comparative Example 1)
A conventional photovoltaic device shown in FIG. 4 was produced. Here, in FIG. 4, 300 is a conventional photovoltaic device, 301 is a substrate, 302 is a reflective layer, 303 is a first transparent conductive layer, 305 is a first conductive type layer, and 306 is a second conductive layer. The mold layer, 307 is a third conductivity type layer, 308 is an upper electrode, 309 is a collecting electrode, and 310 is a lower electrode. A photovoltaic element was produced and measured in the same manner as in Example 1 except that the second transparent conductive layer was not formed in Example 1. As a result, the average characteristics are as shown in Table 3. When the formation of the first transparent conductive layer was completed, the surface was observed with an electron microscope. The surface of the first transparent conductive layer was visually smooth as shown in FIG. When the third conductive type layer and the upper electrode were formed, the cross-sectional shapes of the third conductive type layer and the upper electrode were observed with an electron microscope. It was found that the surface was smooth as shown in FIG. Moreover, when the vicinity of the cut portion was observed with an electron microscope, film peeling occurred in 5 of 96 sheets.

（比較例２）
図３に示す従来の光起電力素子を製造した。ここで、図３のうち、２００は従来の光起電力素子、２０１は基板、２０２は反射層、２０３は第１の透明導電層、２０５は第１の導電型層、２０６は第２の導電型層、２０７は第３の導電型層、２０８は上部電極、２０９は集電電極、２１０は下部電極を示している。比較例１において第１の透明導電層の膜厚を１．０μｍとして表面に密な凹凸を形成した以外は比較例１と同様な方法で光起電力素子を製造し、測定した。 (Comparative Example 2)
A conventional photovoltaic device shown in FIG. 3 was produced. Here, in FIG. 3, 200 is a conventional photovoltaic device, 201 is a substrate, 202 is a reflective layer, 203 is a first transparent conductive layer, 205 is a first conductive type layer, and 206 is a second conductive layer. The mold layer, 207 is a third conductivity type layer, 208 is an upper electrode, 209 is a collecting electrode, and 210 is a lower electrode. A photovoltaic device was manufactured and measured in the same manner as in Comparative Example 1 except that the thickness of the first transparent conductive layer in Comparative Example 1 was 1.0 μm and dense irregularities were formed on the surface.

第１の透明導電層を形成し終わったところで、表面の電子顕微鏡観察を行ったところ、第１の透明導電層表面は図３のような形状であり、従来のような平滑部がない凹凸形状であることが分かった。また、第３の導電型層、上部電極を形成し終わったところで、第３の導電型層および上部電極の断面形状を電子顕微鏡で観察した。第３の導電型層および上部電極の断面形状は図３に示すような形状であった。すなわち、第３の導電型層および上部電極の表面は、第１の透明導電層に存在するような凹凸形状を有しておらず、ほぼ平滑な表面であることが分かった。また、切断部付近を電子顕微鏡で観察したところ、膜剥がれは発生していなかった。   When the surface of the first transparent conductive layer was observed after the first transparent conductive layer was formed, the surface of the first transparent conductive layer had a shape as shown in FIG. It turns out that. Further, when the third conductive type layer and the upper electrode were formed, the cross-sectional shapes of the third conductive type layer and the upper electrode were observed with an electron microscope. The cross-sectional shapes of the third conductivity type layer and the upper electrode were as shown in FIG. That is, it was found that the surfaces of the third conductive type layer and the upper electrode did not have the uneven shape as in the first transparent conductive layer, and were substantially smooth surfaces. Further, when the vicinity of the cut portion was observed with an electron microscope, no film peeling occurred.

実施例１、比較例１、比較例２のＶｏｃ（開放電圧）、Ｊｓｃ（短絡電流）、Ｆ．Ｆ．（フィルファクター）、変換効率を表３に示した。これらの値は測定値の平均値としている。表３から、実施例１では、比較例１や比較例２と比較して、Ｊｓｃ及び変換効率の向上を実現していることがわかった。また、分光感度測定を行ったところ、実施例１の光起電力素子は比較例１、比較例２の光起電力素子よりも全波長域で感度が高いことが分かった。これは前記１）から６）の光学的効果が効いているものと考えられる。   Voc (open circuit voltage), Jsc (short circuit current), F. of Example 1, Comparative Example 1, and Comparative Example 2. F. (Fill factor) and conversion efficiency are shown in Table 3. These values are average values of the measured values. From Table 3, it was found that in Example 1, compared with Comparative Example 1 and Comparative Example 2, Jsc and conversion efficiency were improved. Further, when the spectral sensitivity measurement was performed, it was found that the photovoltaic element of Example 1 was higher in sensitivity in the entire wavelength region than the photovoltaic elements of Comparative Example 1 and Comparative Example 2. This is considered that the optical effects 1) to 6) are effective.

（実験例１）
実施例１において第２の透明導電層の膜厚を変えた光起電力素子を多数作製した。その結果を図８に示す。図５、図６との関連から分かるように、電析法で作製した第２の透明導電層の膜厚が薄い場合は、下部電極上の突起密度が少ないため表面形状の凹凸が少なく、開放電圧、曲線因子は高いものの、十分な光収集効率が得られなかった。さらに第２の透明導電層の膜厚が厚い場合は、下部電極上の突起密度が多いため表面形状の凹凸が多く、十分な光収集効率が得られなかった。以上のように十分な光収集効率を得るためには、突起密度がある範囲にあることが必要であることが分かった。この実験例では第２の導電型層の膜厚が４μｍであったため、好適な突起密度の範囲の下限値は０．２５個／μｍ２、上限値は０．８個／μｍ２であった。 (Experimental example 1)
A large number of photovoltaic elements in which the film thickness of the second transparent conductive layer was changed in Example 1 were produced. The result is shown in FIG. As can be seen from the relationship with FIG. 5 and FIG. 6, when the thickness of the second transparent conductive layer produced by the electrodeposition method is thin, the projection density on the lower electrode is small, so that the surface shape has little unevenness and is open. Although the voltage and fill factor were high, sufficient light collection efficiency could not be obtained. Further, when the thickness of the second transparent conductive layer was large, the projection density on the lower electrode was large, so that the surface shape was uneven, and sufficient light collection efficiency could not be obtained. As described above, in order to obtain sufficient light collection efficiency, it has been found that the protrusion density needs to be within a certain range. In this experimental example, since the film thickness of the second conductivity type layer was 4 μm, the lower limit value of the preferable protrusion density range was 0.25 / μm 2 , and the upper limit value was 0.8 / μm 2 . .

（実験例２）
第２の導電型層の膜厚を変えたときの好適な突起密度の範囲を調べた。突起密度を変化させる方法としては、第２の透明導電層を形成する際、電析条件を２段階に変化させる方法を用いた。すなわち第２の透明導電層を形成する際、形成の初期の段階では電流密度を６ｍＡ／ｃｍ２に設定し、膜厚が５ｎｍになったところで、所望の突起密度に応じて印加する電流密度を調整した。突起密度を多くしたい場合は多くの電流を流し、突起密度を小さくしたい場合は流す電流を小さくした。 (Experimental example 2)
A suitable range of protrusion density when the film thickness of the second conductivity type layer was changed was examined. As a method of changing the protrusion density, a method of changing the electrodeposition conditions in two steps when forming the second transparent conductive layer was used. That is, when forming the second transparent conductive layer, the current density is set to 6 mA / cm 2 at the initial stage of formation, and when the film thickness reaches 5 nm, the current density to be applied according to the desired projection density is set. It was adjusted. When it was desired to increase the protrusion density, a large amount of current was passed.

第２の導電型層（ｉ層）の膜厚と突起密度の好適な範囲を図９に示す。ここで、各ｉ層膜厚において、突起密度を変化させたときに得られる変換効率の最大値を１としたときに、変換効率０．９５以上を達成している突起密度を好適な範囲として、各ｉ層膜厚における突起密度の下限値と上限値をプロットした。そして、このプロットを曲線近似することにより、第２の導電型層の膜厚をｔμｍとしたときの突起密度の好適な範囲の下限値と上限値を、それぞれ以下のように定めた。
下限値＝０．３１２ｅｘｐ（−０．６０ｔ）個／μｍ２
上限値＝０．３８７ｅｘｐ（−０．３９ｔ）個／μｍ２ FIG. 9 shows a preferable range of the film thickness and protrusion density of the second conductivity type layer (i layer). Here, in each i-layer film thickness, when the maximum value of the conversion efficiency obtained when the protrusion density is changed is 1, the protrusion density achieving a conversion efficiency of 0.95 or more is set as a suitable range. The lower limit value and the upper limit value of the protrusion density in each i-layer film thickness were plotted. Then, by approximating the plot to a curve, a lower limit value and an upper limit value of a preferable range of the protrusion density when the film thickness of the second conductivity type layer was t μm were determined as follows.
Lower limit = 0.312exp (−0.60 t) / μm 2
Upper limit = 0.387exp (−0.39 t) / μm 2

（実施例２）
本実施例では、第２の導電型層と第３の導電型層の間に水素化非晶質シリコンからなるバッファー層を挿入する以外は全て実施例１と同様にして、図１に示す光起電力素子を作製した。このバッファー層は、周波数１３．５６ＭＨｚのＲＦプラズマＣＶＤ法を用い、ＳｉＨ４＝３０ｃｃ、Ｈ２＝２５００ｃｃ、ＲＦ電力２００Ｗ、圧力６００Ｐａ、基板温度２００℃、膜厚１０ｎｍの条件にて形成した。本実施例で作製した光起電力素子の平均特性は、実施例１で作製した光起電力素子の平均特性と比較して開放電圧と曲線因子が向上し、変換効率は実施例１で作製した光起電力素子の平均特性の１．０５倍になった。電子顕微鏡を用いて本実施例で作製した光起電力素子の上部電極の断面形状を調べたところ、図１に示すように複数の上に凸な曲面を有していた。 (Example 2)
In this example, the light shown in FIG. 1 was used in the same manner as Example 1 except that a buffer layer made of hydrogenated amorphous silicon was inserted between the second conductivity type layer and the third conductivity type layer. An electromotive force element was produced. This buffer layer was formed using an RF plasma CVD method with a frequency of 13.56 MHz under the conditions of SiH 4 = 30 cc, H 2 = 2500 cc, RF power 200 W, pressure 600 Pa, substrate temperature 200 ° C., and film thickness 10 nm. The average characteristics of the photovoltaic elements produced in this example were improved in open-circuit voltage and fill factor compared to the average characteristics of the photovoltaic elements produced in Example 1, and the conversion efficiency was produced in Example 1. The average characteristic of the photovoltaic element was 1.05 times. When the cross-sectional shape of the upper electrode of the photovoltaic device produced in this example was examined using an electron microscope, it had a plurality of upwardly curved surfaces as shown in FIG.

本発明の光起電力素子の一例を示す模式的な断面図Typical sectional drawing which shows an example of the photovoltaic device of this invention 本発明の光起電力素子の一例を示す模式的な断面図Typical sectional drawing which shows an example of the photovoltaic device of this invention 従来の光起電力素子の一例を示す模式的な断面図Typical sectional drawing which shows an example of the conventional photovoltaic device 従来の光起電力素子の一例を示す模式的な断面図Typical sectional drawing which shows an example of the conventional photovoltaic device 第２の透明導電層の膜厚と突起密度との関係Relationship between film thickness of second transparent conductive layer and protrusion density 第２の透明導電層を含む下部電極の一例を示す断面図Sectional drawing which shows an example of the lower electrode containing a 2nd transparent conductive layer 第２の透明導電層を含む下部電極の一例を示す断面図Sectional drawing which shows an example of the lower electrode containing a 2nd transparent conductive layer 突起密度と太陽電池特性との関係Relationship between protrusion density and solar cell characteristics 第２の導電型層の膜厚と好適な突起密度の上限値、下限値との関係Relationship between the film thickness of the second conductivity type layer and the upper limit value and lower limit value of a suitable protrusion density

符号の説明Explanation of symbols

１００ 光起電力素子
２００、３００ 従来の光起電力素子
１０１、２０１、３０１ 基板
１０２、２０２、３０２ 反射層
１０３、２０３、３０３ 第１の透明導電層
１０４、２０４、３０４ 第２の透明導電層
１０５、２０５、３０５ 第１の導電型層
１０６、２０６、３０６ 第２の導電型層
１０７、２０７、３０７ 第３の導電型層
１０８、２０８、３０８ 上部電極
１０９、２０９、３０９ 集電電極
１１０、２１０、３１０ 下部電極
５０１ 突起 100 Photovoltaic element 200, 300 Conventional photovoltaic element 101, 201, 301 Substrate 102, 202, 302 Reflective layer 103, 203, 303 First transparent conductive layer 104, 204, 304 Second transparent conductive layer 105 , 205, 305 First conductive type layer 106, 206, 306 Second conductive type layer 107, 207, 307 Third conductive type layer 108, 208, 308 Upper electrode 109, 209, 309 Current collecting electrode 110, 210 310 Lower electrode 501 Protrusion

Claims (5)

下部電極と、非単結晶シリコンからなる第１の導電型層と、多結晶シリコンからなる第２の導電型層と、非単結晶シリコンからなる第３の導電型層と、上部電極とを少なくとも有する光起電力素子において、前記下部電極の前記第１の導電型層との接触面が、複数の突起が点在する形状をなしており、前記下部電極表面に点在する突起の密度の下限値および上限値が、前記第２の導電型層の膜厚をｔμｍとしたときに、
下限値＝０．３１２ｅｘｐ（−０．６０ｔ）個／μｍ２
上限値＝０．３８７ｅｘｐ（−０．３９ｔ）個／μｍ２
であることを特徴とする光起電力素子。 At least a lower electrode, a first conductivity type layer made of non-single crystal silicon, a second conductivity type layer made of polycrystalline silicon, a third conductivity type layer made of non-single crystal silicon, and an upper electrode In the photovoltaic device, the contact surface of the lower electrode with the first conductivity type layer has a shape in which a plurality of protrusions are scattered, and the lower limit of the density of the protrusions scattered on the surface of the lower electrode When the film thickness of the second conductivity type layer is t μm
Lower limit value = 0.312exp (-0.60t) number / μm 2
Upper limit = 0.387exp (−0.39 t) / μm 2
A photovoltaic element characterized by the above. 前記第３の導電型層の前記上部電極との接触面が、複数の上に凸な曲面を有していることを特徴とする請求項１に記載の光起電力素子。   2. The photovoltaic element according to claim 1, wherein a contact surface of the third conductivity type layer with the upper electrode has a plurality of upwardly convex curved surfaces. 前記下部電極が、反射層、第１の透明導電層、及び第２の透明導電層を有し、前記第２の透明導電層が前記第１の導電型層と接し、かつ前記突起が前記第２の透明導電層の表面に存在することを特徴とする請求項１または２に記載の光起電力素子。   The lower electrode includes a reflective layer, a first transparent conductive layer, and a second transparent conductive layer, the second transparent conductive layer is in contact with the first conductive type layer, and the protrusion is the first conductive layer. The photovoltaic element according to claim 1, wherein the photovoltaic element is present on the surface of the two transparent conductive layers. 前記第３の導電型層が複数の層からなり、前記複数の層のうち前記第２の導電型層と接する層が水素化非晶質シリコンからなるバッファー層であることを特徴とする請求項１乃至３のいずれか一項に記載の光起電力素子。   The third conductivity type layer is composed of a plurality of layers, and a layer in contact with the second conductivity type layer among the plurality of layers is a buffer layer composed of hydrogenated amorphous silicon. The photovoltaic element as described in any one of 1 thru | or 3. 前記下部電極が電析法で形成した酸化亜鉛からなる層を含むことを特徴とする請求項１乃至４のいずれか一項に記載の光起電力素子。   The photovoltaic device according to claim 1, wherein the lower electrode includes a layer made of zinc oxide formed by an electrodeposition method.
JP2006219167A 2005-08-22 2006-08-11 Photovoltaic device Pending JP2007088434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006219167A JP2007088434A (en) 2005-08-22 2006-08-11 Photovoltaic device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005239766 2005-08-22
JP2006219167A JP2007088434A (en) 2005-08-22 2006-08-11 Photovoltaic device

Publications (1)

Publication Number Publication Date
JP2007088434A true JP2007088434A (en) 2007-04-05

Family

ID=37975060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006219167A Pending JP2007088434A (en) 2005-08-22 2006-08-11 Photovoltaic device

Country Status (1)

Country Link
JP (1) JP2007088434A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009054997A (en) * 2007-07-27 2009-03-12 Semiconductor Energy Lab Co Ltd Method for manufacturing photoelectric conversion device
JP2011009245A (en) * 2009-05-26 2011-01-13 Kaneka Corp Photoelectric converter
JP2011228407A (en) * 2010-04-16 2011-11-10 Kaneka Corp Conductive substrate with transparent conductive layer, and manufacturing method of the same
JP2012142452A (en) * 2010-12-29 2012-07-26 Sanyo Electric Co Ltd Solar cell and solar cell module

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000294812A (en) * 1999-04-07 2000-10-20 Sanyo Electric Co Ltd Photoelectric converter element and its manufacture
JP2001177127A (en) * 1999-12-20 2001-06-29 Nippon Sheet Glass Co Ltd Board for photoelectric conversion device
JP2002151715A (en) * 2000-11-08 2002-05-24 Sharp Corp Thin-film solar cell
JP2002252361A (en) * 2000-11-21 2002-09-06 Nippon Sheet Glass Co Ltd Transparent conducting film, its manufacturing method and photoelectric converter provided with the film
JP2002280590A (en) * 2001-01-12 2002-09-27 Sharp Corp Multi-junction type thin-film solar battery and method for manufacturing the same
JP2003115601A (en) * 2001-02-01 2003-04-18 Canon Inc Method of forming transparent conductive film, method of fabrication for photovoltaic element, transparent conductive film and photovoltaic element
JP2004363544A (en) * 2002-10-30 2004-12-24 Canon Inc Zinc oxide film and photovoltaic element using the same, and forming method of zing oxide
JP2007311825A (en) * 2007-08-06 2007-11-29 Mitsubishi Heavy Ind Ltd Photoelectric conversion device, and method of manufacturing the same

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000294812A (en) * 1999-04-07 2000-10-20 Sanyo Electric Co Ltd Photoelectric converter element and its manufacture
JP2001177127A (en) * 1999-12-20 2001-06-29 Nippon Sheet Glass Co Ltd Board for photoelectric conversion device
JP2002151715A (en) * 2000-11-08 2002-05-24 Sharp Corp Thin-film solar cell
JP2002252361A (en) * 2000-11-21 2002-09-06 Nippon Sheet Glass Co Ltd Transparent conducting film, its manufacturing method and photoelectric converter provided with the film
JP2002280590A (en) * 2001-01-12 2002-09-27 Sharp Corp Multi-junction type thin-film solar battery and method for manufacturing the same
JP2003115601A (en) * 2001-02-01 2003-04-18 Canon Inc Method of forming transparent conductive film, method of fabrication for photovoltaic element, transparent conductive film and photovoltaic element
JP2004363544A (en) * 2002-10-30 2004-12-24 Canon Inc Zinc oxide film and photovoltaic element using the same, and forming method of zing oxide
JP2007311825A (en) * 2007-08-06 2007-11-29 Mitsubishi Heavy Ind Ltd Photoelectric conversion device, and method of manufacturing the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009054997A (en) * 2007-07-27 2009-03-12 Semiconductor Energy Lab Co Ltd Method for manufacturing photoelectric conversion device
JP2011009245A (en) * 2009-05-26 2011-01-13 Kaneka Corp Photoelectric converter
JP2011228407A (en) * 2010-04-16 2011-11-10 Kaneka Corp Conductive substrate with transparent conductive layer, and manufacturing method of the same
JP2012142452A (en) * 2010-12-29 2012-07-26 Sanyo Electric Co Ltd Solar cell and solar cell module
US9425340B2 (en) 2010-12-29 2016-08-23 Panasonic Intellectual Property Management Co., Ltd. Solar cell and solar cell module

Similar Documents

Publication Publication Date Title
US7301215B2 (en) Photovoltaic device
JP3754815B2 (en) Photovoltaic element, photoelectric conversion element, method for producing photovoltaic element, and method for producing photoelectric conversion element
JP5868503B2 (en) Solar cell and method for manufacturing the same
US6750394B2 (en) Thin-film solar cell and its manufacturing method
JP5374250B2 (en) Crystalline silicon solar cell
JP2003179241A (en) Thin film solar cell
JP6857231B2 (en) Crystalline silicon solar cells and their manufacturing methods
JP4193962B2 (en) Solar cell substrate and thin film solar cell
JP4193961B2 (en) Multi-junction thin film solar cell
JP2004260014A (en) Multilayer type thin film photoelectric converter
JP2007088434A (en) Photovoltaic device
JP4248793B2 (en) Method for manufacturing thin film solar cell
JP6990764B2 (en) Solar cells and their manufacturing methods
JP4756820B2 (en) Solar cell
CN116174942A (en) HJT solar cell slice and preparation method thereof
JP2004119491A (en) Method for manufacturing thin film solar battery, and thin film solar battery manufactured thereby
JP2002280590A (en) Multi-junction type thin-film solar battery and method for manufacturing the same
JP5975841B2 (en) Manufacturing method of photovoltaic device and photovoltaic device
JP3710312B2 (en) Photovoltaic element and manufacturing method thereof
JP2004221142A (en) Photovoltaic device and its manufacturing method
JP4193960B2 (en) Solar cell substrate and thin film solar cell
JP2002314109A (en) Unijunction thin film solar cell and its manufacturing method
CN118198169A (en) Solar cell and preparation method thereof
JP5307280B2 (en) Thin film photoelectric conversion element
JP2000252499A (en) Manufacture of thin-film photoelectric conversion device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070614

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20091208

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20100201

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20100630

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20101102

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20110308