JP2007088170A - Group iii-v compound semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a group III-V compound semiconductor element with a desired characteristic by suppressing the diffusion of unnecessary dopant of the group III-V compound semiconductor element, so as to suppress the deterioration of an element characteristic. <P>SOLUTION: The group III-V compound semiconductor element to be formed on a substrate includes a structure where a semiconductor layer with a distortion is interposed between a first semiconductor layer and a second semiconductor layer, where doping is performed in low concentration or the dopant is not doped. The group III-V compound semiconductor element also allows the semiconductor layer with the distortion to be constituted of not less than two laminated bodies. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a III-V group compound semiconductor device, and more particularly, a III-V such as a high-electron mobility transistor, a heterojunction bipolar transistor, etc. The present invention relates to a group compound semiconductor device.

  Group III-V compound semiconductor elements are broadly classified into electronic devices such as high electron mobility transistors and heterojunction bipolar transistors, and optical devices such as semiconductor lasers and light emitting diodes. In these elements, a technique of mixing impurities in order to give polarity to the semiconductor is important. This technique is generally called doping, and the impurity is called a dopant. In the III-V compound semiconductor device, desired device characteristics are realized by appropriately controlling the dopant concentration by doping.

  For example, a high electron mobility transistor includes a layer to which a dopant for supplying electrons is added and a high purity channel layer. Since the channel layer contains almost no dopant, electrons passing through the channel layer hardly collide with the dopant, resulting in high electron mobility. Further, for example, a semiconductor laser has a sandwich structure in which a non-doped semiconductor layer is sandwiched between p-type semiconductors and n-type semiconductors having a polarity by doping, and is joined at the center. A semiconductor layer sandwiched between semiconductors corresponds to a light emitting layer. This light emitting layer is called an active layer, and the layers on both sides of the active layer are called clad layers. The clad layer and the active layer are made of semiconductor materials having different band gaps, and form a double heterojunction. In this double heterojunction, electrons and holes are combined and converted into light efficiently, and the light is confined in the cladding layer and laser oscillation occurs.

  As described above, the III-V compound semiconductor element includes an electronic device and an optical device. Hereinafter, a semiconductor laser will be described as an example from among the optical devices.

  As a conventional semiconductor laser technology, for example, there is a ridge embedded semiconductor laser disclosed in Patent Document 1. The main manufacturing process and element structure of this conventional semiconductor laser will be described with reference to FIGS.

First, as shown in FIG. 4A, an n-type buffer layer 302 is formed on an n-type substrate 301, and an n-type first cladding layer 303, an active layer 304, and a p-type second cladding layer 305 are further formed thereon. And the p-type contact layer 306 are sequentially stacked by using a MOCVD (metal organic chemical vapor deposition) method, and then a SiO ₂ mask 307 is formed on a necessary portion of the stacked body.

  Next, as shown in FIG. 4B, the p-type second cladding layer 305 is etched using an etching solution which is a mixed aqueous solution of sulfuric acid and hydrogen peroxide water, Side surfaces of the mesa portion 308 including the p-type contact layer 306 are formed.

Further, as shown in FIG. 4C, regrowth is performed using the MOCVD method, and an n-type current blocking layer 309 made of n-type GaAs selectively grown by the SiO ₂ mask 307 so as to be in contact with the side surface of the mesa portion 308. Embed.

Finally, as shown in FIG. 4D, the SiO ₂ mask 7 is removed, p-type electrodes 310 and n-type electrodes 311 are formed on the top and bottom of this laminate, and cleaved to divide the chip into ridges. An embedded semiconductor laser can be manufactured.
Japanese Patent Laid-Open No. 7-50446

  There are various problems with the semiconductor laser as described above. First, the dopant diffuses from the second cladding layer to the active layer due to a thermal history or the like, and a crystal defect that becomes a non-radiative recombination center of carriers is formed, so that device characteristics are deteriorated. In addition, the dopant is easily diffused during the operation of the device due to the influence of the injection current and heat generated during the operation, and as a result, the device life is shortened. In addition, the p-type contact layer is doped at a high concentration in order to reduce the resistance. However, the dopant is removed from the contact layer due to the influence of the heat history in crystal growth or the subsequent manufacturing process, the injection current during the device operation, and the heat generation. As a result, the carrier concentration in the contact layer is lowered, the resistance is increased, and the current is difficult to flow.

  The semiconductor laser that is an optical device has been described above as an example, but the same applies to an electronic device. For example, in the case of a high electron mobility transistor, if the dopant enters from the layer to which the dopant is added into the channel layer by diffusion, this dopant prevents the electron from moving, and high mobility cannot be obtained, thereby degrading the device characteristics. End up.

  Accordingly, an object of the present invention is to provide a III-V compound semiconductor device having desired characteristics by suppressing the deterioration of element characteristics by suppressing the diffusion of dopants.

The present invention relates to a group III-V compound semiconductor device formed on a substrate, the first semiconductor layer and the second semiconductor layer doped at a lower concentration than the first semiconductor layer or not doped with the dopant. A III-V group compound semiconductor device having a structure in which a semiconductor layer having strain is interposed between In the present invention, the strained semiconductor layer is preferably composed of two or more stacked bodies. In the present invention, it is desirable that the semiconductor layer having strain is composed of a plurality of layers having different strain amounts. In the present invention, it is preferable that the semiconductor layer having strain is formed by alternately stacking layers having compressive strain and layers having tensile strain. In the present invention, the absolute value of the strain amount of the semiconductor layer having strain is preferably 0.5% or more and 10% or less. In the present invention, the thickness of the strained semiconductor layer is preferably not less than a monomolecular layer thickness and not more than 10 nm. In the present invention, it is preferable that the substrate is GaAs and the semiconductor layer having the strain is In _1−x Ga _x As _1−y P _y (0 ≦ x, y ≦ 1). According to the present invention, the substrate is GaAs, and the semiconductor layer having the strain is made of a binary compound containing a group III element having an atomic radius larger than Ga or a group V element having an atomic radius larger than As. The layer thickness is preferably a monomolecular layer or more. In the present invention, the binary compound is preferably InAs.

  According to the group III-V compound semiconductor device of the present invention, dopant diffusion is suppressed, a designed doping profile can be formed, and original device characteristics can be realized. Therefore, deterioration of crystallinity can be prevented, so that a III-V group compound semiconductor device having a long device lifetime is obtained in the case of a semiconductor laser, and a III-V group compound having a high mobility in the case of a high electron mobility transistor. A semiconductor element is obtained, and a group III-V compound semiconductor element connected to the electrode with low resistance is obtained.

<First semiconductor layer>
The first semiconductor layer is highly doped, and the doping concentration is preferably 2 × 10 ¹⁸ cm ⁻³ or more. The first semiconductor layer mixed with the dopant has polarity, and it can be either an n-type semiconductor or a p-type semiconductor. Further, when the first semiconductor layer is manufactured, the dopant is likely to be gradually diffused from the semiconductor layer to other semiconductor layers due to the influence of heat history, injected current during device operation, and heat generation.

  Examples of the first semiconductor layer include a cladding layer, a contact layer, and a current blocking layer in a ridge buried semiconductor laser. In general, a semiconductor material having a wider band gap than that of the semiconductor material used for the second semiconductor layer is used for the first semiconductor layer.

Examples of the material of the first semiconductor layer include AlGaAs and GaInP. In AlGaAs, by changing the composition of Al, GaInP can change the band gap of each other by changing the composition of In.
<Second semiconductor layer>
The second semiconductor layer is a semiconductor layer having a function in the III-V compound semiconductor element by doping with a dopant having a lower concentration than the first semiconductor layer or not doping at all. The low concentration dopant need not be intentionally doped, and may be caused by dopant diffusion from the first semiconductor layer.

Examples of the second semiconductor layer include an active layer in a ridge buried semiconductor laser, and a channel layer in a high electron mobility transistor. In order to function as the second semiconductor layer, it is desirable that dopants from other semiconductor layers are not diffused as much as possible due to thermal history.
<Strained semiconductor layer>
This is a semiconductor layer in which the interstitial bond is distorted in the semiconductor crystal. A semiconductor layer having strain is a concept including a laminate of two or more layers. In general, a crystal of a semiconductor layer having strain has a higher internal energy than that in the case of no strain. Therefore, when the dopant tries to move between the strained lattices by diffusion, the dopant Atoms need to have greater energy than in the unstrained case. That is, dopant diffusion is less likely to occur in a semiconductor layer having a larger strain.

≪Distortion amount≫
A binary, ternary or quaternary mixed crystal is used for the semiconductor layer having strain. This is because a desired amount of strain can be produced by changing the composition in the mixed crystal.

  For measuring the amount of strain according to the present invention, an X-ray analyzer ATX-E2 for thin film structure evaluation manufactured by Rigaku Corporation was used, and the conditions of X-ray output were measured at 40 kV and 20 mA.

  In addition, the present invention is characterized in that the absolute value of the strain amount of the semiconductor layer having strain is 0.5% or more and 10% or less. Thus, by setting the strain amount of the semiconductor layer having strain to a strain amount of 0.5% or more and 10% or less, the internal energy of the crystal is changed to a high state so that the dopant cannot pass between the lattices. . Alternatively, it cannot be substituted for atoms at lattice positions. When it is less than 0.5%, the effect of preventing dopant diffusion becomes insufficient, and crystallinity is deteriorated by dopant diffusion. On the other hand, if it exceeds 10%, it becomes difficult to form a flat crystal or more without causing misfit dislocations, and the crystallinity of the semiconductor layer is deteriorated. Therefore, by setting the strain amount of the semiconductor layer having strain to 0.5% or more and 10% or less, it is possible to prevent the diffusion of the dopant and the deterioration of the crystallinity. The original characteristics can be realized.

When the material of the semiconductor layer having strain is InGaAs, by adding a little In, strain can be generated while maintaining the same band gap as that of the GaAs contact layer, and diffusion of dopant from the contact layer can be prevented. For example, when In _0.3 Ga _0.7 As is used, the strain amount can be increased to about 2%. At this time, if the crystal growth exceeds 5 nm, misfit dislocation occurs, resulting in a crystal that cannot be used as an element.

If the InGa _x AsP _y mixed crystal (x> 0.9, y> 0.53) is used, the absolute value of the strain amount may be increased to −2% (the strain amount at a thickness of 5 nm) including the sign. It is possible and the effect of suppressing diffusion can be further enhanced.

In the case of the composition of In _0.37 Ga _0.63 As _0.101 P _0.899 , a strain having an absolute value of the strain amount of 0.5% is formed.

  Furthermore, InAs may be used for the semiconductor layer having strain. When an InAs monomolecular layer is used, InAs has a high strain (about 7%), dopant diffusion can be effectively prevented even in a monoatomic layer. Further, the InAs monoatomic layer may be combined with a plurality of unstrained layers. In this case, since the diffusion preventing layer of the dopant can be formed exceeding the critical film thickness, the effect of preventing diffusion is further enhanced. In other words, since the binary compound InAs is formed as a monomolecular layer, an atomic layer made of In having a high local strain is formed in the crystal. Therefore, when the dopant atoms pass through the InAs layer, Be sure to be affected by the high local strain caused by this In atom. Therefore, for example, a strained layer is formed by a mixed crystal such as InGaAs, and the diffusion of dopant can be suppressed more effectively with a thinner film thickness than when local strain is discretely formed in the crystal. It becomes. In this case, the same effect can be obtained by using InSb, GaSb, AlSb or the like in addition to InAs.

≪Thickness of strained semiconductor layer≫
The layer thickness of the strained semiconductor layer is preferably not less than the monomolecular layer thickness and not more than 10 nm. If the thickness of the strained semiconductor layer becomes thinner than the monomolecular layer thickness, it will be insufficient to prevent dopant diffusion, and device characteristics and reliability will deteriorate, and if it becomes thicker than 10 nm, it will exceed the critical thickness. This is because the crystallinity is lowered and the characteristics of the element are deteriorated.

  A semiconductor layer with a small amount of strain is unlikely to cause misfit transition, which will be described later, even if the layer thickness is increased. In addition, if the absolute value of the strain amount of a single layer is 0.5% or more and a layer thickness is about 5 nm or more, it has a diffusion preventing effect. The critical film thickness when the absolute value is 0.5% is preferably 10 nm. When the absolute value is 10%, the critical film thickness is preferably 2 nm.

≪Laminated body in which two or more semiconductor layers are laminated≫
When a semiconductor layer having strain is formed into a stacked body, a greater effect of suppressing diffusion can be obtained than in the case of a single layer. For example, when a semiconductor layer having a strain of A% strain is formed into a laminate, a semiconductor layer having a strain of A% strain is formed, and a semiconductor layer having no strain is stacked thereon, Further, a semiconductor layer having A% strain is stacked thereon.

  In addition, by stacking a plurality of semiconductor layers having different strain amounts, forming a stacked body having various layer thicknesses effectively has a diffusion preventing function. That is, two effects of a diffusion prevention effect due to a high strain amount and a diffusion prevention effect due to a large layer thickness are simultaneously exhibited, and the diffusion of the dopant can be prevented more efficiently. This may be a combination of only layers having compressive strain or a combination of only layers having tensile strain. At this time, it is desirable to select a combination of 0.5 to 4% and 5 to 7% of the absolute value of the strain amount of the laminate.

  In addition, by alternately laminating layers having compressive strain and tensile strain, the strain is compensated as a whole, and the layer thickness can be increased to a range exceeding the theoretical limit film thickness. It can also be obtained. By adjusting the composition by alternately laminating, it is possible to prevent the diffusion of the dopant by creating compression and tension as the strain types and laminating them. Here, it is desirable to laminate two layers or more of a compressive strain layer and a tensile strain layer.

  Furthermore, a combination of layers having different strain amounts, for example, a semiconductor layer having a compressive strain of B% strain and a semiconductor layer having a compressive strain of C% strain may be formed in several cycles as one unit ( B> C). The effect of preventing diffusion due to a high strain amount and the effect of preventing diffusion due to a large film thickness with a small strain amount are combined to provide an advantage of exhibiting a high effect.

≪Band gap of strained semiconductor layer≫
The band gap of the strained semiconductor layer is preferably larger than the band gap of the second semiconductor layer, that is, the active layer. Furthermore, it is desirable that the band gap is as large as that of the first semiconductor layer. This is for example to prevent absorption of light emitted from the active layer when the second semiconductor layer whose dopant is suppressed by the semiconductor layer having distortion in the semiconductor laser is the active layer.

  When the strained semiconductor layer is an InGaAsP mixed crystal, there is a range of selection from a lower limit of about 0.36 eV to an upper limit of about 2 eV in consideration of a band gap that satisfies direct transition. As described above, when the InGaAsP material is used, there is an advantage that the selection range of the band gap is wide and the band gap between the adjacent semiconductor layers can be easily adjusted.

≪Relationship between semiconductor substrate and strained semiconductor layer≫
In the case where GaAs is used for the substrate of the semiconductor element, it is desirable that the semiconductor layer having strain is In _1-x Ga _x As _1-y P _y (0 ≦ x, y ≦ 1). This is because there is an advantage that a desired strain amount can be adjusted by adjusting the composition while maintaining a certain band gap.

When GaAs is used for the substrate of the semiconductor element, it is desirable that the semiconductor layer having strain is made of a binary compound containing a group III element having an atomic radius larger than Ga or a group V element having an atomic radius larger than As. This is because even if it is a monomolecular layer, it has a high diffusion suppressing effect. For the above reason, it is more desirable that the binary compound is InAs.
<Structure of Semiconductor Element Having First Semiconductor Layer, Second Semiconductor Layer, and Strained Semiconductor Layer>
A sandwich state is formed in which a semiconductor layer having a strain is interposed between the first semiconductor layer and the second semiconductor layer, and the dopant of the first semiconductor layer is diffused into the second semiconductor layer. It is preventing. Any part of the III-V compound semiconductor element may have this structure.

  As the III-V compound semiconductor element, there are an electronic device of a high electron mobility transistor or a heterojunction bipolar transistor layer and an optical device such as a semiconductor laser or a diode.

Further, in the semiconductor laser, when the second semiconductor layer is an active layer and the first semiconductor layer is a cladding layer, a non-doping light guide layer is further provided between them, and between the light guide layer and the cladding layer. A semiconductor layer having strain may be provided. As a result, when the dopant diffuses into the guide layer, there is an effect of preventing deterioration of the characteristics of the device due to a defect formed by the dopant becoming a recombination center of light distributed in the guide layer.
<Manufacturing method form 1>
A cross-sectional view of the ridge embedded semiconductor laser of the present invention is shown in FIG. 1, and its manufacturing process is shown in FIG. Hereinafter, the present invention will be described with reference to FIG.

First, as shown in FIG. 2A, an n-type buffer layer 102 is grown on an n-type substrate 101, and an n-type first cladding layer 103, an active layer 104, a strained semiconductor layer 105, A p-type second cladding layer 106 was laminated. Then, after the p-type contact layer 107 is sequentially stacked, a SiO ₂ mask 108 is formed on a necessary portion on the stacked body.

  Next, as shown in FIG. 2B, etching is performed so as to leave only the portion of the thickness h of the p-type second cladding layer 106 using an etching solution, and the p-type second cladding layer 106 and the p-type contact layer are left. A side surface of the mesa portion 109 including the 107 is formed.

Further, as shown in FIG. 2C, regrowth is performed using the MOCVD method, and the n-type current blocking layer 110 selectively grown by the SiO ₂ mask 108 is buried so as to be in contact with the side surface of the mesa portion 109.

Finally, as shown in FIG. 2D, the SiO ₂ mask 108 is removed, and a p-type electrode 111 is formed. On the other hand, an n-type electrode 112 is formed on the back side of the n-type substrate 101. Then, by cleaving the stacked body, it can be divided into chips and a ridge embedded semiconductor laser can be manufactured.

By this manufacturing method, unnecessary diffusion of the dopant is suppressed and high-quality crystallinity can be ensured, so that a III-V group compound semiconductor device having good characteristics and high reliability can be obtained.
<Manufacturing method form 2>
The manufacturing process of the ridge embedded semiconductor according to the present invention is shown in FIG. Hereinafter, the present invention will be described with reference to FIG.

First, as shown in FIG. 3A, an n-type buffer layer 202 is grown on an n-type substrate 201, and an n-type first cladding layer 203, an active layer 204, and a p-type second cladding layer 205 are further formed thereon. Then, the strained semiconductor layer 206 and the p-type contact layer 207 are sequentially stacked, and then a SiO ₂ mask 208 is formed on a necessary portion of the stacked body.

  Next, as shown in FIG. 3B, etching is performed using an etching solution so as to leave a portion of the thickness h of the p-type second cladding layer 205 by 0.3 μm. Side surfaces of the mesa portion 209 including the semiconductor layer 206 having strain and the p-type contact layer 207 are formed.

Further, as shown in FIG. 3C, regrowth is performed using the MOCVD method, and n-type current blocking selectively grown by the SiO ₂ mask 208 (thickness 0.3 μm) so as to be in contact with the side surface of the mesa portion 209. Embed layer 210.

Finally, as shown in FIG. 3D, the SiO ₂ mask 208 is removed and deposited by vapor deposition, and this is patterned by photolithography and etching to form the p-type electrode 211. On the other hand, an n-type electrode 212 is formed on the back side of the n-type substrate 201. Then, by cleaving the stacked body, it can be divided into chips and a ridge embedded semiconductor laser can be manufactured.

  Thus, in the above-described configuration and manufacturing method of the semiconductor laser, the semiconductor layer 206 having strain does not pass the dopant diffusing from the p-type contact layer 207 to the p-type second cladding layer 205, and the p-type contact layer The carrier concentration of 207 is not lowered. Therefore, a doping profile as designed can be formed, the resistance of the p-type contact layer 207 can be kept low, and the original threshold current of the device can be realized.

  A doping profile as designed can be formed by the above manufacturing methods. In each manufacturing method, n-type and p-type semiconductors can be interchanged.

Example 1
A cross-sectional view of the ridge embedded semiconductor laser of the present invention is shown in FIG. 1, and its manufacturing process is shown in FIG. Hereinafter, the present invention will be described with reference to FIG. 1 and FIG.

The crystal growth is performed using the MOCVD method, and the growth conditions are a growth temperature of 750 ° C., a growth pressure of 76 Torr, and V / III (ratio of supply amounts of Group V elements to Group III elements) = 120. . Also, TMG (trimethylgallium) and TMA (trimethylaluminum) were used as group III materials, AsH ₃ (arsine) was used as group V materials, SiH ₄ (silane) and DEZn (diethyl zinc) were used as n-type and p-type dopant materials. . The carrier gas used was H ₂ (hydrogen).

First, as shown in FIG. 2A, an Al _0.5 Ga _0.5 As n-type buffer layer 102 (thickness 0.5 μm) is formed on an n-type substrate 101 (Si carrier concentration 2 × 10 ¹⁸ cm ⁻³ ) made of GaAs. , Si carrier concentration 1.5 × 10 ¹⁸ cm ⁻³ ), and Al _0.4 Ga _0.6 As n-type first cladding layer 103 (thickness 0.9 μm, Si carrier concentration 8 × 10 ¹⁷ cm) ^-3 ), an active layer 104 of Al _0.1 Ga _0.9 As (thickness 0.2 μm) as a second semiconductor layer, and a semiconductor layer 105 having a strain of In _0.1 Ga _0.9 As _0.47 P _0.53 (thickness 5 nm, strain − 1.17%), an Al _0.4 Ga _0.6 As p-type second cladding layer 106 (thickness 0.6 μm, Zn carrier concentration 2 × 10 ¹⁸ cm ⁻³ ) was laminated as the first semiconductor layer. Then, a p-type contact layer 107 of GaAs (thickness 0.3 μm, Zn carrier concentration 5 × 10 ¹⁸ cm ⁻³ ) is laminated in order, and then a SiO ₂ mask 108 (thickness 0) is formed on a necessary portion on the laminated body. .3 μm) was formed.

  Next, as shown in FIG. 2B, etching is performed using an etching solution that is a mixed aqueous solution of sulfuric acid and hydrogen peroxide so as to leave a portion of the thickness h of the second cladding layer 106 by 0.3 μm. Then, the side surface of the mesa portion 109 including the second cladding layer 106 and the p-type GaAs contact layer 107 was formed.

Further, as shown in FIG. 2C, regrowth is performed using the MOCVD method, and an n-type current blocking layer 110 (thickness) made of GaAs selectively grown by the SiO ₂ mask 108 so as to be in contact with the side surface of the mesa portion 109. 0.6 μm thick and carrier concentration of 1.5 × 10 ¹⁸ cm ⁻³ ) were embedded.

Finally, as shown in FIG. 2D, the SiO ₂ mask 108 is removed, and titanium (Ti) having a thickness of about 100 nm, platinum (Pt) having a thickness of about 50 nm, and a thickness of about 400 nm are formed on the stacked body. The gold (Au) was sequentially deposited by vapor deposition, and this was patterned by photolithography and etching to form a p-type electrode 111 made of Ti / Pt / Au. On the other hand, a gold-germanium alloy (Au—Ge) with a thickness of about 100 nm, nickel (Ni) with a thickness of about 15 nm, and gold (Au) with a thickness of about 300 nm are sequentially deposited on the back side of the GaAs substrate. An n-type electrode 112 made of -Ge / Ni / Au was formed. Then, the laminated body was cleaved to be divided into chips and a ridge embedded type semiconductor laser could be manufactured.

  Here, the band gap of the strained semiconductor layer is set to about 1.92 eV, which is the same as the band gap of the p-type second cladding layer 106 of 1.92 eV and larger than the band gap of the active layer 104. The present invention is not limited to this band gap of 1.92 eV.

(Example 2)
A manufacturing process of the ridge buried type semiconductor laser according to the present invention is shown in FIG. Hereinafter, the present invention will be described with reference to FIG.

First, as shown in FIG. 3 (a), an Al _0.5 Ga _0.5 As n-type buffer layer 202 (thickness 0.5 μm) is formed on an n-type substrate 201 made of GaAs (Si carrier concentration 2 × 10 ¹⁸ cm ⁻³ ). , Si carrier concentration 1.5 × 10 ¹⁸ cm ⁻³ ), and Al _0.4 Ga _0.6 As n-type first cladding layer 203 (thickness 0.9 μm, Si carrier concentration 8 × 10 ¹⁷ cm) ^-3 ), Al _0.1 Ga _0.9 As active layer 204 (thickness 0.2 μm), and Al _0.4 Ga _0.6 As p-type second cladding layer 205 (thickness 0.6 μm, Zn carrier concentration) as the second semiconductor layer 2 × 10 ¹⁸ cm ⁻³ ) and In _0.08 Ga _0.92 As strained semiconductor layer 206 (thickness 5 nm, strain amount + 0.5%), and p-type contact layer 207 (thickness) made of GaAs as the first semiconductor layer. 0.3 μm, Zn carrier concentration 5 × 1 ¹⁸ cm ^-3) was laminated sequentially, to form the SiO ₂ mask 208 in a necessary portion on the laminate.

  Next, as shown in FIG. 3B, etching is performed using an etching solution that is a mixed aqueous solution of sulfuric acid and hydrogen peroxide so as to leave only a portion 0.3 μm in thickness h of the second cladding layer 205, Side surfaces of the mesa portion 209 including the second cladding layer 205, the semiconductor layer 206 having strain, and the p-type contact layer 207 made of GaAs were formed.

Further, as shown in FIG. 3C, regrowth is performed using the MOCVD method, and n is made of GaAs selectively grown by the SiO ₂ mask 208 (thickness 0.3 μm) so as to be in contact with the side surface of the mesa portion 209. A type current blocking layer 210 (thickness 0.6 μm, carrier concentration 1.5 × 10 ¹⁸ cm ⁻³ ) was embedded.

Finally, as shown in FIG. 3 (d), the SiO ₂ mask 208 is removed, and titanium (Ti) with a thickness of about 100 nm, platinum (Pt) with a thickness of about 50 nm, and a thickness of about 400 nm are formed on the stacked body. Gold (Au) was sequentially deposited by vapor deposition, and this was patterned by photolithography and etching to form a p-type electrode 211 made of Ti / Pt / Au. On the other hand, under this laminate, that is, on the back side of the GaAs substrate 201, a gold-germanium alloy (Au—Ge) having a thickness of about 100 nm, nickel (Ni) having a thickness of about 15 nm, and gold having a thickness of about 300 nm ( Au) was sequentially deposited to form an n-type electrode 212 made of Au-Ge / Ni / Au. Then, the laminated body was cleaved to be divided into chips and a ridge embedded type semiconductor laser could be manufactured.

(Example 3)
The same operation as in Example 1 was performed except that a plurality of strained semiconductor layers 105 were stacked. From the active layer 104 side, a strained semiconductor layer 105 made of In _0.1 Ga _0.9 As _0.47 P _0.53 (thickness 5 nm, strain amount—1.17%), Al _0.4 Ga _0.6 As (thickness 1 nm), and strained In _It was repeatedly formed with _0.1 Ga _0.9 As _0.47 P _0.53 semiconductor layer 105 (thickness 5 nm, strain amount—1.17%). As a result, an even greater diffusion preventing effect was obtained.

Example 4
The same procedure as in Example 1 was performed except that a non-doping light guide layer was further provided between the active layer and the clad layer, and a semiconductor layer having strain was provided between the light guide layer and the clad layer. Thereby, when the dopant diffused into the guide layer, an effect of preventing the deterioration of the characteristics of the device due to the defect formed by the dopant becoming the recombination center of the light distributed in the guide layer was observed.

(Example 5)
The same operation as in Example 2 was performed except that an In _0.1 Ga _0.9 As _0.47 P _0.53 material was used for the semiconductor layer 206 having strain. Semiconductor layer In _0.37 Ga _0.63 As _0.101 P _0.899 (thickness 5 nm, strain amount −0.5%) having tensile strain and semiconductor layer In _0.27 Ga _0.73 As _0.59 P _0.41 (thickness 5 nm, strain amount +0) having compressive strain .5%) and a structure grown in two cycles sequentially. By adjusting the composition, the diffusion of the dopant was prevented by laminating the two types of strain by creating compression and tension.

(Example 6)
The number of layers 206 having the strain In _0.08 Ga _0.92 As semiconductor layer (thickness 3 nm, strain amount + 0.5%) and, In _0.08 Ga _0.92 As semiconductor layer (thickness 1 nm, strain amount + 1.4%) as a unit The same procedure as in Example 2 was performed except that the period was formed. The effect of preventing diffusion due to the high strain amount and the effect of preventing diffusion due to the large film thickness although the strain amount is small combined with each other to achieve a high effect.

(Example 7)
The same operation as in Example 2 was performed except that InAs was used for the semiconductor layer 206 having strain. When an InAs monomolecular layer is used, InAs has a high strain (about 7%), dopant diffusion is effectively prevented even in a monoatomic layer.

(Example 8)
The same operation as in Example 2 was performed except that the InAs monomolecular layer of Example 7 was combined with a plurality of unstrained layers. The dopant was effectively prevented from diffusing more than in Example 7.

  It should be understood that the embodiments and examples disclosed this time are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  In the III-V group compound semiconductor device of the present invention, the semiconductor layer having strain does not allow the dopant that diffuses from the first semiconductor layer to the second semiconductor layer to pass therethrough. Therefore, a doping profile as designed can be formed, and the original device characteristics of the III-V compound semiconductor device can be realized.

It is sectional drawing of the ridge embedding type | mold semiconductor laser of this invention. It is the figure which showed the manufacturing process of the III-V group compound semiconductor element of this invention. Here, (a) is a schematic cross-sectional view showing a state in which each semiconductor layer is stacked and a SiO ₂ mask is attached, (b) is a schematic cross-sectional view showing a state in which a ridge stripe is formed, and (c) is: The schematic cross section showing the state where the current blocking layer is formed, (d) is a schematic cross section showing the state where the cap layer is laminated. It is the figure which showed the manufacturing process of the III-V group compound semiconductor element of this invention. Here, (a) is a schematic cross-sectional view showing a state in which each semiconductor layer is stacked and a SiO ₂ mask is attached, (b) is a schematic cross-sectional view showing a state in which a ridge stripe is formed, and (c) is: The schematic cross section showing the state where the current blocking layer is formed, (d) is a schematic cross section showing the state where the cap layer is laminated. It is the figure which showed the manufacturing process of the element structure of the semiconductor laser by the conventional method. Here, (a) is a schematic cross-sectional view showing a state in which each semiconductor layer is stacked and a SiO ₂ mask is attached, (b) is a schematic cross-sectional view showing a state in which a ridge stripe is formed, and (c) is: The schematic cross section showing the state where the current blocking layer is formed, (d) is a schematic cross section showing the state where the cap layer is laminated.

Explanation of symbols

101, 201, 301 n-type substrate, 102, 202, 302 n-type buffer layer, 103, 203, 303 n-type first cladding layer, 104, 204, 304 active layer, 105, 206 strained semiconductor layer, 106, 205,305 p-type second cladding layer, 107,207,306 p-type contact layer, 108,208,307 SiO ₂ mask, 109,209,308 mesa, 110,210,309 n-type current blocking layer, 111, 211,310 p-type electrode, 112,212,311 n-type electrode.

Claims (9)

In a compound semiconductor element formed on a substrate,
It has a structure in which a semiconductor layer having a strain is interposed between the first semiconductor layer and the second semiconductor layer doped at a lower concentration than the first semiconductor layer or not doped with the dopant. A III-V compound semiconductor device characterized by the above.   The III-V group compound semiconductor device according to claim 1, wherein the semiconductor layer having strain is composed of two or more stacked bodies.   The III-V group compound semiconductor device according to claim 2, wherein the semiconductor layer having strain includes a plurality of layers having different strain amounts.   3. The III-V group compound semiconductor device according to claim 2, wherein the semiconductor layer having strain is formed by alternately stacking layers having compressive strain and layers having tensile strain. 4.   2. The group III-V compound semiconductor device according to claim 1, wherein an absolute value of a strain amount of the semiconductor layer having strain is 0.5% or more and 10% or less.   2. The III-V group compound semiconductor device according to claim 1, wherein a thickness of the strained semiconductor layer is not less than a monomolecular layer thickness and not more than 10 nm. 3. The III according to claim 1, wherein the substrate is GaAs, and the strained semiconductor layer is In _1−x Ga _x As _1−y P _y (0 ≦ x, y ≦ 1). -Group V compound semiconductor element.   The substrate is GaAs, and the strained semiconductor layer is made of a binary compound containing a group III element having an atomic radius larger than Ga or a group V element having an atomic radius larger than As, and the layer thickness is The III-V group compound semiconductor device according to claim 1, wherein the group is a monomolecular layer or more.   The III-V group compound semiconductor device according to claim 8, wherein the binary compound is InAs.

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