JP2007081326A - Wiring formation system and method of the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the productivity of printed circuit boards by each performing highly accurate compensation on various defects generated in an actual manufacturing. <P>SOLUTION: An optical appearance inspection device 13 measures the line width of a wiring pattern using a line width measurement algorithm over the entire region of a printed circuit board after the wiring pattern is formed. Then, the optical appearance inspection device 13 prepares a line width histogram in the unit of a region 22 and further prepares a line width distribution by comparing the prepared line width histogram with the line width histogram of a master image data in the same region 22. Information management system 14 prepares a compensated data based on an average of the line width distribution prepared in a predetermined number of printed circuit boards. A stepper 12 performs a thickening or thinning compensation the line width of a wiring pattern on a design data or an image data for exposure in the unit of the region 22 based on the compensated data. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a wiring formation system and method, and more particularly to a wiring formation system for forming a wiring pattern of a printed board.

  The wiring pattern of the printed board is formed through an etching process or the like. In this etching process, there is a problem that the line width of the wiring pattern changes due to, for example, thickening or thinning of the etching.

  In order to deal with this problem, it is inspected whether the wiring pattern after the etching process is designed as designed (for example, length measurement), and the operator changes the etching conditions based on the inspection result, or the etching The mask film used in the exposure process before the process was recreated. However, there is a problem that the operator does not improve productivity because it is necessary to re-create the etching conditions and the mask film every time a so-called defective substrate is generated which is not as designed by inspection. Therefore, a wiring forming system that compares design data with data after each process and feeds back the comparison result to the exposure process to prevent the generation of a defective substrate has been proposed (for example, see Patent Document 1). Hereinafter, a conventional wiring forming system will be described with reference to FIG. FIG. 15 is a block diagram showing a configuration of a conventional wiring forming system.

  The conventional wiring forming system shown in FIG. 15 is a system including a design data creation device 91, an exposure device 92, an appearance inspection device 93, an etching process 94, an appearance inspection device 95, and a resizing rule creation device 96. The design data creation device 91 is a device that creates design data such as CAD data. The exposure device 92 creates image data for exposure from the design data created by the design data creation device 91. Then, the exposure device 92 directly exposes the mask by drawing a mask on the printed circuit board by laser scanning or the like based on the image data for exposure. Thus, the exposure apparatus 92 is an apparatus that does not use a mask film. The printed circuit board after exposure is sent to the appearance inspection device 93. The appearance inspection apparatus 93 captures the image of the printed circuit board after exposure and acquires image data. The image data acquired by the appearance inspection device 93 is fed back to the exposure device 92. The exposure device 92 compares the image data with the design data, and measures the expansion / contraction and distortion of the printed circuit board. Based on the comparison result, the exposure apparatus 92 corrects the design data (scaling correction).

  In the etching step 94, the printed circuit board after exposure is etched to form a wiring pattern on the printed circuit board. The appearance inspection device 95 captures the image of the etched printed circuit board and acquires image data. The resizing rule creating device 96 creates resizing rules by comparing the image data of the printed circuit board after the etching with the design data. Here, the resizing rule is a well-known mathematical method for reversing the image data for exposure because the wiring pattern of the printed circuit board after etching becomes a wiring pattern as designed. It is a rule obtained by solving with. The design data creation device 91 corrects the design data (etching correction) based on the resizing rule. Then, the exposure device 92 creates image data for exposure from the corrected design data.

As described above, in the conventional wiring forming system, the design data and the data after each process are compared, and the comparison result is finally fed back to the exposure apparatus, that is, the scaling correction and the etching correction are performed. The generation of defective substrates is prevented.
JP 2004-56068 A

  However, in the conventional wiring forming system disclosed in Patent Document 1, the resizing rule only discloses that the inverse problem can be obtained by using a known mathematical method. The specific structure is unknown.

  In actual manufacturing, various defects such as a defect due to a wiring pattern distortion due to a proximity effect or uneven etching occur. However, in the system described in Patent Document 1, such a defect is considered. Not. Further, such a defect does not occur uniformly over the entire area of the printed circuit board, but the degree of occurrence differs for each area of the substrate.

  For the above reasons, the correction based on the resizing rule disclosed in the above-mentioned patent document lacks feasibility in actual manufacturing, and it is practical to improve the productivity by performing correction with high accuracy. There was a problem that was impossible.

  Therefore, an object of the present invention is to improve the productivity of a printed circuit board by performing highly accurate corrections for various defects that occur in actual manufacturing.

  In order to solve the above problems, the present invention adopts the following configuration. 1st invention is the wiring formation method of the printed circuit board which performs an exposure process to a board | substrate, and forms a wiring pattern, Comprising: The board | substrate is directly exposed using the design data regarding a wiring pattern, or the image data for exposure based on the said design data Or an exposure step of exposing the substrate using a mask created based on the design data or exposure image data, and a wiring pattern line of the printed circuit board finally formed with the wiring pattern through the exposure process in the exposure step By comparing the line width measurement step for measuring the width for each unit area, the line width measured in the line width measurement step, and the line width of the design data or the image data for exposure for each unit area, Line width correction data creation step to create the line width correction data, and the design used in the exposure step using the line width correction data Over a data or a wiring forming method and a line width correction step of correcting the exposure image data.

  In a second aspect based on the first aspect, the line width correction data creating step creates line width correction data based on the line width measurement results of a plurality of printed circuit boards.

  In a third aspect based on the first aspect, the line width measurement step creates a line width histogram indicating the relationship between the line width size and its frequency for each unit region, and uses the line width histogram. The line width of the wiring pattern in the unit area is detected.

  In a fourth aspect based on the third aspect, the line width measurement step detects, for each unit region, the line frequency having the highest frequency in the line width histogram as the line width of the wiring pattern in the unit region. It is what.

  According to a fifth invention, in the first invention, the wiring pattern of the printed circuit board created using the corrected design data or the exposure image data corrected in the line width correction step is optically inspected, and A line width re-measurement step for measuring the line width of the wiring pattern of the printed circuit board and detecting a difference value between the measured line width and the line width of the design data or the image data for exposure for each unit area; The wiring forming method further includes a correction step of correcting the line width correction data based on the difference value when a difference value is detected in any unit region in the width re-measurement step.

  6th invention is the wiring formation system of the printed circuit board which performs an exposure process to a board | substrate, and forms a wiring pattern, Comprising: The board | substrate is directly exposed using the design data regarding a wiring pattern, or the image data for exposure based on the said design data Or, an exposure unit that exposes the substrate using a mask created based on design data or image data for exposure, and a wiring pattern line on the printed circuit board that is finally formed with a wiring pattern after exposure processing by the exposure unit A line width measuring unit that measures the width for each unit region, a line width measured by the line width measuring unit, and a line width of design data or exposure image data for each unit region, Line width correction data creating means for creating the line width correction data and design data used in the exposure means using the line width correction data or A wiring forming system that includes a line width correction means for correcting the light image data.

  7th invention is the wiring formation method of the printed circuit board which performs an exposure process to a board | substrate, and forms a wiring pattern, Comprising: The board | substrate is directly exposed using the design data regarding a wiring pattern, or the image data for exposure based on the said design data Or an exposure step of exposing the substrate using a mask created based on the design data or exposure image data, and a wiring pattern line of the printed circuit board finally formed with the wiring pattern through the exposure process in the exposure step A line-to-line measurement step for measuring a gap, a line-to-line correction data creation step for creating a line-to-line correction data when the line spacing measured in the line-to-line measurement step is smaller than a preset minimum line, and a line-to-line correction A line-to-line correction step for correcting design data used for the exposure step or image data for exposure using the data. Is a line forming method.

  In an eighth aspect based on the seventh aspect, the line-to-line correction data creation step is performed at a frequency exceeding a predetermined frequency based on the information between the lines of the plurality of printed circuit boards measured in the line-to-line measurement step. It is characterized in that it is determined whether or not a defect between the lines has occurred, and when the determination result is affirmative, line correction data is created.

  In a ninth aspect based on the eighth aspect, the line-to-line correction data creation step is performed for the plurality of printed circuit boards in the defective portion with respect to a portion where the defect between the lines has occurred at a frequency exceeding a predetermined frequency. The line-to-line correction data is created using an average value, maximum value, minimum value, or maximum frequency value between lines.

  According to a tenth aspect of the present invention, there is provided a wiring board forming system for a printed circuit board that performs exposure processing on a board to form a wiring pattern, and directly exposes the board using design data relating to the wiring pattern or image data for exposure based on the design data. Or, an exposure unit that exposes the substrate using a mask created based on design data or image data for exposure, and a wiring pattern line on the printed circuit board that is finally formed with a wiring pattern after exposure processing by the exposure unit A line-to-line measuring means for measuring a gap, a line-to-line correction data creating means for creating a line-to-line correction data when the line distance measured by the line-to-line measuring means is smaller than a preset minimum line, and a line-to-line correction Wiring forming system comprising line correction means for correcting design data used for exposure means or image data for exposure using data A.

  An eleventh invention is a printed circuit board wiring formation method for forming a wiring pattern by subjecting a substrate to an exposure process, wherein the substrate is directly exposed using design data relating to the wiring pattern or image data for exposure based on the design data. Or the exposure step of exposing the substrate using the mask created based on the design data or the image data for exposure, and the image data and reference of the printed circuit board on which the wiring pattern is finally formed through the exposure process in the exposure step A defect protrusion detection step for comparing a portion of the image data with each other and detecting a portion having a difference exceeding a predetermined number of pixels with respect to the wiring pattern of the two image data as a defect portion, and a defect portion detected in the defect protrusion detection step Chip projection correction data creation step for creating chip projection correction data based on By using the correction data, a wiring forming method that includes a missing projection correction step of correcting the design data or exposure image data used in the exposure step.

  In a twelfth aspect based on the eleventh aspect, the chip protrusion correction data creation step is performed at a frequency exceeding a predetermined frequency based on information on defective portions of the plurality of printed circuit boards detected in the chip protrusion detection step. It is characterized in that it is determined whether or not a defect has occurred, and missing projection correction data is created when the determination result is affirmative.

  In a thirteenth aspect based on the twelfth aspect, the defect projection correction data creating step includes a step of generating image data of a plurality of printed circuit boards at the defect portion, and a portion where the defect occurs at a frequency exceeding a predetermined frequency. It is characterized in that chipped protrusion correction data is created using an average value, a maximum value, a minimum value, or a maximum frequency value of differences from the reference image data.

  According to the fourteenth invention, in any one of the eleventh to thirteenth inventions, the chipped protrusion correction data is for enlarging or reducing the design data or the image data for exposure according to the magnitude of the difference in the wiring pattern. is there.

  A fifteenth aspect of the present invention is a printed circuit board wiring formation system that performs exposure processing on a board to form a wiring pattern, and directly exposes the board using design data related to the wiring pattern or image data for exposure based on the design data. Or exposure means for exposing a substrate using a mask created based on design data or exposure image data, and image data and reference of a printed circuit board on which a wiring pattern is finally formed through exposure processing by the exposure means Comparing the image data, the defect projection detecting means for detecting a defect location where there is a difference exceeding the predetermined number of pixels with respect to the wiring pattern of the two image data, and the defect location detected by the defect projection detection means Based on the chip projection correction data creating means for creating chip projection correction data based on the chip projection correction data, Te, a wiring forming system comprising a chipping projection correcting means for correcting the design data or exposure image data to be used for the exposure means.

  In a sixteenth aspect based on the fifteenth aspect, the defect projection correction data is obtained by enlarging or reducing the design data or the image data for exposure according to the magnitude of the difference between the wiring patterns.

  A seventeenth invention is a wiring forming method, wherein after performing a line width correction process comprising the exposure step, the line width measurement step, the line width correction data creation step, and the line width correction step according to claim 1, Based on the design data or exposure image data corrected by the line width correction processing, a line spacing comprising the exposure step, the line-to-line measurement step, the line-to-line correction data creation step, and the line-to-line correction step according to claim 7. It is characterized in that at least one of a correction process and a chip protrusion correction process comprising an exposure step, a chip protrusion detection step, a chip protrusion correction data creation step, and a chip protrusion correction step according to claim 11 is performed. To do.

  According to the first aspect of the invention, by creating the line width correction data for each unit region, for example, the formed wiring pattern has a different line width change for each unit region of the printed circuit board due to an etching process or the like. In addition, it is possible to perform highly accurate correction corresponding to the line width change for each unit region. That is, it is possible to perform corrections suitable for actual printed circuit board production, and it is possible to improve productivity and produce high-quality printed circuit boards.

  According to the second aspect of the present invention, stable correction is performed by excluding line width changes that occur on a single basis by creating line width correction data in consideration of the line width measurement results of a plurality of printed circuit boards. Can do.

  According to the third aspect of the invention, it is possible to perform correction for a desired line width by using the line width histogram.

  According to the fourth aspect of the invention, highly accurate and efficient correction can be performed on the wiring pattern having the highest frequency line width and requiring high quality.

  According to the fifth aspect of the invention, the line width correction data is corrected to a more appropriate one by inspecting the line width of the printed circuit board created using the corrected design data or exposure image data. Therefore, it is possible to maintain the quality of the printed circuit board and reduce the variation in quality due to workers, processes, and materials.

  According to the seventh aspect, by creating the line correction data for the line spacing smaller than the preset minimum line spacing, the space between the lines of the printed circuit board wiring pattern is insufficient due to the proximity effect. Even in such a case, the design data or the image data for exposure can be corrected so that a sufficient space is secured.

  According to the eighth aspect of the invention, the line-to-line correction data is created when a defect occurs at a frequency exceeding a predetermined frequency, thereby performing stable correction excluding, for example, a defect portion that occurs only once. be able to. In this manner, correction suitable for actual printed circuit board production can be performed, and productivity can be improved and high-quality printed circuit board production can be realized.

  According to the eleventh aspect of the present invention, by detecting a portion having a difference exceeding a predetermined number of pixels with respect to the reference wiring pattern as a defective portion, and creating missing protrusion correction data based on the defective portion, for example, Even if “chips” or “protrusions” occur in the wiring pattern of the printed circuit board that has been created, it is possible to correct the design data or the image data for exposure corresponding thereto.

  According to the twelfth aspect of the present invention, when a defect occurs at a frequency exceeding a predetermined frequency, it is possible to perform correction adapted to the frequency of occurrence different for each defect location by creating the missing protrusion correction data. In this manner, correction suitable for actual printed circuit board production can be performed, and productivity can be improved and high-quality printed circuit board production can be realized.

  According to the seventeenth aspect, after performing the line width correction process, by performing at least one of the line gap correction process and the chipped protrusion correction process, the defect due to the change in line width can be caused by the line gap defect and the chip defect. Each correction can be performed efficiently and accurately without being erroneously detected as a protrusion.

(First embodiment)
First, the wiring forming system according to the first embodiment of the present invention will be roughly described with reference to FIGS. 1 and 2. FIG. 1 is a block diagram showing a configuration of a wiring forming system according to the first embodiment. FIG. 2 is a flowchart schematically showing a processing flow in the wiring forming system according to the first embodiment.

  In FIG. 1, the wiring forming system according to the present embodiment is a system configured by connecting a design data creation device 11, an exposure device 12, an optical appearance inspection device 13, an information management system 14, and a database 15 over a network. .

  In FIG. 2, the design data creation device 11 creates design data (step S101). This design data is image data representing a wiring pattern of a printed circuit board created by CAD or CAM. The exposure apparatus 12 creates exposure image data (for example, RIP data) based on the design data created in step S101. Then, the exposure apparatus 12 performs an exposure process by directly drawing a wiring pattern on the substrate by laser scanning or the like based on the image data for exposure (step S102). The printed circuit board after the exposure is subjected to etching and plating process processing in a wiring pattern forming apparatus (not shown) to form a wiring pattern on the substrate (step S103). The optical appearance inspection device 13 optically inspects the appearance of the printed circuit board after the wiring pattern is formed, and detects defects in the formed wiring pattern (step S104). Specifically, the optical appearance inspection apparatus 13 acquires image data by imaging a printed circuit board after forming a wiring pattern using, for example, a plurality of imaging cameras. Then, the optical appearance inspection device 13 compares the image data after the wiring pattern is formed with the master image data, and detects a defect included in the printed circuit board after the wiring pattern is formed. Note that the master image data is the design data (image data representing a wiring pattern of a printed circuit board created by CAD or the like) or image data captured from a non-defective substrate.

  Following step S104, the information management system 14 creates correction data for the defect based on the defect detected by the optical visual inspection apparatus 13, and feeds back the correction data to the exposure apparatus 12 (step S105). The correction data is managed by the information management system 14 for each substrate material or for each process such as etching, and stored in the database 15. The exposure apparatus 12 corrects the design data or the image data for exposure based on the correction data created in step S105. Then, the exposure apparatus 12 performs an exposure process based on the corrected exposure image data (step S102). As described above, the wiring drawing system according to the present embodiment is a system that improves the yield in the process, that is, the productivity, by feeding back the correction data based on the detected defect to the exposure apparatus 12.

  Note that the information management system 14 may be configured by an individually provided device, and for example, the optical appearance inspection device 13 and the exposure device 12 may be provided with a function equivalent to the information management system 14. Further, although the correction data is fed back to the exposure apparatus 12, it may be fed back to the design data creation apparatus 11. In this case, the design data creation device 11 corrects the design data based on the correction data.

  Hereinafter, specific correction methods for various defects will be described. Examples of the various defects include a line width defect of the wiring pattern, a defect due to the proximity effect, and a defect due to the chipping or protrusion of the wiring pattern. Among these, in the present embodiment, a correction method for a defect of the line width of the wiring pattern will be described, and a correction method for other defects will be described in another embodiment described later.

  FIG. 3 is a diagram schematically showing the inspection method of the optical appearance inspection apparatus 13 in the first embodiment. In the wiring pattern line width correction, the optical appearance inspection apparatus 13 includes a plurality of imaging cameras 131a to 131k as shown in FIG. 3, for example. The optical appearance inspection apparatus 13 first images the printed circuit board 21 after the wiring pattern is formed using a plurality of imaging cameras 131a to 131k, and acquires image data of the printed circuit board 21. Next, the optical appearance inspection device 13 measures the line width of the wiring pattern using the line width measurement algorithm for the entire image data area of the printed circuit board 21. This line width measurement algorithm is an algorithm set in advance in the optical visual inspection apparatus 13. Next, the optical appearance inspection apparatus 13 divides the image data of the printed circuit board 21 into a plurality (40 in the example of FIG. 3) of regions 22 (unit regions), and the length measurement data of the line width for each region 22 is obtained. To create a line width histogram. This line width histogram is created in units of regions 22. FIG. 4 is a diagram illustrating an example of a line width histogram. In the line width histogram, the horizontal axis represents the line width value, and the vertical axis represents the frequency of the line width. By creating this line width histogram for each region 22, it is possible to know which line width is contained most in each region 22. Specifically, referring to FIG. 4, the line width having the highest frequency (the line width at the peak point of the histogram curve) is the line width that is the largest among the line widths included in the region 22. Become.

  Next, the optical appearance inspection apparatus 13 compares the created line width histogram after generating the wiring pattern with the line width histogram of the master image data in the same region 22. Here, the optical appearance inspection apparatus 13 compares the line widths that exist most in the region 22. The difference in line width due to this comparison indicates the amount of change from the desired line width, and is obtained for each region 22. The optical appearance inspection apparatus 13 creates a distribution of line width variation (hereinafter referred to as a line width distribution) based on the comparison result. FIG. 5 is a diagram illustrating an example of a line width distribution related to line width correction. FIG. 5A shows an example of image data of the printed circuit board 21 after the wiring pattern is formed. FIG. 5B is a diagram illustrating an example of a line width distribution corresponding to FIG. The line width distribution shown in FIG. 5B is created for each printed circuit board 21 after forming a wiring pattern to be inspected by the optical visual inspection apparatus 13. For example, in the region 22a shown in FIG. 5B, the line width change amount is +10 μm. That is, in the region 22a, it means that the wiring pattern of the printed circuit board 21 after the wiring pattern is formed is thicker by +10 μm than the wiring pattern of the master image data. The line width distribution created for each printed circuit board to be inspected is stored in the database 15 as digital data.

  When a line width distribution for a predetermined number of printed circuit boards is created by the optical appearance inspection device 13, the information management system 14 uses the average of the line width distributions to determine the line width after generation of the wiring pattern as the line of the design data. Create correction data to match the width. That is, the correction data is data obtained by reversing the sign of the average value of the predetermined number of line width changes obtained for each region 22. For example, when the average value of a predetermined number of line width changes in a certain region 22 is +10 μ, the correction data for that region 22 is −10 μ. The correction data created in the information management system 14 is fed back to the exposure apparatus 12. The correction data created in the information management system 14 is digital data and is stored in the database 15 for each printed circuit board material and each manufacturing process such as an etching process.

  The exposure apparatus 12 corrects the design data or the image data for exposure in units of the area 22 based on the correction data stored in the database 15 and performs exposure processing using the image data for exposure after correction.

  Hereinafter, the flow of the line width correction process will be described with reference to FIGS. 6 and 7. FIG. 6 is a flowchart showing the flow of processing until correction data is fed back to the exposure apparatus 12 in the wiring drawing system according to the first embodiment. FIG. 7 is a flowchart showing a flow of processing after correction data is fed back in the wiring drawing system according to the first embodiment.

  In FIG. 6, first, design data is created by the design data creation device 11 (step S111). Following step S111, the exposure apparatus 12 creates exposure image data from the design data, and an exposure process is performed based on the exposure image data (step S112). The exposed printed circuit board is subjected to etching and plating process processing in a wiring pattern forming apparatus (not shown) to form a wiring pattern on the printed circuit board (step S113). The optical appearance inspection device 13 measures the line width of the wiring pattern using the line width measurement algorithm for the entire area of the substrate (printed circuit board) after the wiring pattern is formed (step S114).

  Following step S114, a line width histogram is created for each region 22 in the optical appearance inspection apparatus 13 (step S115). Following step S115, the optical appearance inspection apparatus 13 compares the line width histogram created by the optical appearance inspection apparatus 13 in the same region 22 with the line width histogram of the master image data (step S116). Then, the optical appearance inspection apparatus 13 creates and stores a line width distribution based on this comparison (step S117). The processes from step S112 to S117 described above are performed for each printed circuit board to be inspected. Then, in the information management system 14, it is determined whether or not the number of inspected substrates has reached a predetermined number (step S118). This is to prevent correction from being performed only with a specific value of a specific substrate by setting a predetermined number or more as samples. Of course, results that deviate significantly as a statistical method may be excluded in subsequent processing. If the number of substrates does not reach the predetermined number, the process repeats steps S112 to S117. If the number of substrates has reached the predetermined number, the process proceeds to step S119.

  In step S119, the information management system 14 creates correction data based on the average (or distribution with the highest frequency, etc.) of the line width distribution created for each printed circuit board. The correction data is stored as digital data by the information management system 14 in the database 15 for each printed circuit board material and each manufacturing process such as an etching process. After step S119, the exposure apparatus 12 thickens or narrows the line width of the wiring pattern on the design data or the image data for exposure based on the correction data stored in the database 15 in units of 22 regions. Correction is performed (step S120).

  In FIG. 7, the exposure apparatus 12 performs an exposure process using the corrected image data for exposure. (Step S121). Thereafter, the exposed printed circuit board is subjected to an etching and plating process in a wiring pattern forming apparatus (not shown) to form a wiring pattern on the printed circuit board (step S122). The optical appearance inspection apparatus 13 measures the line width of the wiring pattern using the line width measuring algorithm for the entire area of the printed circuit board after the wiring pattern is formed (step S123).

  Following step S123, a line width histogram is created for each region 22 in the optical appearance inspection apparatus 13 (step S124). Next to step S124, the optical appearance inspection apparatus 13 compares the line width histogram after the wiring pattern is formed with the line width histogram of the master image data for the same region 22 (step S125). Based on this comparison, the information management system 14 determines whether or not the line width of the corrected wiring pattern formed in step S122 matches the line width of the design data (step S126). If the line widths match in step S126, the process ends. If the line widths do not match in step S126, the correction data stored in the database 15 is corrected in units of regions so as to match the line width of the design data (step S127). Then, an exposure process is performed based on the correction data corrected in step S127 (step S121). The process shown in FIG. 7 is performed until the line widths match in step S126. Note that steps S121 to S125 may be repeated a predetermined number of times, and the determination in step S126 may be made based on the total of them.

  The correction data stored in the database 15 for each substrate material and each manufacturing process is sequentially updated to the corrected correction data. Thus, by repeating the processes of steps S121 to S127, the line width of the wiring pattern of the printed board to be created can be made to exactly match the desired line width, and the quality of the production board can be maintained, and the operator, It becomes possible to reduce variations in quality due to processes and materials.

  As described above, the wiring forming system according to the present embodiment creates a line width histogram for each region, and creates a line width distribution using the line width histogram. The wiring forming system according to the present embodiment creates correction data based on the average of line width distributions of a plurality of printed circuit boards, and feeds back the correction data to the exposure apparatus 12. As a result, for example, even when the formed wiring pattern has a different line width change for each region of the printed circuit board due to an etching process or the like, it is possible to perform highly accurate correction corresponding to the line width change for each region. . That is, it is possible to perform corrections suitable for actual printed circuit board production, and it is possible to improve productivity and produce high-quality printed circuit boards.

  Further, since the correction data is stored in the database 15 for each substrate material and manufacturing process, for example, when the substrate material is changed on the production line, quick and optimum correction can be performed. it can. That is, when the printed circuit board is manufactured under the same manufacturing conditions as when the printed circuit board was manufactured previously, the correction data registered in the database 15 is used, so that the design data can be obtained in advance according to the manufacturing conditions. Can be used for exposure processing after correction.

  In addition, after the exposure processing based on the correction data, the correction data is corrected based on the printed circuit board thus created, so that the quality of the manufacturing substrate can be maintained and the quality of the worker, process, and material can be improved. Variations can be reduced.

  Although the above-described exposure apparatus 12 is an apparatus that does not use a mask film, it may be an exposure apparatus that uses a mask film for transferring image data to a printed circuit board. In this case, the mask film may be recreated based on the design data corrected with the correction data.

  In the above description, the most frequently used line width is used in the line width histogram in creating the correction data. However, a plurality of frequently used line widths may be used, or all of the lengths in the measured region 22 may be used. You may use the average about line | wire width. Even in this case, a certain effect can be exhibited.

(Second Embodiment)
Next, a wiring forming system according to the second embodiment of the present invention will be described. In the present embodiment, a correction method for defects caused by the proximity effect will be described. The wiring forming system according to the present embodiment is the same as the configuration and the process flow of FIGS. 1 and 2 described in the first embodiment. Description is omitted.

  First, with reference to FIG. 8, the defect of the wiring pattern which arises by a proximity effect is demonstrated. FIG. 8 is a diagram schematically showing a wiring pattern defect caused by the proximity effect. FIG. 8A shows a part of the wiring pattern of the master image data. Let α1 be the distance between the two wiring patterns shown in FIG. FIG. 8B is a diagram illustrating a state in which a defect is generated in the wiring pattern due to the proximity effect during exposure. In this case, the distance between the two wiring patterns is α2. As can be seen from FIGS. 8A and 8B, the proximity effect causes a defect in which the distance between the lines is narrowed from α1 to α2. The space between the wiring patterns greatly affects the quality of the printed circuit board itself and the performance of the circuit using the wiring pattern, and it is necessary to secure a minimum space between the lines (hereinafter referred to as a minimum space).

  Hereinafter, a correction method for securing the minimum space will be described with reference to FIGS. 9 and 10. FIG. 9 is a flowchart showing a flow of processing until correction data is fed back to the exposure apparatus 12 in the wiring forming system according to the second embodiment. FIG. 10 is a flowchart showing a flow of processing after correction data is fed back in the wiring forming system according to the second embodiment.

  In FIG. 9, first, design data is created in the design data creation device 11 (step S211). Following step S211, the exposure apparatus 12 creates exposure image data from the design data, and an exposure process is performed based on the exposure image data (step S212). The exposed printed circuit board is subjected to etching and plating process processing in a wiring pattern forming apparatus (not shown), and a wiring pattern is generated on the printed circuit board (step S213). The optical appearance inspection device 13 measures the distance between the lines of the wiring pattern using the line length measurement algorithm for the entire area of the substrate (printed circuit board) after the wiring pattern is formed (step S214). Then, the optical appearance inspection apparatus 13 detects the coordinate position and the amount of the space that is less than the minimum space set in advance in units of the region 22 (smaller than the minimum space) and the amount thereof as a defect location (step S215). The coordinate position of the defective part detected in step S215 and the amount of space are stored in the database 15 as digital data.

  Subsequent to step S215, the information management system 14 determines whether or not defects are concentrated at the same defect location (same coordinate position), rather than a predetermined defect occurrence frequency (frequency) (step S216). . Here, as the frequency of defects, referring to the inspection results of a plurality of printed circuit boards, for example, when defects at the same location exceed a predetermined number of times, when the defect rate at the same location exceeds a predetermined ratio Alternatively, a case where a predetermined number of defects at the same location are continuously detected is set. This is because when defects are concentrated, it is necessary to correct the original image data for exposure, but it is not necessary to correct single defects so as to improve productivity. In step S216, when the information management system 14 determines that the defects are not concentrated, the process returns to step S212. If the information management system 14 determines that defects are concentrated, the process proceeds to step S217.

  In step S217, the information management system 14 refers to the inspection results (space amounts) of the plurality of printed circuit boards stored in the database 15, and takes, for example, the average of the space amounts at the same defect location. Further, for example, instead of the average, the minimum value, the maximum value, or the most frequent value of the amount of space of the defect portion stored in the database 15 may be used. That is, the information management system 14 creates correction data for a defective portion that occurs over a predetermined frequency, using a statistical value of the amount of space accumulated in the database related to the defective portion. Then, the information management system 14 creates, as correction data, data indicating the amount of extraction of both sides of the wiring pattern at the defective portion (hereinafter referred to as “extraction data”) according to the statistical value of the amount of space (step S217). The correction data also includes the coordinate position of the defective part. As described above, the information management system 14 creates, as correction data, data for extracting the wiring patterns on both sides of the defective portion so that a preset minimum space is secured in the defective portion. The correction data created in the information management system 14 is digital data and is stored in the database 15 for each printed circuit board material and each manufacturing process such as an etching process.

  After step S217, the exposure apparatus 12 expands the space width by adding data to be removed at the defect location on the design data or the image data for exposure based on the defect location correction data stored in the database 15. It correct | amends so that (step S218). Note that the size of the extracted data is data whose settings can be changed.

  In FIG. 10, the exposure apparatus 12 performs an exposure process using the corrected image data. (Step S221). Thereafter, the exposed printed circuit board is subjected to etching and plating process processing in a wiring pattern forming apparatus (not shown) to form a wiring pattern on the printed circuit board (step S222). The optical appearance inspection device 13 measures the distance between the lines of the wiring pattern using the line length measurement algorithm for the entire area of the printed circuit board after the wiring pattern is formed (step S223).

  Following step S223, the optical appearance inspection apparatus 13 compares the line length measured in step S223 with the line distance of the master image data (step S224). Based on this comparison, the information management system 14 determines whether or not a minimum space is secured in the corrected defective portion (step S225). If the minimum space is secured at the defective portion, the process ends. If the minimum space is not ensured at the defective portion, the information management system 14 corrects the correction data stored in the database 15 in units of regions so that the minimum space is ensured (step S226). Then, an exposure process is performed based on the correction data corrected in step S226 (step S221). The process shown in FIG. 10 is performed until the minimum space is secured in step S226. As a result, it is possible to maintain the quality of the production substrate and reduce the variation in quality due to workers, processes, and materials. Note that steps S221 to S224 may be repeated a predetermined number of times, and the determination in step S225 may be made based on their totality.

  As described above, the wiring forming system according to the present embodiment detects a defective portion that is less than the minimum space for each region, and creates correction data so that the defective portion secures the minimum space. Then, the wiring forming system according to the present embodiment feeds back the correction data to the exposure device 12. Thereby, even if it becomes impossible to ensure the minimum space between the lines of the wiring pattern of the printed circuit board due to the proximity effect at the time of exposure, it is possible to perform correction to ensure the minimum space for each area of the printed circuit board. That is, it is possible to perform corrections suitable for actual printed circuit board production, and it is possible to improve productivity and produce high-quality printed circuit boards. In the present embodiment, detection of a defective portion less than the minimum space and creation of correction data are performed for each region 22, but the present invention is not limited to this, and is the same for all regions of the printed circuit board. A minimum space may be set to detect a defective portion and create correction data.

  Further, since the correction data is managed and stored in the database 15 according to the substrate material and the etching process, for example, when the substrate material is changed on the production line, quick and optimum correction can be performed. can do.

  In addition, after the exposure processing based on the correction data, the correction data is corrected based on the printed circuit board thus created, so that the quality of the manufacturing substrate can be maintained and the quality of the worker, process, and material can be improved. Variations can be reduced.

  It is also possible to combine the line-to-line correction according to the present embodiment and the line width correction according to the first embodiment described above. In this case, it is preferable to perform line-to-line correction after line width correction. That is, it is preferable to perform line-to-line correction after the correction data for line width correction is fed back to the exposure apparatus 12. This is because, among the defects generated when the wiring pattern is formed in the wiring pattern forming apparatus, the defect due to the proximity effect and the defect due to the line width change are mixed in a state where they cannot be distinguished. For example, even if there is a line space that is less than the minimum space, there may be a case where a sufficient space is secured between the lines simply by performing the line width correction. By correcting the defect, each correction can be performed efficiently and accurately.

(Third embodiment)
Next, a wiring formation system according to a third embodiment of the present invention will be described. In the present embodiment, a method for correcting a wiring pattern chipping or protrusion will be described. The wiring forming system according to the present embodiment has the same flow as the configuration and processing flow of FIGS. 1 and 2 described in the first embodiment except for a specific inspection method of the optical appearance inspection apparatus 13. is there. Therefore, in the following description, the description of the function of each component other than the specific inspection method of the optical visual inspection apparatus 13 and the general processing flow will be omitted.

  In the present embodiment, the optical appearance inspection apparatus 13 illustrated in FIG. 1 images the printed circuit board 21 after the wiring pattern is formed using, for example, a plurality of imaging cameras, and acquires image data of the printed circuit board 21. The optical appearance inspection device 13 compares the image data after the wiring pattern is formed with the master image data, and detects a defective portion (a chip or a protrusion) included in the printed circuit board 21 after the wiring pattern is formed.

  Here, with reference to FIG. 11, a method for detecting a chip or a protrusion included in the printed circuit board 21 after the wiring pattern is formed will be specifically described. FIG. 11 is a diagram illustrating an example of a defect detected by comparing the master image data and the image data after the wiring pattern is formed. In FIG. 11, one black square corresponds to one pixel, and the figure formed by the set of black squares shows a part of the wiring pattern. As shown in FIG. 11, the optical appearance inspection apparatus 13 first compares the master image data with the image data after the wiring pattern is formed. Then, the optical appearance inspection device 13 detects a defect portion if there is a difference between the image data in a predetermined number of pixels or more.

  Here, the types of the defective portion include “chip” and “projection”. “Missing” refers to a portion where the wiring pattern is smaller than a predetermined number of pixels set in advance or a part of the wiring pattern is lost. The “projection” refers to a portion where the wiring pattern is larger than a predetermined number of pixels set in advance or an unintended pattern is added to a part of the wiring pattern. Then, the optical appearance inspection apparatus 13 determines whether the detected defective portion is “chip” or “projection” by using a line recognition algorithm using a design rule check. For the defect portion for which “chip” and “projection” are determined, the size and coordinate position of the “chip” or “projection” are stored in the database 15 as digital data together with the information of the “chip” or “projection”. .

  Here, an outline will be described with reference to the schematic diagram shown in FIG. 12 before a specific description of a correction method for “chip” or “projection”. FIG. 12 is a schematic diagram showing an outline of a correction method for “chip” or “projection”. In FIG. 12, the optical appearance inspection apparatus 13 compares the image data after the wiring pattern is formed with the master image data, and detects a defective portion. Then, the information management system 14 creates correction data based on the information on the defective portion and feeds it back to the exposure apparatus 12. The exposure device 12 corrects the design data or the image data for exposure based on the correction data.

  Next, a specific correction method for “chip” or “projection” will be described with reference to FIG. FIG. 13 is a flowchart illustrating a process flow of the wiring drawing system according to the third embodiment. In FIG. 13, first, design data is created in the design data creation device 11 (step S311). Following step S311, the exposure apparatus 12 creates exposure image data from the design data, and an exposure process is performed based on the exposure image data (step S312). The printed circuit board after the exposure is subjected to etching and plating process processing in a wiring pattern forming apparatus (not shown) to form a wiring pattern on the printed circuit board (step S313).

  Following step S313, the optical visual inspection apparatus 13 compares the image data of the printed circuit board after the formation of the wiring pattern with the master image data (step S314). Then, the optical appearance inspection apparatus 13 detects “chip” or “projection” by this comparison (step S315). Note that the “chip” or “protrusion” detected in step S314 is stored in the database 15 with the type and the size and coordinate position of the “chip” or “protrusion” as digital data.

  Next to step S315, the information management system 14 determines whether or not defects are concentrated at the same defect location ("chip" or "projection" at the same coordinate position) rather than a predetermined defect occurrence frequency (frequency). Is determined (step S316). Here, as with the second embodiment described above as the frequency of defects, referring to the inspection results of a plurality of printed circuit boards, for example, when the number of defects at the same location exceeds a predetermined number of times, the defect at the same location A case where the rate exceeds a predetermined rate or a case where a predetermined number of defects at the same location are continuously detected is set. In step S316, regarding the “chip” or “projection” detected in step S315, a defect that does not exceed a predetermined frequency is terminated as a defect that has occurred only on a specific substrate. Further, in step S316, it is determined that the original image data is unsuitable for the edging process or the like for defects exceeding a predetermined frequency among the “chips” or “projections” detected in step S315. The process proceeds to step S317.

  In step S317, the information management system 14 refers to the inspection results (size of “chip” or “projection”) of a plurality of printed circuit boards stored in the database 15, and determines the size of defects exceeding a predetermined frequency. Statistic value, type (“chip” or “projection”), and defect coordinate position are created as correction data. The statistical value of the defect size is, for example, the average of the defect sizes of a plurality of printed circuit boards stored in the database 15. Further, for example, the statistical value of the defect size may be a minimum value, a maximum value, or a most frequent value among the defect sizes of the plurality of printed circuit boards stored in the database 15. Here, for example, it is assumed that a defect “missing” is detected. When the frequency of the defect exceeds a predetermined frequency, the information management system 14 corrects the statistical value of the size of “chip”, the type of “chip”, and the coordinate position thereof in a plurality of printed circuit boards at the same defect location. Create as. The correction data created in the information management system 14 is digital data and is stored in the database 15 for each printed circuit board material and each manufacturing process such as an etching process. The correction data created in step S317 returns to step S312 and is fed back to the exposure apparatus 12.

As described above, the correction data is stored in the database 15 for each printed circuit board material and each manufacturing process such as an etching process. Therefore, it is also possible to obtain the correction amount according to the manufacturing process such as the printed circuit board material and the etching process using the calculation formula shown below.
Correction amount = (average of chip size and protrusion size) x (substrate material variable) x (process variable)
In the above equation, the substrate material variable is a variable that varies depending on the material of the printed circuit board. The process variable is a variable that varies depending on the manufacturing process of the printed circuit board. The same applies to the above-described line width correction and line-to-line correction.

  In step S312 following step S317, the exposure apparatus 12 performs a thickening or thinning process on a partial region of the image data for exposure corresponding to the defective portion based on the correction data. A fattening process is performed for “missing”, and a thinning process is performed for “projection”. The fattening process and the thinning process are well known as general image processing. For example, there is a process of changing the pixel values in the vicinity of 4 or 8 of the target pixel, and it is only necessary to perform contraction and expansion by the number of steps corresponding to the necessary thinning and thickening amounts. In the case of design data, the pattern of the part may be scaled so as to be enlarged or reduced to a predetermined size.

  Although the information management system 14 feeds back the correction data to the exposure apparatus 12, the information management system 14 corrects the original exposure image data and the corrected exposure image data is exposed to the exposure apparatus 12. You may make it send to. Further, it is assumed that the pattern shape and size for finally performing the thickening process and the thinning process in the exposure apparatus 12 can be changed.

  As described above, the wiring forming system according to the present embodiment detects “chips” and “projections” of the wiring pattern, creates correction data with reference to the detection results of a plurality of printed circuit boards, and stores the correction data. Feedback is provided to the exposure apparatus 12. Thereby, for example, even if a wiring pattern including “chip” or “protrusion” is formed, it is possible to perform correction adapted to different occurrence frequencies for each defective portion. That is, it is possible to perform corrections suitable for actual printed circuit board production, and it is possible to improve productivity and produce high-quality printed circuit boards.

  Further, since the correction data is managed and stored in the database 15 according to the substrate material and the etching process, for example, when the substrate material is changed on the production line, quick and optimum correction can be performed. can do.

  It is also possible to combine the chip / projection correction according to the present embodiment and the line width correction according to the first embodiment described above. In this case, the chipping / projection correction is preferably performed after the line width correction. “Deficit” and “protrusion” are detected by comparing the master image data with the actual image data of the printed circuit board. Therefore, if the line width of the wiring pattern after the wiring pattern is formed is different from the line width of the design data, the difference in the line width may be detected as “chip” or “projection”. Therefore, each correction can be performed efficiently and accurately by correcting the “chip” and “projection” after performing the line width correction. Similarly, the chip / projection correction according to the present embodiment, the line width correction according to the first embodiment, and the line-to-line correction according to the second embodiment can be combined. Also in this case, it is preferable to perform the line width correction first.

(Fourth embodiment)
Next, a wiring formation system according to a fourth embodiment of the present invention will be described. In the present embodiment, the scaling correction based on the expansion / contraction rate of the printed circuit board will be described. In the wiring forming systems according to the first to third embodiments described above, when detecting a defect, a process of comparing the master image data and the image data after forming the wiring pattern is performed. Here, in order to compare two pieces of image data with high accuracy, an alignment process is usually performed to match the positions and sizes of the two pieces of image data. In other words, the scaling correction based on the expansion / contraction ratio of the printed circuit board can be performed by feeding back the expansion / contraction ratio of the printed circuit board obtained by the alignment process in the optical appearance inspection apparatus 13 to the exposure device 12 as correction data. The wiring forming system according to the present embodiment is the same as the configuration and the process flow of FIGS. 1 and 2 described in the first embodiment. Description is omitted. In this embodiment, a case where an alignment process having a three-point alignment function is applied will be described.

  As described above, the alignment process aligns the position and size of the two image data so that the image data after the formation of the wiring pattern can be compared with the master image data with high accuracy when a defect is detected. Process. In the alignment process, two or more feature points (hereinafter referred to as alignment points) on the printed circuit board after wiring pattern formation are imaged, and these positions are compared with the positions of corresponding alignment points on the master image data. . As the feature point, for example, a cross mark previously attached to a predetermined position of the printed circuit board or the master image data after the wiring pattern is formed can be used. The alignment process is realized by, for example, a three-point alignment function.

  Here, the three-point alignment function will be described with reference to FIG. FIG. 14 is a diagram for explaining the three-point alignment function. The three-point alignment function includes three alignment points M1 to M3 on the printed circuit board after forming the wiring pattern shown in FIG. 14A and three alignment points O1 to O3 in the master image data shown in FIG. 14B. Based on the calculated X-axis direction and Y-axis direction expansion ratio (ΔXo / ΔXm) and Y-axis direction expansion ratio (ΔYo / ΔYm) of the printed circuit board after the wiring pattern is formed. This is a function for changing the scale of the master image in the X-axis direction and the Y-axis direction according to the expansion / contraction rate. Here, the information management system 14 feeds back the expansion / contraction ratios in the X-axis direction and the Y-axis direction calculated in the alignment process to the exposure apparatus 12 as correction data. The exposure apparatus 12 corrects the design data and the image data for exposure according to the calculated expansion / contraction ratios in the X-axis direction and the Y-axis direction. Note that a large number of alignment points may be set and correction may be performed between the alignment points, that is, for each region, with different expansion / contraction ratios.

  As described above, the expansion / contraction rate in the X-axis direction and the Y-axis direction calculated by the alignment process is fed back to the exposure apparatus 12 as correction data, so that the printed circuit board can be expanded or contracted from the standard state. The formed wiring pattern can be formed.

  Note that the expansion / contraction ratio in the X-axis direction or the expansion / contraction ratio in the Y-axis direction calculated in the alignment process is stored in the database 15 by the information management system 14 as digital data for each manufacturing process such as printed circuit board material and etching process. The Thereby, for example, quick and optimal correction can be performed when the material of the substrate is changed on the production line.

  INDUSTRIAL APPLICABILITY The present invention is useful for improving the productivity of printed circuit boards by performing highly accurate corrections for various defects that occur in actual manufacturing.

The block diagram which shows the structure of the wiring formation system which concerns on 1st Embodiment. The flowchart which shows roughly the flow of the process in the wiring formation system which concerns on 1st Embodiment. The figure which showed typically the test | inspection method of the optical type visual inspection apparatus 13 in 1st Embodiment. Diagram showing an example of line width histogram The figure which shows an example of the line width distribution which concerns on line width correction A flowchart showing the flow of processing until correction data is fed back to the exposure apparatus 12. Flowchart showing the flow of processing after correction data is fed back The figure which shows typically the defect of the wiring pattern which occurs due to the proximity effect A flowchart showing the flow of processing until correction data is fed back to the exposure apparatus 12. Flowchart showing the flow of processing after correction data is fed back The figure which shows an example of the defect | deletion detected by comparing master image data and the image data after wiring pattern formation Schematic diagram showing the outline of the correction method for “chip” or “projection” The flowchart which shows the flow of a process of the wiring drawing system which concerns on 3rd Embodiment. Diagram for explaining the 3-point alignment function Block diagram showing the configuration of a conventional wiring formation system

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Design data creation apparatus 12 Exposure apparatus 13 Optical appearance inspection apparatus 14 Information management system 15 Database 21 Printed circuit board 22 Area | region 131 Imaging camera

Claims (17)

A wiring formation method for a printed circuit board, in which an exposure process is performed on a substrate to form a wiring pattern,
An exposure step of directly exposing the substrate using design data relating to the wiring pattern or exposure image data based on the design data, or exposing the substrate using a mask created based on the design data or the exposure image data When,
A line width measuring step for measuring the line width of the wiring pattern of the printed circuit board in which the wiring pattern is finally formed through the exposure process by the exposure step;
A line for generating line width correction data for each unit area by comparing the line width measured in the line width measurement step with the line width of the design data or the image data for exposure for each unit area. Width correction data creation step,
A wiring formation method comprising: a line width correction step of correcting the design data or the exposure image data used in the exposure step using the line width correction data.   The wiring formation method according to claim 1, wherein the line width correction data creating step creates the line width correction data based on line width measurement results of a plurality of printed circuit boards.   In the line width measurement step, a line width histogram indicating the relationship between the line width size and its frequency is created for each unit region, and the line width of the wiring pattern in the unit region is detected using the line width histogram. The wiring forming method according to claim 1, wherein:   4. The wiring according to claim 3, wherein the line width measuring step detects, for each unit region, a line width having the highest frequency in the line width histogram as a line width of a wiring pattern in the unit region. 5. Forming method. Optically inspect the printed circuit board wiring pattern created using the corrected design data or exposure image data corrected in the line width correcting step, and measure the line width of the printed circuit board wiring pattern. A line width re-measurement step for detecting a difference value between the measured line width and the line width of the design data or the image data for exposure for each unit region;
The correction step of correcting the line width correction data based on the difference value when a difference value is detected in any unit region in the line width re-measurement step. Wiring formation method. A wiring board forming system for a printed circuit board that performs exposure processing on a board to form a wiring pattern,
An exposure unit that directly exposes the substrate using design data related to the wiring pattern or exposure image data based on the design data, or exposes the substrate using a mask created based on the design data or the exposure image data When,
A line width measuring means for measuring the line width of the wiring pattern of the printed circuit board in which the wiring pattern is finally formed through the exposure processing by the exposing means;
A line for creating line width correction data for each unit region by comparing the line width measured by the line width measuring unit and the line width of the design data or the image data for exposure for each unit region. Width correction data creation means;
A wiring formation system comprising: line width correction means for correcting the design data used for the exposure means or the exposure image data using the line width correction data. A wiring formation method for a printed circuit board, in which an exposure process is performed on a substrate to form a wiring pattern,
An exposure step of directly exposing the substrate using design data relating to the wiring pattern or exposure image data based on the design data, or exposing the substrate using a mask created based on the design data or the exposure image data When,
A line-measuring step for measuring the line-to-line pattern of the printed circuit board on which the wiring pattern is finally formed through the exposure process by the exposure step;
Line correction data creation step for creating line correction data when the line measurement measured in the line measurement step is smaller than a preset minimum line;
A wiring formation method, comprising: a line-to-line correction step for correcting the design data or the exposure image data used in the exposure step by using the line-to-line correction data.   In the line-to-line correction data creation step, based on the information between the lines of the plurality of printed circuit boards measured in the line-to-line measurement step, it is determined whether or not defects between lines have occurred at a frequency exceeding a predetermined frequency. The wiring forming method according to claim 7, wherein the line-to-line correction data is created when the determination result is affirmative and the determination result is affirmative.   In the line correction data creation step, an average value, a maximum value, and a minimum value between the lines of the plurality of printed circuit boards at the defect portion, where the defect between the lines occurs at a frequency exceeding a predetermined frequency. The wiring forming method according to claim 8, wherein the line-to-line correction data is created using a value or a most frequent value. A wiring board forming system for a printed circuit board that performs exposure processing on a board to form a wiring pattern,
An exposure unit that directly exposes the substrate using design data related to the wiring pattern or exposure image data based on the design data, or exposes the substrate using a mask created based on the design data or the exposure image data When,
A line-to-line measurement unit that measures a line interval of a wiring pattern of a printed circuit board on which a wiring pattern is finally formed through an exposure process by the exposure unit;
Line correction data creating means for creating line correction data when the line measured by the line measuring means is smaller than a preset minimum line;
A wiring formation system comprising: a line correction unit that corrects the design data or the exposure image data used by the exposure unit using the line correction data. A wiring formation method for a printed circuit board, in which an exposure process is performed on a substrate to form a wiring pattern,
An exposure step of directly exposing the substrate using design data relating to the wiring pattern or exposure image data based on the design data, or exposing the substrate using a mask created based on the design data or the exposure image data When,
The image data of the printed circuit board on which the wiring pattern is finally formed through the exposure process in the exposure step is compared with the reference image data, and there is a difference exceeding the predetermined number of pixels with respect to the wiring pattern of the two image data. Chipping protrusion detection step for detecting a point as a defective point;
A chip protrusion correction data creation step for creating chip protrusion correction data based on the defect location detected in the chip protrusion detection step;
A wiring forming method, comprising: a chip protrusion correction step of correcting the design data or the exposure image data used in the exposure step using the chip protrusion correction data.   The chipped protrusion correction data creation step determines whether or not a defect has occurred at a frequency exceeding a predetermined frequency based on the information on the defective portion of the plurality of printed circuit boards detected in the chipped protrusion detection step, 12. The wiring forming method according to claim 11, wherein the chipped protrusion correction data is created when the determination result is affirmative.   The chipped protrusion correction data creation step is an average of differences between the image data of the plurality of printed circuit boards and the reference image data at the defect location, where the defect occurs at a frequency exceeding a predetermined frequency. The wiring formation method according to claim 12, wherein the chipped protrusion correction data is created using a value, a maximum value, a minimum value, or a most frequent value.   The wiring formation method according to claim 11, wherein the chipped protrusion correction data is for enlarging or reducing the design data or the image data for exposure according to the magnitude of the difference between the wiring patterns. A wiring board forming system for a printed circuit board that performs exposure processing on a board to form a wiring pattern,
An exposure unit that directly exposes the substrate using design data related to the wiring pattern or exposure image data based on the design data, or exposes the substrate using a mask created based on the design data or the exposure image data When,
The image data of the printed circuit board on which the wiring pattern is finally formed through the exposure process by the exposure means is compared with the reference image data, and there is a difference exceeding the predetermined number of pixels with respect to the wiring pattern of the two image data. Chipping protrusion detecting means for detecting a spot as a defective spot;
Chipped protrusion correction data creating means for creating chipped protrusion correction data based on the defect location detected by the chipped protrusion detecting means;
A wiring formation system comprising: the chip projection correction data that corrects the design data or the exposure image data used by the exposure unit using the chip projection correction data.   The wiring forming system according to claim 15, wherein the chipped protrusion correction data is for enlarging or reducing the design data or the image data for exposure according to the magnitude of the difference between the wiring patterns. The design data or exposure corrected by the line width correction process after performing the line width correction process comprising the exposure step, the line width measurement step, the line width correction data creation step, and the line width correction step according to claim 1 Based on the image data for
A line-to-line correction process comprising the exposure step, line-to-line measurement step, line-to-line correction data creation step, and line-to-line correction step according to claim 7, and exposure step, chipped protrusion detection step, and chipping A wiring formation method comprising performing at least one of a missing projection correction process including a projection correction data creation step and a missing projection correction step.

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