JP2007072485A - Electronic circuit, electro-optical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To exactly control a conduction state of a driving transistor. <P>SOLUTION: In a pixel circuit 30 comprising a driving transistor Q1, a transistor Q2, a switching transistor Q3, and a holding capacitor Co, the driving transistor Q1 is connected to a first power source line VL1 and the holding capacitor Co is connected to a second power source line VL2. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an electronic circuit, an electro-optical device, and an electronic apparatus.

  In recent years, an electro-optical device having a plurality of electro-optical elements widely used as a display device has been required to have high definition or a large screen, and in response to this, each of the plurality of electro-optical elements is driven. Therefore, the specific gravity of the active matrix drive type electro-optical device including the pixel circuit for the passive drive type electro-optical device is increasing. However, in order to achieve even higher definition or a larger screen, it is necessary to control each electro-optic element precisely. For this purpose, it is necessary to compensate for characteristic variations of active elements constituting the pixel circuit.

  As a compensation method of the characteristic variation of the active element, for example, a display device including a pixel circuit including a diode-connected transistor for compensating the characteristic variation (see, for example, Patent Document 1) has been proposed.

Japanese Patent Laid-Open No. 11-272233

  By the way, a pixel circuit that compensates for variations in characteristics of active elements is generally composed of four or more transistors, which leads to a decrease in yield and aperture ratio.

  One object of the present invention is to solve the above-described problems, and an electronic circuit, a driving method of an electronic circuit, an electro-optical device, which can reduce the number of transistors constituting a pixel circuit or a unit circuit, It is an object to provide an electro-optical device driving method and an electronic apparatus.

An electronic circuit according to the present invention includes a plurality of data lines, a plurality of first power supply lines, a plurality of second power supply lines, and a plurality of unit circuits, and each of the plurality of unit circuits includes: A first transistor including a first gate, a first source, and a first drain; a capacitor including a first electrode and a second electrode; a second gate; a second source; And a second transistor that controls conduction between the first drain and the first gate, and through one data line of the plurality of data lines, By setting the potential of the first electrode of the capacitor to the potential corresponding to the data signal supplied in the first period, the gate voltage of the first gate is set, and according to the gate voltage A plurality of driving currents having a current level in the second period; An electronic element is supplied from one first power supply line of one power supply line to the electronic element via the first transistor, and the second electrode is one of the plurality of second power supply lines. It is connected to two power lines.
In the above electronic circuit, the electronic element may be connected in series to the first transistor.
In the above electronic circuit, it is preferable that the one second power supply line is set to a predetermined potential.
In the above electronic circuit, the predetermined potential may be constantly supplied to the one second power supply line.
In the above electronic circuit, the plurality of first power supply lines may intersect with the plurality of data lines.
In the above electronic circuit, the plurality of second power supply lines may intersect with the plurality of data lines.
In the electronic circuit described above, control for setting each potential of the plurality of first power supply lines to a plurality of potentials or controlling supply and cutoff of a drive voltage to each of the plurality of first power supply lines A circuit may be further provided.

The electro-optical device according to the present invention includes a plurality of scanning lines, a plurality of data lines, a plurality of first power supply lines, a plurality of second power supply lines, and a plurality of unit circuits. Each of the unit circuits includes a first transistor having a first gate, a first source, and a first drain, a capacitor having a first electrode and a second electrode, a second transistor, A plurality of data, comprising: a second transistor comprising a gate, a second source, and a second drain, wherein the second transistor controls conduction between the first drain and the first gate; and an electro-optic element. The potential of the first electrode of the capacitor is set to a potential corresponding to a data signal supplied during the first period via one of the data lines. The gate voltage is set and has a current level according to the gate voltage A drive current is supplied from one first power line of the plurality of first power lines to the electro-optic element through the first transistor in the second period, and the second electrode is The second power line is connected to one of the plurality of second power lines.
In the above electro-optical device, the electro-optical element may be connected in series to the first transistor.
In the above electro-optical device, the first transistor may be connected to the one first power supply line.
In the electro-optical device, the one second power line may be set to a predetermined potential.
In the electro-optical device, the plurality of first power lines may intersect the plurality of data lines.
In the electro-optical device, the potential of the one second power supply line may be set to the predetermined potential independently of the one first power supply line.
The electronic circuit or the electro-optical device can be mounted on an electronic device.

The first electronic circuit of the present invention is an electronic circuit including a plurality of unit circuits, including a first power supply line, and each of the plurality of unit circuits is connected in series to an electronic element and the first circuit. A first transistor connected to one power supply line; a second transistor that controls conduction between the drain of the first transistor and the gate of the first transistor; and the conduction state of the first transistor. A current source that outputs a data current for setting and a third transistor that controls conduction between the first transistor and at least a portion of a period in which the third transistor is in an ON state The first power supply line is electrically disconnected from the driving voltage, and the first power supply line is connected to the first power supply line during at least a part of the period in which the third transistor is off. Between the serial electronic device, wherein the current corresponding to the conductive state of the first transistor which is set by the data current to the first transistor.
In the above electronic circuit, “controlling conduction between the drain of the first transistor and the gate of the first transistor” means that the drain of the first transistor, the gate of the first transistor, In addition to the case where they are directly electrically connected, the case where they are electrically connected via an element such as another transistor such as the third transistor or a wiring is also included.

  The second electronic circuit of the present invention is an electronic circuit including a plurality of unit circuits, and sets the first power supply line and the first power supply line to a plurality of potentials, or the first power supply line. Each of the plurality of unit circuits is connected to the electronic element in series with the first power line. A first transistor connected to the first transistor; a second transistor for controlling conduction between the drain of the first transistor and the gate of the first transistor; and setting the conduction state of the first transistor. And a third transistor for controlling conduction between the first transistor and the first transistor, wherein at least a portion of the period in which the third transistor is in the off state is Between the first power supply line and the electronic device, wherein the current corresponding to the conductive state of the first transistor which is set by the data current to the first transistor.

In the above electronic circuit, “drain” refers to the relative relationship between the potentials of two terminals sandwiching the channel of the first transistor when a data current flows through the first transistor, and the conductivity type of the first transistor. Determined by. For example, when the first transistor is p-type, a terminal having a low potential among the two terminals of the first transistor is referred to as “drain”, and when the first transistor is n-type, Of these two terminals of the first transistor, a terminal having a high potential is referred to as a “drain”.
In the above electronic circuit, the “electronic element” is, for example, an electro-optical element, a resistance element, a diode, or the like.

  The third electronic circuit in the present invention is an electronic circuit including a plurality of unit circuits, and each of the plurality of unit circuits has a first terminal, a second terminal, and a first control terminal. A first transistor; a third terminal; a fourth terminal; the third terminal being connected to the first control terminal; and an electrical connection between the second terminal and the third terminal. A third transistor having a second transistor, a fifth terminal, and a sixth terminal, the fifth terminal being connected to the first terminal, and a seventh terminal. And an eighth terminal, wherein the seventh terminal includes a capacitive element connected to the first control terminal and the third terminal, and the first terminal is the plurality of units. The first power supply line is connected together with the first terminal of the other unit circuit of the circuit, and the potential of the first power supply line is set to a plurality of potentials. Set, or includes a control circuit for controlling the supply and cutoff of the drive voltage to the first power supply line.

  The first transistor, the first terminal, the second terminal, and the first control terminal are the driving transistor Q1, the source of the driving transistor Q1, the pixel circuit of FIG. This corresponds to the drain of the driving transistor Q1 and the gate of the driving transistor Q1.

The second transistor, the third terminal, the fourth terminal, and the second control terminal correspond to the transistor Q2, the source of the transistor Q2, the drain of the transistor Q2, and the gate of the transistor Q2, respectively.
Further, the third transistor, the fifth terminal, the sixth terminal, and the third control terminal correspond to the switching transistor Q3, the source of the switching transistor Q3, the drain of the switching transistor Q3, and the gate of the switching transistor Q3, respectively. is doing.
The capacitive element, the seventh terminal, and the eighth terminal correspond to the holding capacitor Co, the first electrode La of the holding capacitor Co, and the second electrode Lb of the holding capacitor Co, respectively.
According to this, it is possible to configure a unit circuit in which the number of transistors used is reduced as compared with the conventional one.

The fourth electronic circuit in the present invention is an electronic circuit including a plurality of unit circuits, and each of the plurality of unit circuits has a first terminal, a second terminal, and a first control terminal. A first transistor; a third terminal; a fourth terminal; the third terminal being connected to the first control terminal; and an electrical connection between the second terminal and the fourth terminal. A third transistor having a second transistor, a fifth terminal, and a sixth terminal, the fifth terminal being connected to the first terminal, and a seventh terminal. And an eighth terminal, wherein the seventh terminal includes a capacitive element connected to the first control terminal and the third terminal, and the first terminal is the plurality of units. The eighth terminal is connected to the first power supply line together with the first terminal of the other unit circuit of the circuit, and the eighth terminal is the plurality of unit circuits. Connected to a second power supply line held at a predetermined potential together with the eighth terminal of another unit circuit, and sets the potential of the first power supply line to a plurality of potentials, or the first power supply line A control circuit for controlling supply and cut-off of the drive voltage to the.
According to this, the unit circuit can be configured by reducing the number of transistors used as compared with the conventional one, and in addition, the voltage can be stably held in the capacitive element.

In the above electronic circuit, the transistors included in each of the unit circuits are only the first transistor, the second transistor, and the third transistor.
According to this, the unit circuit can be configured by reducing the number of transistors used by one as compared with the conventional one.
In the electronic circuit, an electronic element is connected to the second terminal.
According to this, the electronic device can be controlled with a circuit that uses one less transistor than the conventional one.
In the above electronic circuit, the electronic element may be a current driving element.
According to this, the current drive element can be controlled with a circuit that uses one less transistor than the conventional one.
In the electronic circuit, the control circuit is a fourth transistor having a ninth terminal and a tenth terminal, the ninth terminal is connected to the drive voltage, and the tenth terminal is the It may be connected to the first power line.
According to this, the control circuit can be easily configured.

  A first electronic circuit driving method of the present invention is an electronic circuit driving method including a plurality of unit circuits, wherein the electronic circuit includes a first power supply line, and each of the plurality of unit circuits includes: A first transistor connected in series to the electronic element and connected to the first power supply line; and a second transistor for controlling conduction between the drain of the first transistor and the gate of the first transistor. A transistor, a current source that outputs a data current for setting a conduction state of the first transistor, and a third transistor that controls conduction between the first transistor and the third transistor. A first step of supplying the data current to the first transistor in an on state to set a conduction state of the first transistor; and turning off the third transistor; A second step of flowing a current according to the conduction state of the first transistor between the first power supply line and the electronic element, wherein the data current of the first step is supplied to the first element. In at least one part of the period for supplying to one transistor, the first power supply line is electrically disconnected from the driving voltage, and the second step is performed in at least one part of the period. The drive voltage is applied to one of the drain and the source of one transistor through the first power supply line.

  The second electronic circuit driving method of the present invention includes a first transistor having a first terminal, a second terminal, and a first control terminal, a third terminal, and a fourth terminal. A second transistor having the third terminal connected to the first control terminal and the fourth terminal connected to the second terminal; a fifth terminal and a sixth terminal; A third transistor having the first terminal connected to the fifth terminal, a seventh terminal, and an eighth terminal, wherein the seventh terminal is used for the first control. A plurality of unit circuits including a terminal and a capacitive element connected to the third terminal, wherein the first terminal is a first unit together with the first terminal of a series of unit circuits of the plurality of unit circuits. A method of driving an electronic circuit connected to a power supply line, wherein the first power supply line is electrically disconnected from a drive voltage. By electrically disconnecting the first terminal of the series of unit circuits from the driving voltage, and turning on the third transistor of the series of unit circuits, A charge amount according to a current level of a current flowing through the capacitor element is held in the capacitor element, and a voltage according to the charge amount is applied to the first control terminal, so that the first terminal and the second terminal Setting a conduction state between the first and second terminals; turning off the third transistor; and electrically connecting the first terminal of the series of unit circuits to the driving voltage; ,including.

The third electronic circuit driving method of the present invention includes a first transistor having a first terminal, a second terminal, and a first control terminal, and a third terminal and a fourth terminal. A second transistor having the third terminal connected to the first control terminal and the fourth terminal connected to the second terminal, and a fifth terminal and a sixth terminal. And a third transistor having the first terminal connected to the fifth terminal, a seventh terminal, and an eighth terminal, wherein the seventh terminal is the first control terminal. And a plurality of unit circuits connected to the third terminal, the first terminal together with the first terminal of a series of unit circuits of the plurality of unit circuits being a first The eighth terminal is connected to a power supply line and the eighth terminal of the series of unit circuits of the plurality of unit circuits. A method of driving an electronic circuit, both of which are connected to a second power supply line, wherein the first power supply line is electrically disconnected from a drive voltage, whereby the first terminals of the series of unit circuits By electrically disconnecting from the driving voltage and turning on the third transistor of the series of unit circuits, the amount of electric charge according to the current level of the current flowing through the first transistor can be increased. Holding in a capacitive element, applying a voltage according to the amount of charge to the first control terminal, and setting a conduction state between the first terminal and the second terminal; And turning off the third transistor and electrically connecting the first terminal of the series of unit circuits to the driving voltage.
According to the above electronic circuit driving method, the number of transistors in the unit circuit can be reduced as much as possible.

  The first electro-optical device of the present invention includes a plurality of scanning lines, a plurality of data lines, a plurality of first power supply lines, and a plurality of unit circuits, and each of the plurality of unit circuits includes: A first transistor connected in series to an electro-optic element and connected to a corresponding first power supply line of the first power supply lines; a drain of the first transistor; and a first transistor A second transistor that controls conduction with a gate; and conduction between the first transistor and a corresponding data line of the plurality of data lines, and through a corresponding scanning line of the plurality of scanning lines. A third transistor controlled by a scanning signal supplied in the first and second power supply lines, and the corresponding first power supply line is driven at a driving voltage in at least a part of a period in which the third transistor is in an ON state. From electric Period in which the first transistor is turned on by the data current supplied from the corresponding data line flowing through the first transistor, and the third transistor is in the off state. The drive voltage is applied to one of the drain and the source of the first transistor in at least a part of the period, and between the corresponding first power supply line and the electro-optic element, A current according to the conduction state of the first transistor set by the data current flows.

  In the above electro-optical device, “controlling conduction between the drain of the first transistor and the gate of the first transistor” means that the drain of the first transistor and the gate of the first transistor And the case where they are electrically connected via an element such as another transistor such as the third transistor or a wiring such as the corresponding data line.

  The second electro-optical device of the present invention is an electro-optical device including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits, and each of the plurality of unit circuits is a first one. A first transistor having a first terminal, a second terminal, and a first control terminal, a third terminal, a fourth terminal, and a second control terminal. A second transistor having the third terminal connected to the terminal; a fifth terminal; a sixth terminal; and a third control terminal; the fifth terminal serving as the first terminal. And a third terminal connected to one data line of the plurality of data lines, and the third control terminal connected to one scanning line of the plurality of scanning lines. Transistor, a seventh terminal, and an eighth terminal, wherein the seventh terminal is the first control terminal and the third terminal. And the first terminal is connected to a first power supply line together with the first terminal of another unit circuit of the plurality of unit circuits, and the potential of the first power supply line Is provided with a plurality of potentials, or a control circuit for controlling the supply and shutoff of the drive voltage to the power supply line is provided.

A third electro-optical device of the present invention is an electro-optical device including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits, each of the plurality of unit circuits being a first one. A first transistor having a first terminal, a second terminal, and a first control terminal, a third terminal, a fourth terminal, and a second control terminal. The third terminal is connected to the terminal, the second transistor for controlling the electrical connection between the second terminal and the fourth terminal, the fifth terminal, the sixth terminal, and the third control terminal The fifth terminal is connected to the first terminal, the sixth terminal is connected to one data line of the plurality of data lines, and the third control terminal Has a third transistor connected to one of the plurality of scan lines, a seventh terminal, and an eighth terminal, A seventh terminal including a capacitive element connected to the first control terminal and the third terminal, wherein the first terminal is the first unit of another unit circuit of the plurality of unit circuits. The eighth terminal is connected to a first power supply line together with a terminal, and the eighth terminal is connected to a second power supply line held at a predetermined potential together with the eighth terminal of another unit circuit of the plurality of unit circuits, A control circuit is provided for setting the potential of the first power supply line to a plurality of potentials, or for controlling the supply and cutoff of the drive voltage to the first power supply line.
In the above electro-optical device, the number of transistors in the unit circuit can be reduced as much as possible.

  In the electro-optical device, it is preferable that the transistors included in each of the unit circuits are only the first transistor, the second transistor, and the third transistor.

  In the above electro-optical device, the control circuit is a fourth transistor having a ninth terminal and a tenth terminal, the ninth terminal is connected to the driving voltage, and the tenth terminal is It is preferable to be connected to the first power supply line.

According to this, the control circuit can be easily configured.
In the above electro-optical device, the electro-optical element may be an EL element, for example. Among them, a current driving element such as an organic EL element is preferable.

  The first electro-optical device driving method of the present invention is an electro-optical device driving method, and the electro-optical device includes a plurality of scanning lines, a plurality of data lines, and a plurality of first power supply lines. A plurality of unit circuits, each of the plurality of unit circuits being connected in series to the electro-optic element and connected to a corresponding first power supply line among the first power supply lines. A transistor, a second transistor that controls conduction between the drain of the first transistor and the gate of the first transistor, and a data line corresponding to the first transistor and the plurality of data lines And a third transistor controlled by a scanning signal supplied through a corresponding scanning line among the plurality of scanning lines, wherein the third transistor is in an on state and the corresponding First to A first current for setting a conduction state of the first transistor by flowing a data current supplied from the corresponding data line to the first transistor in a state where the power supply line is electrically disconnected from the driving voltage. And when the third transistor is in an off state and the drive voltage is applied to any one of the drain and the source of the first transistor through the corresponding first power line. And a second step of flowing a current corresponding to the conduction state of the first transistor set by the data current between the corresponding first power line and the electro-optic element. And

  The second electro-optical device driving method according to the present invention includes a first transistor having a first terminal, a second terminal, and a first control terminal, a third terminal, a fourth terminal, and a second terminal. A second transistor having a second control terminal, the third terminal being connected to the first control terminal, and the fourth terminal being connected to the second terminal; A third transistor having a first terminal, a sixth terminal, and a third control terminal, wherein the fifth terminal is connected to the first terminal, and a seventh terminal and an eighth terminal. A plurality of unit circuits including a capacitor element connected to the first control terminal and the third terminal, and an electro-optic element connected to the second terminal. The sixth terminal is connected to one data line of the plurality of data lines, and the third control terminal is one of the plurality of scanning lines. And the first terminal is connected to a first power supply line together with the first terminals of the other unit circuits of the plurality of unit circuits. By electrically disconnecting the first power supply line from the driving voltage, the first terminal of the series of unit circuits is electrically disconnected from the driving voltage, and the third terminal of the series of unit circuits. Is turned on, the charge amount corresponding to the current level of the current flowing through the first transistor is held in the capacitor element, and the voltage corresponding to the charge amount is set in the first control. And applying to a terminal for setting a conduction state between the first terminal and the second terminal; turning off the third transistor; and 1 terminal to the first Through the power line and a step of electrically connecting to the driving voltage.

  The third electro-optical device driving method according to the present invention includes a first transistor having a first terminal, a second terminal, and a first control terminal, a third terminal, a fourth terminal, and a second terminal. A second transistor having a second control terminal, the third terminal being connected to the first control terminal, and the fourth terminal being connected to the second terminal; A third transistor having a first terminal, a sixth terminal, and a third control terminal, wherein the fifth terminal is connected to the first terminal, and a seventh terminal and an eighth terminal. A plurality of unit circuits, wherein the seventh terminal includes a capacitive element connected to the first control terminal and the third terminal, and an electro-optic element connected to the second terminal. The sixth terminal is connected to one data line of the plurality of data lines, and the third control terminal is a plurality of scanning lines. The first terminal is connected to a first power line together with the first terminal of another unit circuit of the plurality of unit circuits, and the eighth terminal is connected to the plurality of scanning lines. A driving method of an electro-optical device connected to a second power supply line together with the eighth terminal of another unit circuit of the unit circuit, wherein the first power supply line is electrically disconnected from the driving voltage. The first terminal of the series of unit circuits is electrically disconnected from the driving voltage, and the third transistor of the series of unit circuits is turned on to pass through the first transistor. The charge amount corresponding to the current level of the flowing current is held in the capacitor element, and a voltage corresponding to the charge amount is applied to the first control terminal, so that the first terminal and the second terminal Set the continuity with the terminal And step, as well as to the third transistor in the OFF state of, and a step of electrically connecting said first terminal of said series of unit circuits to the driving voltage through the first power line.

  According to the driving method of the electro-optical device described above, it is possible to compensate for the characteristic variation of the transistor that determines the current or voltage supplied to the electro-optical element and to reduce the number of transistors constituting the pixel circuit as much as possible.

A first electronic device according to the present invention is characterized by mounting the electronic circuit described above.
The electronic circuit can be used for an active drive unit having an active function such as a display unit or a memory unit of the electronic device.

A second electronic device according to the present invention includes the above-described electro-optical device.
Since the electro-optical device can control the state of the electro-optical element with high accuracy and has a high aperture ratio, it is possible to provide an electronic apparatus having a display unit with excellent display quality.
In addition, since the number of transistors constituting the pixel circuit is reduced as much as possible, the electro-optical device can suppress the manufacturing cost.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block circuit diagram showing a circuit configuration of an organic EL display as an electro-optical device. FIG. 2 is a block circuit diagram showing a circuit configuration of the display panel unit and the data line driving circuit. FIG. 3 is a circuit diagram of the pixel circuit. FIG. 4 is a timing chart for explaining a driving method of the pixel circuit.

  The organic EL display 10 includes a signal generation circuit 11, an active matrix unit 12, a scanning line driving circuit 13, a data line driving circuit 14, and a power supply line control circuit 15. The signal generation circuit 11, the scanning line driving circuit 13, the data line driving circuit 14, and the power supply line control circuit 15 of the organic EL display 10 may be configured by independent electronic components. For example, the signal generation circuit 11, the scanning line driving circuit 13, the data line driving circuit 14, and the power supply line control circuit 15 may each be constituted by a one-chip semiconductor integrated circuit device. In addition, the signal generation circuit 11, the scanning line driving circuit 13, the data line driving circuit 14, and the power supply line control circuit 15 are all or partly configured by a programmable IC chip, and the function is software by a program written in the IC chip. May be realized.

  The signal generation circuit 11 creates a scanning control signal and a data control signal for displaying an image on the active matrix unit 12 based on image data from an external device (not shown). The signal generation circuit 11 outputs the scan control signal to the scan line drive circuit 13 and outputs the data control signal to the data line drive circuit 14. In addition, the signal generation circuit 11 outputs a timing control signal to the power supply line control circuit 15.

  As shown in FIG. 2, the active matrix portion 12 extends along the row direction and M data lines Xm (m = 1 to M; m is a natural number) extending along the column direction. It has a pixel circuit 20 as a plurality of unit circuits arranged at a position corresponding to an intersection with N scanning lines Yn (n = 1 to N; n is a natural number). A plurality of pixel circuits 20 form one electronic circuit.

  In other words, the pixel circuits 20 are arranged in a matrix by being connected to the data lines Xm extending along the column direction and the scanning lines Yn extending along the row direction, respectively. . Each pixel circuit 20 is connected to a first power supply line VL1 extending in parallel with the scanning line Yn. Each first power supply line VL1 is driven to a voltage supply line Lo that supplies a drive voltage Vdd as a drive voltage extending along the column direction of the pixel circuit 20 disposed on the right end side of the active matrix portion 12. They are connected via a voltage supply transistor Qv.

  As illustrated in FIG. 2, the pixel circuit 20 includes an organic EL element 21 as an electro-optical element or an electronic element in which a light emitting layer is formed of an organic material. The pixel circuit 20 is supplied with the drive voltage Vdd via the first power supply line VL1 when the drive voltage supply transistor Qv is turned on. Note that a transistor, which will be described later, disposed in each pixel circuit 20 is composed of a TFT (Thin Film Transistor).

  The scanning line driving circuit 13 selects one scanning line from among the N scanning lines Yn arranged in the active matrix unit 12 based on the scanning control signal output from the signal generation circuit 11, A scanning signal is output to the selected scanning line.

  As shown in FIG. 2, the data line driving circuit 14 includes a plurality of single line drivers 23. Each single line driver 23 is connected to a corresponding data line Xm disposed in the active matrix unit 12. The data line drive circuit 14 generates data currents Idata1, Idata2,..., IdataM based on the data control signal output from the signal generation circuit 11, respectively. The data line driving circuit 14 outputs the generated data currents Idata1, Idata2,..., IdataM to each pixel circuit 20 via the data line Xm. When the internal state of the pixel circuit 20 is set according to the data currents Idata1, Idata2,..., IdataM, the current levels of the data currents Idata1, Idata2,. Accordingly, the drive current Iel supplied to the organic EL element 21 is controlled.

The power supply line control circuit 15 is connected to the gate of the drive voltage supply transistor Qv via the power supply line control line F. The power supply line control circuit 15 generates and supplies a power supply line control signal SFC that determines the on / off state of the drive voltage supply transistor Qv based on the timing control signal output from the signal generation circuit 11.
When the drive voltage supply transistor Qv is turned on, the drive voltage Vdd is supplied to the first power supply line VL1, and the drive voltage Vdd is supplied to the pixel circuit 20 connected to the first power supply line VL1. Is done.

Next, the pixel circuit 20 of the organic EL display 10 will be described below.
As shown in FIG. 3, the pixel circuit 20 includes a driving transistor Q1, a transistor Q2, a switching transistor Q3, and a holding capacitor Co.

  The conductivity type of drive transistor Q1 is p-type (p-channel). The conductivity types of the transistor Q2 and the switching transistor Q3 are n-type (n-channel), respectively.

  The drain of the driving transistor Q1 is connected to the anode of the organic EL element 21 and the drain of the transistor Q2. The cathode of the organic EL element 21 is grounded. The source of the transistor Q2 is connected to the gate of the driving transistor Q1. The gate of the transistor Q2 is connected to the second sub-scanning line Yn2 together with the gates of the transistors Q2 of other pixel circuits 20 arranged along the row direction of the active matrix portion 12.

  The gate of the driving transistor Q1 is connected to the first electrode La of the holding capacitor Co, and the second electrode Lb of the holding capacitor Co is connected to the source of the driving transistor Q1.

  The source of the driving transistor Q1 is connected to the source of the switching transistor Q3. The drain of the switching transistor Q3 is connected to the data line Xm. The gate of the switching transistor Q3 is connected to the first sub scanning line Yn1. Note that the first sub-scanning line Yn1 and the second sub-scanning line Yn2 constitute a scanning line Yn.

  The source of the driving transistor Q1 is connected to the first power supply line VL1 together with the sources of the driving transistors Q1 of the other pixel circuits 20. The first power supply line VL1 is connected to the drain as the tenth terminal of the drive voltage supply transistor Qv. The source as the ninth terminal of the driving voltage supply transistor Qv is connected to the voltage supply line Lo.

  The conductivity type of the driving voltage supply transistor Qv is p-type (p-channel). The drive voltage supply transistor Qv is electrically disconnected (off state) and electrically connected (in accordance with a power line control signal SFC supplied from the power line control circuit 15 via the power line control line F). ON state). When the drive voltage supply transistor Qv is turned on, the drive voltage Vdd is supplied to the drive transistor Q1 of each pixel circuit 20 connected to the first power supply line VL1 to which the drive voltage supply transistor Qv is connected.

  Next, a driving method of the pixel circuit 20 configured as described above will be described with reference to FIG. In FIG. 4, the driving cycle Tc means a cycle in which the luminance of the organic EL element 21 is updated once, and usually corresponds to a frame cycle.

  First, as shown in FIG. 4, the data current Idata is supplied from the data line driving circuit 14. In this state, the first scanning signal SC1 for turning on the switching transistor Q3 is supplied from the scanning line driving circuit 13 to the gate of the switching transistor Q3 via the first sub-scanning line Yn1. At this time, the second scanning signal SC2 for turning on the transistor Q2 is supplied from the scanning line driving circuit 13 to the gate of the transistor Q2 via the second sub-scanning line Yn2.

  As a result, the switching transistor Q3 and the transistor Q2 are turned on. The data current Idata flows through the drive transistor Q1. As a result, the charge amount corresponding to the data current Idata is held in the holding capacitor Co, and the conduction state between the source and drain of the drive transistor Q1 is set according to the gate voltage Vo corresponding to the charge amount.

  Thereafter, a first scanning signal SC1 for turning off the switching transistor Q3 is supplied from the scanning line driving circuit 13 to the gate of the switching transistor Q3 via the first sub-scanning line Yn1. At this time, the second scanning signal SC2 for turning off the transistor Q2 is supplied from the scanning line driving circuit 13 to the gate of the transistor Q2 via the second sub-scanning line Yn2.

As a result, the switching transistor Q3 and the transistor Q2 are turned off, and the data line Xm and the driving transistor Q1 are electrically disconnected.
The drive voltage supply transistor Qv supplies a power supply line control signal for turning off the drive voltage supply transistor Qv supplied from the power supply line control circuit 15 at least during a period when the data current Idata is supplied to the drive transistor Q1. When the SFC is supplied, the SFC is turned off.

  Subsequently, a power supply line control signal Sv for turning on the drive voltage supply transistor Qv is supplied from the power supply line control circuit 15 to the gate of the drive voltage supply transistor Qv via the power supply line control line F. Then, the drive voltage supply transistor Qv is turned on, and the drive voltage Vdd is supplied to the source of the drive transistor Q1.

Thereby, the drive current Iel corresponding to the conduction state set by the data current is supplied to the organic EL element 21, and the organic EL element 21 emits light. At this time, in order to make the drive current Iel substantially equal to the data current Idata, the drive transistor Q1 is preferably set to be driven in a saturation region.
As described above, by using the data current Idata as the data signal, variations in various parameters of the electric characteristics of the driving transistor Q1, such as a threshold voltage and a gain coefficient, are compensated for each driving transistor Q1.
Until the driving voltage supply transistor Qv is turned off, the organic EL element 21 continues to emit light with a luminance corresponding to the data current Idata.
As described above, the pixel circuit 20 can use one less transistor than a conventional pixel circuit that requires four transistors. Therefore, the yield and aperture ratio in the manufacture of the transistor of the pixel circuit 20 can be improved.

  According to the electronic circuit and the electro-optical device of the above-described embodiment, the following characteristics can be obtained.

  (1) In this embodiment, the pixel circuit 20 is configured by the driving transistor Q1, the transistor Q2, the switching transistor Q3, and the holding capacitor Co. Then, a first power supply line VL1 that supplies a drive voltage Vdd for driving the drive transistor Q1, and a voltage supply that extends along the column direction of the pixel circuit 20 provided on the right end side of the active matrix portion 12. A drive voltage supply transistor Qv is connected between the line Lo.

  With this configuration, the pixel circuit 20 can use fewer transistors than the conventional one. Therefore, it is possible to provide the organic EL display 10 having a pixel circuit suitable for improving the yield and aperture ratio in the manufacture of transistors.

(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIG. In the present embodiment, the same constituent members as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  FIG. 5 is a block circuit diagram showing a circuit configuration of the active matrix portion 12a and the data line driving circuit 14 of the organic EL display 10 in the present embodiment. FIG. 6 is a circuit diagram of the pixel circuit 30 disposed in the active matrix portion 12a.

  In the active matrix portion 12, a second power supply line VL2 is disposed in parallel with the first power supply line VL1. Each of the plurality of second power supply lines VL2 is connected to the holding capacitor Co of each pixel circuit 30 as shown in FIG. 6, and is also connected to the voltage supply line Lo.

  As shown in FIG. 6, the pixel circuit 30 includes a drive transistor Q1, a transistor Q2, a switching transistor Q3, and a holding capacitor Co.

  The drain of the driving transistor Q1 is connected to the anode of the organic EL element 21 and the drain of the transistor Q2. The cathode of the organic EL element 21 is grounded. The source of the transistor Q2 is connected to the gate of the driving transistor Q1 and to the first electrode of the holding capacitor Co. The gate of the transistor Q2 is connected to the second sub scanning line Yn2.

The second electrode Lb of the holding capacitor Co is connected to the second power supply line VL2. As a result, the driving voltage Vdd, which is a constant voltage, is constantly and independently supplied to the holding capacitor Co independently of the ON / OFF state of the driving voltage supply transistor Qv.
By connecting the second electrode Lb of the holding capacitor Co to the second power supply line VL2 in this way, when the data current Idata is supplied to the drive transistor Q1, a drive voltage is applied to the source of the drive transistor Q1. Occasionally, fluctuations in the voltage generated in the holding capacitor Co can be suppressed.
As a result, the pixel circuit 30 can obtain the same effects as those of the first embodiment described above, and more accurately control the luminance gradation of the organic EL element 21 compared to the first embodiment described above. can do.

  The source of the driving transistor Q1 is connected to the first power supply line VL and to the source of the switching transistor Q3. The drain of the switching transistor Q3 is connected to the data line Xm. The gate of the switching transistor Q3 is connected to the first sub scanning line Yn1.

Next, a driving method of the pixel circuit 30 configured as described above will be described.
First, the data current Idata is supplied from the data line driving circuit 14. In this state, the first scanning signal SC1 for turning on the switching transistor Q3 is supplied from the scanning line driving circuit 13 to the gate of the switching transistor Q3 via the first sub-scanning line Yn1. At this time, the second scanning signal SC2 for turning on the transistor Q2 is supplied from the scanning line driving circuit 13 to the gate of the transistor Q2 via the second sub-scanning line Yn2.

  Then, the switching transistor Q3 and the transistor Q2 are each turned on. Then, the data current Idata passes through the drive transistor Q1 and the transistor Q2, and a charge amount corresponding to the data current Idata is held in the holding capacitor Co.

  Thereby, the conduction state between the source and the drain of the driving transistor Q1 is set.

Thereafter, a first scanning signal SC1 for turning off the switching transistor Q3 is supplied from the scanning line driving circuit 13 to the gate of the switching transistor Q3 via the first sub-scanning line Yn1. At this time, the second scanning signal SC2 for turning off the transistor Q2 is supplied from the scanning line driving circuit 13 to the gate of the transistor Q2 via the second sub-scanning line Yn2. As a result, the switching transistor Q3 and the transistor Q are turned off, and the data line Xm and the driving transistor Q1 are electrically disconnected.
The drive voltage supply transistor Qv supplies a power supply line control signal for turning off the drive voltage supply transistor Qv supplied from the power supply line control circuit 15 at least during a period when the data current Idata is supplied to the drive transistor Q1. When the SFC is supplied, the SFC is turned off.

  Subsequently, a power supply line control signal Sv for turning on the drive voltage supply transistor Qv from the power supply line control circuit 15 is supplied to the gate of the drive voltage supply transistor Qv via the power supply line control line F. Then, the drive voltage supply transistor Qv is turned on, and the drive voltage Vdd is supplied to the source of the drive transistor Q1. At this time, the driving voltage Vdd is always supplied independently to the second electrode Lb of the holding capacitor Co independently of the ON / OFF state of the driving voltage supply transistor Qv, and therefore, it is relative to the data current Idata. This occurs in the holding capacitor Co when the charge amount is held in the holding capacitor Co and when the driving current Iel is supplied from the driving transistor Q1 to the organic EL element 21 by turning on the driving voltage supply transistor Qv. Voltage fluctuation can be suppressed. Accordingly, the drive current Iel corresponding to the voltage Vo held in the holding capacitor Co is supplied to the organic EL element.

(Third embodiment)
Next, application of the electronic apparatus of the organic EL display 10 as the electro-optical device described in the first or second embodiment will be described with reference to FIGS. The organic EL display 10 can be applied to various electronic devices such as a mobile personal computer, a mobile phone, and a digital camera.

FIG. 7 is a perspective view showing the configuration of the mobile personal computer. In FIG. 7, the personal computer 70 includes a main body 72 having a keyboard 71 and a display unit 73 using the organic EL display 10.
Even in this case, the display unit 73 using the organic EL display 10 exhibits the same effect as the embodiment. As a result, it is possible to provide the mobile personal computer 70 including the organic EL display 10 that can control the luminance gradation of the organic EL element 21 with high accuracy and improve the yield and the aperture ratio.

  FIG. 8 is a perspective view showing the configuration of the mobile phone. In FIG. 8, the mobile phone 80 includes a plurality of operation buttons 81, a mouthpiece 82, a mouthpiece 83, and a display unit 84 using the organic EL display 10. Even in this case, the display unit 84 using the organic EL display 10 exhibits the same effect as the above-described embodiment. As a result, it is possible to provide the mobile phone 80 including the organic EL display 10 that can control the luminance gradation of the organic EL element 21 with high accuracy and improve the yield and the aperture ratio.

In addition, embodiment of invention is not limited to the said embodiment, You may implement as follows.
In the above embodiment, the conductivity type of the drive transistor Q1 of the pixel circuits 20 and 30 is set to be p-type (p-channel), and the conductivity type of the transistor Q2 and the switching transistor Q3 is set to be n-type (n-channel). . The drain of the drive transistor Q1 was connected to the anode of the organic EL element 21. Further, the cathode of the organic EL element 21 was grounded.

This may be set so that the conductivity type of the drive transistor Q1 is n-type (n-channel) and the conductivity type of each of the switching transistor Q3 and the transistor Q2 is p-type (p-channel).
In the above-described embodiment, the anode is a pixel electrode and the cathode is a common electrode common to a plurality of pixel electrodes. However, the cathode may be a pixel electrode and the common electrode may be an anode.

In the first embodiment and the second embodiment described above, the gate of the switching transistor Q3 included in the pixel circuit is connected to the first sub-scan line Yn1. In addition, the gate of the transistor Q2 is connected to the second sub-scanning line Yn2. Then, the first sub-scanning line Yn1 and the second sub-scanning line Yn2 constitute the scanning line Yn.
On the other hand, as shown in FIGS. 9 and 10, the transistor Q2 and the switching transistor Q3 can be controlled by a common scanning signal SC1.
Thus, the number of scanning lines provided for one pixel circuit is one, the number of wirings per pixel circuit can be reduced, and the aperture ratio can be improved.

In the above embodiment, the drive voltage supply transistor Qv is used as a control circuit for controlling the supply of the drive voltage Vdd to the pixel circuit.
Instead of the driving voltage supply transistor Qv, a switch that can be switched between a low potential and a high potential may be provided. Further, a voltage follower circuit including a buffer circuit or a source follower circuit may be used as the control circuit in order to improve the driving capability. In this way, the drive voltage Vdd can be quickly supplied to the pixel circuit.

In the above embodiment, the voltage supply line Lo is provided on the right end side of the active matrix unit 12, but the present invention is not limited to this, and may be provided on the left end side of the active matrix unit 12, for example.
The voltage supply line Lo may be provided on the same side as the scanning line driving circuit 13 with respect to the active matrix portion 12.
The power supply line control circuit 15 can also be provided on the same side as the scanning line driving circuit 13 with respect to the active matrix portion 12.

  In the above embodiment, the example in which the present invention is applied to the organic EL element has been described. Of course, other than the organic EL element, for example, various types such as LED, FED, liquid crystal element, inorganic EL element, electrophoretic element, and electron emitting element. A unit circuit for driving the electro-optical element may be embodied. The present invention may be embodied in a storage element such as a RAM (particularly MRAM).

It is a block circuit diagram which shows the circuit structure of the organic electroluminescent display of 1st Embodiment. FIG. 3 is a block circuit diagram illustrating a circuit configuration of a display panel unit and a data line driving circuit according to the first embodiment. FIG. 3 is a circuit diagram of a pixel circuit according to the first embodiment. 3 is a timing chart for explaining a driving method of the pixel circuit of the first embodiment. It is a block circuit diagram which shows the circuit structure of the display panel part and data line drive circuit of 2nd Embodiment. It is a circuit diagram of a pixel circuit of a second embodiment. It is a perspective view which shows the structure of the mobile type personal computer for demonstrating 3rd Embodiment. It is a perspective view which shows the structure of the mobile telephone for describing 3rd Embodiment. It is a circuit diagram for demonstrating the pixel circuit of another example. It is a circuit diagram for demonstrating the pixel circuit of another example.

Explanation of symbols

  Co: holding capacitor as a capacitive element, Q1: driving transistor as a first transistor, Q2: transistor as a second transistor, Q3: switching transistor as a third transistor, Qv: control circuit or fourth Drive voltage supply transistor as a transistor, Vdd ... drive voltage VL, 1 ... first power supply line, VL2 ... second power supply line, Xm ... data line, Yn ... scanning line, 10 ... organic EL as electro-optical device Display, 20, 30... Pixel circuit as unit circuit, 21... Electronic element, electro-optical element or organic EL element as current driving element, 70... Personal computer as electronic device, 80.

Claims (15)

Multiple data lines,
A plurality of first power lines;
A plurality of second power lines;
A plurality of unit circuits, and
Each of the plurality of unit circuits is
A first transistor comprising a first gate, a first source and a first drain;
A capacitor comprising a first electrode and a second electrode;
A second transistor comprising a second gate, a second source, and a second drain, and controlling conduction between the first drain and the first gate;
The potential of the first electrode of the capacitor is set to a potential corresponding to a data signal supplied during a first period via one data line of the plurality of data lines. 1 gate voltage is set,
A drive current having a current level corresponding to the gate voltage is supplied from one first power supply line of the plurality of first power supply lines to the electronic element through the first transistor in the second period. And
The second electrode is connected to one second power line of the plurality of second power lines;
An electronic circuit characterized by The electronic circuit according to claim 1.
The electronic element is connected in series to the first transistor;
An electronic circuit characterized by The electronic circuit according to claim 1 or 2,
The one second power supply line is set to a predetermined potential;
An electronic circuit characterized by The electronic circuit according to claim 3.
The predetermined potential is constantly supplied to the one second power line;
An electronic circuit characterized by The electronic circuit according to any one of claims 1 to 4,
The plurality of first power lines intersect with the plurality of data lines;
An electronic circuit characterized by The electronic circuit according to any one of claims 1 to 5,
The plurality of second power supply lines crossing the plurality of data lines;
An electronic circuit characterized by The electronic circuit according to any one of claims 1 to 6,
The control circuit further includes a control circuit that sets each potential of the plurality of first power supply lines to a plurality of potentials or controls supply and cutoff of a drive voltage to each of the plurality of first power supply lines. thing,
An electronic circuit characterized by A plurality of scan lines;
Multiple data lines,
A plurality of first power lines;
A plurality of second power lines;
A plurality of unit circuits, and
Each of the plurality of unit circuits is
A first transistor comprising a first gate, a first source and a first drain;
A capacitor comprising a first electrode and a second electrode;
A second transistor comprising a second gate, a second source, and a second drain, the second transistor controlling conduction between the first drain and the first gate;
An electro-optic element,
The potential of the first electrode of the capacitor is set to a potential corresponding to a data signal supplied during a first period via one data line of the plurality of data lines. 1 gate voltage is set,
A driving current having a current level corresponding to the gate voltage is supplied from one first power supply line of the plurality of first power supply lines to the electro-optic element through the first transistor in a second period. Supplied,
The second electrode is connected to one second power line of the plurality of second power lines;
An electro-optical device. The electro-optical device according to claim 8.
The electro-optic element is connected in series to the first transistor;
An electro-optical device. The electro-optical device according to claim 8 or 9,
The first transistor is connected to the first power line;
An electro-optical device. The electro-optical device according to any one of claims 8 to 10,
The one second power supply line is set to a predetermined potential;
An electro-optical device. The electro-optical device according to any one of claims 8 to 11,
The plurality of first power lines intersect with the plurality of data lines;
An electro-optical device. The electro-optical device according to claim 11.
The potential of the one second power supply line is set to the predetermined potential independently of the one first power supply line;
An electro-optical device.   An electronic device in which the electronic circuit according to any one of claims 1 to 7 is mounted.   An electronic apparatus in which the electro-optical device according to any one of claims 8 to 13 is mounted.

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