JP2007067055A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a means for miniaturizing a semiconductor device by improving flexibility in arrangement of an electrode pad while assuring mountability of a flip chip method on a mounting substrate. <P>SOLUTION: The semiconductor device comprises a semiconductor element, an electrode pad that is electrically connected to the circuit element of the semiconductor element, a post formed away from the electrode pad, a re-wiring for electrically connecting the electrode pad to the post, a sealing layer for sealing the re-wiring and the post, and an external terminal that has an area larger than the post and is directly jointed to a post for each of them. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device formed by dividing a semiconductor wafer on which a plurality of semiconductor elements are formed into individual pieces, and a method for manufacturing the same.

In recent years, as electronic devices have become smaller and more multifunctional, and the mounting density of components on a wiring board has increased, there has been an increasing demand for smaller and thinner semiconductor devices. Small semiconductor devices represented by the mainstream are becoming mainstream.
For such a miniaturization, a conventional semiconductor device is formed by stacking metal pieces such as gold by a ball bonder on an electrode pad electrically connected to a circuit element of a semiconductor element formed on a semiconductor substrate, A post is formed on the same axis as the electrode pad by pressure bonding, the post and the side surface of the semiconductor element are sealed with a sealing resin, the sealing resin is polished to expose the post, and the exposed post is soldered or the like A protruding electrode is formed, and then a semiconductor element is divided into individual pieces by a dicing blade to manufacture a small semiconductor device (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 11-214434 (page 4, paragraphs 0023 to 0026, FIGS. 2 and 3)

  However, in the conventional technique described above, a post is formed coaxially with the electrode pad of the semiconductor element, and a protruding electrode is formed there. Therefore, in the case of a semiconductor device mounted on a mounting substrate by a flip chip method, The arrangement of the protruding electrodes is mainly determined by the position of the wiring terminals on the mounting board, and the arrangement of the electrode pads formed on the coaxial of the post cannot be freely set, and the demand for downsizing of the semiconductor device is required. There is a problem that it becomes difficult to satisfy.

This is particularly important in order to cope with the narrowing of the pitch between electrode pads and the uneven arrangement for the multi-functionalization of semiconductor elements accompanying the recent miniaturization of semiconductor devices.
The present invention has been made in order to solve the above-described problems, and it is possible to reduce the size of a semiconductor device by increasing the degree of freedom of arrangement of electrode pads while ensuring the mountability in a flip chip system on a mounting substrate. It aims at providing the means to plan.

  In order to solve the above problems, the present invention provides a semiconductor device, a semiconductor element, an electrode pad electrically connected to a circuit element of the semiconductor element, a post formed at a position away from the electrode pad, Rewiring that electrically connects the electrode pad and the post, a sealing layer that seals the rewiring and the post, and an area larger than the post that is directly bonded to the post for each post An external terminal is provided.

  In addition, a method for manufacturing a semiconductor device includes a step of preparing a semiconductor wafer on which a plurality of semiconductor elements having electrode pads electrically connected to circuit elements are formed, and a rewiring electrically connected to the electrode pads is formed. A step of forming a post at a position away from the electrode pad on the rewiring, a step of forming a sealing layer by sealing the rewiring and the post with a sealing resin, and the sealing A step of exposing the post to the front surface of the stopper layer, forming a conductive film on the front surface of the sealing layer and the exposed post, and separating the conductive film deeper than the thickness of the conductive film The method includes a step of forming an external terminal by separating the unit of the post by a groove, and a step of dividing the semiconductor wafer into pieces by the unit of the semiconductor element.

  As a result, the present invention can ensure the mountability in the flip chip system by aligning the external terminals with the pitch of the wiring terminals of the mounting substrate, and the thickness and position of the post to the wiring terminals on the other side. Regardless, it can be set freely within the range of the external terminals, the degree of freedom in setting rewiring can be increased, and restrictions on the size and position of the electrode pad are relaxed, increasing the degree of freedom for electrode pad formation. The effect that it can be obtained.

  Embodiments of a semiconductor device and a manufacturing method thereof according to the present invention will be described below with reference to the drawings.

1 is an explanatory view showing a cross section of the semiconductor device of the first embodiment, FIG. 2 is an explanatory view showing a method for manufacturing the semiconductor device of the first embodiment, and FIG. 3 is an explanatory view showing an upper surface of the process P4 of the first embodiment. .
In FIG. 1, 1 is a semiconductor device, and a cutting line 3a indicated by a two-dot chain line in FIG. 3 set in a dicing region 3 of the semiconductor wafer 2 shown in FIG. 3 is cut by a dicing blade made of a thin diamond grindstone or the like. , Divided into individual pieces.

4 is a semiconductor substrate made of silicon, and a semiconductor element 5 (FIG. 3) formed of a plurality of circuit elements is formed in a region surrounded by the dicing region 3 on the front surface.
Reference numeral 6 denotes an insulating layer made of polyimide or the like, and covers the peripheral surface of the electrode pad 7 electrically connected to the front surface of the semiconductor substrate 4 and a predetermined portion of the circuit element of the semiconductor element 5.
Reference numeral 8 denotes a rewiring, which is a wiring pattern formed on the insulating layer 6 and formed on the rewiring 8 at a position away from the electrode pad 7 (in the present embodiment, the central portion side of the semiconductor element 5). The post 9 and the electrode pad 7 are electrically connected.

The post 9 of this embodiment is a relatively thin columnar member having a substantially circular cross-sectional shape formed on the rewiring 8 as shown in FIG.
Reference numeral 10 denotes a sealing layer formed of a sealing resin such as an epoxy resin so as to cover the entire front surface side of the semiconductor substrate 4 excluding the post end surface 9a of the post 9, that is, the insulating layer 6 and the rewiring. 8 and the side surface of the post 9 are formed so that the front surface of the sealing layer 10 and the post end surface 9a are located on the same plane.

  Reference numeral 11 denotes an external terminal, which is directly connected to the post end surface 9a and formed in an area larger than the post 9 in order to match the position and size of the mating wiring terminal and the like. A separation groove 13 that is deeper than the thickness of the film 12 is separated into units of posts 9 and functions as a connection terminal that relays signals between the semiconductor element 5 of the semiconductor device 1 and a mounting substrate (not shown). To do. That is, the semiconductor element 5 formed on the semiconductor substrate 4 is connected to the mounting substrate via the electrode pad 7, the rewiring 8, the post 9 and the external terminal 11.

The separation grooves 13 of the present embodiment are grooves formed in a lattice shape by digging the semiconductor wafer 2 vertically and horizontally with a dicing blade or the like different from the dicing blade divided into individual pieces, as shown in FIG.
A method for manufacturing the semiconductor device according to the present embodiment will be described below with reference to FIGS.

P1, an insulating layer 6 is formed on the front surface of the semiconductor substrate 4 on which a plurality of semiconductor elements 5 are formed, and aluminum or the like is deposited by sputtering or the like in the openings formed in the insulating layer 6 by etching or the like. A semiconductor wafer 2 on which an electrode pad 7 that is electrically connected to a predetermined portion of the circuit element of the element 5 is formed is prepared.
P2, a base metal layer is formed on the entire front surface side of the semiconductor substrate 4 by an electroless plating method, etc., and the insulating layer 6 and the electrode pad 7 are covered with the base metal layer. A resist mask is formed to mask a region excluding a portion for forming the rewiring 8 reaching the post 9 formed on the electrode pad 7 away from the electrode pad 7, and a base is formed on the exposed base metal layer. Copper or the like is deposited by electroplating using the metal layer as one common electrode to form a rewiring 8 from the electrode pad 7 to the post 9 formation portion.

Then, the resist mask is removed using a release agent, and the resist mask is formed again on the base metal layer and the rewiring 8 by lithography or the like to mask and expose a region excluding a portion where the post 9 is formed. A post 9 is formed on the rewiring 8 by electroplating.
P3, the resist mask is removed using a release agent, the exposed base metal layer is removed by plasma etching or the like to expose the insulating layer 6, and the entire front surface of the semiconductor wafer 2 is sealed by spin coating or the like. A sealing resin is applied, and this is heated and cured to form a sealing layer 10 that seals the front side of the semiconductor substrate 4, and the surface layer of the sealing layer 10 is polished by a grinder or the like. The post end surface 9a of the post 9 is exposed on the front surface, and the sealing layer 10 for sealing the insulating layer 6, the rewiring 8 and the side surface of the post 9 is formed.

Then, a conductive resin containing a conductive material is applied to the entire front surface of the semiconductor wafer 2 by a spin coat method or the like, and this is dried or heat-cured so that the front surface side of the semiconductor substrate 4 A conductive film 12 is formed on the entire surface. As a result, the conductive film 12 is directly bonded to the post end face 9a.
P4, using a dicing blade, mechanically dug the conductive film 12 vertically and horizontally in parallel with the cutting line 3a to cut the conductive film 12 so as to reach the sealing layer 10 under the conductive film 12, and thereby the thickness of the conductive film 12 A deeper separation groove 13 is formed, and the external terminal 11 is formed by separating the conductive film 12 in units of posts 9. As a result, a rectangular external terminal 11 having a larger area than the post 9 is formed for each post 9 as shown in FIG.

After the formation of P5 and the external terminal 11, the cutting line 3a set in the dicing region 3 of the semiconductor wafer 2 is cut by the unit of the semiconductor element 5 using a dicing blade different from the process P4, and the semiconductor wafer 2 is separated. The semiconductor device 1 of the present embodiment shown in FIG.
The semiconductor device 1 obtained by the above process is mounted on a mounting substrate or the like by a flip chip method or the like by the external terminal 11 matched to the position and size of the counterpart wiring terminal or the like.

  As described above, in the semiconductor device 1 of this embodiment, the external terminals 11 formed in a relatively wide area are formed in positions and areas corresponding to the counterpart wiring terminals and the like. The pitch of the wiring terminals can be matched with the pitch of the wiring terminals and the mountability in the flip chip method can be secured, and the thickness of the post 9 can be set regardless of the wiring terminals on the other side. Can be freely set within the range of the external terminal 11, and the degree of freedom in setting the rewiring 8 can be increased.

In addition, it is not necessary to make the size of the electrode pad 7 in accordance with the counterpart wiring terminal and the like, and the re-wiring 8 connects to the post 9 located away from the electrode pad 7. The restrictions on the size and position of the semiconductor device 5 are relaxed, and the degree of freedom for forming the electrode pad 7 can be increased, so that the semiconductor element 5 can be multifunctionalized or further downsized.
Furthermore, since the external terminal 11 separated for each post 9 is formed by the separation groove 13 after the conductive film 12 is formed, the occurrence of a short circuit between the external terminals 11 can be prevented.

Further, since the external terminal 11 is formed by directly bonding the conductive film 12 to the exposed post end surface 9a, a method of bonding solder balls to the exposed post end surface 9a or a method of forming solder electrodes by screen printing is used. In comparison, it is possible to form the external terminal 11 having a much higher precision terminal thickness.
As described above, in this embodiment, the post formed at a position away from the electrode pad electrically connected to the circuit element of the semiconductor element, the electrode pad, and the post are electrically connected by rewiring, By connecting the external terminal having an area larger than the post directly to the post, the external terminal can be aligned with the pitch of the wiring terminal of the mounting substrate to ensure the mountability in the flip chip method, The thickness and position of the post can be set freely within the range of the external terminal regardless of the counterpart wiring terminal, etc., and the degree of freedom in setting rewiring can be increased, and the size and position of the electrode pad The restriction is relaxed, and the degree of freedom for forming the electrode pad can be increased, so that the semiconductor device can be multifunctionalized or further miniaturized.

In addition, by forming the external terminal into a rectangular shape, the external terminal can be formed by forming a separation groove using a dicing blade, thereby facilitating the formation of the external terminal and improving the efficiency of manufacturing the semiconductor device. Can do.
In this embodiment, the separation groove is described as being formed by digging with a dicing blade. However, the formation of the separation groove is not limited to the above, and the region other than the portion where the separation groove is formed by lithography after the formation of the conductive film is formed. A resist mask may be formed, and a conductive film may be dug by anisotropic etching or the like to form a separation groove reaching the sealing layer.

  Moreover, although the dicing blade for forming the separation groove has been described as different from the dicing blade to be singulated, the dicing blade in both steps may be common.

FIG. 4 is an explanatory diagram illustrating a method for manufacturing a semiconductor device according to the second embodiment, and FIG. 5 is an explanatory diagram illustrating an upper surface of the process PA3 according to the second embodiment.
In addition, the same part as the said Example 1 attaches | subjects the same code | symbol, and abbreviate | omits the description.
In FIG. 4, 21 is a terminal recess, and when forming the sealing layer 10 by molding a sealing resin by injection molding or the like, each post 9 formed on its front surface as shown in FIG. The recess has a rectangular bottom surface with the post end face 9 a exposed, and has a larger bottom area than the post 9.

Reference numeral 22 denotes a dicing groove, which is a groove formed in the dicing region 3 on the front surface of the sealing layer 10 as shown in FIG.
A method for manufacturing the semiconductor device according to the present embodiment will be described below with reference to FIGS.
Since the operations of the processes PA1 and PA2 are the same as the operations of the processes P1 and P2 of the first embodiment, the description thereof is omitted.

The resist mask is removed using PA3, a release agent, and the entire semiconductor wafer 2 from which the exposed base metal layer is removed by plasma etching or the like to expose the insulating layer 6 is placed in a sealing mold (not shown) and injected. A sealing resin is injected into the sealing mold by molding to seal the front surface side of the semiconductor substrate 4, and this is heated and cured to form the sealing layer 10.
At this time, the sealing mold on the front surface side of the semiconductor substrate 4 has a plurality of rectangular protrusions for forming the terminal recesses 21 and protrusions on the lattice for forming the dicing grooves 22. A dicing groove formed in a grid pattern in the dicing region 3 and a terminal recess 21 in which the post end surface 9a is exposed on the bottom surface of each post 9 on the front surface of the sealing layer 10 formed. 22 is formed.

In this case, when part or all of the post end surface 9a is not exposed on the bottom surface of the terminal recess 21, the sealing layer 10 on the post end surface 9a is removed by shot blasting or the like that sprays particles having a fine particle diameter. Exclude it.
A conductive resin is applied to the entire front surface of the PA 4 and the semiconductor wafer 2 by spin coating or the like to fill the terminal recesses 21 and the dicing grooves 22, and these are dried or heat-cured to allow the front surface of the semiconductor substrate 4. A conductive film 12 is formed on the entire surface side. As a result, the conductive film 12 is embedded in the terminal recess 21 and the conductive film 12 is directly bonded to the post end face 9a.

The surface layers of PA5 and conductive film 12 are polished with a grinder or the like, and the sealing layer 10 is exposed on the front surface after polishing to form the external terminals 11 embedded in the terminal recesses 21. As a result, the external terminals 11 separated by the post 9 are formed by the sealing layer 10.
After the formation of the external terminal 11, the cutting line 3a set in the dicing region 3 of the semiconductor wafer 2 is cut in units of the semiconductor element 5 by using a dicing blade, and the semiconductor wafer 2 is divided into individual pieces. The semiconductor device 1 is formed.

The semiconductor device 1 obtained by the above process is mounted on a mounting substrate or the like by a flip chip method or the like by the external terminal 11 matched to the position and size of the counterpart wiring terminal or the like.

As described above, in the semiconductor device 1 of this embodiment, the external terminals 11 formed in a relatively large area are formed at positions and areas corresponding to the counterpart wiring terminals and the like, and are re-wired 8 from the electrode pads 7. Since it is connected to the post 9 at a distant position, it is possible to ensure the mountability by the flip chip method as in the first embodiment, and the thickness and position of the post 9 can be freely set within the range of the external terminal 11. The degree of freedom in setting the rewiring 8 can be increased, restrictions on the size and position of the electrode pad 7 can be relaxed, and the degree of freedom in forming the electrode pad 7 can be increased to increase the flexibility of the semiconductor element 5. Or further miniaturization can be achieved.

In addition, since the external terminals 11 separated for each post 9 are formed by the sealing layer 10 after the conductive film 12 is formed, it is possible to prevent the occurrence of a short circuit between the external terminals 11.
Further, since the external terminal 11 is formed by directly bonding the conductive film 12 to the exposed post end surface 9a, a method of bonding solder balls to the exposed post end surface 9a or a method of forming solder electrodes by screen printing is used. In comparison, it is possible to form the external terminal 11 having a much higher precision terminal thickness.

Further, the processing of the separation groove 13 in the process P4 of Example 1 is omitted, the terminal recess 21 for forming the external terminal 11 is formed by injection molding, and the external terminal 11 is exposed by polishing after the conductive film 12 is formed. Therefore, the process of forming the external terminal 11 can be performed in a shorter time.
Further, since the terminal recess 21 for forming the external terminal 11 is formed by injection molding, a plurality of sealing molds (for example, 0.5 mm pitch, 0.65 mm pitch) are matched to the pitch of the mating wiring terminal or the like. If a sealing mold having a matrix arranged in a matrix is prepared in advance, the sealing mold can be selected and used according to the position of the rewiring 8 or post 9 formed in the semiconductor device 1. Thus, the manufacturing method of the semiconductor device 1 can be standardized, and the manufacturing time of the sealing mold can be eliminated, so that various semiconductor devices 1 can be dealt with more quickly. Improvements can be made.

Further, since the dicing groove 22 is formed in the dicing region 3, the location of the cutting line 3a when the semiconductor wafer 2 is divided into individual pieces can be easily specified without providing a special identification mark. .
Further, a dicing groove 22 is formed so that the width of the sealing layer 10 (referred to as a bank) between the dicing groove 22 and the terminal recess 21 having a rectangular bottom surface and between the terminal recesses 21 is substantially uniform. Therefore, the occurrence of sink marks and voids during injection molding can be prevented to form the terminal recess 21 accurately and firmly, and the conductive film 12 can remain in an unexpected part, causing a short circuit or the like. Can be prevented.

The shape of the bottom surface of the terminal recess 21 may be polygonal or circular, and the dicing groove 22 may not be provided, that is, only the terminal recess 21 may be provided.
In this case, since the width of the bank is not uniform, the width of the bank in the central part of the four terminal recesses 21 adjacent to each other and the part of the dicing region 3 is increased, and the volume of the sealing resin in these parts is increased. Therefore, it is preferable to prevent the occurrence of sink marks and voids during injection molding by paying attention to the degassing of these parts and the position and number of injection ports in injection molding.

  As described above, in this embodiment, in addition to the same effects as in the first embodiment, the terminal recess for forming the external terminal is formed at the same time when the sealing layer is injection molded. The process of forming the separation groove in the process P4 of Example 1 can be omitted and the external terminal forming process can be performed in a shorter time, and a plurality of sealing dies are prepared in advance according to the plurality of pitches of the external terminals. Therefore, it is possible to standardize the manufacturing method of the semiconductor device and improve the manufacturing efficiency of the semiconductor device.

  In addition, by making the shape of the bottom surface of the terminal recess rectangular, the width of the bank between the terminal recesses can be made substantially uniform, preventing the occurrence of sink marks and voids at the time of injection molding. Can be formed accurately and firmly.

FIG. 6 is an explanatory view showing the method of manufacturing the semiconductor device of Example 3.
In addition, the same part as the said Example 1 and Example 2 attaches | subjects the same code | symbol, and abbreviate | omits the description.
In FIG. 6, reference numeral 25 denotes an electrode recess, which is a recess covered with the conductive film 12 formed by covering the inner surface of the terminal recess 21 with the conductive film 12, and functions as the external terminal 11 of this embodiment.

Reference numeral 26 denotes a protruding electrode, which is formed in a substantially hemispherical shape with solder or the like and protrudes from the front surface of the sealing layer 10, and is an electrode recess 25 of the external terminal 11 joined to the post end surface 9 a of the post 9. And has a function of melting and joining the external terminals 11 and the wiring terminals of the mounting substrate when they are joined.
The conductive film 12 of this embodiment is formed by an electroplating method or the like in order to uniformly cover and cover the inner surface of the terminal recess 21.

A method for manufacturing the semiconductor device according to the present embodiment will be described below with reference to FIG.
Since the operations of the processes PB1 to PB3 are the same as the operations of the processes PA1 to PA3 of the second embodiment, the description thereof is omitted. In this case, the terminal recess 21 formed in the process PB3 is formed deeper than the terminal recess 21 in the process PA3 of the second embodiment.

  A base metal layer is formed on the entire front surface of the PB 4 and the semiconductor wafer 2 by electroless plating or the like, and the sealing layer 10, the terminal recess 21 and the dicing groove 22 are covered with the base metal layer, Then, a conductive metal is deposited by electroplating using the base metal layer as one common electrode, and the conductive film 12 is formed on the entire front surface side of the semiconductor substrate 4. As a result, the inner surface of the terminal recess 21 is covered with the conductive film 12, and the conductive film 12 is directly bonded to the post end surface 9a.

The external terminal 11 having the electrode recess 25 covered with the conductive film 12 on the inner surface of the terminal recess 21 is formed by polishing the surface layer of the PB 5 and the conductive film 12 with a grinder or the like to expose the sealing layer 10 on the front surface after polishing. Form. As a result, the external terminal 11 having the electrode recess 25 separated by the post 9 by the sealing layer 10 is formed.
After the formation of the electrode recess 25, a substantially hemispherical protruding electrode 26 is formed in the electrode recess 25 by a screen printing method or a solder ball method, and then a cutting line 3a set in the dicing region 3 of the semiconductor wafer 2 is diced. The semiconductor device 1 according to the present embodiment is formed by cutting the semiconductor element 5 in units using a blade and dividing the semiconductor wafer 2 into pieces.

The semiconductor device 1 obtained by the above process is formed on the mounting substrate or the like by the protruding electrode 26 formed in the electrode concave portion 25 of the external terminal 11 matched to the position and size of the counterpart wiring terminal or the like. It is mounted with.
As described above, in the semiconductor device 1 of this embodiment, the external terminal 11 having the electrode recess 25 formed in a relatively wide area is formed at a position and area corresponding to the counterpart wiring terminal and the like, and the rewiring 8 The post 9 is connected to the post 9 at a position distant from the electrode pad 7, so that the mountability by the flip chip method can be ensured as in the first embodiment, and the thickness and position of the post 9 can be set to the external terminal 11. It can be set freely within a range, the degree of freedom of setting the rewiring 8 can be increased, restrictions on the size and position of the electrode pad 7 can be relaxed, and the degree of freedom for forming the electrode pad 7 can be increased. The element 5 can be multifunctional or further miniaturized.

In addition, since the external terminal 11 having the electrode recess 25 separated for each post 9 is formed by the sealing layer 10 after the conductive film 12 is formed, the occurrence of a short circuit between the external terminals 11 formed with the protruding electrodes 26 is prevented. be able to.
Further, the conductive film 12 is directly bonded to the exposed post end surface 9a to form the external terminal 11 having the electrode recess 25, and the protruding electrode 26 is formed in the electrode recess 25. Therefore, the bonding to the mating wiring terminal or the like is performed. Reliability can be improved.

Further, similarly to the second embodiment, the process of forming the separation terminal 13 in the process P4 of the first embodiment can be omitted, and the process of forming the external terminals 11 can be performed in a shorter time.
Furthermore, since the terminal recess 21 is formed by injection molding, the manufacturing method of the semiconductor device 1 can be standardized and the manufacturing efficiency of the semiconductor device 1 can be improved as in the second embodiment.

Furthermore, since the dicing groove 22 is formed in the dicing region 3, the location of the cutting line 3a of the semiconductor wafer 2 can be easily specified as in the second embodiment.
Further, since the dicing groove 22 is formed so that the width of the bank between the dicing groove 22 and the terminal recess 21 and between the terminal recesses 21 is substantially uniform, the terminal recess 21 is formed as in the second embodiment. It can be formed accurately and firmly, and the occurrence of a short circuit or the like due to the remaining conductive film 12 can be prevented.

As described above, in this embodiment, in addition to the same effects as in the second embodiment, the external terminal having the electrode recess is formed, and the protruding electrode 26 is formed in the electrode recess. It is possible to improve the reliability of joining to the wiring terminals.
In each of the above embodiments, the polishing is described as being mechanically performed by a grinder or the like. However, chemical polishing by a CMP (Chemical Mechanical Polishing) method or the like may be used.

  In the first and second embodiments, the conductive film is described as being formed by applying a conductive resin. However, a sputtering method or an electroplating method similar to that in the third embodiment may be used.

Explanatory drawing which shows the cross section of the semiconductor device of Example 1. Explanatory drawing which shows the manufacturing method of the semiconductor device of Example 1. FIG. Explanatory drawing which shows the upper surface of process P4 of Example 1. FIG. Explanatory drawing which shows the manufacturing method of the semiconductor device of Example 2. FIG. Explanatory drawing which shows the upper surface of process PA3 of Example 2. FIG. Explanatory drawing which shows the manufacturing method of the semiconductor device of Example 3.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Semiconductor wafer 3 Dicing area | region 3a Cutting line 4 Semiconductor substrate 5 Semiconductor element 6 Insulating layer 7 Electrode pad 8 Rewiring 9 Post 9a Post end surface 10 Sealing layer 11 External terminal 12 Conductive film 13 Separation groove 21 Terminal recessed part 22 Dicing Groove 25 Electrode recess 26 Projection electrode

Claims (10)

  A semiconductor element, an electrode pad electrically connected to the circuit element of the semiconductor element, a post formed at a position away from the electrode pad, and a rewiring electrically connecting the electrode pad and the post A semiconductor device comprising: a sealing layer that seals the rewiring and the post; and an external terminal having an area larger than the post that is directly joined to the post for each post. In claim 1,
The semiconductor device, wherein the external terminal is rectangular.   A semiconductor element, an electrode pad electrically connected to the circuit element of the semiconductor element, a post formed at a position away from the electrode pad, and a rewiring electrically connecting the electrode pad and the post A sealing layer that seals the rewiring and the post; a terminal recess that is formed in the sealing layer, exposes the end face of each post on the bottom surface, and has a bottom area larger than the post; and A semiconductor device comprising an external terminal formed of a conductive film embedded in a terminal recess.   A semiconductor element, an electrode pad electrically connected to the circuit element of the semiconductor element, a post formed at a position away from the electrode pad, and a rewiring electrically connecting the electrode pad and the post A sealing layer that seals the rewiring and the post; a terminal recess that is formed in the sealing layer, exposes the end face of each post on the bottom surface, and has a bottom area larger than the post; and A semiconductor device comprising: an external terminal having an electrode recess formed by covering a terminal recess with a conductive film; and a protruding electrode formed in the electrode recess. In claim 3 or claim 4,
A semiconductor device, wherein a bottom surface of the terminal recess is rectangular. Preparing a semiconductor wafer on which a plurality of semiconductor elements having electrode pads electrically connected to circuit elements are formed;
Forming a rewiring electrically connected to the electrode pad;
Forming a post on the rewiring away from the electrode pad;
Sealing the rewiring and the post with a sealing resin to form a sealing layer;
Exposing the post on the front surface of the sealing layer, and forming a conductive film on the front surface of the sealing layer and the exposed post;
Separating the conductive film in units of the posts by a separation groove deeper than the thickness of the conductive film to form external terminals;
And a step of dividing the semiconductor wafer into pieces in units of the semiconductor elements. In claim 1,
A method of manufacturing a semiconductor device, wherein in the step of forming the external terminal, the separation groove is formed by mechanically cutting the conductive film. Preparing a semiconductor wafer on which a plurality of semiconductor elements having electrode pads electrically connected to circuit elements are formed;
Forming a rewiring electrically connected to the electrode pad;
Forming a post on the rewiring away from the electrode pad;
Sealing the rewiring and the post with a sealing resin, exposing a post end face to the bottom surface for each post, and forming a sealing layer having a terminal recess having a larger bottom area than the post; ,
Forming a conductive film for embedding the terminal recess on the sealing layer;
Polishing the conductive film to expose the sealing layer and forming external terminals separated in units of the posts;
And a step of dividing the semiconductor wafer into pieces in units of the semiconductor elements. Preparing a semiconductor wafer on which a plurality of semiconductor elements having electrode pads electrically connected to circuit elements are formed;
Forming a rewiring electrically connected to the electrode pad;
Forming a post on the rewiring away from the electrode pad;
Sealing the rewiring and the post with a sealing resin, exposing a post end face to the bottom surface for each post, and forming a sealing layer having a terminal recess having a larger bottom area than the post; ,
Forming a conductive film covering the terminal recess on the sealing layer;
Polishing the conductive film to expose the sealing layer, and forming external terminals having electrode recesses separated in units of the posts;
Forming a protruding electrode in the electrode recess;
And a step of dividing the semiconductor wafer into pieces in units of the semiconductor elements. In claim 8 or claim 9,
A semiconductor device, wherein a bottom surface of the terminal recess is rectangular.