JP2007059630A - Photodiode and light receiving element with same, and method of manufacturing light receiving element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a light receiving element for stably manufacturing a light receiving element which can reduce the depth of an impurity diffusion layer without generating short circuit or the like caused by spike, and has good sensitivity to short wavelength light of about 400 to 450 nm, for example, or less. <P>SOLUTION: A light receiving semiconductor layer 26 of a depth d2 is formed in a light receiver 40 as an N-type impurity diffusion layer 27, and a compensation diffusion layer 25 of a depth d1 (d1>d2) is formed in an electrode 41. Thereafter, an N-side electrode 38 is formed to be electrically connected to the compensation diffusion layer 25. Since short-circuit between the N-side electrode 38 and the P-type epitaxial layer 22 can be thereby prevented even if spike is generated in formation of the N-side electrode 38, it is possible to reduce the depth d2 of the light receiving semiconductor layer 26 used in light receiving without generating short circuit or the like caused by spike. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a photodiode, a light receiving element including the photodiode, and a method for manufacturing the light receiving element.

  The light receiving element is an element that converts light energy into electric energy. The light receiving element is used in, for example, an optical pickup device mounted on an optical recording / reproducing apparatus that records information on an optical recording medium such as a digital video disc (abbreviated DVD) or reproduces information recorded on the optical recording medium. ing.

The light receiving element is manufactured as follows, for example. FIG. 13 to FIG. 18 are cut end views showing the state of each process in the manufacture of the light receiving element according to the prior art in a simplified manner. As shown in FIG. 13, a P-type epitaxial layer 2 is first grown on a surface portion on one side in the thickness direction of a P-type silicon substrate 1 and then oxidized to form a silicon oxide film 3. After removing the silicon oxide film 3 formed in a predetermined portion to form the P ⁺ stopper portion 4, a P-type impurity is introduced and diffused into the P-type epitaxial layer 2 using the silicon oxide film 3 as a mask. ^A stopper portion 4 is formed.

After the remaining silicon oxide film 3 is removed, a silicon oxide film 5 is formed again on the entire surface of the P-type epitaxial layer 2 on which the P ⁺ stopper portion 4 is formed. Next, as shown in FIG. 14, the silicon oxide film 5 formed in a predetermined portion for forming the N-type impurity diffusion layer 6 is removed. Using the remaining silicon oxide film 5 as a mask, an N-type impurity is introduced and diffused into the P-type epitaxial layer 2 to form an N-type impurity diffusion layer 6 shown in FIG. In FIG. 14, N-type impurities are indicated by “◯”. As a method for introducing impurities, an ion implantation method or the like is used (for example, see Patent Document 1).

After removing the remaining silicon oxide film 5 and the silicon oxide film 7 formed at the time of ion implantation, a silicon oxide film 8 is formed again on the entire surface of the P-type epitaxial layer 2. Next, as shown in FIG. 15, the silicon oxide film 8 formed in the field portion 9 a between the P ⁺ stopper portion 4 and the N-type impurity diffusion layer 6 is removed. Using the remaining silicon oxide film 8 as a mask, a P-type impurity is implanted and diffused into the P-type epitaxial layer 2 to form the inversion preventing portion 9 shown in FIG. In FIG. 15, the P-type impurity is represented by “x”.

  After removing the remaining silicon oxide film 8 and the silicon oxide film 10 formed at the time of ion implantation, a silicon oxide film 11 is formed again on the entire surface of the P-type epitaxial layer 2 on which the inversion preventive portion 9 is formed, and further oxidized. An interlayer insulating film 12 is formed on the surface of the silicon film 11. Next, as shown in FIG. 16, the silicon oxide film 11 formed in a predetermined portion to be a light receiving portion 13 a used for light reception and an electrode portion 13 b where an N-side electrode 16 shown in FIG. After removing the interlayer insulating film 12, an antireflection film 14 is formed on the exposed portion of the N-type impurity diffusion layer 6 as shown in FIG.

  As shown in FIG. 18, after the contact hole 15 is formed in the antireflection film 14 in a predetermined portion as much as possible as the electrode portion 13b, the electrode film is formed so as to fill the contact hole 15. After removing unnecessary portions of the formed electrode film, heat treatment called sintering for forming ohmic contact is performed to form the N-side electrode 16. Next, a P-side electrode 17 is formed on the surface portion on the other side in the thickness direction of the P-type silicon substrate 1. In this way, a photodiode 18 that is a light receiving element is obtained.

  In an optical pickup device, information such as laser light is irradiated onto an optical recording medium, and light reflected by the optical recording medium is detected by a light receiving element to record or reproduce information. In recent years, optical recording media have been required to improve the recording density, and correspondingly, the wavelength of light used for recording and reproducing information is required to be shortened. For example, in a conventional DVD reproducing apparatus, although red laser light having a wavelength of 650 nm or 635 nm is used as light for recording and reproduction, recently, light having a shorter wavelength than that, for example, blue having a wavelength of about 400 to 450 nm is used. There has been a demand for an apparatus capable of recording or reproducing with a violet laser beam. In response to this demand, there is a demand for a light receiving element that can detect light with a short wavelength of about 400 to 450 nm with high sensitivity.

  In the light receiving element, carriers are generated by light irradiation to the depletion layer of the PN junction formed in the semiconductor and the vicinity thereof, and a photocurrent is generated by moving the carriers according to the potential gradient in the depletion layer of the PN junction, Output as an electrical signal. Since the light irradiated on the semiconductor surface penetrates into the inside while being absorbed by the semiconductor as energy for generating carriers, the intensity of the light decreases as the depth from the semiconductor surface increases. For example, in the case of light having a wavelength of 650 nm, the intensity of the light that has entered the semiconductor decreases to 10% of the intensity at the semiconductor surface at a point where the depth from the semiconductor surface is about 10 μm.

  The depth from the semiconductor surface at which the intensity of light entering the semiconductor decreases to 10% of the intensity on the semiconductor surface (hereinafter referred to as “penetration length”) decreases as the wavelength of light decreases. Are known. For example, in the case of light having a wavelength of 410 nm, the point where the intensity of the light that has entered the semiconductor is reduced to 10% of the intensity on the semiconductor surface is a point where the depth from the semiconductor surface is about 1 μm. For this reason, most of the light having a wavelength of 410 nm is absorbed in a portion having a depth of about 1 μm from the semiconductor surface. As described above, when light having a short wavelength of about 400 to 450 nm or less is irradiated on the semiconductor, most of the light is absorbed in a portion having a depth of about 1 μm or less from the semiconductor surface. Therefore, in such a light receiving element for detecting light having a short wavelength, the impurity concentration distribution in the impurity diffusion layer constituting the PN junction becomes a problem.

FIG. 19 is a diagram showing an example of an impurity concentration profile in the depth direction of the light receiving portion 13a of the light receiving element 18 shown in FIG. In FIG. 19, the horizontal axis indicates the depth (μm) from one surface portion of the N-type impurity diffusion layer 6, and the vertical axis indicates the impurity concentration (ions / cm ² ). In FIG. 19, phosphorus ions are implanted into the P-type epitaxial layer 2 (impurity concentration 3 × 10 ¹² ions / cm ³ ) with an implantation energy of 100 keV and a dose amount of 3 × 10 ¹⁵ ions / cm ^2. An impurity concentration profile when the diffusion layer 6 is formed is shown. As shown in FIG. 19, in the light receiving element 18 according to the conventional technique, the concentration of impurities in the light receiving portion 18 irradiated with light has a peak at a position deeper than the surface of the N-type impurity diffusion layer 6. Near the surface of the type impurity diffusion layer 6, the impurity concentration is lower than the concentration at the peak. That is, in the portion from the surface to the position of the concentration peak, a region in which the impurity concentration increases toward one side in the thickness direction (hereinafter referred to as an impurity concentration inversion layer for convenience) is formed. For this reason, among the carriers generated by irradiation with light, the carriers generated in the impurity concentration inversion layer move toward the surface of the N-type impurity diffusion layer 6 according to the potential distribution of the impurity concentration inversion layer, and the surface is regenerated. It will disappear due to the bond. Therefore, the light receiving element having the impurity diffusion layer in which the impurity concentration inversion layer is formed has a photoelectric conversion efficiency, that is, a light receiving sensitivity, lower than a theoretical value determined by the wavelength.

  As shown in FIG. 19, the impurity concentration inversion layer is generated in a portion having a depth of about 0.5 μm or less from the surface of the impurity diffusion layer. In the case of receiving light exceeding the level, there is almost no problem. For example, in the case of light with a wavelength of 650 nm, the penetration depth is as large as 10 μm as described above, and light absorption near the surface of the impurity diffusion layer is small, so that the generation of carriers in the impurity concentration inversion layer is small, and the light receiving sensitivity is It is hardly affected by the generation of an impurity concentration inversion layer.

  On the other hand, in the case of short wavelength light having a wavelength of about 400 to 450 nm or less, most of the light is absorbed from the surface of the impurity diffusion layer to a depth of about 1 μm or less. A large amount of carriers is generated in the layer. For this reason, the light receiving sensitivity (hereinafter also simply referred to as “sensitivity”) of the light receiving element with respect to light of a short wavelength is significantly reduced from the theoretical value. For example, although the sensitivity to light having a wavelength of 410 nm is theoretically about 0.32 A / W, it is actually about 0.1 A / W.

  As a technique for solving the problem of generation of an impurity concentration inversion layer and a decrease in sensitivity due thereto, the applicant of the present application has made the impurity concentration in the impurity diffusion layer higher as it approaches the surface, Proposed to prevent the occurrence (see Patent Document 2).

JP-A-5-63229 (page 2-3, FIG. 1) JP-A-9-298308 (page 4-5, Fig. 1-2)

  According to the technique disclosed in Patent Document 2, although the sensitivity of the light receiving element can be improved, from the viewpoint of improving the sensitivity to light having a short wavelength with a wavelength of about 400 to 450 nm or less, Patent Document There is room for improvement in the light receiving element disclosed in 2.

  As described above, when light having a wavelength of about 400 to 450 nm or less is irradiated, most of the light is absorbed in a portion from the semiconductor surface to a depth of about 1 μm or less, and carriers are generated. In order to take out these carriers as photocurrent and further improve the light receiving sensitivity, it is necessary to reduce the depth of the impurity diffusion layer, specifically about 1 μm or less.

  However, if the depth of the impurity diffusion layer is reduced to about 1 μm or less, the following problems occur. In the step of forming the N-side electrode 16 shown in FIG. 18, the electrode material constituting the N-side electrode 16 is spiked in the N-type impurity diffusion layer 6 as shown in FIG. 20 by heating during sintering. A phenomenon called invading spikes may occur. In particular, spikes are likely to occur when aluminum is used as the electrode material. When a spike occurs when the depth D of the N-type impurity diffusion layer 6 is as small as about 1 μm, for example, an electrode material such as aluminum penetrates the N-type impurity diffusion layer 6 to form the P-type epitaxial layer 2 as shown in FIG. As a result, a short circuit occurs between the N-side electrode 16 and the P-type epitaxial layer 2. For this reason, the depth D of the N-type impurity diffusion layer 6 needs to be set so as not to cause a short circuit, and it is difficult to set it to about 1 μm or less.

  The object of the present invention is to reduce the depth of the impurity diffusion layer without causing a short circuit due to spikes and the like, and has excellent sensitivity to light with a wavelength as short as about 400 to 450 nm or less, for example. A light-receiving element manufacturing method capable of stably manufacturing a light-receiving element, a photodiode manufactured by the method, and a light-receiving element including the photodiode are provided.

The present invention is electrically connected to a first conductivity type semiconductor layer, a second conductivity type semiconductor layer formed by diffusing a second conductivity type impurity in the first conductivity type semiconductor layer, and the second conductivity type semiconductor layer. A light receiving element that receives light incident from one side in the thickness direction of the second conductivity type semiconductor layer and converts the energy of the light into electrical energy,
A light receiving semiconductor layer is formed in a predetermined portion to be a light receiving portion used for light reception among predetermined portions of the first conductive semiconductor layer to form the second conductive semiconductor layer, and an electrode is formed. The depth d1 from the surface portion on one side in the thickness direction is greater than the depth d2 from the surface portion of the light-receiving semiconductor layer (d1> d2) at a predetermined portion as much as possible to be the electrode portion to be compensated (d1> d2) Forming a second conductive type semiconductor layer by forming a second conductive type semiconductor layer;
An electrode forming step of forming an electrode so as to be electrically connected to a surface portion on one side in the thickness direction of the formed compensation semiconductor layer.

In the present invention, the second conductivity type semiconductor layer forming step includes
Forming an antireflection film so as to cover at least a predetermined portion of the first conductivity type semiconductor layer to form the light receiving semiconductor layer;
A step of forming a light receiving semiconductor layer by injecting and diffusing a second conductive type impurity into a predetermined portion for forming a light receiving semiconductor layer of the first conductive type semiconductor layer through the formed antireflection film. It is characterized by including.

In the present invention, in the step of forming the light receiving semiconductor layer,
The second conductivity type impurity is implanted at a dose of 1 × 10 ¹⁴ ions / cm ^{2 to} 1 × 10 ¹⁵ ions / cm ² .

In the present invention, in the step of forming the light receiving semiconductor layer,
The ion implantation energy is set to 50 keV or more and 100 keV or less, and the second conductivity type impurity is implanted.

In the present invention, the second conductivity type semiconductor layer forming step is performed before the step of forming the antireflection film.
The method further includes the step of forming a compensation semiconductor layer by injecting and diffusing a second conductivity type impurity in a predetermined portion to form the compensation semiconductor layer of the first conductivity type semiconductor layer. .

  According to the present invention, the compensation semiconductor layer is formed so that the depth d1 is 1 μm or more larger than the depth d2 of the light receiving semiconductor layer.

Further, the present invention provides an electrical connection between the first conductive semiconductor layer, the second conductive semiconductor layer including the second conductive impurity provided in contact with the first conductive semiconductor layer, and the second conductive semiconductor layer. A photodiode that receives light incident from one side in the thickness direction of the second conductivity type semiconductor layer and converts the energy of the light into electrical energy,
The second conductivity type semiconductor layer includes a light receiving semiconductor layer provided in a light receiving portion used for light reception, and a compensation semiconductor layer provided in an electrode portion where an electrode is formed,
The depth d1 from the surface portion on one side in the thickness direction of the compensation semiconductor layer is greater than the depth d2 from the surface portion of the light receiving semiconductor layer (d1> d2).

  Further, the invention is characterized in that the concentration of the second conductivity type impurity contained in the light receiving semiconductor layer decreases from the surface portion on one side in the thickness direction of the light receiving semiconductor layer toward one side in the thickness direction.

  The present invention also provides a light receiving element including the photodiode of the present invention.

  According to the present invention, the light receiving element is manufactured through the second conductivity type semiconductor layer forming step and the electrode forming step. In the second conductivity type semiconductor layer forming step, a light receiving semiconductor layer is formed in a predetermined portion of the first conductivity type semiconductor layer that is predetermined to form the second conductivity type semiconductor layer of the first conductivity type semiconductor layer. At the same time, the depth from the surface portion on one side in the thickness direction (hereinafter simply referred to as depth) d1 is greater than the depth d2 of the light receiving semiconductor layer (d1> d2) in a predetermined portion as much as possible as the electrode portion. A semiconductor layer is formed. In the electrode formation step, the electrode is electrically connected to the surface portion on one side in the thickness direction of the compensation semiconductor layer formed in the second conductivity type semiconductor layer formation step (hereinafter also simply referred to as one surface portion). Form. Here, the first conductive semiconductor layer includes a first conductive semiconductor substrate.

  Since the compensation semiconductor layer provided in the electrode portion where the electrode is formed is formed so that the depth d1 is greater than the depth d2 of the light receiving semiconductor layer, spikes are formed when the electrode is formed in the electrode formation step. Even if this occurs, it is possible to prevent the electrode material from reaching the first conductivity type semiconductor layer by allowing the tip of the electrode material forming the electrode to be present inside the compensation semiconductor layer. For example, even when the electrode material penetrates into the compensation semiconductor layer to a depth exceeding the depth d2 of the light receiving semiconductor layer due to the spike, the tip portion of the electrode material is prevented from reaching the first conductivity type semiconductor layer. Therefore, it is possible to prevent occurrence of a short circuit between the electrode and the first conductivity type semiconductor layer in the electrode portion. That is, in the method for manufacturing a light receiving element of the present invention, the depth d2 of the light receiving semiconductor layer can be selected without considering a short circuit at the electrode portion. Therefore, the depth d2 of the light receiving semiconductor layer can be designed to a value suitable for the wavelength of the light to be detected without reducing the manufacturing yield. For example, since the depth d2 of the light receiving semiconductor layer can be reduced to about 1 μm or less without causing a short circuit in the electrode portion, absorption of light with a short wavelength having a wavelength of about 400 to 450 nm or less. A light-receiving element that improves efficiency and exhibits excellent sensitivity to the light can be manufactured stably and with a high yield.

  According to the invention, the light receiving semiconductor layer covers at least a portion (hereinafter referred to as a light receiving semiconductor layer formation scheduled portion) that is predetermined to form the light receiving semiconductor layer of the first conductivity type semiconductor layer. After the antireflection film is formed, the second conductivity type impurity is injected and diffused into the light receiving semiconductor layer formation planned portion of the first conductivity type semiconductor layer through the antireflection film. In this way, by implanting the second conductivity type impurity through the antireflection film, the concentration distribution of the second conductivity type impurity in the light receiving semiconductor layer is changed to the surface portion on one side in the thickness direction of the light receiving semiconductor layer (hereinafter simply referred to as the “light receiving semiconductor layer”). The distribution can be monotonously decreasing from one surface portion to the other in the thickness direction. As a result, carriers generated in the vicinity of one surface portion of the light receiving semiconductor layer can be prevented from moving toward one surface portion of the light receiving semiconductor layer, so the proportion of carriers that disappear due to surface recombination Can be reduced. Therefore, the light absorption efficiency can be improved and the light receiving sensitivity of the light receiving element can be improved.

According to the invention, in the step of forming the light receiving semiconductor layer, the dose amount when the second conductivity type impurity is implanted into the first conductivity type semiconductor layer is 1 × 10 ¹⁴ ions / cm ² or more and 1 × 10 6. ¹⁵ ions / cm ² or less. By selecting the dose amount within the above range, the concentration of the second conductivity type impurity in the light receiving semiconductor layer is made suitable, and the lifetime of the carrier when the concentration is excessive is decreased and the sensitivity is thereby decreased. A decrease in response speed when the concentration is too small can be suppressed. Therefore, a light receiving element excellent in both sensitivity and response speed can be easily obtained.

  According to the invention, in the step of forming the light receiving semiconductor layer, the ion implantation energy for implanting the second conductivity type impurity into the first conductivity type semiconductor layer is not less than 50 keV and not more than 100 keV. By selecting the ion implantation energy within the above range, the concentration distribution of the second conductivity type impurity in the light receiving semiconductor layer is more surely distributed so as to monotonously decrease toward one side in the thickness direction of the light receiving semiconductor layer. can do.

  According to the invention, in the second conductivity type semiconductor layer forming step, the second conductivity type impurity is implanted and diffused in a predetermined portion to form the compensation semiconductor layer of the first conductivity type semiconductor layer. After forming the compensation semiconductor layer, an antireflection film is formed to form a light receiving semiconductor layer. By forming the light receiving semiconductor layer after forming the compensation semiconductor layer in this way, the temperature at which the second conductivity type impurity implanted into the light receiving semiconductor layer is diffused after the light receiving semiconductor layer is formed. Therefore, it is possible to prevent the second conductivity type impurity in the light receiving semiconductor layer from diffusing again. Therefore, the concentration distribution of the second conductivity type impurity in the light receiving semiconductor layer and the depth d2 can be maintained in the state when the light receiving semiconductor layer is formed. The light receiving semiconductor layer can be easily formed.

  According to the invention, the compensation semiconductor layer is formed so that the depth d1 is 1 μm or more larger than the depth d2 of the light receiving semiconductor layer. As a result, a short circuit between the electrode and the first conductive semiconductor layer due to the spike can be prevented more reliably.

  According to the invention, the second conductivity type semiconductor layer provided so as to be in contact with the first conductivity type semiconductor layer has the light receiving semiconductor layer in the light receiving portion and the compensation semiconductor layer in the electrode portion. Since the depth d1 of the compensation semiconductor layer is larger than the depth d2 of the light receiving semiconductor layer (d1> d2), a spike is generated when the electrode is formed, and the electrode material is the depth d2 of the light receiving semiconductor layer. Even when the compensation semiconductor layer has been penetrated to a depth exceeding 50 mm, the tip of the electrode material does not reach the first conductivity type semiconductor layer, and a short circuit between the electrode and the first conductivity type semiconductor layer occurs in the electrode portion. Absent. Therefore, the depth d2 of the light receiving semiconductor layer can be designed to a value suitable for the wavelength of the light to be detected without considering a short circuit at the electrode portion. Therefore, the depth d2 of the light-receiving semiconductor layer is as small as about 1 μm or less, for example, and exhibits excellent sensitivity to light with a wavelength as short as about 400 to 450 nm or less, and there is no short circuit at the electrode portion, and reliability Can be obtained.

  Further, according to the present invention, the concentration of the second conductivity type impurity in the light receiving semiconductor layer is from the surface portion on one side in the thickness direction of the light receiving semiconductor layer (hereinafter, also simply referred to as one surface portion) toward one side in the thickness direction. Therefore, carriers generated near one surface portion of the light receiving semiconductor layer can be prevented from moving toward one surface portion of the light receiving semiconductor layer. As a result, the proportion of carriers that disappear due to surface recombination can be reduced, so that the light absorption efficiency can be improved and the sensitivity of the photodiode can be improved.

  Further, according to the present invention, since the light receiving element includes the photodiode of the present invention, the light receiving element exhibits excellent sensitivity to light having a short wavelength with a wavelength of about 400 to 450 nm or less, and also has high reliability. An excellent light receiving element can be obtained.

  FIG. 1 is a cut end view showing a simplified configuration of a photodiode 20 according to an embodiment of the present invention. The photodiode 20 is a P-type silicon substrate 21 which is a semiconductor substrate, and a first conductive semiconductor layer provided on a surface portion on one side in the thickness direction of the P-type silicon substrate 21 (hereinafter also simply referred to as one surface portion). A P-type epitaxial layer 22; an N-type impurity diffusion layer 27 that is a second conductivity type semiconductor layer formed by diffusing an N-type impurity that is a second conductivity type impurity in the P-type epitaxial layer 22; An antireflection film 36 provided on one surface portion of the diffusion layer 27, and N electrically connected to one surface portion of the N-type impurity diffusion layer 27 provided so as to penetrate the antireflection film 36 in the thickness direction. The side electrode 38 and the P-side electrode 39 provided on the surface portion on the other side in the thickness direction of the P-type silicon substrate 21 (hereinafter also simply referred to as the other surface portion) are configured.

  In the photodiode 20, a PN junction is formed by the P-type epitaxial layer 22 and the N-type impurity diffusion layer 27. The photodiode 20 receives light incident from one side in the thickness direction of the N-type impurity diffusion layer 27 by the light receiving unit 40 and converts the energy of the light into electrical energy. The N-type impurity diffusion layer 27 has the light receiving semiconductor layer 26 in the light receiving portion 40 used for light reception, and the compensation diffusion layer 25 that is a compensation semiconductor layer in the electrode portion 41 in which the N-side electrode 38 is formed. . The depth d1 of the compensation diffusion layer 25 is larger than the depth d2 of the light receiving semiconductor layer 26 (d1> d2).

  The depth d2 of the light receiving semiconductor layer 26 is appropriately selected according to the wavelength of light to be detected. In the present embodiment, since the depth d1 of the compensation diffusion layer 25 is larger than the depth d2 of the light receiving semiconductor layer 26, the light receiving semiconductor layer is taken into consideration without considering a short circuit at the electrode portion 41 in the manufacturing process described later. The depth d2 of 26 can be selected to a value suitable for the wavelength of light to be detected. Therefore, it is possible to easily realize the photodiode 20 that exhibits excellent sensitivity to the light to be detected. For example, in the case of the photodiode 20 that detects light having a wavelength of 410 nm, the depth d2 of the light receiving semiconductor layer 26 is preferably 1 μm or less. In the present embodiment, as will be described later, a short circuit between the N-side electrode 38 and the P-type epitaxial layer 22 in the electrode portion 41 can be prevented, so that the depth d2 of the light receiving semiconductor layer 26 can be 1 μm or less. . Thereby, the absorption efficiency of light having a wavelength of 410 nm can be improved, and a sensitivity of about 0.3 A / W, which is substantially equal to a theoretical value, can be obtained for light having a wavelength of 410 nm.

  In the present embodiment, the N-side electrode 38 is formed in a rectangular shape and an annular shape so as to surround the light receiving unit 40. A surface insulating film 32 and an interlayer insulating film 33 are formed in this order on one surface portion of the P-type epitaxial layer 22. The surface insulating film 32 and the interlayer insulating film 33 are provided so as to surround the N-side electrode 38 and the antireflection film 36. In this embodiment, the antireflection film 36 is formed of two layers of a silicon oxide film 34 and a silicon nitride film (silicon nitride film) 35. The silicon oxide film 34 and the silicon nitride film 35 are stacked on the N-type impurity diffusion layer 27 in this order.

A P ⁺ stopper portion 24 formed by diffusing P-type impurities in the P-type epitaxial layer 22 is formed at the end of one surface portion of the P-type epitaxial layer 22. The P ⁺ stopper portion 24 functions as a channel stopper. In the field portion 29 between the P ⁺ stopper portion 24 and the N-type impurity diffusion layer 27, an inversion preventing portion 31 formed by diffusing P-type impurities in the P-type epitaxial layer 22 is provided from the P ⁺ stopper portion 24. It is formed continuously. The inversion prevention unit 31 is provided to prevent surface inversion that occurs when the impurity concentration of the P-type epitaxial layer 22 is insufficient.

FIG. 2 is a diagram showing an impurity concentration profile in the depth direction of the light receiving portion 40 of the photodiode 20 shown in FIG. In FIG. 2, the horizontal axis indicates the depth (μm) from one surface portion of the light receiving semiconductor layer 26, and the vertical axis indicates the impurity concentration (ions / cm ² ). In FIG. 2, in the light receiving semiconductor layer forming process described later, the ion implantation energy is 80 keV and the dose is 4 × 10 ¹⁴ ions / cm for the P-type epitaxial layer 22 (impurity concentration 3 × 10 ¹² ions / cm ³ ). An impurity concentration profile when the light receiving semiconductor layer 26 is formed by implanting phosphorus ions as cm ² is shown. As shown in FIG. 2, in the present embodiment, the concentration of impurities in the light receiving semiconductor layer 26 of the light receiving portion 40 decreases from the surface portion on one side in the thickness direction of the light receiving semiconductor layer 26 toward one side in the thickness direction. ing. By making such a concentration distribution, carriers generated in the vicinity of one surface portion of the light receiving semiconductor layer 26, specifically, in a portion whose depth from the one surface portion of the light receiving semiconductor layer 26 is 1 μm or less. Can be prevented from moving toward one surface of the light receiving semiconductor layer 26. Therefore, the proportion of carriers that disappear due to surface recombination can be reduced, so that the light absorption efficiency can be improved and the light receiving sensitivity of the photodiode 20 can be improved.

The photodiode 20 shown in FIG. 1 can be manufactured by a method for manufacturing a light receiving element which is one embodiment of the present invention. FIG. 3 is a flowchart showing a procedure for manufacturing the photodiode 20 by the method for manufacturing the light receiving element of the present embodiment. The light receiving element manufacturing method of this embodiment includes at least a compensation diffusion layer forming step (step s2) for forming the compensation diffusion layer 25, which is a compensation semiconductor layer, and an antireflection film forming step for forming the antireflection film 36 (step s2). Step s4), a light receiving semiconductor layer forming step (step s5) for forming the light receiving semiconductor layer 26, and an electrode forming step (step s6) for forming the N-side electrode 38 are included. The present embodiment further includes a stopper portion forming step (step s1) for forming the P ⁺ stopper portion 24 and a field doping step (step s3) for forming the inversion preventing portion 31. The compensation diffusion layer forming process in step s2, the antireflection film forming process in step s4, and the light receiving semiconductor layer forming process in step s5 are the second conductivity type for forming the N-type impurity diffusion layer 27 which is the second conductivity type semiconductor layer. This is a semiconductor layer forming step. The manufacturing of the photodiode 20 according to this embodiment starts at step s0 and proceeds to step s1.

4 to 11 are cut end views showing the states of the respective steps in manufacturing the photodiode 20 according to the present embodiment in a simplified manner. FIG. 4 is a simplified cross-sectional view showing a state in which the P ⁺ stopper portion 24 is formed. In the stopper portion forming step of step s1, first, a P-type epitaxial layer 22 is formed on one surface portion of the P-type silicon substrate 21 by, for example, an epitaxial growth method. As the P-type silicon substrate 21, for example, a P-type single crystal silicon substrate is used. The thickness of the P-type silicon substrate 21 is, for example, 250 to 500 μm. As P type epitaxial layer 22, for example, a P type single crystal silicon layer or the like is formed. The thickness of the P type epitaxial layer 22 is, for example, 10 to 30 μm.

A silicon oxide film 23 is formed on one surface portion of the formed P-type epitaxial layer 22 by a thermal oxidation method or the like. The thickness of the silicon oxide film 23 is, for example, 0.5 to 1.0 μm. Of the formed silicon oxide film 23, the silicon oxide film 23 formed at a predetermined portion for forming the P ⁺ stopper portion 24, that is, at the end of the P-type epitaxial layer 22, is photolithography as shown in FIG. Remove using the method. Using the remaining silicon oxide film 23 as a mask, a P-type impurity is introduced into the P-type epitaxial layer 22 and diffused by ion implantation or the like to form a P ⁺ stopper portion 24. As the P-type impurity, for example, a group 13 element such as boron (element symbol: B) is used. In the ion implantation method, impurities are used in an ion state. The depth from one surface portion of the P ⁺ stopper portion 24 is, for example, 2 to 4 μm. Moreover, the density | concentration of the P-type impurity in the P ⁺ stopper part 24 is 1 * 10 < ¹⁷ > -1 * 10 < ¹⁸ > cm < ^-3 >, for example. In this way, the P ⁺ stopper portion 24 is formed, and the process proceeds to Step s2.

  FIG. 5 is a simplified cross-sectional view showing a state where the compensation diffusion layer 25 is formed. In the compensation diffusion layer forming step in step s2, first, a silicon oxide film formed in a predetermined portion of the remaining silicon oxide film 23 as the electrode portion 41 of the remaining silicon oxide film 23 using a photolithography method or the like as a mask. 23, that is, the silicon oxide film 23 formed in a portion predetermined to form the compensation diffusion layer 25 of the P-type epitaxial layer 22 (hereinafter referred to as a compensation diffusion layer formation scheduled portion) is removed, and the P-type epitaxial layer 22 is removed. To expose. Using the remaining silicon oxide film 23 as a mask, an N-type impurity is introduced and diffused into the compensation diffusion layer formation scheduled portion of the P-type epitaxial layer 22 by ion implantation, thermal diffusion, or the like, thereby forming the compensation diffusion layer 25. As a method for introducing the N-type impurity, an ion implantation method is preferably used. In the ion implantation method, after an impurity is implanted, the impurity is activated and diffused by heating in a non-oxidizing atmosphere. The shape of the compensation diffusion layer 25 is appropriately selected according to the shape of the N-side electrode 38 formed in the electrode forming process described later. In the present embodiment, since the N-side electrode 38 is formed in a rectangular shape and an annular shape, the compensation diffusion layer 25 is similarly formed in a rectangular shape and an annular shape. As the N-type impurity, for example, a group 15 element such as arsenic (element symbol: As) or phosphorus (element symbol: P) is used.

  The depth d1 of the compensation diffusion layer 25 is selected so as to be larger than the depth d2 of the light receiving semiconductor layer 26 formed in the light receiving semiconductor layer forming step described later (d1> d2). Here, the depth d1 of the compensation diffusion layer 25 is a value in the photodiode 20 shown in FIG. 1, that is, a value after the light receiving semiconductor layer forming step. In the light-receiving semiconductor layer forming step, heating for diffusing N-type impurities is performed as will be described later, so that the N-type impurities in the compensation diffusion layer 25 are re-diffused by this heating, and the depth of the compensation diffusion layer 25 is increased. It becomes larger than the value when formed in the compensation diffusion layer forming step. Therefore, the depth of the compensation diffusion layer 25 formed in the compensation diffusion layer formation step is such that the depth d1 of the compensation diffusion layer 25 after the light reception semiconductor layer formation step becomes a desired value. It is selected in consideration of an increase in depth in the process. However, in this embodiment, for convenience of explanation, it is assumed that the compensation diffusion layer 25 having the depth d1 is formed in the compensation diffusion layer forming step.

  As the photodiode 20 shown in FIG. 1 described above, when the photodiode 20 for detecting light with a short wavelength as short as about 400 to 450 nm is used, in order to absorb light efficiently, It is advantageous that the depth of the N-type impurity diffusion layer 27 of the light-receiving portion 40 used for light reception, that is, the depth d2 of the light-receiving semiconductor layer 26 is shallow, and specifically, it is preferably about 1 μm or less. For example, in the case of light having a wavelength of 410 nm, the intensity of light that has entered the inside of the semiconductor is reduced to 10% of the intensity at the semiconductor surface at a point where the depth from the semiconductor surface is about 1 μm. The depth d2 is preferably 1 μm or less. On the other hand, if the depth of the N-type impurity diffusion layer 27 is as small as about 1 μm or less from the light receiving portion 40 to the electrode portion 41 as a whole, a spike generated during the formation of the N-side electrode 38 in the electrode forming step of step s6 described later causes Short-circuiting between the N-side electrode 38 and the P-type epitaxial layer 22 is likely to occur. In order to prevent this short-circuit, in this embodiment, the compensation diffusion layer 25 is provided in the electrode portion 41, and the depth d1 of the compensation diffusion layer 25 is greater than the depth d2 of the light-receiving semiconductor layer 26 provided in the light-receiving portion 40. It is getting bigger. Therefore, in the present embodiment, the depth d2 of the light receiving semiconductor layer 26 of the light receiving unit 40 is set to 1 μm or less, and the absorption efficiency of short wavelength light having a wavelength of about 400 to 450 nm or less is improved. The sensitivity can be improved and the occurrence of a short circuit can be prevented by setting the depth d1 of the compensation semiconductor layer 25 of the electrode part 41 to such an extent that the short circuit does not occur.

  In order to more reliably prevent a short circuit between the N-side electrode 38 and the P-type epitaxial layer 22 in the electrode part 41, the depth d1 of the compensation diffusion layer 25 should be 1 μm or more larger than the depth d2 of the light receiving semiconductor layer 26. Is preferred. For example, when the light receiving semiconductor layer 26 having a depth d2 of 1 μm is formed, the depth d1 of the compensation diffusion layer 25 is selected to be about 3 μm.

  Further, in this embodiment, in order to further reliably prevent a short circuit at the electrode portion 41, the depth d1 of the compensation diffusion layer 25 is set to N when a spike occurs as shown in FIG. The length L is selected in consideration of the length L of the side electrode 38 entering the compensation diffusion layer 25. That is, the depth d1 of the compensation diffusion layer 25 is preferably larger by 0.5 μm or more than the length L of the intrusion portion of the N-side electrode 38. If the difference between the depth d1 of the compensation diffusion layer 25 and the length L of the intrusion portion of the N-side electrode 38 is less than 0.5 μm, for example, the length L of the intrusion portion determined in advance as described later is set. When a spike exceeding this occurs, there is a possibility that a short circuit between the N-side electrode 38 and the P-type epitaxial layer 22 occurs. Here, the length L of the intrusion portion of the N-side electrode 38 is a distance from one surface portion of the compensation diffusion layer 25 to the most advanced portion of the electrode material that has entered the compensation diffusion layer 25. The length L of the intrusion portion of the N-side electrode 38 varies depending on the type of electrode material used, the heating temperature during sintering, and the like. The length L of the intrusion portion can be obtained in advance by a test using the same electrode material as that used in actual manufacturing and setting the heating temperature during sintering to the same conditions as in manufacturing.

  Specifically, the depth d1 of the compensation diffusion layer 25 is preferably 2 μm or more. If the depth d1 of the compensation diffusion layer 25 is less than 2 μm, a short circuit between the N-side electrode 38 and the P-type epitaxial layer 22 may occur. The upper limit value of the depth d1 of the compensation diffusion layer 25 is not particularly limited, but is preferably 5 μm or less. Forming the compensation diffusion layer 25 so that the depth d1 exceeds 5 μm leads to an increase in heating time for diffusing the N-type impurity when forming the compensation diffusion layer 25 and lowers productivity. It is not preferable.

The depth d1 of the compensation diffusion layer 25 can be adjusted by the type of impurity to be implanted, ion implantation energy when the impurity is implanted, heating temperature and heating time after implantation, and the like. For example, when the compensation diffusion layer 25 is formed using phosphorus ions (P ⁺ ), the ion implantation energy is set to 50 keV or more and 100 keV or less, and the oxide diffusion is performed by heating at a temperature of 800 ° C. or more and 1000 ° C. or less for 50 to 90 minutes. A compensation diffusion layer 25 having a depth d1 of 2 μm or more and 5 μm or less, which is in the above-described preferable range, can be formed. The ion implantation energy, the heating temperature, and the heating time are not limited to the amounts shown in this embodiment, and are appropriately selected to obtain a desired depth d1.

Further, the dose at the time of implanting the N-type impurity is, for example, 8 × 10 ^{15 to} 5 × 10 ¹⁶ ions / cm ² . The dose amount is not limited to the amount shown in this embodiment, and is appropriately selected in order to obtain a desired impurity concentration and concentration profile. The concentration of the N-type impurity in the compensation diffusion layer 25 is, for example, 1 × 10 ^{19 to} 5 × 10 ¹⁹ cm ⁻³ . In this way, the compensation diffusion layer 25 is formed, and the process proceeds to the field doping process of step s3.

FIG. 6 is a cross-sectional view schematically showing how a P-type impurity is implanted into the field portion 29. In FIG. 6, P-type impurities are represented by “x”. In the field doping step of step s3, first, the silicon oxide film 23 remaining after the formation of the compensation diffusion layer 25 is removed, and then a silicon oxide film 28 is formed on one surface portion of the P-type epitaxial layer 22 again by a thermal oxidation method or the like. To do. Next, the silicon oxide film 28 formed on the surface of the P-type epitaxial layer 22 in the field portion 29 is removed by using a photolithography method or the like, and the field portion 29 is exposed. Using the remaining silicon oxide film 28 as a mask, a P-type impurity is introduced into the P-type epitaxial layer 22 in a predetermined portion as much as possible as the inversion preventing portion 31 by an ion implantation method or the like. At this time, the silicon oxide film 30 is formed on one surface portion of the P-type epitaxial layer 22 of the field portion 29. Next, P-type impurities are diffused by heating to form an inversion preventing portion 31 connected to the P ⁺ stopper portion 24 as shown in FIG. As the P-type impurity, for example, a group 13 element such as boron (element symbol: B) is used. The depth from one surface portion of the inversion preventing portion 31 is, for example, 0.15 to 0.3 μm. Further, the concentration of the P-type impurity in the inversion preventing unit 31 is, for example, 9 × 10 ^{15 to} 3 × 10 ¹⁶ cm ⁻³ . In this way, field doping is performed to form the inversion preventing portion 31, and the process proceeds to the antireflection film forming step in step s4.

FIG. 7 is a cross-sectional view schematically showing a state in which the surface insulating film 32 and the interlayer insulating film 33 are formed. FIG. 8 is a simplified cross-sectional view showing a state where the antireflection film 36 is formed. In the antireflection film forming step of step s4, first, the silicon oxide films 28 and 30 remaining after the formation of the inversion preventing part 31 are removed, and then the surface insulating film 32 is formed on one surface part of the P type epitaxial layer 22. The surface insulating film 32 is, for example, a silicon oxide (SiO ₂ ) film, and can be formed by a thermal oxidation method or the like. After forming contact holes and wiring portions (not shown) in the formed surface insulating film 32, an interlayer insulating film 33 is formed on one surface portion of the surface insulating film 32. As the interlayer insulating film 33, for example, chemical vapor deposition (Chemical Vapor
A Psylox film formed by Deposition (abbreviation CVD) method is used. Examples of the material of the cylox film include silicon oxide (SiO ₂ ) and phosphorus glass (abbreviated as PSG).

  Next, using a photolithography method or the like, the surface insulating film 32 and the interlayer insulation formed at a predetermined portion for forming the N-type impurity diffusion layer 27, that is, a predetermined portion for forming the light receiving portion 40 and the electrode portion 41. The film 33 is removed, and one surface portion of the P-type epitaxial layer 22 including the portion where the compensation diffusion layer 25 is formed is exposed as shown in FIG. A silicon oxide film 34 is formed on one surface portion of the exposed compensation diffusion layer 25 and P-type epitaxial layer 22 by a thermal oxidation method or the like as shown in FIG. The film thickness of the silicon oxide film 34 is, for example, 10 to 30 nm. Next, a silicon nitride film 35 is formed on one surface portion of the silicon oxide film 34 by a CVD method or the like. The film thickness of the silicon nitride film 35 is, for example, 15 to 100 nm. In this embodiment, the silicon oxide film 34 and the silicon nitride film 35 constitute an antireflection film 36.

  The antireflection film 36 is provided to reduce the reflection loss of light incident on the light receiving unit 40 and improve the conversion efficiency of light energy into electric energy, that is, increase the light receiving sensitivity of the photodiode 20. The antireflection film 36 reduces reflection loss by causing reflected waves to interfere with each other at the interface formed by the stacked films. The film thickness of each layer of the antireflection film 36 is appropriately selected according to the wavelength of the light to be detected so as to have an appropriate value with respect to the wavelength of the light to be detected. For example, when blue violet light having a wavelength of 405 nm is to be detected, an antireflection film 36 composed of a silicon oxide film 34 having a thickness of about 20 nm and a silicon nitride film 35 having a thickness of about 35 nm can be used. Since the refractive index of the antireflection film 36 may change due to the implantation of impurity ions in the light receiving semiconductor layer forming step described later, the thickness of each layer of the antireflection film 36 is refracted by the implantation of impurity ions. It is preferable to select in consideration of a change in rate. The antireflection film 36 is formed of two layers (films) in the present embodiment, but is not limited thereto, and may be formed of three or more layers (films), or may be formed of one layer (film). May be formed. In this way, the antireflection film 36 is formed, and the process proceeds to the light receiving semiconductor layer forming step of step s5.

  FIG. 9 is a cross-sectional view schematically showing a state in which N-type impurities are implanted into the P-type epitaxial layer 22 in the portions that become the light receiving portion 40 and the electrode portion 41. In FIG. 9, N-type impurities are represented by “◯”. In the light receiving semiconductor layer forming step of step s5, a predetermined portion (hereinafter referred to as light receiving semiconductor) for forming the light receiving semiconductor layer 26 of the P-type epitaxial layer 22 through the antireflection film 36 formed as described above. An N-type impurity is implanted into the layer 26a (referred to as a layer formation scheduled portion) by ion implantation. At this time, in this embodiment, the antireflection film 36 is also formed on the surface portion of the compensation diffusion layer 25, and no mask or the like for blocking ion implantation is formed on the surface portion of the antireflection film 36. N-type impurities are also implanted into the layer 25. In other words, in this embodiment, the N-type impurity is implanted into the P-type epitaxial layer 22 in a predetermined portion as much as possible for the light receiving unit 40 and the electrode unit 41. Next, by heating in a non-oxidizing atmosphere, the N-type impurities are activated and diffused to form the light receiving semiconductor layer 26 as shown in FIGS. 10 and 11 described later. As a result, an N-type impurity diffusion layer 27 is formed. As the N-type impurity, for example, a group 15 element such as arsenic (element symbol: As) or phosphorus (element symbol: P) is used.

  As described above, the depth d2 of the light receiving semiconductor layer 26 is appropriately selected according to the wavelength of light to be detected. In this embodiment, since the compensation diffusion layer 25 having a depth d1 (d1> d2) larger than the depth d2 of the light receiving semiconductor layer 26 is formed in the electrode portion 41, an electrode in an electrode formation step to be described later The depth d2 of the light receiving semiconductor layer 26 can be selected without considering a short circuit in the portion 41 or the like. Therefore, it is possible to make the depth d2 of the light receiving semiconductor layer 26 1 μm or less, and a photodiode capable of responding with high sensitivity to light having a short wavelength of about 400 to 450 nm or less. 20 can be realized. Specifically, in the case of the photodiode 20 that detects light having a wavelength of 400 to 450 nm or less, the depth d2 of the light receiving semiconductor layer 26 is preferably 1 μm or less, and is 0.5 μm or less. It is more preferable.

  Further, in this embodiment, as shown in FIG. 9, since the impurity is implanted through the antireflection film 36, the concentration peak in the thickness direction (hereinafter also referred to as the depth direction) of the implanted impurity is shown in the antireflection film 36. Can be formed inside. As a result, the impurity concentration distribution in the light receiving semiconductor layer 26 is monotonously decreased from the surface portion on one side in the thickness direction of the light receiving semiconductor layer 26 toward one side in the thickness direction as shown in FIG. Can be.

The dose amount when N-type impurities are implanted into the light-receiving semiconductor layer formation planned portion 26a is preferably 1 × 10 ¹⁴ ions / cm ² or more and 1 × 10 ¹⁵ ions / cm ² or less, and 1.5 × 10 10 More preferably, it is ¹⁴ ions / cm ² or more and 8 × 10 ¹⁴ ions / cm ² or less. By selecting the dose amount within the above range, the impurity concentration in the light receiving semiconductor layer 26 can be made suitable. If the dose amount exceeds 1 × 10 ¹⁵ ions / cm ² , the impurity concentration in the light receiving semiconductor layer 26 becomes excessive, the carrier lifetime is shortened, and the sensitivity of the photodiode 20 may not be sufficiently obtained. is there. If the dose is less than 1 × 10 ¹⁴ ions / cm ² , the impurity concentration in the light receiving semiconductor layer 26 becomes too small, and the response speed of the photodiode 20 may not be sufficiently obtained.

  The ion implantation energy is preferably 50 keV or more and 100 keV or less. By selecting the ion implantation energy within the above range, the peak of the impurity concentration distribution can be more reliably located inside the antireflection film 36. As a result, the impurity concentration distribution in the light receiving semiconductor layer 26 can be more reliably distributed so as to monotonously decrease toward one side in the thickness direction of the light receiving semiconductor layer 26. When the ion implantation energy exceeds 100 keV, a concentration peak in the thickness direction of the implanted impurity is formed inside the light receiving semiconductor layer 26, and the impurity concentration may be lowered in the vicinity of the surface portion of the light receiving semiconductor layer 26. is there. If the ion implantation energy is less than 50 keV, it may be difficult to set the depth d2 of the light receiving semiconductor layer 26 to a desired value.

  Further, the heating temperature and the heating time during the heat treatment after the impurity implantation are appropriately selected so that the depth d2 of the light receiving semiconductor layer 26 becomes a desired value, for example, at a temperature of 900 to 1000 ° C. for 30 to 60 minutes. It is. In this way, the light receiving semiconductor layer 26 is formed, and the process proceeds to the electrode forming step of step s6.

  FIG. 10 is a simplified cross-sectional view showing a state in which the N-side electrode 38 and the P-side electrode 39 are formed. FIG. 11 is an enlarged view of the portion of the N-side electrode 38 shown in FIG. In the electrode formation process of step s6, although not shown, first, a portion (hereinafter referred to as an N-side electrode formation scheduled portion) predetermined to form the N-side electrode 38 on one surface portion of the antireflection film 36 by photolithography. The resist mask having an opening is formed. Next, the silicon nitride film 35 exposed through the resist mask in the antireflection film 36 is removed by dry etching or the like to expose the silicon oxide film 34. The exposed portion of the silicon oxide film 34 is removed by wet etching or the like, and as shown in FIGS. 10 and 11, a contact hole 37 which is a through hole penetrating the antireflection film 36 in the thickness direction is formed.

  After removing the remaining resist mask, an electrode film 38 a is formed on one surface portion of the antireflection film 36 by sputtering or the like so as to fill the contact hole 37. As an electrode material for forming the electrode film 38a, a conductive material such as aluminum (Al) is used. A resist mask (not shown) opened at the N-side electrode formation scheduled portion is formed by photolithography on the surface of the formed electrode film 38a, and then the electrode film 38a is patterned by dry etching or the like to obtain a portion other than the N-side electrode formation scheduled portion. The electrode film 38a formed on the surface portion of the antireflection film 36 is removed. Next, sintering is performed to form an ohmic contact between the electrode film 38 a and the compensation diffusion layer 25, thereby forming the N-side electrode 38. The sintering can be performed, for example, by heating to a temperature of about 400 to 500 ° C. in an inert gas atmosphere. Next, the P-side electrode 39 is formed of aluminum (Al) or the like on the other surface portion of the P-type silicon substrate 21 to obtain the photodiode 20. Although different from the present embodiment, after the N-side electrode 38 is formed, phosphorous glass (abbreviated as PSG) is used as a cover film on the surface portion other than the antireflection film 36 among the surface portions exposed on one side in the thickness direction. Etc. may be deposited. In this way, the process proceeds from step s6 to step s7, and the manufacture of the photodiode 20 is completed.

  When sintering for forming the N-side electrode 38, spikes are generated as shown in FIG. 12, and the electrode material constituting the N-side electrode 38 may enter the N-type impurity diffusion layer 27 of the electrode portion 41. There is. As described above, in order to efficiently absorb light of a short wavelength having a wavelength of about 400 to 450 nm or less, when a spike occurs when the depth of the N-type impurity diffusion layer is 1 μm or less as a whole, As shown in FIG. 21 described above, the electrode material penetrates the N-type impurity diffusion layer 6 and a short circuit occurs between the N-side electrode 16 and the P-type epitaxial layer 2.

  On the other hand, in this embodiment, the compensation diffusion layer 25 is provided as the N-type impurity diffusion layer 27 in the electrode portion 41, and the depth d1 of the compensation diffusion layer 25 is the depth of the light receiving semiconductor layer 26 provided in the light receiving portion 40. Since it is larger than d2 (d1> d2), even when the depth d2 of the light receiving semiconductor layer 26 of the light receiving unit 40 is 1 μm or less, the depth d1 of the compensation diffusion layer 25 is set to be larger than 1 μm. The depth can be such that the electrode material does not penetrate. This prevents the electrode material from penetrating through the N-type impurity diffusion layer 27 even when a spike occurs, so that a short circuit between the N-side electrode 38 and the P-type epitaxial layer 22 can be prevented. it can. In particular, by making the depth d1 of the compensation diffusion layer 25 1 μm or more larger than the depth d2 of the light receiving semiconductor layer 26 as described above, the short-circuit between the N-side electrode 38 and the P-type epitaxial layer 22 due to spikes is further increased. It can be surely prevented.

  Therefore, in this embodiment, the depth d2 of the light receiving semiconductor layer 26 can be reduced to about 1 μm or less without causing a short circuit in the electrode portion 41, so that the wavelength is about 400 to 450 nm or less. It is possible to stably manufacture the photodiode 20 that exhibits excellent sensitivity to light of a certain short wavelength. That is, in the method for manufacturing a light receiving element of the present invention, the depth d2 of the light receiving semiconductor layer 26 is required to be 1 μm or less, preferably 0.5 μm or less in order to improve the light absorption efficiency. It is particularly suitable for manufacturing a light receiving element for detecting light having a shorter wavelength than 450 nm blue-violet light and blue-violet light.

  In this embodiment, the compensation diffusion layer formation step (step s2) is provided before the antireflection film formation step of step s4, and after formation of the compensation diffusion layer 25, the antireflection film 36 is formed to receive the light receiving semiconductor layer. 26 is formed. Although the compensation diffusion layer 25 may be formed after the light receiving semiconductor layer 26 is formed, it is preferably formed before the light receiving semiconductor layer 26 is formed as in the present embodiment.

  When forming the compensation diffusion layer 25, after N-type impurities are implanted, heating for activation and diffusion of the implanted N-type impurities is performed. Therefore, when the compensation diffusion layer 25 is formed after the light receiving semiconductor layer 26 is formed, the N-type impurities in the light receiving semiconductor layer 26 are diffused again, and the impurity concentration distribution and depth in the light receiving semiconductor layer 26 are obtained. d2 may change. For example, when N-type impurities in the light receiving semiconductor layer 26 are diffused in the depth direction and the depth d2 becomes larger than a desired value, particularly when light having a wavelength of about 400 to 450 nm or less is received. There is a possibility that the light absorption efficiency is lowered and the light receiving sensitivity of the photodiode 20 is lowered. Further, when the impurity concentration profile in the light receiving semiconductor layer 26 becomes gentle due to the diffusion of the impurities in the depth direction, and the impurity concentration gradually decreases toward one side in the thickness direction of the light receiving semiconductor layer 26, Since the built-in electric field of the light receiving semiconductor layer 26 is weakened, the movement time of the carriers in the light receiving semiconductor layer 26 becomes long, and the generated carriers are likely to disappear by recombination. For this reason, there is a possibility that the light receiving sensitivity is lowered.

  On the other hand, in this embodiment, the light receiving semiconductor layer 26 is formed after the compensation diffusion layer 25 is formed. Therefore, after the light receiving semiconductor layer 26 is formed, a temperature causing impurity diffusion, for example, 900 to Heating at a high temperature of about 1000 ° C. is unnecessary. Therefore, diffusion of impurities in the light receiving semiconductor layer 26 can be suppressed, and changes in the impurity concentration distribution in the light receiving semiconductor layer 26 and the depth d2 of the light receiving semiconductor layer 26 can be prevented. Therefore, in this embodiment, the impurity concentration distribution and the depth d2 in the light receiving semiconductor layer 26 can be maintained in the state when the light receiving semiconductor layer 26 is formed in the light receiving semiconductor layer forming step. It is possible to easily form the light receiving semiconductor layer 26 having the impurity concentration distribution and the depth d2.

  Although different from the present embodiment, it is also possible to sequentially form the compensation diffusion layer 25 and the light receiving semiconductor layer 26 after the antireflection film 36 is formed. However, forming the compensation diffusion layer 25 before forming the antireflection film 36 as in this embodiment makes it easier to form a mask that is necessary when introducing impurities into the compensation diffusion layer formation scheduled portion. It is preferable because the manufacturing process can be simplified.

  In the light receiving element manufacturing method of the present embodiment described above, when the light receiving semiconductor layer 26 is formed, the light receiving semiconductor layer formation planned portion 26a of the P-type epitaxial layer 22 is formed as shown in FIG. Although the antireflection film 36 is formed so as to cover and impurity ions are implanted through the antireflection film 36, the film covering the light receiving semiconductor layer formation planned portion 26a of the P-type epitaxial layer 22 when the impurity ions are implanted is: A film other than the antireflection film 36 may be used. For example, before forming the antireflection film 36, an insulating film is formed so as to cover the light receiving semiconductor layer formation planned portion 26a of the P-type epitaxial layer 22, and impurity ions are implanted through the insulating film to receive the light receiving semiconductor layer 26. After forming, the antireflection film 36 may be formed by removing the insulating film. By implanting impurity ions through the insulating film, the impurity concentration distribution in the light receiving semiconductor layer 26 is as shown in FIG. 2 described above, as in the case of implanting impurity ions through the antireflection film 36. The distribution can be monotonously decreased from the surface portion on one side in the thickness direction of the semiconductor layer 26 toward one side in the thickness direction. However, as in this embodiment, when the antireflection film 36 is used as a film that covers the light receiving semiconductor layer formation planned portion 26a of the P-type epitaxial layer 22 at the time of impurity ion implantation, the process of removing the insulating film, etc. This is preferable because it is not necessary to be provided and the manufacturing process can be simplified.

  In the present embodiment, the compensation diffusion layer 25 and the light receiving semiconductor layer 26 are formed in separate steps, but may be formed in the same step. However, it is preferable to form in separate steps as in this embodiment because the depth d1 of the compensation diffusion layer 25 and the depth d2 of the light receiving semiconductor layer 26 can be easily adjusted.

  In this embodiment, the conductivity type of the compensation diffusion layer 25 and the light receiving semiconductor layer 26, which are the second conductivity type semiconductor layers, is N type, and the first conductivity in which the compensation diffusion layer 25 and the light receiving semiconductor layer 26 are formed. Although the conductivity type of the P-type epitaxial layer 22 which is a type semiconductor layer is P-type, it is possible to reverse these conductivity types so that the first conductivity type is N-type and the second conductivity type is P-type. Good. In this embodiment, silicon is used as the semiconductor material constituting the semiconductor substrate and each layer, but the present invention is not limited to this, and other semiconductor materials may be used. Further, the materials for the antireflection film 36, the N-side electrode 38, and the like are not limited to those shown in this embodiment, and are appropriately selected according to the characteristics required for the photodiode 20 to be manufactured. Can be used.

  In this embodiment, the photodiode 20 is manufactured as the light receiving element. However, the light receiving element manufactured by the method for manufacturing the light receiving element of the present invention is not limited to the photodiode, and photoelectric conversion is performed at the PN junction. As long as it includes a photodiode structure that performs the above, another different configuration may be used. For example, a light receiving element with a built-in circuit in which a circuit including a transistor, a resistor element, a capacitor element, and the like used for signal processing may be formed together with a photodiode. A phototransistor may also be used. Also when manufacturing these light receiving elements, the manufacturing method of the light receiving element of this invention can be used suitably.

It is a cut end view which simplifies and shows the structure of the photodiode 20 which is one Embodiment of this invention. FIG. 2 is a diagram illustrating an impurity concentration profile in a depth direction of a light receiving unit 40 of the photodiode 20 illustrated in FIG. 1. It is a flowchart which shows the procedure which manufactures the photodiode 20 with the manufacturing method of the light receiving element of this embodiment. It is sectional drawing which simplifies and shows the state in which the P ⁺ stopper part 24 was formed. It is sectional drawing which simplifies and shows the state in which the compensation diffusion layer 25 was formed. 4 is a cross-sectional view schematically showing how a P-type impurity is implanted into a field portion 29. FIG. It is sectional drawing which simplifies and shows the state in which the surface insulating film 32 and the interlayer insulating film 33 were formed. It is sectional drawing which simplifies and shows the state in which the antireflection film 36 was formed. 4 is a cross-sectional view schematically showing a state in which an N-type impurity is implanted into a P-type epitaxial layer 22 in a portion to be a light receiving unit 40 and an electrode unit 41. FIG. It is sectional drawing which simplifies and shows the state in which the N side electrode 38 and the P side electrode 39 were formed. It is a figure which expands and shows the part of the N side electrode 38 shown in FIG. It is sectional drawing which simplifies and shows the state which the spike produced. It is a cut end view which shows simply the state of each process in manufacture of the light receiving element by a prior art. It is a cut end view which shows simply the state of each process in manufacture of the light receiving element by a prior art. It is a cut end view which shows simply the state of each process in manufacture of the light receiving element by a prior art. It is a cut end view which shows simply the state of each process in manufacture of the light receiving element by a prior art. It is a cut end view which shows simply the state of each process in manufacture of the light receiving element by a prior art. It is a cut end view which shows simply the state of each process in manufacture of the light receiving element by a prior art. It is a figure which shows an example of the impurity concentration profile in the depth direction of the light-receiving part 13 of the light receiving element 18 shown in FIG. It is sectional drawing which simplifies and shows the state which the spike produced.

It is sectional drawing which simplifies and shows the state which the short circuit produced by the spike.

Explanation of symbols

20 Photodiode 21 P-type silicon substrate 22 P-type epitaxial layer 24 P ⁺ stopper layer 25 Compensation diffusion layer 26 Light-receiving semiconductor layer 27 N-type impurity diffusion layer 29 Field portion 31 Inversion prevention portion 32 Surface insulating film 33 Interlayer insulating film 34 Oxidation Silicon film 35 Silicon nitride film 36 Antireflection film 37 Contact hole 38 N side electrode 39 P side electrode 40 Light receiving part 41 Electrode part

Claims (9)

A first conductivity type semiconductor layer; a second conductivity type semiconductor layer formed by diffusing a second conductivity type impurity in the first conductivity type semiconductor layer; and an electrode electrically connected to the second conductivity type semiconductor layer; A light receiving element that receives light incident from one side in the thickness direction of the second conductivity type semiconductor layer and converts the energy of the light into electrical energy,
A light receiving semiconductor layer is formed in a predetermined portion to be a light receiving portion used for light reception among predetermined portions to form the second conductive semiconductor layer of the first conductive semiconductor layer, and an electrode is formed. The depth d1 from the surface portion on one side in the thickness direction is greater than the depth d2 from the surface portion of the light-receiving semiconductor layer (d1> d2) at a predetermined portion as much as possible to be the electrode portion to be compensated (d1> d2) Forming a second conductive type semiconductor layer by forming a second conductive type semiconductor layer;
An electrode forming step of forming an electrode so as to be electrically connected to a surface portion on one side in the thickness direction of the formed compensation semiconductor layer. The second conductivity type semiconductor layer forming step includes:
Forming an antireflection film so as to cover at least a predetermined portion of the first conductivity type semiconductor layer to form the light receiving semiconductor layer;
A step of forming a light receiving semiconductor layer by injecting and diffusing a second conductive type impurity into a predetermined portion for forming a light receiving semiconductor layer of the first conductive type semiconductor layer through the formed antireflection film. The method for manufacturing a light receiving element according to claim 1, comprising: In the process of forming the light receiving semiconductor layer,
3. The method for manufacturing a light receiving element according to claim 2, wherein the second conductivity type impurity is implanted at a dose of 1 × 10 ¹⁴ ions / cm ^{2 to} 1 × 10 ¹⁵ ions / cm ² . In the process of forming the light receiving semiconductor layer,
4. The method for manufacturing a light receiving element according to claim 2, wherein the second conductivity type impurity is implanted at an ion implantation energy of 50 keV to 100 keV. In the second conductivity type semiconductor layer forming step, before the step of forming the antireflection film,
The method further includes the step of forming a compensation semiconductor layer by injecting and diffusing a second conductivity type impurity in a predetermined portion to form the compensation semiconductor layer of the first conductivity type semiconductor layer. The manufacturing method of the light receiving element as described in any one of Claims 2-4.   6. The light receiving device according to claim 1, wherein the compensation semiconductor layer is formed so that the depth d1 is 1 μm or more larger than the depth d2 of the light receiving semiconductor layer. Device manufacturing method. A first conductivity type semiconductor layer; a second conductivity type semiconductor layer including a second conductivity type impurity provided in contact with the first conductivity type semiconductor layer; and an electrode electrically connected to the second conductivity type semiconductor layer; A photodiode that receives light incident from one side in the thickness direction of the second conductivity type semiconductor layer and converts the energy of the light into electrical energy,
The second conductivity type semiconductor layer includes a light receiving semiconductor layer provided in a light receiving portion used for light reception, and a compensation semiconductor layer provided in an electrode portion where an electrode is formed,
The depth d1 from the surface portion on one side in the thickness direction of the compensation semiconductor layer is larger than the depth d2 from the surface portion of the light receiving semiconductor layer (d1> d2).   8. The photodiode according to claim 7, wherein the concentration of the second conductivity type impurity contained in the light receiving semiconductor layer decreases from the surface portion on one side in the thickness direction of the light receiving semiconductor layer toward one side in the thickness direction.   A light receiving element comprising the photodiode according to claim 7.

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