JP2007050523A - Printing apparatus and data holding method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a printing apparatus which can hold image data even when a power source is turned OFF before a printing is completed after the image data is stored in a volatile memory requiring a refreshing operation for holding the data, without bringing about a remarkable increase in cost. <P>SOLUTION: The printing apparatus comprises a volatile memory requiring the refreshing operation for holding the data, a main power source supplying part for supplying electric power based on an external power source, and a memory controlling part for indicating the refreshing operation to the volatile memory by supplying the power source from the main power source supplying part, and executes a printing based on the image data stored in the volatile memory. The printing apparatus is characterized in that the printing apparatus comprises a back-up power source supplying part for supplying electric power based on a battery power source, a power source detecting part for detecting ON/OFF of the main power source, and a refreshing means for indicating the refreshing operation to the volatile memory by supplying the power source from the back-up power source supplying part when the image data are stored in the volatile memory, and under a condition that the printing is not completed, it is detected that the main power source is turned OFF. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a printing apparatus, and more particularly, to a printing apparatus capable of printing stored image data even when the image data is stored in a volatile memory and the power is turned off before printing.

  In the printing apparatus, image data is temporarily stored in a memory, sequentially read out, and output to a print engine to execute printing.

  A volatile storage device such as an SDRAM is generally used as a memory for storing image data. In order to retain stored data, a DRAM such as an SDRAM must perform a refresh operation at a predetermined rate in a predetermined period in addition to supplying power.

  For this reason, if the power is turned off after the image data is stored and before the printing is completed, the image data is lost.

  This problem becomes prominent particularly in a printing apparatus having a facsimile function when the power is turned off before printing after receiving facsimile data. This is because if the printing is performed from the computer to the printing apparatus, the user can easily know that the data has been lost, so it is sufficient to perform reprinting. However, the receiving side generally cannot know that the received facsimile data has been lost. Furthermore, since reception has been completed, retransmission from the transmission side is not performed.

  In order to avoid this problem, it is conceivable to provide a backup function in the printing apparatus, but it is desirable to avoid a significant increase in cost due to this.

  The present invention greatly increases the cost of a printing apparatus that can hold image data even when the image data is stored in a volatile memory that requires a refresh operation to hold data and the power is turned off before printing is completed. It aims at realizing without.

In order to solve the above-described problem, a printing apparatus according to the first aspect of the present invention includes:
Volatile memory that requires refresh operation to hold data,
A main power supply for supplying power based on an external power supply;
A printing apparatus for executing printing based on image data stored in the volatile memory, comprising a memory control unit for instructing the volatile memory to perform a refresh operation by power supply from the main power supply unit;
A backup power supply unit for supplying power based on the storage power supply;
A power detection unit for detecting ON / OFF of the main power;
When it is detected that image data is stored in the volatile memory and the main power supply is turned off in an unprinted state, the volatile memory is supplied with power from the backup power supply unit. And refresh means for instructing a refresh operation.

  By using a storage power source for refreshing data stored in the volatile memory and a refresh unit, it is possible to realize data retention during main power OFF with a simple configuration.

  Here, when the main power is turned on in a state where the refresh unit instructs a refresh operation, the print unit includes a print unit that executes printing based on unprinted image data stored in the volatile memory. be able to.

  Thereby, when the main power supply is restored, a print result based on the held image can be obtained.

More specifically, the refresh means stores unprinted image data when it is detected that image data is stored in the volatile memory and the main power supply is turned off in an unprinted state. Storing the information indicating that the image data is stored and the address where the image data is stored,
The printing unit can execute printing based on the image data with reference to the stored information and address.

  Further, it is preferable that the clock at the time of the refresh operation by the instruction from the refresh means is slower than the clock at the time of the refresh operation by the instruction from the memory control unit. Thereby, the power saving at the time of main power OFF is implement | achieved and the power consumption of a storage power supply can be decreased.

In order to solve the above problem, a data holding method according to the second aspect of the present invention is:
A volatile memory that requires a refresh operation for data retention, a main power supply unit that supplies power based on an external power supply, and a memory control that instructs the volatile memory to perform a refresh operation by supplying power from the main power supply unit A data holding method in a printing apparatus that executes printing based on image data stored in the volatile memory,
When image data is stored in the volatile memory, and it is detected that the main power supply is turned off in an unprinted state,
A refresh operation is instructed to the volatile memory by power supply from a backup power supply unit that supplies power based on a storage power source provided separately from the main power supply unit.

  Embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram for explaining a hardware configuration around a controller of the printing apparatus 100 according to the present embodiment. In the present embodiment, a case where a so-called composite apparatus having a facsimile function and a scanner function is used as the printing apparatus 100 will be described as an example.

  As shown in the figure, the controller 110 of the printing apparatus 100 includes a CPU 10 that executes various programs, a SDRAM 20 that is a volatile memory, a memory control ASIC 30 that controls reading and writing to the SDRAM 40, and a nonvolatile memory that stores programs and the like. ROM 40, and an IO control ASIC 50 for controlling input / output to / from the ROM 40, an external interface, an operation panel, and the like.

  The SDRAM 20, which is a volatile memory included in the controller 110, must perform a refresh operation at a predetermined rate within a predetermined period in order to retain the stored contents. This refresh operation includes auto-refresh performed during the normal read / write operation and self-refresh performed when the read / write operation is not performed but data is to be held.

  Auto-refresh is executed by a command determined by a combination of CSX, RASX, CASX, and WEX signals, and self-refresh is executed by controlling the CKE signal in addition to the above commands. The present invention can be applied to any refresh operation of auto-refresh and self-refresh.

  The controller 110 includes an image processing ASIC 60 that controls image processing for printing and a scanner ASIC 70 that controls reading processing of the scanner, and is connected to the memory control ASIC 30. Further, a FAX circuit 80 that is connected to a telephone line and controls facsimile processing is provided, and is connected to the IO control ASIC 50.

  A printer engine 120 provided outside the controller 110 is connected to the image control ASIC 60, and a scanner engine 130 provided outside the controller 110 is connected to the scanner ASIC 70.

  The controller 110 is supplied with main power controlled by power ON / OFF of the printing apparatus 100. The main power source is based on an external power source such as a commercial power source. The main power can be supplied from the power supply unit of the printing apparatus 100 (not shown) via the printer engine 120, for example.

  Further, in the present embodiment, the controller 110 detects the ON / OFF of the main power supply by monitoring the main power supply voltage and the refresh circuit 90 that controls the refresh operation of the SDRAM 20 when the main power supply stops. And a backup power supply 94 for holding image data stored in the SDRAM 20 when the main power supply is turned off.

  The refresh circuit 90 continues the refresh operation of the SDRAM 20 in place of the memory control ASIC 30 when the image data that has not been printed is stored in the SDRAM 20 and the power is turned off due to error or power failure. By doing so, the loss of image data is prevented. At this time, the refresh circuit 90 also supplies a clock to the SDRAM 20. For the purpose of data retention of the SDRAM 20, this clock is desirably a clock slower than a normal clock so as to suppress power consumption.

  The refresh circuit 90 records information for executing printing of the image data held in the SDRAM 20 after the main power supply is restored. For this purpose, the refresh circuit includes a register 90a, a data valid flag 90b, and a backup flag 90c.

  The register 90 a is an area for recording a storage address of image data held in the SDRAM 20.

  The data valid flag 90 b is controlled to be ON when unprinted image data is stored in the SDRAM 20. The initial state of the data valid flag 90b is OFF.

  The backup flag 90c is controlled to be ON when the main power is turned OFF while the data valid flag 90b is ON. The initial state of the backup flag 90c is OFF.

  Therefore, it is possible to determine whether the image data to be printed is stored in the SDRAM 20 by referring to the backup flag 90c after the main power supply is restored. When image data is stored in the SDRAM 20, the address where the image data is stored can be acquired by referring to the register 90a.

  The voltage detector 92 monitors the voltage of the main power supply. When the voltage detector 92 falls below a predetermined voltage, the voltage detector 92 notifies the refresh circuit 90 that the main power supply is turned off. Thereafter, when the voltage of the main power supply exceeds a predetermined voltage, the refresh circuit 90 is notified that the main power supply is turned on.

  The backup power supply 94 is a power supply for supplying power to the SDRAM 20 and the refresh circuit 90 when the main power supply is turned off while unprinted image data is stored in the SDRAM 20. The backup power source 94 is based on a stored power source, and can be composed of a battery or a capacitor.

  In the controller 110 of this embodiment, when the main power is turned on, the SDRAM 20 performs a refresh operation in response to a refresh instruction from the memory control ASIC 30 and the main power is turned off while unprinted image data is stored in the SDRAM 20. In some cases, the SDRAM 20 performs a refresh operation according to a refresh instruction from the refresh circuit 90.

  For this reason, in the case of CLK, CSX, RASX, CASX, WEX, and self-refresh, which are signals relating to refresh instructions, the SDRAM 20 is wired-OR connected to the memory control ASIC 30 and the refresh circuit 90 for CKE. These signals are pulled up on the input side of the SDRAM 20.

  In this embodiment, the CPU 10, SDRAM 20 and the like are shared by the facsimile processing and other processing. However, the FAX circuit 80 may be provided with an SDRAM, CPU, etc. dedicated to facsimile processing. Good. In this case, the refresh circuit 90, the voltage detector 92, and the backup power supply 94 are provided in the same manner in the FAX circuit 80.

  In addition, the present invention is not limited to the SDRAM 20, and a DDR or the like may be used, and can be applied to all DRAMs that are memories that require a refresh operation for memory retention.

  Next, the processing of this embodiment will be described.

  FIG. 2 is a flowchart for explaining the processing of the refresh circuit 90. The refresh circuit 90 monitors whether the output from the voltage detector 92 changes from High to Low (S101). Here, the change from High to Low means that the main power supply has changed from ON to OFF.

  When the refresh circuit 90 detects that the output from the voltage detector 92 has changed from High to Low (S201: Y), the refresh circuit 90 determines whether or not the data valid flag 90b included in the refresh circuit 90 is ON (S201). As will be described later, the data valid flag 90b is turned on when image data for printing is stored in the SDRAM 20, and turned off when printing of the stored image data is completed. Accordingly, the fact that the valid flag is ON indicates that unprinted image data is stored in the SDRAM 20 and this image data needs to be retained.

  For this reason, when the data valid flag 90b is OFF (S102: N), the image data to be held is not stored in the SDRAM 20, so the refresh circuit 90 does not perform processing and outputs from the voltage detector 92. The monitoring is continued again (S101).

  On the other hand, when the data valid flag 90b is ON (S102: Y), since the image data to be held is recorded in the SDRAM, the refresh circuit 90 performs the following processing.

  That is, first, the backup flag 90c included therein is turned ON (S103). Since the backup flag 90c indicates that the unprinted image data stored in the SDRAM 20 is being backed up, the backup flag 90c is turned on by referring to the backup flag 90c when the main power supply is later turned on. In this case, it is possible to prevent the unprinted image data from being lost by printing the image data stored in the SDRAM 20.

  On the other hand, since the refresh instruction to the SDRAM 20 from the memory control ASIC 30 is stopped by turning off the main power supply, the refresh circuit 90 outputs a command for the refresh operation to the SDRAM 20 (S104).

  As described above, in order to reduce power consumption, it is desirable to use a clock at this time that is slower than the normal operation when the main power supply is ON. This clock may be generated by the refresh circuit 90 or supplied from another source. In this case, power is also supplied to the clock supply source.

  The refresh circuit 90 repeats the refresh operation command until it detects that the output of the voltage detector 92 changes from Low to High, that is, until the main power is turned on again (S205).

  Then, when it is detected that the output of the voltage detector 92 changes from Low to High (S105: Y), the refresh instruction from the memory control ASIC 30 is resumed by turning on the main power, so that the command output of the refresh operation is stopped ( S106).

  FIG. 3 is a timing diagram showing changes in each signal when the output of the voltage detector 92 changes from High to Low in a state where unprinted image data is stored in the SDRAM 20. This figure shows an example of auto refresh.

  When the main power supply is ON and the output of the voltage detector 92 is High, the SDRAM 20 performs a refresh operation by a refresh command from the memory control ASIC 30.

  When the voltage detector 92 detects that the main power supply is turned off at t1 and the voltage has fallen below the predetermined voltage at t2, the refresh control is transferred to the refresh circuit 90, and the refresh command from the refresh circuit 90 is received at t3. The refresh operation starts. In this case, a clock slower than the normal clock up to t1 is used to reduce power consumption. Note that the command signal is pulled up from t2 to t3 when the refresh circuit 90 starts control, and the NOP state is maintained.

  FIG. 4 is a timing diagram showing changes in each signal when the output of the voltage detector 92 changes from Low to High during backup of the SDRAM 20. This figure shows an example of auto refresh.

  When the main power supply is OFF and the output of the voltage detector 92 is Low, the SDRAM 20 performs a refresh operation by a refresh command from the refresh circuit 90.

  At t4, the main power supply is turned back on. When the voltage detector 92 detects that the voltage has exceeded a predetermined voltage at t5, the clock and command output are stopped, and a high impedance state is entered. Then, after the pull-up state, the refresh operation by the refresh command from the memory control ASIC 30 is resumed at t6. As the clock at this time, a normal clock faster than the clock up to t4 is used.

  FIG. 5 is a timing chart showing changes in each signal when the output of the voltage detector 92 changes from High to Low in a state where unprinted image data is stored in the SDRAM 20. This figure shows an example using self-refresh.

  When the main power supply is ON and the output of the voltage detector 92 is High, the SDRAM 20 performs a refresh operation by a refresh command from the memory control ASIC 30.

  At t1, the main power supply is turned off. At t2, when the voltage detector 92 detects that the voltage has fallen below a predetermined voltage, a refresh operation by a refresh command from the refresh circuit 90 is started at t3. Then, the refresh circuit 90 sets CKE to Low and simultaneously outputs a SELF command.

  FIG. 6 is a timing chart showing changes in each signal when the output of the voltage detector 92 changes from Low to High during backup of the SDRAM 20. This figure shows an example using auto refresh.

  When the main power supply is OFF and the output of the voltage detector 92 is Low, the SDRAM 20 performs a refresh operation by a refresh command from the refresh circuit 90.

  At t4, the main power supply returns to ON, and at t5, when the voltage detector 92 detects that the voltage has exceeded the predetermined voltage, the memory control ASIC 30 outputs the SELFX command and exits from the self-refresh state. Restart the refresh operation.

  Next, processing of the printing apparatus 100 will be described with reference to the flowchart of FIG. Here, a case where the FAX circuit 80 of the printing apparatus 100 receives facsimile data will be described as an example. Conventional multifunction devices, particularly inexpensive multifunction devices, do not have a sufficient backup system for facsimile functions. Specifically, after receiving facsimile data and reporting the completion of reception to the transmission side, if the power is turned off before printing, the received facsimile data may be lost and not retransmitted.

  Therefore, the present invention can be applied particularly effectively to a printing apparatus having a facsimile function. Of course, the present invention can be applied not only to the facsimile function but also to normal printing processing.

  As shown in the figure, when the printing apparatus 100 is turned on (S201), it refers to the backup flag 90c of the refresh circuit 90 and determines whether the backup flag 90c is on (S202).

  When the backup flag 90c is OFF (S202: N), since unprinted image data is not stored in the SDRAM 20, normal startup processing such as initialization is performed (S203).

  Then, it enters a standby state and waits for reception of facsimile data (S204).

  When the facsimile data is received (S204: Y), the received data is stored in the SDRAM 20 (S205). Until all data is received (S206), data storage in the SDRAM 20 is repeated. When all data is received (S206: Y), the data valid flag 90b is turned on, and the address of the SDRAM 20 storing the received data is set in the register 90a. (S207).

  When these processes are completed, the transmission source is notified of the completion of facsimile reception (S108).

  In the process (S208), if the main power supply is turned off before notifying the transmission source of the completion of facsimile reception, the transmission source can acquire incomplete reception information, and a retransmission process is performed. Therefore, backup processing of data stored in the SDRAM 20 is not necessary.

  On the other hand, if the main power is turned off before the printing is completed after notifying the transmission source of the facsimile reception completion, the transmission source does not retransmit, so the data stored in the SDRAM 20 as described above is not transmitted. Backup processing is required.

  Next, the received data stored in the SDRAM 20 is printed (S209). When printing is completed, the data valid flag 90b of the refresh circuit 90 is turned off (S210). Thereby, it can be shown that data to be held is not stored in the SDRAM 20.

  On the other hand, when the power is turned on in the process (S201) and the backup flag 90c of the refresh circuit 90 is referred to (S202), if the backup flag 90c is turned on (S202: Y), the SDRAM 20 is not printed. Since the image data is stored, the refresh operation is continued (S211).

  Then, referring to the register 90a of the refresh circuit 90, the address where the image data is stored is acquired (S212).

  By printing the image data indicated by the acquired address (S209), it is possible to obtain the print result without losing the image data even when the power is turned off before printing after storing the image data.

  Then, the data valid flag 90b is turned off and the backup flag 90c is turned off, indicating that no unprinted image data is stored in the SDRAM 20 (S210), and waiting for reception of facsimile data (S204).

FIG. 3 is a block diagram illustrating a hardware configuration around a controller of the printing apparatus. The flowchart explaining the process of a refresh circuit. The timing diagram which shows the change of each signal when the output of a voltage detector changes from H to L. FIG. The timing diagram which shows the change of each signal when the output of a voltage detector changes from L to H. The timing diagram which shows the change of each signal when the output of a voltage detector changes from H to L. FIG. The timing diagram which shows the change of each signal when the output of a voltage detector changes from L to H. The flowchart explaining the process of a printing system.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... CPU, 20 ... SDRAM, 30 ... Memory control ASIC, 40 ... ROM, 50 ... IO control ASIC, 60 ... Image processing ASIC, 79 ... Scanner ASIC, 80 ... FAX circuit, 90 ... Refresh circuit, 90a ... Register 90b ... Data valid flag, 90c ... Backup flag, 92 ... Voltage detector, 94 ... Backup power supply, 100 ... Printing device, 110 ... Controller, 120 ... Printer engine, 130 ... Scanner engine

Claims (7)

Volatile memory that requires refresh operation to hold data,
A main power supply for supplying power based on an external power supply;
A printing apparatus for executing printing based on image data stored in the volatile memory, comprising a memory control unit for instructing the volatile memory to perform a refresh operation by power supply from the main power supply unit;
A backup power supply unit for supplying power based on the storage power supply;
A power detection unit for detecting ON / OFF of the main power;
When it is detected that image data is stored in the volatile memory and the main power supply is turned off in an unprinted state, the volatile memory is supplied with power from the backup power supply unit. A printing apparatus comprising: refresh means for instructing a refresh operation. The printing apparatus according to claim 1,
When the main power is turned on while the refresh unit is instructing a refresh operation, the refresh unit includes a printing unit that executes printing based on unprinted image data stored in the volatile memory. A printing device. The printing apparatus according to claim 2,
The refresh means stores image data in the volatile memory, and stores unprinted image data when it is detected that the main power supply is turned off in an unprinted state. And the address where the image data is stored,
The printing apparatus, wherein the printing unit executes printing based on the image data with reference to the stored information and address. The printing apparatus according to claim 1,
The printing apparatus according to claim 1, wherein a clock at a refresh operation by an instruction from the refresh means is slower than a clock at the refresh operation by an instruction from the memory control unit. The printing apparatus according to claim 1,
The refresh device stops a refresh operation instruction to the volatile memory when it is detected that the main power supply is turned on in a state in which the refresh operation is instructed. A volatile memory that requires a refresh operation for data retention, a main power supply unit that supplies power based on an external power supply, and a memory control that instructs the volatile memory to perform a refresh operation by supplying power from the main power supply unit A data holding method in a printing apparatus that executes printing based on image data stored in the volatile memory,
When image data is stored in the volatile memory, and it is detected that the main power supply is turned off in an unprinted state,
A data holding method, wherein a refresh operation is instructed to the volatile memory by power supply from a backup power supply unit that supplies power based on a storage power source provided separately from the main power supply unit. The data holding method according to claim 6,
When the main power is turned on, printing based on unprinted image data stored in the volatile memory is executed.

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