JP2007033514A - Liquid crystal display device and display drive circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display drive circuit capable of suppressing the DC voltage applied to a liquid crystal, and to provide a liquid crystal display device including the display drive circuit. <P>SOLUTION: The liquid crystal display device comprises an active matrix-type liquid crystal panel, having a gate electrode, a source electrode, and a common electrode, and a display drive circuit which makes the active matrix type liquid crystal panel display an image by supplying the scanning signal to be applied to the gate electrode; a gradation signal to be applied to the source electrode; and a common voltage to be applied to the common electrode, wherein the display drive circuit inverts the polarity of the grayscale signal relative to the common voltage with specified periods, determines the common voltage, based on the gradation signal of one polarity and the gradation signal of the other polarity, and applies the common voltage to the common electrode. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a driving technique for a liquid crystal display device. More specifically, the present invention relates to a technique for suppressing a DC voltage component applied to liquid crystal in an active matrix liquid crystal display device.

  In recent years, a liquid crystal display device having a thin and flat screen has been actively developed. An active matrix type liquid crystal display device, which is a kind of liquid crystal display device, controls the brightness of a pixel by the difference between a voltage of a grayscale signal applied to a pixel electrode and a voltage (common voltage: Vcom) applied to an opposite common electrode. Control.

  By the way, if a DC voltage is continuously applied to the liquid crystal for a long time, so-called screen burn-in occurs. Once image sticking occurs, it cannot be recovered, and application of a DC voltage is not preferable because it causes the life of the liquid crystal display device to be shortened.

For this reason, in order to avoid applying a DC voltage for a long time, inversion driving is realized in which the polarity of the voltage related to the liquid crystal is inverted at a period of every pixel, every horizontal line, every frame, etc. (for example, (See Patent Document 1).
For example, in an active matrix liquid crystal display device, a common voltage Vcom is set at the center value of the maximum voltage and the minimum voltage in a grayscale signal, and the grayscale signal is defined by a potential difference with reference to Vcom, so that it is inverted and driven. Is realized.
JP 2004-354742 A

  However, in an active matrix liquid crystal display device typified by a TFT (Thin Film Transistor), there is a DC voltage component that cannot be removed even if inversion driving is employed. Hereinafter, this DC voltage component will be briefly described.

  One pixel of the TFT type liquid crystal display device (liquid crystal panel) is represented by an equivalent circuit shown in FIG. At this time, the drain voltage of the thin film transistor Tf does not match the voltage of the gradation signal supplied to the source electrode, and a low level is applied to the gate terminal to hold the charged charge by turning off the gate. Then, the source voltage is shifted by ΔV obtained by the following equation (1).

ΔV = (Vsig × Cgs / (Cgs + Clc + Cs)) (1)
Note that Vsig in the expression (1) is a gradation signal applied to the source terminal of the transistor Tf. The gate capacitance Cgs is a parasitic capacitance between the gate and source of the transistor Tf. The pixel capacitance Clc is a capacitance formed by a pixel electrode and a common electrode that face each other with a liquid crystal interposed therebetween. The holding capacitor Cs is a capacitor provided in parallel with Clc and charged to Clc, and is a capacitor for relaxing the shift of the drain voltage according to the above equation (1).

  Since Vsig varies depending on the image to be displayed, the value of ΔV is not constant. For this reason, even when Vcom is optimized so that the DC voltage is canceled when Vsig is a specific gradation value (for example, the highest luminance), a DC component remains on the entire screen.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a display driving circuit capable of suppressing a DC voltage applied to liquid crystal and a liquid crystal display device having the display driving circuit.

  A liquid crystal display device according to a first aspect of the present invention includes an active matrix liquid crystal panel including a gate electrode, a source electrode, and a common electrode, a scanning signal applied to the gate electrode, and a source electrode. A display driving circuit configured to supply a gradation signal to be applied and a common voltage to be applied to the common electrode to display an image, wherein the display driving circuit includes the common voltage. The polarity of the gradation signal is inverted at a predetermined cycle, and the common voltage is determined based on the gradation signal at one polarity and the gradation signal at the other polarity and applied to the common electrode. It is characterized by that.

  The display driving circuit supplies, for each of the gate electrodes, an inverted polarity of the gradation signal with respect to the common voltage, and from the gradation signal applied to each of the two adjacent gate electrodes, the common electrode A common voltage to be applied to the common electrode may be determined and applied to the common electrode.

  The display driving circuit obtains an average value of the gradation signals applied to each of the two adjacent gate electrodes, obtains a correction amount of the common voltage based on the average value, and uses the correction amount as the common voltage. The standard value may be added to the common electrode.

  A display drive circuit according to a second aspect of the present invention includes a control unit that controls a gate driver, a source driver, and a common voltage supply circuit in order to display a desired image on a liquid crystal panel, and according to control by the control unit. The gate driver for supplying a scanning signal to the gate electrode of the liquid crystal panel; and the source driver for supplying the gradation signal to the source electrode of the liquid crystal panel and a common voltage driving circuit according to control by the control unit; A common voltage to be supplied to a common electrode of the liquid crystal panel based on a gradation signal supplied from the source driver and control by the control unit, and the common voltage supply circuit for supplying the common voltage; It is characterized by comprising.

  The source driver alternately changes the polarity of the gradation signal with respect to the common voltage for each of the gate electrodes, and the common voltage driving circuit is applied to each of the two adjacent gate electrodes. A common voltage to be applied to the common electrode may be determined from the adjustment signal and applied to the common electrode.

  The common voltage driving circuit obtains an average value of the gradation signal applied to each of the two adjacent gate electrodes, obtains a correction amount of the common voltage based on the average value, and uses the correction amount as the common amount The voltage may be added to the standard value and applied to the common electrode.

  Since the liquid crystal display device and the display driving circuit according to the present invention change the common voltage so as to compensate for the shift amount of the drain voltage applied to the pixel electrode, the DC voltage applied to the liquid crystal can be suppressed.

A liquid crystal display device according to an embodiment of the present invention will be described with reference to the drawings.
As shown in FIG. 1, the liquid crystal display device 1 of the present embodiment includes a liquid crystal panel 2 and a display drive circuit 3.

As schematically shown in FIG. 2, the liquid crystal panel 2 sandwiches liquid crystal between two opposing glass plates. Then, a matrix of transparent electrodes (gate electrode and source electrode) orthogonal to each other is provided on the surface of the one glass plate facing the other glass plate. The gate electrode is an elongated electrode arranged so as to straddle the screen of the liquid crystal panel 2 in the horizontal direction. The source electrode is an elongated electrode arranged so as to straddle the screen of the liquid crystal panel 2 in the vertical direction. As shown in FIG. 2, a pixel is formed by a thin film transistor Tf, a pixel electrode, and the like near the intersection of the gate electrode and the source electrode.
Note that the liquid crystal panel 2 of the present embodiment has M gate electrodes and N source electrodes, and as a result, has M × N pixels.

  FIG. 3 shows an equivalent circuit of one pixel configured in the liquid crystal panel 2. A gate electrode is connected to the gate terminal of the thin film transistor Tf, and a source electrode is connected to the source terminal. The drain terminal of the thin film transistor Tf is connected to a capacitor Clc of a liquid crystal pixel constituted by a pixel electrode and a common electrode provided on the other glass plate so as to face the pixel electrode, and a holding capacitor Cs. In addition, a capacitance Cgs generated by the structure of the thin film transistor Tf exists between the gate terminal and the drain terminal of the thin film transistor Tf.

While the voltage for turning on the gate is applied to the gate electrode, the pixel capacitor Clc and the storage capacitor Cs are charged up to the applied gradation voltage. When a voltage for turning off the gate is applied to the gate electrode, the drain voltage of the transistor Tf (that is, the voltage on the pixel electrode side of the pixel capacitor Clc) changes by ΔV in the equation (1) described below. . The pixel capacitor Clc and the storage capacitor Cs hold the drain voltage shifted by ΔV until the gate is next turned on.
ΔV = (Vsig × Cgs / (Cgs + Clc + Cs)) (1)

  The liquid crystal sandwiched between the pixel electrode and the common electrode changes the orientation in accordance with the potential difference between the two electrodes, causing a change in brightness of the pixel.

As shown in FIG. 1, the display drive circuit 3 includes a control circuit 31, a gate driver 32, a source driver 33, and a common voltage supply circuit 34.
The control circuit 31 includes an input / output circuit, a timing generator, an image memory, and the like, and controls the gate driver 32 and the source driver 33 to display a desired image on the liquid crystal panel 2.

  The gate driver 32 supplies a scanning signal for selecting the gate electrode of the liquid crystal panel 2 to each of the M gate electrodes based on the control by the control circuit 31. As shown in FIGS. 6A to 6D, the gate driver 32 is composed of a shift register or the like, and sequentially applies a voltage for turning on the gate of the thin film transistor Tf from the first (top) gate electrode. Supply.

  The source driver 33 is a pixel formed at a position where the source electrode and the currently selected gate electrode intersect with each of the N source electrodes of the liquid crystal panel 2 based on control by the control circuit 31. A gradation signal for determining the brightness of the image is supplied. The source driver 33 is composed of a DA (Digital to Analog) converter or the like, and outputs a gradation signal having a voltage value corresponding to light and dark to be displayed on the pixel.

  The source driver 33 supplies a grayscale signal so as to invert the polarity of the voltage related to the liquid crystal for each gate electrode (so-called line inversion driving). The source driver 33 also supplies a gradation signal to the common voltage supply circuit 34.

  As shown in FIG. 4, the common voltage supply circuit 34 includes a first arithmetic circuit 341, a first holding circuit 342, a second holding circuit 343, a second arithmetic circuit 344, a voltage source 345, And an adder circuit 346. The common voltage supply circuit 34 is applied to the common electrode of the liquid crystal panel 2 based on the N gradation signals Vsig [1] to [N] supplied from the source driver 33 and the timing signal supplied from the control circuit. The common voltage Vcom is determined and output.

  The first arithmetic circuit 341 supplies the average value Vmean of the gradation signals Vsig [1] to [N] supplied from the source driver 33 to the first holding circuit 342 and the second holding circuit 343. The first arithmetic circuit 341 includes an operational amplifier or the like. Vmean is expressed by the following equation (2).

The first holding circuit 342 and the second holding circuit 343 output the input signal supplied from the first adding circuit 341 as it is when the timing signal supplied from the control circuit 31 to the control terminal is at a high level. On the other hand, when the timing signal is at the low level, the voltage of the input signal at the time of transition from the high level to the low level is held.
The first holding circuit 342 and the second holding circuit 343 are configured by, for example, a track and hold circuit.

  As shown in FIG. 5A, when the gate driver 32 selects the odd-numbered gate electrode of the liquid crystal panel 2, a high level is applied to the control terminal of the first holding circuit 342. At this time, as shown in FIG. 5D, the first holding circuit 342 outputs Vmean for the odd-numbered gate electrode supplied from the first arithmetic circuit 341 as it is. When a low level is applied to the control terminal, the voltage value Vmean at that time is held. At this time, Vmean for the odd-numbered gate electrode held by the first holding circuit 342 is hereinafter referred to as Vodd.

  Further, as shown in FIG. 5B, when the gate driver 32 selects the even-numbered gate electrode of the liquid crystal panel 2, a high level is applied to the control terminal of the second holding circuit 343. At this time, as shown in FIG. 5E, the first holding circuit 343 outputs Vmean for the even-numbered gate electrode supplied from the first arithmetic circuit 341 as it is. When a low level is applied to the control terminal, the voltage value Vmean at that time is held. At this time, Vmean for the odd-numbered gate electrode held by the second holding circuit 343 is hereinafter referred to as Veven.

  The second arithmetic circuit 344 is configured by an operational amplifier or the like. The second arithmetic circuit 344 obtains ΔVmean from the output voltage Vodd of the first holding circuit 342 and the output voltage Veven of the second holding circuit 343 by calculation according to the following equation (3), and adds circuit 346 To supply.

  Equation (3) is for obtaining the average value of the shift amount ΔV of the drain voltage according to Equation (1) for every two adjacent gate electrodes, and ΔVmean obtained as a result is for canceling the DC voltage component due to ΔV. This is the correction amount for the common voltage.

  The voltage source 345 outputs a voltage value Vcom0 that is the center of the maximum voltage and the minimum voltage value of the gradation signal. Vcom0 is a value of the common voltage when ΔV shown in the equation (1) does not occur.

  The adder circuit 346 is configured by an operational amplifier or the like. The adder circuit 346 adds the output voltage Vcom0 of the voltage source 345 and the output voltage ΔVmean of the second arithmetic circuit 344, and supplies the result to the common electrode of the liquid crystal panel 2 as the common voltage Vcom.

  The operation of the liquid crystal display device 1 configured as described above will be described with reference to a time chart shown in FIG.

  6A to 6D show scanning signals supplied to the gate electrode of the liquid crystal panel 2 by the gate driver 32 included in the display driving circuit 3. The display drive circuit 3 sequentially applies a voltage for turning on the gates from the first (top) gate electrode (first pixel row) to the Mth (bottom) gate electrode.

  A solid line in FIG. 6E indicates an average value of the gradation signals Vsig [1] to [N] supplied from the source driver 33 of the display driving circuit 3 to the source electrode of the liquid crystal panel 2. Further, the broken line in FIG. 6E shows the drain voltage of the thin film transistor Tf shifted from the gradation signal by ΔV shown by the equation (1).

The display driving circuit 3 supplies a grayscale signal higher than the common voltage Vcom at a timing when a voltage for turning on the gate is applied to the first gate electrode (hereinafter referred to as positive polarity).
On the other hand, the display drive circuit 3 supplies a gradation signal lower than the common voltage Vcom at the timing when the voltage for turning on the gate is applied to the second gate electrode (hereinafter referred to as reverse polarity).
Similarly, for the third and subsequent gate electrodes, the display driving circuit 3 supplies positive gradation signals to odd-numbered gate electrodes and supplies reverse-polarity gradation signals to even-numbered gate electrode rows. To do.

  FIG. 6F shows the correction amount ΔVmean of the common voltage Vcom. ΔVmean is obtained by the second arithmetic circuit 344 according to the equation (3) based on the average value of the gradation signals at the two gate electrodes selected immediately before the gate electrode being selected.

  FIG. 6G shows the common voltage Vcom supplied to the common electrode of the liquid crystal panel 2 by the common voltage supply circuit 34 included in the display drive circuit 3. The common voltage Vcom is a voltage shifted by ΔVmean from Vcom0 indicated by a broken line in the drawing, and is updated for each gate electrode to be selected.

  The drain voltage of both the odd-numbered gate electrode and the even-numbered gate electrode is shifted so as to be lower than the supplied gradation signal, but the shift amount ΔV is different. On the other hand, since the common voltage supply circuit 34 supplies the common electrode as a voltage Vcom shifted from Vcom0 by the average value ΔVmean of the drain voltage ΔV of the two previous gate electrodes, it is caused by the shift of the drain voltage. The DC voltage component can be canceled out.

  Pixels formed at the intersections of the source electrodes and the gate electrode selected by the scanning signal are light and dark according to the absolute value of the difference between the gradation signals Vsig [1] to [N] and the common voltage Vcom. To change. The display drive circuit sequentially changes the brightness of the pixel row on each gate electrode from the upper end to the lower end of the screen, and as a result, the liquid crystal panel 2 displays a desired image.

  With such a configuration and operation, the display driving circuit 3 in the liquid crystal display device 1 of the present embodiment obtains a DC component generated by the shift of the drain voltage for each gate electrode, and uses the common voltage corrected so as to cancel it. Since it is applied, the DC voltage component can be canceled over the entire screen of the liquid crystal panel 2.

  In the above embodiment, the case where the common voltage Vcom is updated for each gate electrode has been described as an example. However, the common voltage Vcom may be updated for every two gate electrodes. In this case, for example, a holding circuit is further provided between the second arithmetic circuit 344 and the adder circuit 346, and the immediately preceding pair of gate electrodes (for example, the first gate electrode and the second gate electrode) What is necessary is just to hold | maintain as correction value (DELTA) Vmean of a common voltage, while scanning the group (for example, 3rd gate electrode and 4th gate electrode) of a gate electrode.

  In the above embodiment, the line inversion drive for inverting the polarity of the gradation signal for each gate electrode has been described as an example. However, the present invention provides a liquid crystal display of the frame inversion drive for inverting the polarity of the gradation signal for each frame. It can also be applied to devices.

  When the present invention is applied to frame inversion driving, it can be realized as follows. First, the correction amount of the common voltage is obtained based on the average value of the gradation signal of the first frame and the average value of the gradation signal of the second frame. Then, when displaying the third frame, a value obtained by adding the obtained correction amount to the reference value Vcom0 of the common voltage may be applied to the common electrode of the liquid crystal panel 2.

  In the above embodiment, the line inversion driving for inverting the polarity of the gradation signal for each gate electrode has been described as an example. However, the present invention is a liquid crystal display of dot inversion driving for inverting the polarity of the gradation signal for each pixel. It can also be applied to devices.

  When the present invention is applied to dot inversion driving, it can be realized as follows. First, for each predetermined period (for example, for each frame or each gate electrode), an average value of gradation signals supplied to the source electrodes in odd columns and an average value of gradation signals supplied to the source electrodes in odd columns Ask for. Then, the correction amount of the common voltage is obtained based on both average values, and when the gradation signal of the next period is supplied, the liquid crystal panel is obtained by adding the obtained correction amount to the reference value Vcom0 of the common voltage. The voltage may be applied to the two common electrodes.

It is a block diagram which shows the structure of a liquid crystal display device. It is a perspective view which shows the structure of a liquid crystal panel typically. It is a figure which shows the equivalent circuit of the pixel of a liquid crystal panel. It is a block diagram which shows the structure of a common voltage supply circuit. It is a time chart which shows operation | movement of the 1st and 2nd holding circuit. It is a time chart which shows operation | movement of the whole liquid crystal display device.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Liquid crystal display device, 2 ... Liquid crystal panel, 3 ... Display drive circuit.

Claims (6)

An active matrix liquid crystal panel comprising a gate electrode, a source electrode, and a common electrode;
A liquid crystal display comprising a display driving circuit for supplying an image by supplying a scanning signal applied to the gate electrode, a gradation signal applied to the source electrode, and a common voltage applied to the common electrode A device,
The display driving circuit inverts the polarity of the gradation signal with respect to the common voltage at a predetermined cycle, and the common voltage is calculated based on the gradation signal at one polarity and the gradation signal at the other polarity. Determine and apply to the common electrode;
A liquid crystal display device characterized by the above. The display driving circuit supplies, for each of the gate electrodes, an inverted polarity of the gradation signal with respect to the common voltage, and from the gradation signal applied to each of the two adjacent gate electrodes, the common electrode Determining a common voltage to be applied to the common electrode,
The liquid crystal display device according to claim 1. The display driving circuit obtains an average value of the gradation signals applied to each of the two adjacent gate electrodes, obtains a correction amount of the common voltage based on the average value, and uses the correction amount as the common voltage. Is applied to the common electrode in addition to the standard value of
The liquid crystal display device according to claim 2. A control unit for controlling a gate driver, a source driver, and a common voltage supply circuit to display a desired image on the liquid crystal panel;
The gate driver that supplies a scanning signal to the gate electrode of the liquid crystal panel according to the control by the control unit;
The source driver that supplies a gradation signal to the source electrode of the liquid crystal panel and a common voltage driving circuit according to control by the control unit;
The common voltage supply circuit for determining a common voltage to be supplied to the common electrode of the liquid crystal panel based on the gradation signal supplied from the source driver and the control by the control unit, and supplying the common voltage; Composed of,
A display driving circuit. The source driver alternately changes the polarity of the gradation signal with respect to the common voltage for each gate electrode,
The common voltage driving circuit determines a common voltage to be applied to the common electrode from the gradation signal applied to each of the two adjacent gate electrodes, and applies the common voltage to the common electrode;
The display drive circuit according to claim 4, wherein: The common voltage driving circuit obtains an average value of the gradation signal applied to each of the two adjacent gate electrodes, obtains a correction amount of the common voltage based on the average value, and uses the correction amount as the common amount Apply to the common electrode in addition to the standard value of voltage,
The display drive circuit according to claim 5, wherein:

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