JP2007033101A - Ic testing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily replace contacts for contact with IC terminals and eliminate the need for preparing IC sockets for every IC package in an IC testing apparatus for the electrical connection between ICs to be tested and IC terminals. <P>SOLUTION: The IC testing apparatus is provided with: a wiring board 2 in which a plurality of through holes 6 are formed according to the arrangement of IC terminals 16 of an IC to be tested 14; the contacts 6 arranged in the through holes 6, electrically connected to wiring patterns 4, and each having one end to be in contact with an IC terminal 14; and a second substrate 20 mounted to the surface of the wiring substrate 2 on the side opposite to the surface facing the IC to be tested 14 in such a way as to be attached and removed for supporting the other end of a contact 6. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an IC test apparatus for drawing out to a tester for IC test using a wiring pattern while making contact with a signal terminal of the IC.

  Conventionally, when testing a semiconductor device (IC) contained in a package called CSP (chip scale package) or BGA (ball grid alley), the test substrate and the IC are held as a structure for conducting the tester and the IC. An IC test apparatus provided with a socket for conducting has been used (for example, see Patent Document 1).

An example of a conventional IC test method will be described with reference to FIG. FIG. 6 is a cross-sectional view schematically showing a conventional IC test apparatus.
The conventional test apparatus includes a socket 40 for making an electrical connection while making contact with the IC under test 14, and a test board 41 for extracting an electrical signal from the socket 40. The socket 40 is provided with a pogo pin 18 made of a conductive material for making an electrical connection by directly contacting the IC terminal 16 of the IC under test 14 at a position corresponding to the IC terminal 16. The pogo pin 18 is formed such that the tip portion contacting the IC terminal 16 can be moved up and down by elastic means such as a spring, for example, and the tip portion of the pogo pin 18 and the IC terminal 16 are prevented from being damaged. The tip of the pogo pin 18 has a concave shape in order to increase the contact area with the IC terminal 16.

  An electrode portion 42 is formed on the upper surface of the test substrate 41 at a position corresponding to the IC terminal 16 of the IC under test 14. The electrode part 42 is electrically connected to the wiring pattern 44 formed in the inner layer by, for example, a method of plating the through hole with metal.

The other end of the pogo pin 18 is in contact with the electrode portion 42 so that an electrical signal from the IC terminal 16 is transmitted to the wiring pattern 44.
When a test is performed on the IC under test 14, the IC under test 14 is accurately placed on the socket 40 by a handler using, for example, positioning by image recognition.
Japanese Patent Laid-Open No. 2001-4660

  Since the arrangement of the IC terminals differs depending on the type of the IC package, it is necessary to create a socket for each IC package. Since the socket is created by cutting or the like, there is a problem that it is expensive to produce for each IC package. Further, since the IC terminal is brought into contact with the wiring pattern of the substrate through the pogo pin, there is a problem that the inductance increases.

In addition, even in the same package, the positions of the power supply pins and the GND pins differ depending on the type, so it is necessary to prepare a test board for each type.
In an apparatus called a tester for IC testing, the test head becomes larger as the number of terminals formed in the IC increases, and the size of the test board attached to the test head increases, for example, 300 mm square or more. There was a problem that the cost and delivery time of the test board designed and created for each product increased.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an IC test apparatus in which a contact for contacting an IC terminal in an IC test apparatus can be easily replaced, and an IC socket need not be created for each IC package. .

  The IC test apparatus according to the present invention includes a wiring board in which a plurality of through holes are formed corresponding to the arrangement of the IC terminals of the IC under test, and the one end is in contact with the IC terminal. A contactor, and a second substrate that is detachably attached to a surface of the wiring board opposite to the surface facing the IC under test and supports the other end of the contactor. It is what.

In the prior art, since it was difficult to process a thick wiring board with high accuracy, a contactor having a pin pressure (for example, 30 g / piece) that can reliably contact an IC terminal. Although it was impossible to insert the IC directly into the wiring board, the accuracy of the board processing has improved at present, and the contact is embedded in the through hole of the board by realizing the processing of the board with a thickness of about 6 mm, for example. Became possible.
In the IC test apparatus of the present invention, contacts are arranged in a plurality of through holes corresponding to the arrangement of the IC terminals of the IC under test provided on the wiring substrate, and the contacts are supported by the second substrate. Since the IC terminal of the IC under test and the wiring pattern are connected via the IC, there is no need to fix the contact with solder or the like, and the IC terminal of the IC under test can be contacted without using an IC socket. be able to.

In the IC test apparatus of the present invention, examples of the wiring board include a plating layer formed on the inner wall of the through hole and a wiring pattern electrically connected to the plating layer.
The contact is in contact with the plating layer and is electrically connected to the wiring pattern through the plating layer.

  Further, the contact includes a flange portion that contacts a peripheral portion of the through hole on one surface of the wiring board, and is electrically connected to the plating layer in a region where the flange portion contacts the surface of the wiring board. A land portion made of a conductive material may be provided. As a result, the electrical connection between the contact and the wiring pattern becomes more stable.

  Further, the flange portion of the contact is disposed between the wiring board and the second substrate, and the second substrate supports the tip of the contact on the second substrate side while maintaining the contact between the flange portion and the land portion. It is preferable. As a result, the electrical connection between the contact and the wiring pattern is stably maintained.

  The second substrate may include an electrode pad that is in contact with the other end of the contact and a second wiring pattern that is electrically connected to the electrode pad. Then, the potential of the IC terminal of the IC under test can be extracted from the second substrate.

  The second substrate may have electronic components mounted thereon, and at least a pair of the electrode pads may be electrically connected via the electronic components.

  The pair of electrode pads are electrically connected to the contacts corresponding to the power IC terminal and the ground IC terminal of the IC under test, and a capacitor can be cited as an example of an electronic component. If a capacitor is mounted on the second substrate as an electronic component, noise can be removed in the immediate vicinity of the IC under test.

The through holes are preferably provided corresponding to a plurality of types of ICs to be tested having the same pitch IC terminal array.
If the through-holes are provided corresponding to a plurality of types of ICs to be tested having the same pitch IC terminal arrangement, the pitch is the same only by changing the position of the contact and the second substrate. Therefore, it is possible to deal with other ICs to be tested having different external shapes and numbers of IC terminals.

  An IC guide removably attached to guide the IC terminal to the position of the contact may be further provided on the surface of the wiring board on which the IC under test is arranged. Then, the IC under test is guided to the correct position by the guide.

An example of the contact is a pogo pin.
The “pogo pin” is one in which a contact terminal for making an electrical connection by directly contacting a terminal of an electronic component is provided inside the pogo pin main body and is slid by the elastic force of an elastic member.

  The IC test apparatus according to the present invention includes a wiring board in which a plurality of through holes are formed corresponding to the arrangement of the IC terminals of the IC under test, and the one end is in contact with the IC terminal. A contactor and a second substrate that is detachably attached to a surface of the wiring board opposite to the surface facing the IC under test and supports the other end of the contactor. Therefore, contact with the IC terminal of the IC under test can be made without using a socket. Since the contact is sandwiched and held between the IC under test and the second substrate, it is not necessary to fix the contact with solder or the like, and the contact can be easily replaced.

  In the IC test apparatus of the present invention, if the wiring board is provided with a plating layer formed on the inner wall of the through hole and a wiring pattern electrically connected to the plating layer, the contact becomes a wiring. Since the area of the region that can be electrically connected to the pattern is increased, the electrical connection between the contact and the wiring pattern can be easily performed. Further, according to this structure, since the distance from the IC terminal to the wiring pattern is shorter than the length of the contact, it is possible to suppress an increase in inductance.

  Further, the contact includes a flange portion that contacts the peripheral portion of the through hole on one surface of the wiring board, and a conductive layer that is electrically connected to the plating layer in a region where the flange portion contacts the wiring substrate surface. If the land portion made of the conductive material is provided, the electrical connection between the contact and the wiring pattern can be further stabilized.

  As described above, when a contact with a hook is used to make contact with a land portion on the surface of the wiring board, the hook is disposed between the wiring board and the second board, and the hook and the land are If the contact is maintained by the second substrate, the electrical connection between the contact and the wiring pattern can be reliably maintained in a stable state.

  If the second substrate includes an electrode pad that is in contact with the other end of the contact and a second wiring pattern that is electrically connected to the electrode pad, the second substrate The potential of the IC terminal of the IC under test can be extracted.

Furthermore, if the second board is mounted with electronic components, the electronic parts to be attached to the wiring board can be attached to the second board, and the area of the wiring board can be reduced.
Then, if a capacitor is provided as the electronic component and the power supply IC terminal and the ground IC terminal of the IC under test are made conductive with the second substrate via the capacitor, noise is removed in the immediate vicinity of the IC under test. Can do.

  If the through-holes are provided corresponding to a plurality of types of ICs to be tested having the same pitch IC terminal arrangement, the pitch is the same only by changing the position of the contact and the second substrate. Therefore, it is possible to deal with other ICs to be tested having different external shapes and numbers of IC terminals.

  If an IC guide detachably attached to guide the IC terminal to the position of the contact is provided on the surface of the wiring board on which the IC under test is placed, Since the guide is guided to the correct position, it is easy to bring the contact and the IC terminal into contact with each other.

Preferred embodiments of the present invention will be described below with reference to the drawings.
1A and 1B are diagrams showing an IC test apparatus according to an embodiment, in which FIG. 1A is a sectional view and FIG. 1B is a plan view of a wiring board.
In FIG. 1, 2 is a wiring board, 4 is a metal wiring pattern, 6 is a through hole, 8 is a pad electrode, 10 is a metal plating layer formed in the through hole 6, and 12 is formed at the peripheral portion of each through hole. 14 is an IC chip, 16 is an IC terminal, 18 is a pogo pin as a contact, 18a is a contact terminal of the pogo pin 18, 18b is a collar portion of the pogo pin, and 20 is a second substrate.

  A plurality of through holes 6 are arranged on the wiring board 2 in a matrix at the same pitch as the foot pattern (IC terminal arrangement pattern) of the IC chip 14. A plated layer 10 made of a metal material is formed on the inner wall of the through hole 6. A land portion 12 electrically connected to the plating layer 10 is formed around the through hole 6 on the lower surface of the wiring board 2. The land portion 12 is formed of the same metal material as that of the plating layer 10. One end of the wiring pattern 4 is electrically connected to the metal plating layer 10, and the other end is electrically connected to the pad electrode 8. For example, the interval between the through holes 6 is about 1.27 mm, and the inner diameter of the through holes 6 is about 0.5 mm.

The pogo pin 18 is detachably disposed in the through hole 6. The pogo pin 18 is provided with elastic means such as a spring, for example, and has a contact terminal 18a that slides by the elastic means. The tip portion of the contact terminal 18a is concave.
The IC chip 14 is disposed on the wiring board 2, and the IC terminal 16 is electrically connected while being in contact with and supported by one end of the contact terminal 18 a of the pogo pin 18. The pogo pin 18 has a flange 18b on the opposite side to the one end 18a. The flange portion 18 b of the pogo pin 18 comes into contact with the land portion 12 provided on the surface of the wiring board 2.

A second substrate 20 is disposed below the wiring substrate 2. The second substrate 20 is fixed to the wiring substrate 2 by a fixture 22. The lower end of the pogo pin 18 is supported by the second substrate 20 so as not to fall out of the through hole 6.
Since the pogo pins 18 are only supported from below by the second substrate 20, the pogo pins 18 can be easily removed by removing the second substrate 20.

In this embodiment, the number of through holes 6 in the wiring board 2 is larger than that of the IC terminals 16 of the IC chip 14. Thereby, the wiring board 2 can be shared with IC chips other than the IC chip 14 in which terminals are arranged at the same pitch as the IC chip 14.
Here, the arrangement pitch of the terminals 16 of the IC chip 14 may be arranged to be an integral multiple of the arrangement pitch of the through holes 6. Then, even if the IC chip 14 has an arrangement pitch different from that of the IC chip 14, the same wiring board 2 can be shared with respect to an IC chip whose terminal arrangement pitch is an integral multiple of the through-hole 6. .

If the plating layer 10 and the pogo pin 18 are brought into contact with each other on the outer peripheral surface of the pogo pin 18, there is a concern that contact failure may occur unless the inner diameter of the through hole 6 exactly matches the outer shape of the pogo pin 18. In this embodiment, since the flange portion 18b of the pogo pin 18 is in contact with the land portion 12, the plated layer 10 and the pogo pin 18 and Can be electrically connected.
Further, in this embodiment, the flange portion 18a of the pogo pin 18 is disposed between the wiring board 2 and the second board 20, and the second board 20 is connected to the tip of the contact terminal 18a of the pogo pin 18 on the second board 20 side. Since it supports while pushing to the wiring board 2 side, the collar part 18b of the pogo pin 18 and the land part 12 can be made to contact stably.

  As described above, in the IC test apparatus of this embodiment, the pogo pin 18 as a contact is soldered or bonded to the through hole 6 provided in the wiring board 2 corresponding to the terminal 16 of the IC chip 14. Therefore, the same wiring board 2 can be shared by IC chips having different terminal arrangements and the same pitch. This eliminates the need for an IC socket and it is not necessary to prepare a wiring board for each foot pattern of the IC under test, thereby reducing the cost for IC testing. Further, since no socket is used, the distance from the IC terminal 16 of the IC chip 14 to the wiring pattern 4 is shortened, and the inductance can be suppressed.

  Here, in this embodiment, the land portion 12 is provided around the through hole 6 on the lower surface of the wiring board 2, but the present invention is not limited to this, and the flange portion 18 b of the pogo pin 18 is in contact with the land portion 12. The land portion 12 may be provided in the area around the through hole 6 on both sides of the wiring substrate 2 as long as it is provided on the surface of the wiring substrate 2.

  Further, in the IC test apparatus of this embodiment, as shown in FIG. 2, in order to stably contact the IC terminal 16 and the contact terminal 18a of the pogo pin 18, an IC guide for guiding the IC chip 14 to an accurate position. 24 may be used. If the guide 24 is disposed on the wiring board 2, the IC terminal 16 and the contact terminal 18a can be easily brought into contact with each other simply by placing the IC chip 14 on the guide 24.

  The guide 24 may be provided with a through hole at a position corresponding to the foot pattern of the IC chip 14 as shown in the figure, or may penetrate through all the through holes 6 of the wiring board 2. A hole may be provided. Such a guide 24 may be prepared for each package outline of the IC under test, and the guide 24 can be shared with the IC under test having the same package outline.

The pogo pin 18 at a position where it is not used may be removed or may be left. When the pogo pin 18 is left, particularly when the guide 24 is used, the pogo pin 18 does not come into contact with the IC package in consideration of the stroke of the pogo pin 18 and the thickness of the guide.
Also, as shown in FIG. 3, pogo pins 18 are inserted into the through holes 6 at positions where the IC terminals 16 of the IC under test 14 do not exist among the through holes 6 formed in the wiring board 2, and the wiring pattern 4 is It may be used by being electrically connected to the pogo pin 18 that is in contact with the IC terminal 16 through the IC terminal 16.

FIG. 4 is a cross-sectional view showing an example of an IC test apparatus using a wiring board as the second board.
The second substrate 20a has through holes 26 and 28 corresponding to, for example, pogo pins that make contact with the power supply terminal of the IC chip 14 and pogo pins that make contact with the GND (ground) terminal. A plated layer made of metal is formed on the inner walls of the through holes 26 and 28, and conducts from the front surface to the back surface of the second substrate 20a. A second wiring pattern 32 is drawn out from the through holes 26 and 28 and connected to an external power supply circuit or the like. Electrodes 34 and 36 that are in contact with the pogo pins 18 are formed on the through holes 26 and 28.

  As the second substrate 20a, one in which all the pogo pins 18 are electrically independent is used, and wiring is performed in accordance with the specifications of the IC chip 14. By replacing the second substrate 20a, the wiring substrate 2 can be used with a plurality of types of ICs having the same IC terminal arrangement pattern.

A capacitor 30 is mounted under the through holes 26 and 28 on the back surface of the second substrate 20a. The capacitor 30 is connected between the power supply and GND. Noise can be removed by connecting the capacitor 30 between the power source and GND.
Here, it is preferable that the bypass capacitor connected between the power source and the GND to remove noise is provided as close to the IC chip 14 as possible. Therefore, when the IC chip 14 as the IC under test is a high-frequency product or a product with a large amount of current, it is preferable to use a dedicated second substrate to which the capacitor 30 such as the second substrate 20a is attached.

  Screws and connectors can be used to attach the second board 20a to the wiring board 2. However, by using the connector, the power supply and GND conduction between the wiring board 2 and the second board 20a can be performed using the connector. Can take. The power supply or GND between the second board 20a and the wiring board 2 may be conducted by soldering or the like. However, if a connector is used, a plurality of second boards 20a can be easily formed on one wiring board 2. There is an advantage that it can be replaced.

In the above embodiment, the power supply and the GND of the IC chip 14 are drawn out by the wiring board 20a. However, the present invention is not limited to this, and the signal lines other than the power supply and GND are made to be conducted by the wiring board 20a. It may be.
In addition, the capacitor 30 is provided on the second substrate 20a. However, the present invention is not limited to this, and electronic components may not be mounted on the second substrate 20a. Parts may be mounted.

  In the embodiment described with reference to FIGS. 1 to 4, the flange portion 18b of the pogo pin 18 is disposed between the wiring board 2 and the second boards 20 and 20a. However, the present invention is not limited to this. Instead, as shown in FIG. 5, the flange portion 18 b may be disposed between the wiring board 2 and the IC under test 14. However, when the flange 18 b is disposed between the wiring board 2 and the IC under test 14, the guide 24 is disposed between the wiring board 2 and the IC under test 14, and the guide 24 supports the flange 18 b and the land 12. It is preferable to maintain the contact.

When the flange portion 18b is disposed between the wiring board 2 and the IC under test 14, the pogo pin 18 that does not require contact with the second substrate 20a needs to reach the second substrate 20 as shown in FIG. Therefore, the signal can be shortened, and signal branching, which is a problem in a high-frequency circuit called a stub, can be alleviated. Further, in the IC test apparatus shown in FIG. 5, a capacitor may be provided under the second substrate 20a. Further, the second wiring pattern 32 may be formed on the surface of the second substrate 20a, or the second wiring pattern 32 may not be formed.
Even when the flange 18b is disposed between the wiring board 2 and the IC under test 14, the through hole in the through hole 6 formed in the wiring board 2 is located at a position where the IC terminal 16 of the IC under test 14 does not exist. The pogo pin 6 may be removed, or the pogo pin 18 may be inserted and electrically connected to the pogo pin 18 that contacts the IC terminal 16 via the wiring pattern 4 for use.

As described above, in the embodiment described with reference to FIGS. 1 to 5, the plated layer 10 is formed on the inner wall of the through hole 6. However, the present invention is not limited to this, and the plated layer is formed in the through hole. A wiring board that is not formed on the inner wall may be used. However, when the plating layer 10 is not formed on the inner wall, the contact between the contact 6 and the wiring pattern 4 becomes unstable. Therefore, the plating layer 10 is preferably formed.
Moreover, although the pogo pin 18 provided with the collar part 18b on the one end side is used as a contactor, the present invention is not limited to this, and a contactor having no collar part may be used.

It is a figure for demonstrating the IC test apparatus of one Example, (A) is sectional drawing, (B) is a top view of the wiring board used by the Example. It is sectional drawing for demonstrating another Example. It is sectional drawing for demonstrating other Example. It is sectional drawing for demonstrating other Example. It is sectional drawing for demonstrating other Example. It is a figure which shows an example of the conventional IC test apparatus.

Explanation of symbols

2 Wiring board 4 Wiring pattern 6 Through hole 8 Pad electrode 10 Plating layer 14 Test IC
16 IC signal terminal 18 pogo pin 18a contact terminal 18b collar 20, 20a second substrate 22 fixing tool 24 guide 26, 28 second substrate through hole 30 capacitor 32 second wiring pattern 34, 36 electrode

Claims (10)

A wiring board in which a plurality of through holes are formed corresponding to the arrangement of the IC terminals of the IC under test;
A contact disposed in the through hole and having one end in contact with the IC terminal;
An IC test apparatus comprising: a second substrate that is detachably attached to a surface opposite to the surface facing the IC under test of the wiring board and supports the other end of the contact. .   The IC test apparatus according to claim 1, wherein the wiring board includes a plating layer formed on an inner wall of the through hole and a wiring pattern electrically connected to the plating layer. The contact includes a flange that contacts a peripheral portion of the through hole on one surface of the wiring board,
The IC test apparatus according to claim 1, wherein the wiring board includes a land portion made of a conductive material in a region where the flange portion contacts.   The flange portion of the contact is disposed between the wiring board and the second substrate, and the second substrate maintains the contact between the flange portion and the land portion while the other of the contactor. The IC test apparatus according to claim 3, wherein the end is supported.   The said 2nd board | substrate is equipped with the 2nd wiring pattern electrically connected with the electrode pad and the said electrode pad which are contacted with the said other end of the said contactor. IC test equipment.   The IC test apparatus according to claim 5, wherein an electronic component is mounted on the second substrate, and at least a pair of the electrode pads are electrically connected via the electronic component.   7. The IC according to claim 6, wherein the pair of electrode pads are electrically connected to the contact corresponding to a power IC terminal and a ground IC terminal of the IC under test, and the electronic component is a capacitor. Test equipment.   8. The IC test apparatus according to claim 1, wherein the through holes are provided corresponding to a plurality of types of ICs to be tested having an IC terminal array having the same pitch.   9. The IC guide according to claim 1, further comprising an IC guide detachably attached to a surface of the wiring board on which the IC under test is arranged to guide the IC terminal to the position of the contact. An IC testing apparatus according to claim 1.   The IC test apparatus according to claim 1, wherein the contact is a pogo pin.

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