JP2007024907A - Ic testing system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an IC testing system capable of efficiently operating IC testing devices. <P>SOLUTION: The testing system has a plurality of IC test stations, comprising a handler 11 for conveying an IC and an IC testing device body 10 for testing an operation of the IC conveyed by the handler and connected to a test head. A host computer having a storage information storage means is connected to each IC test station via a communication means; and after the completion of the test of each IC test station, mounting information of a general tray and test result are stored in the storage information storage means. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an IC test system for testing an IC such as a semiconductor memory and classifying it into a non-defective product and a defective product.

  As the degree of integration of ICs increases, the number of terminals increases, and it is difficult to transport the ICs by a natural drop type transport method in which the ICs are slid on an inclined transport path. For this reason, recent handlers employ a horizontal transport system in which an IC is sucked by a vacuum suction head and transported to an arbitrary place by an XY transport means.

For horizontal transport handlers,
(1) From a tray in which a large number of ICs are stored in a planar shape, the ICs are sucked by a vacuum suction head, and the sucked ICs are sequentially transported to a preheating part and a test part by an XY transport means, and a test is performed. A type that returns the tested IC to the tray while sorting it into non-defective and defective products,
(2) A general-purpose tray for storing and distributing the IC outside the handler is given to the handler, the IC is transferred from the general-purpose tray to the test tray, and the test tray equipped with the IC is passed through the thermostat to the test unit. The IC is tested in the test unit while the IC is stored in the test tray. After the test, the test tray is taken out to the unloader unit via the heat removal tank, and the IC is transferred from the test tray to the general-purpose tray in the unloader unit. A type that is returned to the non-defective product and the defective product while being sorted is put into practical use.

  The type (1) handler is not suitable for high-speed processing because the number of ICs that can be tested at one time is limited to about 2 to 4. This type of handler (2) makes it possible to test a large number of ICs such as 16, 32, 64, etc. at a time because the IC is stored in the test tray and brought into contact with the test socket. it can. Therefore, the type (2) type handler is now becoming mainstream.

  A schematic configuration of the handler of the type (2) will be described with reference to FIGS. FIG. 4 shows a schematic plan view. In the figure, reference numeral 100 denotes a chamber unit including a test head, 200 stores an IC under test to be tested, and an IC storage unit for classifying and storing tested ICs, and 300 sends the IC under test to the chamber unit 100. The loader unit 400 is an unloader unit that classifies and takes out tested ICs that have been tested in the chamber unit 100, and TST is loaded into the chamber unit 100 by the loader unit 300 and loaded into the chamber unit 100. An IC transport test tray for testing an IC and carrying the tested IC to the unloader unit 400 is shown.

  The chamber unit 100 uses a constant temperature bath 101 for applying a target high or low temperature stress to the IC under test loaded on the test tray TST, and an IC in a state where the thermal stress is applied in the constant temperature bath 101 as a test head. A test chamber 102 to be contacted and a heat removal tank 103 for removing a given thermal stress from an IC tested in the test chamber 102 are configured. That is, when a high temperature is applied in the thermostatic chamber 101, it is cooled by blowing air, returned to room temperature, and carried to the unloader unit 400. Further, when a low temperature of, for example, about −30 ° C. is applied in the constant temperature bath 101, the air is heated with warm air or a heater or the like, returned to a temperature at which no dew condensation occurs, and carried to the unloader unit 400.

  The constant temperature bath 101 and the heat removal bath 103 are disposed so as to protrude upward from the test chamber 102. As shown in FIG. 5, a substrate 105 is passed between the upper part of the constant temperature bath 101 and the heat removal bath 103, and a test tray transporting means 108 is mounted on the substrate 105. It is transferred from the heat removal tank 103 side toward the thermostat 101. The test tray TST is loaded with the IC under test by the loader unit 300 and is carried into the thermostatic chamber 101. The constant temperature bath 101 is equipped with a vertical transfer means, and a plurality of test trays TST are supported by the vertical transfer means and wait for the test chamber 102 to become empty. During this standby, high or low temperature stress is applied to the IC under test. A test head 104 is arranged at the center of the test chamber 102, and a test tray TST is carried on the test head 104, and an IC under test is brought into electrical contact with the test head 104 to perform a test. The test tray TST for which the test has been completed removes heat in the heat removal tank 103, returns the temperature of the IC to room temperature, and discharges it to the unloader section 400.

  The IC storage unit 200 is provided with an IC stocker 201 to be tested for storing ICs to be tested, and a tested IC stocker 202 for storing ICs classified according to the test results. In the IC stocker 201 to be tested, general-purpose trays KST storing ICs to be tested are stacked and held. This general purpose tray KST is carried to the loader unit 300, and the IC under test is transferred from the general purpose tray KST carried to the loader unit 300 to the test tray TST stopped at the loader unit 300. As shown in FIG. 5, the IC carrying means for carrying the IC from the general-purpose tray KST to the test tray TST includes two rails 301 installed on the upper portion of the substrate 105, and the test rail TST and the general-purpose tray by the two rails 301. The movable arm 302 is configured to reciprocate between the KST and the movable arm 302. The movable arm 302 is supported by the movable arm 302 and can move in the X direction along the movable arm 302. X-Y transport means 304 can be used. A suction head is mounted on the movable head 303 downward, and the suction head moves while sucking air, sucks an IC from the general-purpose tray KST, and transports the IC to the test tray TST. For example, about eight suction heads are attached to the movable head 303, and eight ICs are conveyed to the test tray TST at a time.

  FIG. 6 shows the structure of the test tray TST. In the test tray TST, a plurality of ridges 13 are formed on the rectangular frame 12 in parallel and at equal intervals, and a plurality of mounting pieces 14 project at equal intervals on both sides of the ridges 13 and on the side 12a of the frame 12 facing the ridges 13. The carrier storage portions 15 are arranged and formed between the ridges 13 or between the ridges 13 and the sides 12 a and the two attachment pieces 14. One IC carrier 16 is accommodated in each carrier accommodating portion 15, and can be attached to two attachment pieces 14 in a floating state by fasteners 17. About 16 × 4 IC carriers 16 are attached to one test tray TST.

  The outer shape of the IC carrier 16 has the same shape and the same dimensions, and the IC element is accommodated in the IC carrier 16. The IC storage unit 19 is determined according to the shape of the IC to be stored. The IC accommodating portion 19 is a rectangular concave portion in this example. At both ends of the IC carrier 16, a mounting hole 21 to the mounting piece 14 and a positioning pin insertion hole 22 are formed.

  In order to prevent the displacement of the IC in the IC carrier 16 and the jumping out, a latch 23 is attached to the IC carrier 16 as shown in FIG. The latch 23 is integrally protruded upward from the bottom surface of the IC accommodating portion 19 and utilizes the elasticity of the resin material constituting the IC carrier 16 to accommodate the IC element in the IC accommodating portion 19 or the IC accommodating portion. At the time of taking out from the unit 19, after the interval between the two latches 23 is widened by an IC suction pad 24 that sucks an IC element and a latch release mechanism 25 that moves simultaneously as a whole, the IC is accommodated or taken out. When the latch release mechanism 25 is separated from the latch 23, it returns to its original state by its elastic force, and the accommodated IC is held in a state that is prevented from being detached by the latch 23.

  As shown in FIG. 8, the IC carrier 16 holds the IC pins 18 exposed on the lower surface side. In the test head 104, the exposed IC pin 18 is pressed against the contact 19 of the IC socket, and the IC is brought into electrical contact with the test head. For this purpose, a press contact 20 is provided on the top of the test head 104 to hold the IC downward. The press contact holds the IC housed in each IC carrier 16 from above and contacts the test head 104. .

  As for the number of ICs connected to the test head at a time, for example, ICs arranged in 4 rows and 16 columns, as shown in FIG. That is, 16 ICs arranged in the first, fifth, ninth, and thirteen rows are tested in the first time, and the second time, the test tray TST is moved by one row, and the ICs arranged in the 2, 6, 10, and 14 rows. And repeat this 4 times to test all ICs. The test result is stored in the address determined by the serial number assigned to each IC (serial number in the lot), the identification number assigned to the test tray TST, and the number assigned to the IC storage portion of the test tray TST.

  The unloader unit 400 is provided with a transport unit 404 having the same structure as the XY transport unit 304 provided in the loader unit 300, and has been tested from the test tray TST carried to the unloader unit 400 by the XY transport unit 404. Are transferred to the general purpose tray KST. In the example shown in FIG. 4 and FIG. 5, eight stockers KST-1, KST-2,..., KST-8 are provided in the tested IC stocker 202, and can be sorted and stored in up to eight categories according to the test results. The case where it comprises is shown. That is, in addition to good products and defective products, the non-defective products are classified into high-speed, medium-speed, low-speed, or defective products that require retesting. Even if the maximum number of categories that can be sorted is eight, only four general-purpose trays can be arranged in the unloader unit 400. For this reason, conventionally, when an IC classified into a category other than the category assigned to the general-purpose tray KST arranged in the unloader unit 400 is generated, one general-purpose tray KST is transferred from the unloader unit 400 to the IC storage unit 200. In return, instead of this, the general-purpose tray KST that should store the newly generated IC of the category is transferred to the unloader unit 400, and the IC is stored.

  As shown in FIG. 10, the IC stocker 201 to be tested and the IC stocker 202 to be tested include a frame-like tray support frame 203 and an elevator 204 that enters from the lower portion of the tray support frame 203 and can move up and down. It is provided and configured. A plurality of general purpose trays KST are stacked and supported on the tray support frame 203, and the stacked general purpose trays KST are moved up and down by the elevator 204.

  On the upper part of the IC stocker 201 to be tested and the IC stocker 202 to be tested, there is a tray transfer means 205 that moves between the substrate 105 and the entire range in the arrangement direction of the IC stocker 201 to be tested and the IC stocker 202 to be tested (FIG. 5). Provided. The tray transport means 205 is equipped with a gripping tool for gripping the general-purpose tray downward. The tray conveying means 205 is moved to the upper part of the IC stocker 201 to be tested, and the elevator 204 is driven in this state to raise the stacked general purpose trays KST. The uppermost tray of the rising general-purpose tray KST is gripped with a gripper. When the general-purpose tray KST storing the IC under test is delivered to the tray conveying means 205, the elevator 204 is lowered and returned to the original position. At the same time, the tray conveying means 205 moves in the horizontal direction and is carried to the position of the loader unit 300. At this position, the tray transport means 205 removes the general-purpose tray from the gripping tool, and temporarily deposits the general-purpose tray KST in a tray receiver (not shown) slightly below. The tray transport means 205 that has deposited the general-purpose tray KST in the tray receiver moves to a position other than the loader unit 300. In this state, the elevator 204 rises from below the portion where the general-purpose tray KST is mounted, the general-purpose tray KST mounting the IC under test is lifted upward, and the general-purpose tray KST is placed in the window 106 formed on the substrate 105. Support to face. That is, gripping means (not shown) for gripping the general purpose tray KST is provided around the lower surface of the window 106, and the general purpose tray KST storing the IC under test is gripped by the gripping means.

An empty general-purpose tray is held in the window 106 of the unloader unit 400, and the tested ICs are classified and stored in the empty general-purpose tray KST according to the category assigned to each general-purpose tray. When the general-purpose tray held in the window 106 is full, the general-purpose tray KST is held by the elevator 204, the gripping means is released while being supported by the elevator 204, and is lowered by the elevator 204 from the position of the window 106. The tray is stored in the tray storage position of the category assigned to it by the tray transport means 205. Note that reference numeral 206 shown in FIG. 4 denotes an empty trace stocker. Empty trays from the empty trace stocker 206 are arranged at the positions of the windows 106 of the unloader unit 400 and used for storing tested ICs.
JP-A-6-27193

  As described above, in an IC test system using a handler of a type in which ICs are transferred to a test tray and sent to a test unit, the number of ICs that can be tested at a time can be increased so that the time required for testing can be shortened. Can do. On the other hand, in the unloader unit 400, about eight ICs are returned from the test tray to the general-purpose tray at a time. However, since the work is performed while sorting, there is a drawback that this sorting work takes time. For this reason, although two unloader units are provided in the unloader unit 400, the time required for sorting becomes longer than the time required for the test.

  A first object of the present invention is to provide an IC test system capable of executing discharge of an IC from a test tray to a general-purpose tray at a high speed.

  A second object of the present invention is to perform a test on a large number of ICs in as short a time as possible in an IC test system that repeatedly executes tests with different conditions a plurality of times, and perform classification according to the results. An IC test system is to be provided.

  In the IC test system proposed in claim 1 of the present invention, the IC test apparatus main body and the IC under test are taken out from the general-purpose tray and sequentially transported to the test section of the IC test apparatus main body. A plurality of IC test stations, each of which includes a handler for unloading the completed IC and storing the tested IC in a general-purpose tray. The test conditions of the plurality of IC test stations are different from each other. And storage information storage means for storing the test result of the IC test station is provided in a host computer connected to each other by communication means, and the handler of each IC test station sends the tested IC to the next IC test station. When loading a general-purpose tray for transport to the The with the test results, there is provided an IC test system was configured to be stored in the storage information memory means through the communication means.

  According to the configuration of the IC test system proposed in claim 1, there is no restriction that the tested IC must be returned to the original position when being returned to the general-purpose tray. Accordingly, ICs can be transshipped at high speed, and the processing speed can be increased.

  In the IC test system proposed in claims 2 and 3 of the present invention, information supply means for supplying the stored information stored in the stored information storage means to the outside is added to the IC test system proposed in claim 1. It is a thing. By using the stored information output from the information supply means to the outside, for example, it is not necessary to perform IC classification after the end of the test at each IC test station. Then, after the test is completed, it is possible to finely classify the tested ICs with a dedicated classification machine. Thus, the processing speed can be increased by separating the test and the fine classification.

  As described above, according to the present invention, the handler 11 does not perform the classification operation according to the first aspect of the invention, and according to the second and third aspects, the non-defective product and the defective product or other sorts are classified. Since only two classifications need to be executed by the method, the time required for the IC test for each IC test station can be shortened and the speed can be increased. Further, even if each handler 11 performs a classification operation, it is only necessary to execute at most two classifications, so that the configuration can be simplified. Therefore, cost reduction of the handler 11 can also be expected. In addition, since the socket number contacted in the test part is stored in the test result, if defects are concentrated on the IC that is in contact with a specific socket, the socket is often defective. The advantage that the defect of the socket in the section can be detected is obtained.

  Furthermore, since the classification dedicated machine 13 only needs to perform classification, it can be made cheaper than the handler 11. Therefore, there is an advantage that an inexpensive IC test system can be constructed as a whole.

  FIG. 1 shows an embodiment of an IC test system proposed in claim 1 of the present invention. In the figure, A, B, and C indicate IC test stations. Each of the IC test stations A, B, and C includes an IC test apparatus main body 10 and a handler 11. Each IC test apparatus main body 10 is controlled under the control of the host computer 12. The illustrated example shows a state in which one handler 11 is connected to each IC test apparatus main body 10, but in reality, two handlers 11 are connected to one test apparatus main body 10 and the IC test stations A and B are connected. , C are configured.

  In this embodiment, the host computer 12 is provided with storage information storage means 14. Each time the stored IC is stored in the general-purpose tray KST, the stored information storage means 14 corresponds to the serial number assigned to each IC, the identification number assigned to the general-purpose tray KST, and each storage location. All of the IC test results are stored in the address determined by the assigned number. As test results, test conditions, for example, high-speed, medium-speed, and low-speed classification among non-defective products, necessity of retesting among defects, socket number of the test head contacted during the test, and the like are stored. The stored information to be stored is sent to the host computer 12 via the IC test apparatus 10 by the communication means 15 such as a GPIB communication port or an RS232C communication port between computers and stored in the storage information storage means 14.

  The stored information storage means 14 can be composed of a memory. The storage information stored in the storage information storage means 14 is stored in a storage medium such as a floppy (registered trademark) disk separately for each IC test station A, B, C, for example, and provided to the classification dedicated machine 13, or the communication means 15 Can be transferred to the dedicated classification machine 13.

  The general-purpose tray KST storing the ICs that have been tested by each handler 11 is accommodated in a container 20 as shown in FIG. 2, for example, and is transported to the dedicated classifier 13 or installed between each handler 11 and the dedicated classifier 13. The tray is transported to the sorting machine 20 by the tray transport device. The IC is taken out from the general-purpose tray KST carried to the classification dedicated machine 13 by the IC suction head provided in the classification dedicated machine 13, and the classification is executed according to the stored information stored in the address corresponding to the extraction position.

  FIG. 3 shows an embodiment of the IC test system proposed in claims 2 and 3 of the present invention. In the IC test system proposed in claim 2 of the present invention, each IC test station A, B, C tests the IC under different test conditions, for example. The test conditions include, for example, a difference in temperature applied to the IC under test or a difference in operating voltage. At IC test station A, the entire IC under test is tested. The IC to be tested is stored in a general-purpose tray KST serving as an IC storage unit and provided to the handler 11. For example, as shown in FIG. 2, a plurality of general-purpose trays KST are stacked and stored in a transport container 20, and the opening / closing lid 21 of the container 20 is opened and attached to the handler 11. The handler 11 carries out the general-purpose trays KST one by one from the container 20, transfers the IC mounted on the general-purpose tray KST to the test tray as necessary, and the test tray is sent to the test chamber through the thermostatic chamber, The IC is brought into contact with a test head provided in the test chamber, and the operation of the IC is tested. When all the tests of the ICs mounted on the test tray are completed, the test tray is taken out of the test chamber, removed from heat in the heat removal tank, and discharged out of the chamber. The IC on the test tray discharged out of the chamber is transferred to the general-purpose tray KST shown above in the unloader section. When performing this transfer, at least two general-purpose trays KST are prepared and classified into non-defective products and defective products. When the general-purpose tray KST is filled with non-defective products and defective products, the full-purpose tray KST is returned to the container 20 by the conveying means. At this time, in the container 20, for example, the general-purpose tray KST storing defective products is stored from the lower side, and the general-purpose tray KST storing non-defective products is stored from the upper side. In this manner, the general-purpose tray KST storing the good and defective products in the container 20 is sorted.

  When all the general purpose trays KST are returned to the container 20, the container 20 is moved to the next IC test station B. In the IC test station B, only the general-purpose tray KST storing the non-defective products is pulled out, and only the ICs determined as non-defective products are tested. When a defective product is generated at the IC test station B, the general-purpose tray KST (with an empty IC storage recess) storing the defective product in the container 20 is called by the unloader unit, and is determined to be defective by the IC test station B. Stored ICs.

  When all ICs determined to be non-defective products at the IC test station A are tested and all the general purpose trays KST are returned to the containers 20, the containers 20 are moved to the next IC test station C. The IC test station C tests only the ICs that are determined to be non-defective at the IC test station B, and stores the test results in the storage information storage means 14 provided in the host computer 12 for each IC of each general purpose tray KST. When a defective product is generated at the IC test station C, the defective IC is stored in a general-purpose tray KST that stores the defective IC.

  When all the ICs determined to be non-defective products in the past test are tested at the IC test station C, the container 20 is moved to the classification dedicated machine 13. The classification dedicated machine 13 classifies the IC according to the stored information sent from the host computer 12.

  In the example shown in FIGS. 1 and 3, an example in which three IC test stations A, B, and C are provided is shown, but the number of IC test stations is not limited. Further, the processing speed of the handler 11 can be improved only by the combination of the IC test station C and the classification dedicated machine 13. Therefore, the object of the present invention can be achieved only by the combination of the IC test station C and the classification dedicated machine 13. The IC test system proposed in claims 2 and 3 is also effective when applied to the case of using the type (1) handler described in the prior art.

1 is a block diagram showing an embodiment of claim 1 of the present invention. The perspective view for demonstrating the container which carries multiple sheets of a general purpose tray as 1 set. A block diagram showing an embodiment of claim 2 of the present invention. FIG. 6 is a schematic plan view for explaining a handler of a type using a conventional test tray. The perspective view for demonstrating the structure of the handler of FIG. The perspective view for demonstrating the structure of the test tray used for the handler shown in FIG.4 and FIG.5. The perspective view for demonstrating the IC storage part of the test tray shown in FIG. FIG. 8 is a diagram for explaining a state in which an IC is stored in the IC storage unit illustrated in FIG. 7 and the IC is brought into contact with the test head in the test unit. The top view for demonstrating the test order of IC accommodated in the test tray. The perspective view for demonstrating the structure of the stocker which accommodates the general purpose tray of the handler shown in FIG.4 and FIG.5.

Explanation of symbols

A, B, C IC test station 10 IC test device body 11 Handler 12 Host computer 13 Classification dedicated machine 14 Stored information storage means TST Test tray KST General purpose tray

Claims (3)

The IC test apparatus main body and the IC under test are taken out from the general-purpose tray and sequentially transported to the test section of the IC test apparatus main body. After the test is completed, the tested IC is unloaded from the test section and the tested IC is transferred to the general-purpose tray. There are multiple IC test stations consisting of a handler to store,
The test conditions of the above-mentioned multiple IC test stations are different from each other.
A host computer connected to each of the plurality of IC test stations by communication means is provided with storage information storage means for storing the test results of the IC test station,
The handler of each IC test station, when loading a tested IC on a general-purpose tray to transfer it to the next IC test station, stores the general-purpose tray mounting information and test results through the communication means and stores the stored information storage means. An IC test system characterized in that it is memorized. The IC test apparatus main body and the IC under test are taken out from the general-purpose tray and sequentially transported to the test section of the IC test apparatus main body. After the test is completed, the tested IC is unloaded from the test section and the tested IC is transferred to the general-purpose tray. There are multiple IC test stations consisting of a handler to store,
The test conditions of the above-mentioned multiple IC test stations are different from each other.
A host computer connected to each of the plurality of IC test stations by communication means is provided with storage information storage means for storing the test results of the IC test station,
The handler of each IC test station, when loading a tested IC on a general-purpose tray to transfer it to the next IC test station, stores the general-purpose tray mounting information and test results through the communication means and stores the stored information storage means. To remember
An IC test system comprising information supply means for supplying the storage information stored in the stored information storage means to the outside. In the IC test system according to claim 1 or 2,
The IC test system, wherein the stored information of the stored information storage means is transferred to the classification dedicated machine by the information supply means.

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