JP2007024905A - Method for testing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for testing a semiconductor device including a temperature detection function for detecting a predetermined temperature with little variation and optimizing an operation condition according to the detected predetermined temperature. <P>SOLUTION: The method includes a test temperature detection step for detecting a test temperature in testing temperature characteristics, an error measurement step for measuring an amount of an error in the detection result of the test temperature, and a compensation step for compensating for a temperature detecting part for detecting the predetermined temperature based on the measured amount of the error. The amount of the error of the detection result for the test temperature in testing the temperature characteristics is measured, and the temperature detecting part for detecting the predetermined temperature is compensated based on the amount of the error. The temperature detecting part can be relatively compensated without temperature detection test at the predetermined temperature to be detected by the temperature detecting part, whereby test time can be shortened and a test cost can be reduced. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention provides a semiconductor device having a temperature detection function that optimizes an operation state in accordance with a detected temperature detected with little variation in order to obtain sufficient operating performance in the entire use temperature range including a low temperature region and a high temperature region. This relates to the test method.

  In general, a semiconductor device constituting a semiconductor device has temperature characteristics, and a semiconductor device configured by integrating the semiconductor devices has temperature characteristics in terms of operating characteristics. Further, the semiconductor device is generally used in a predetermined temperature range, and is required to have a predetermined temperature characteristic over the entire use temperature range.

  FIG. 27 shows temperature characteristics of a semiconductor device formed of a CMOS device as an example with respect to typical current consumption IDD and various operation speeds tACCESS. As shown in FIG. 27, in a semiconductor device composed of CMOS devices, generally, the operating speed tACCESS decreases as the temperature increases, and the current consumption IDD tends to increase as the temperature decreases. Since each operating characteristic is guaranteed under the worst condition, various operating speeds tACCESS are guaranteed at the maximum value tmax in the operating temperature range ((A) in FIG. 27), and the current consumption IDD is guaranteed at the minimum value tmin in the operating temperature range. (B in FIG. 27). This guarantees the specifications on the operating characteristics over the entire operating temperature range (tmin to tmax).

  28 and 29 show an internal configuration (FIG. 28) and temperature characteristics (FIG. 29) of the operation related to a semiconductor memory as a typical example of a semiconductor device having a CMOS device configuration. Here, temperature characteristics relating to refresh control in a semiconductor memory 100 that requires a refresh operation such as a dynamic random access memory (hereinafter abbreviated as DRAM) among semiconductor memories are shown.

  Conventionally, as shown in FIG. 28, the refresh cycle tREF of the memory cell 102 is controlled by the refresh control circuit 101 in the semiconductor memory 100. As shown in FIG. 29, the memory cell 102 has a negative temperature characteristic in which the data retention characteristic due to charges or the like deteriorates due to an increase in leakage current with a rise in temperature and the data retention time tST is shortened.

  On the other hand, the refresh cycle tREF set by the refresh control circuit 101 is set by an oscillation circuit such as a ring oscillator. As a result of the temperature characteristics of various operation speeds tACCESS of the CMOS device, the operation speed tACCESS increases as the temperature decreases. It tends to have a positive temperature characteristic with respect to the operating temperature ((II) in FIG. 29). Here, in the setting of the refresh cycle tREF that intersects the data holding time tST within the operating temperature range ((I) in FIG. 29), there exists a temperature region in which the refresh cycle tREF is longer than the data holding time tST. However, (C) in FIG. 29 is not preferable because data in the memory cell 102 is lost.

  Therefore, it is common to set the refresh cycle tREF so as to intersect the data retention time tST at a temperature exceeding the maximum value tmax in the operating temperature range ((II) in FIG. 29). As a result, the refresh operation is performed in the refresh cycle tREF shorter than the data holding time tST in the entire use temperature range (tmin to tmax), and data stored in the memory cell 102 is not lost.

  However, for example, in a semiconductor device constituted by a CMOS device, the operation guarantee of the current consumption IDD and various operation speeds tACCESS is defined by the minimum value tmin and the maximum value tmax in a use temperature range that is not a normal use temperature range. Based on this guaranteed value, a system using a semiconductor device is designed and manufactured. Therefore, there is a possibility that a system that fully utilizes the operation performance of the semiconductor device in the normal use temperature range may not be configured.

  Further, in the semiconductor memory 100, the refresh cycle tREF set in the low temperature region of the operating temperature range is set at the data holding time tST due to the positive temperature characteristic tendency of the refresh cycle tREF in addition to the negative temperature characteristic of the data holding time tST. In comparison, it is set too short ((D) in FIG. 29). For this reason, the refresh control circuit 101 has a sufficiently shorter time than the data holding time tST of the memory cell 102 and performs a refresh operation more frequently than necessary. The problem is that the current consumption accompanying excessive refresh operation becomes extra, and the current consumption IDD in the low temperature region cannot be sufficiently reduced, and the operating characteristics of the current consumption IDD guaranteed at the minimum value tmin in the operating temperature range cannot be improved. There is.

  In particular, in a portable device or the like in which the semiconductor memory 100 is normally used at a temperature below room temperature, the continuous use time due to battery driving is limited by the consumption current IDD accompanying an excessive refresh operation at a low temperature region below room temperature. It is a problem.

  The present invention has been made to solve the problems of the prior art, and has a temperature detection function for detecting a predetermined temperature with little variation and optimizing an operation state according to the detected predetermined temperature. The purpose is to provide a test method.

  According to a first aspect of the present invention, there is provided a test method for a semiconductor device having a temperature detection function, a test temperature detection step for detecting a test temperature during a temperature characteristic test, and an error measurement for measuring an error amount of a detection result with respect to the test temperature. And a correction step of correcting a temperature detection unit for detecting a predetermined temperature based on the measured error amount.

  According to a test method of a semiconductor device having a temperature detection function according to claim 1, an error amount of a detection result with respect to a test temperature at the time of a temperature characteristic test is measured, and a temperature detection unit that detects a predetermined temperature based on the error amount Make corrections.

  According to a second aspect of the present invention, there is provided a test method for a semiconductor device having a temperature detection function, wherein, during a temperature characteristic test, the test temperature is detected, and the first neighboring temperature having a small detected temperature difference on the high temperature side with respect to the test temperature is detected. A test temperature detecting step for detecting at least any two of detection and detection of a second neighboring temperature having a minute detection temperature difference on the low temperature side, and detection of both-end temperatures of at least any of the two types of detection It includes an error measurement step of measuring a difference until the results contradict each other as a detection error, and a correction step of correcting a temperature detection unit that detects a predetermined temperature based on the measured error amount.

  In the method for testing a semiconductor device having a temperature detection function according to claim 2, the test temperature is selected from the test temperature and the first and second neighboring temperatures sandwiching the test temperature in detecting the test temperature during the temperature characteristic test. At least two temperature detection results are obtained. Then, the difference until the detection results of the temperature at both ends contradict each other is measured as a detection error, and the temperature detection unit for detecting a predetermined temperature is corrected based on this error amount.

  As a result, the test temperature is detected in a temperature characteristic test that has been performed conventionally, the amount of error from the actual test temperature is measured, and based on this amount of error, the temperature detector that detects the predetermined temperature is Can be corrected automatically. The temperature detector can be corrected relatively without performing the temperature detection test at the predetermined temperature detector or the predetermined temperature to be detected by the temperature detector, reducing the test time and reducing the test cost. can do.

  Further, in the method for testing a semiconductor device having a temperature detection function according to claim 2, at least two temperatures having a minute temperature difference selected from the test temperature or a temperature in the vicinity thereof are detected. Thus, the test temperature is within a minute temperature difference. Since the detection accuracy of the test temperature can be adjusted by adjusting the minute temperature difference, the accuracy of the error amount of the detection result can be adjusted, and the temperature detection unit can be relatively corrected with high accuracy.

  In the method for testing a semiconductor device having a temperature detection function according to claim 2, since at least two temperatures having a minute temperature difference selected from the test temperature or a temperature in the vicinity thereof are detected, the detection result is an actual value. It can be determined which side of the high temperature side / low temperature side is deviated from the test temperature, and the correction procedure can be performed efficiently.

  According to the present invention, it is possible to provide a test method for a semiconductor device having a temperature detection function that detects a predetermined temperature with little variation and optimizes an operation state according to the detected predetermined temperature.

  Hereinafter, first to third embodiments of a semiconductor device having a temperature detection function, a test method, and a refresh control method for a semiconductor memory device having a temperature detection function according to the present invention will be described with reference to FIGS. This will be described in detail with reference to the drawings.

  FIG. 1 is a circuit block diagram illustrating a semiconductor device having a temperature detection function according to the first embodiment. FIG. 2 is a characteristic diagram showing temperature characteristics in the semiconductor device of the first embodiment. FIG. 3 is a circuit block diagram showing a semiconductor memory having a temperature detection function according to the second embodiment. FIG. 4 is a characteristic diagram showing temperature dependence in the refresh control characteristic of the semiconductor memory of the second embodiment. FIG. 5 is a circuit block diagram showing a first modification of the first and second embodiments. FIG. 6 is a circuit block diagram showing a second modification of the first and second embodiments. FIG. 7 is a circuit diagram showing a specific example of the reference unit. FIG. 8 is a characteristic diagram illustrating output characteristics of a specific example of the reference unit. FIG. 9 is a circuit block diagram showing a specific example of the voltage bias unit in the first modification. FIG. 10 is a circuit diagram illustrating a specific example of the reference unit in the first modification. FIG. 11 is a circuit diagram showing a specific example of outputting the bias voltage VB + in the regulator unit. FIG. 12 is a circuit diagram showing a specific example of outputting the bias voltage VB− in the regulator unit. FIG. 13 is a circuit diagram showing a specific example of the regulator unit of FIG. 11 at the transistor level. FIG. 14 is a circuit diagram illustrating a specific example of the temperature detection unit. FIG. 15 is a characteristic diagram illustrating temperature characteristics in a specific example of the temperature detection unit. FIG. 16 is a structural diagram showing a first specific example of the diode structure of the temperature detection unit. FIG. 17 is a structural diagram illustrating a second specific example of the diode structure of the temperature detection unit. FIG. 18 is a characteristic diagram showing a predetermined temperature dependence of the bias voltage applied to the temperature detector (when a state change occurs on the high temperature side with respect to the detected temperature). FIG. 19 is a characteristic diagram showing a predetermined temperature dependence of the bias voltage applied to the temperature detector (when a state change occurs on the low temperature side with respect to the detected temperature). FIG. 20 is a circuit diagram showing a first specific example of the refresh control circuit. FIG. 21 is a circuit diagram showing a second specific example of the refresh control circuit. FIG. 22 is a circuit diagram showing a third specific example of the refresh control circuit. FIG. 23 is a circuit diagram showing a fourth specific example of the refresh control circuit. FIG. 24 is a circuit diagram illustrating a temperature detection unit in the third embodiment. FIG. 25 is a characteristic diagram illustrating temperature characteristics in the temperature detection unit of the third embodiment. FIG. 26 is a characteristic diagram showing temperature characteristics in the temperature detection unit of the third embodiment (when the resistance value becomes larger than the set value).

  The semiconductor device 1 having the temperature detection function of the first embodiment shown in FIG. 1 includes an internal circuit 16 and a switching control circuit 15 that switches the operating state of the internal circuit 16. Furthermore, a voltage bias unit 11 including a reference unit 13 and a regulator unit 14 and a temperature detection unit 12B biased by a bias voltage VB + from the regulator unit 14 are provided.

  The reference unit 13 is a component that is supplied with power from an external power supply voltage supplied from the outside or an internal step-down power supply that is stepped down from the external power supply voltage and outputs the reference voltage vref. The output reference voltage vref is stably output with respect to power supply voltage fluctuations, and is output as a voltage having a small temperature dependency or a predetermined temperature dependency.

  The regulator unit 14 is a component that outputs a bias voltage VB + with respect to an input reference voltage vref. When the reference voltage vref from the reference unit 13 is insufficient to drive the temperature detection unit 12B at the subsequent stage, the reference voltage vref is provided to ensure sufficient driving capability. In addition to a buffer type configuration in which the bias voltage VB + is output at the same voltage as the reference voltage vref, a level shift type configuration in which the voltage level is converted from the reference voltage vref by resistance voltage division or the like and output can also be employed. Based on the fact that the reference voltage vref is a stable voltage, the bias voltage VB + is also output as a stable predetermined voltage.

  The temperature detector 12 </ b> B is a component that detects a predetermined temperature within the operating temperature range of the semiconductor device 1. By being biased by the bias voltage VB + having a stable predetermined voltage, the predetermined temperature can be detected stably. The detection result of the predetermined temperature is output to the switching control circuit 15 as detection signals TDOUT1 and TDOUT2. Since the temperature detector 12B detects two temperatures as described later, two types of detection signals TDOUT1 and TDOUT2 are output as detection results of the respective temperatures.

  Here, in order to detect a stable predetermined temperature, it is preferable that the bias voltage VB + to the temperature detection unit 12B maintains a stable predetermined voltage. That is, in addition to the fact that the DC characteristics are stable at a predetermined voltage, the power supply voltage or the ground voltage fluctuation caused by the circuit operation in the semiconductor device 1 can be maintained at the predetermined voltage without causing voltage fluctuation. It is preferable that it is stable. Therefore, it is effective to provide a low-pass filter and a capacitive element at an appropriate position on the supply path of the bias voltage VB + and the reference voltage vref so as to absorb transient noise caused by the transient response of the internal circuit. is there.

  As another method for suppressing the transient noise, it is also effective to provide the bias voltage VB + to the temperature detection unit 12B and the ground voltage separately from the supply path to other internal circuits. At this time, if a low-pass filter or a capacitive element is connected to the branch point of the supply path, transient noise generated in other internal circuits is absorbed at the branch point. It is preferable.

  The switching control circuit 15 that has received the detection signals TDOUT1 and TDOUT2 from the temperature detection unit 12B outputs a control signal for switching the operation state of the internal circuit 16 in accordance with the detection signals TDOUT1 and TDOUT2. Here, as the switching of the operation state in the internal circuit 16, for example, in a high temperature region, driving is performed by increasing the number and size of the constituent transistors of the drive circuit in order to enhance the drive capability of the critical path in the internal circuit 16. It may be possible to strengthen the ability. Thereby, the operation speed tACCESS of the critical path can be improved. In the low temperature region, conversely, it is conceivable to limit the driving capability of the critical path. Thereby, the consumption current IDD in the internal circuit 16 can be reduced.

  In the optimization example according to the temperature of the operation characteristic in the semiconductor device 1 of the first embodiment shown in FIG. 2, the temperature characteristic of the consumption current IDD and the operation speed tACCESS is illustrated as a representative example of the operation characteristic. In FIG. 2, two predetermined temperatures tx1 and tx2 are detected by the temperature detector 12B, and the operation state of the internal circuit 16 is switched at the respective temperatures tx1 and tx2.

  The first predetermined temperature tx1 is a setting for improving the current consumption IDD guaranteed at the minimum value tmin in the operating temperature range. The switching control circuit 15 outputs a control signal so as to limit the driving capability of the critical path in the internal circuit 16 by the detection signal TDOUT1 that detects that the detected temperature is equal to or lower than the first predetermined temperature tx1. Since the driving capability is limited below the first predetermined temperature tx1, the current consumption IDD is reduced and the characteristic guarantee value is improved. Note that the operating speed tACCESS shifts in the direction of deterioration by limiting the driving capability, but this does not pose any problem as long as the shift amount is within the range of the guaranteed characteristic value.

  Further, the second predetermined temperature tx2 is a setting for improving the operation speed tACCESS guaranteed by the maximum value tmax in the use temperature range. The switching control circuit 15 outputs a control signal so as to enhance the driving capability of the critical path in the internal circuit 16 by the detection signal TDOUT2 that detects that the detected temperature is equal to or higher than the second predetermined temperature tx2. At the second predetermined temperature tx2 or higher, the driving capability is strengthened, so that the operation speed tACCESS is increased and the characteristic guarantee value is improved. Note that the current consumption IDD shifts in the direction of increase by strengthening the driving capability, but there is no problem if this shift amount is within the range of the guaranteed characteristic value.

  In the semiconductor memory 2 having the temperature detection function of the second embodiment shown in FIG. 3, instead of the switching control circuit 15 and the internal circuit 16 in the semiconductor device 1 of the first embodiment, a configuration unique to the semiconductor memory device 2 is provided. , A refresh control circuit 25 and a memory cell 26 are provided. Further, a temperature detection unit 12A is provided instead of the temperature detection unit 12B. In addition, about the component same as the component in 1st Embodiment, the same code | symbol is attached | subjected and there exists the same effect | action and effect, and description here is abbreviate | omitted.

  Similar to the temperature detector 12B, the temperature detector 12A is a component that detects a predetermined temperature within the operating temperature range of the semiconductor memory device 2. By being biased by the bias voltage VB + having a stable predetermined voltage, the predetermined temperature can be detected stably. The detection result of the predetermined temperature is output to the refresh control circuit 25 as a detection signal TDOUT. Note that the temperature detector 12A detects the temperature of one point as will be described later.

  Upon receiving the detection signal TDOUT from the temperature detector 12A, the refresh control circuit 25 refreshes with the detection signal TDOUT in order to obtain a stable data retention characteristic with respect to the data retention time tST indicating the negative temperature characteristic in the memory cell 26. A control signal for switching the cycle tREF is output.

  FIG. 4 shows an optimization example according to the temperature of the refresh cycle tREF in the semiconductor memory device 2 of the second embodiment. In FIG. 4, the refresh cycle tREF is digitally switched at a predetermined temperature tx0 within the use temperature range. As a result, the refresh cycle tREF can be set longer in the use temperature range below the predetermined temperature tx0 while keeping the fresh cycle tREF in a short cycle in the use temperature range above the predetermined temperature tx0 ((II) in FIG. 4). Yes ((I) in FIG. 4).

  The refresh cycle tREF is switched by switching the oscillation cycle of an oscillation circuit such as a ring oscillator provided in the refresh control circuit 25 by the detection signal TDOUT from the temperature detection unit 12A. The refresh cycle tREF can be set longer in accordance with the data holding time tST of the memory cell 26 that becomes longer in the low temperature region, and the current consumption IDD is reduced in the low temperature region, which is guaranteed at the minimum value tmin in the operating temperature range. The consumption current IDD can be improved.

  As a specific example of temperature switching, a semiconductor memory 2 whose operating temperature range is 0 ° C. to 90 ° C. (tmin = 0 ° C., tmax = 90 ° C.) is considered. For example, if 50 ° C. is set as the predetermined temperature tx0 for switching the refresh cycle tREF (tx0 = 50 ° C.), at a temperature of about 40 ° C. or less which is a normal use temperature in a system such as a portable device incorporating the semiconductor memory 2, The refresh cycle tREF is set to a long cycle. Thereby, in addition to the minimum value tmin (= 0 ° C.) of the use temperature range, the current consumption IDD can be reduced even in the normal use temperature range. It is possible to reduce the current consumption in the normal use temperature range, which contributes to a long continuous use time in a battery-driven portable device or the like.

  FIG. 5 shows a first modification A of the first and second embodiments. The temperature detectors 12A and 12B of the first and second embodiments are configured to operate the temperature detectors 12A and 12B by applying the applied voltage bias VB + to the ground voltage. For this reason, the voltage bias VB + is required to have a stable voltage output against power supply voltage fluctuations and transient noise, and has to have a slight temperature dependency or a predetermined temperature dependency. On the other hand, the temperature detection unit 22 of the first modification A is configured to supply the bias voltage VB− instead of the ground voltage to the negative power supply side in addition to the bias voltage VB + to the positive power supply side.

  In the first modification A, instead of the voltage bias unit 11 including the reference unit 13 and the regulator unit 14 in the first and second embodiments, a voltage bias including a reference unit 23 and two sets of regulator units 24U and 24L. The unit 21 is provided. Further, a temperature detection unit 22 is provided instead of the temperature detection units 12A and 12B. The first modified example A can be applied to both the first and second embodiments, and represents the switching control circuit 15 or the refresh control circuit 25 (refresh or switching) as the control circuit 35 as the internal circuit 16 or A memory cell or internal circuit 36 is provided as a representative of the memory cell 26. The switching control of the internal circuit 36 by the switching control circuit 35 and the refresh control of the memory cell 36 by the refresh control circuit 35 have the same operations and effects as in the first and second embodiments. Description is omitted.

  The reference unit 23 is supplied with power from an external power supply voltage supplied from the outside or an internal step-down power supply that is internally stepped down from the external power supply voltage, and outputs two types of reference voltages vref20 and vref05. As will be described later, two types of reference voltages vref20 and vref05 can be generated by resistance voltage division or the like with respect to one reference voltage vref. Accordingly, the difference voltage between the reference voltages has a constant DC voltage difference, and each of the reference voltages vref20 and vref05 has a common-mode characteristic with respect to a transient voltage fluctuation, and thus a constant voltage in a transient response. The difference can be maintained. Moreover, temperature dependence is also equivalent.

  Further, the regulator units 24U and 24L output a positive power supply side bias voltage VB + and a negative power supply side bias voltage VB− for each of the two types of input reference voltages vref20 and vref05.

  The configuration for ensuring the driving capability and the driving capability by the regulator units 24U and 24L, and the voltage stability of the reference voltages vref20 and vref05 and the bias voltages VB + and VB− are first and second implementations. This is the same as the case of the embodiment, and the description here is omitted.

  In the temperature detector 22, the bias voltage VB + is supplied to the positive power supply side, and the bias voltage VB− is supplied to the negative power supply side. Since the difference voltage between the reference voltages vref20 and vref05 has a constant voltage difference in both direct current and transient response, the difference voltage between the bias voltages VB + and VB− generated from the reference voltages vref20 and vref05 is DC and transient. In response, the voltage can be a predetermined voltage having a constant voltage difference regardless of temperature. Accordingly, a constant and predetermined voltage is always applied to the temperature detection unit 22, and the predetermined temperature can be detected stably. The detection result of the predetermined temperature is output to the control circuit 35 as a detection signal TDOUT (refresh or switching). The slight or predetermined temperature dependency required in the voltage bias unit 11 in the first and second embodiments is not necessary, and the bias voltages VB + and VB− can be generated more easily.

  In order to stabilize the bias voltages VB + and VB−, measures such as providing a low-pass filter and a capacitive element and providing a supply path for supplying the bias voltages VB + and VB− only to the temperature detection unit 22 are the first. And it can apply similarly to the case of 2nd Embodiment.

  FIG. 6 shows a second modification B of the first and second embodiments. In the second modification B, instead of the voltage bias unit 11 including the reference unit 13 and the regulator unit 14 in the first and second embodiments, a voltage bias including the reference unit 13 and two sets of regulator units 42 and 43 is provided. A portion 41 is provided.

  The second modification B includes a regulator unit 42 that is separate and independent from the regulator unit 43 that supplies a bias voltage to the memory cell or the internal circuit 36 among the two sets of regulator units 42 and 43, and includes a temperature detection unit. The bias voltage VB + is supplied exclusively to 12A or 12B. Thereby, there is no possibility that transient noise due to the operation of the memory cell or the internal circuit 36 is mixed into the bias voltage VB + to the temperature detection unit 12A or 12B, and a stable bias voltage VB + can be applied. The regulator unit 42 has the same configuration as the regulator unit 14. Moreover, it can replace with the regulator part 42 and temperature detection part 12A, 12B, and can also be set as the structure provided with the regulator parts 24U and 24L and the temperature detection part 22. FIG.

  In addition, about another structure, an effect | action and an effect, it is the same as that of the case in 1st and 2nd embodiment, and description here is abbreviate | omitted.

  Next, specific examples for each component in the first and second embodiments and the first and second modifications will be described.

  In the specific example of the reference unit 13 shown in FIG. 7, a current adjustment resistor element R1 includes a NMOS transistor MN1 connected between a ground voltage and a source terminal, and a diode-connected NMOS transistor MN2. A first current mirror circuit is connected to a second current mirror circuit composed of PMOS transistors MP1 and MP2 that are connected so that current feedback is applied. The bias current determined by this feedback system flows from the other PMOS transistor MP3 constituting the second current mirror circuit to the diode-connected PMOS transistor MP4, and the reference voltage vref is output from the connection point.

  In the reference unit 13 of FIG. 7, the reference voltage vref is changed by changing the current mirror ratio of the first current mirror circuit and adjusting the bias current value according to the resistance value of the resistance element R1. Further, due to the difference in temperature dependency in the device characteristics of the PMOS / NMOS transistor, the temperature dependency varies depending on the bias current value. This characteristic is shown in FIG. There is a bias current value that balances the temperature dependence between the devices and cancels the temperature dependence of the reference voltage vref, and the resistance value of the resistance element R1 at this time is R1 = Rx.

  On the low resistance side (the side on which a larger bias current flows) from R1 = Rx, the dependency of the reference voltage vref on the resistance value R1 is relatively large, but has a positive dependency on the temperature. This is preferable for guaranteeing operating characteristics at the end of the operating temperature range (minimum value: tmin, maximum value: tmax). That is, in the semiconductor device 1, the semiconductor memory 2, and the like, bias voltages of various internal circuits are configured based on the reference voltage vref, and the current consumption IDD is reduced by reducing the reference voltage vref in a low temperature region. This is because the operation speed tACCESS can be improved by boosting the reference voltage vref in a high temperature region. Therefore, this temperature characteristic region is generally used as a normal bias voltage.

  On the other hand, on the high resistance side (side where a smaller bias current flows) from R1 = Rx, the temperature dependence of the reference voltage vref with respect to the temperature is reversed, but the dependence on the resistance value R1 becomes small, and the resistance element R1 varies. A relatively constant voltage can be obtained. By appropriately adjusting the temperature dependency in the device characteristics of the PMOS / NMOS transistor to suppress the temperature dependency in this bias current region, a constant reference voltage vref having a small temperature dependency can be output. .

  Further, the temperature direction in which the deviation of the predetermined temperature to be detected in the temperature dependency in either the low resistance side or the high resistance side from R1 = Rx has a margin with respect to the temperature range in which the operating state or the refresh cycle should be switched. In the case of the deviation, the reference voltage vref can be output as a voltage having a predetermined temperature dependency. As a specific example, in the switching of the refresh cycle in which the data retention characteristic on the high temperature side is rate-limiting, if the temperature to be switched shifts to the low temperature side, it corresponds to a marginal temperature shift (see FIG. 4). If a region on the low resistance side or the high resistance side is selected from R1 = Rx in combination with the circuit configuration of the temperature detection units 12A and 12B, a stable switching operation can be realized against variations in temperature characteristics. it can.

  In the specific example of the voltage bias unit 21 illustrated in FIG. 9, the specific example in FIG. 7 is referred to as a reference unit A (13), and further includes a reference unit B (13 B), and the reference voltage vref from the reference unit A (13) is 2 A reference unit 23 that generates various types of reference voltages vref20 and vref05 is configured. The reference voltages vref20 and vref05 respectively generate two types of bias voltages VB + and VB− via the regulator unit U / L (24U / 24L).

  In the specific example of the reference portion B (13B) shown in FIG. 10, a resistor element array 51 having a plurality of resistor elements is connected from a voltage source via a PMOS transistor MP5. In this configuration, the amplifier A1 controls the gate terminal of the PMOS transistor MP5 so as to control the predetermined position of the resistor element array 51 to the reference voltage vref. By controlling the predetermined position of the resistor element array 51 to the reference voltage vref, two types of reference voltages vref20 and vref05 can be output from appropriate positions of the resistor element array 51.

  11 and 12 are specific examples of the regulator unit U (24U) and the regulator unit L (24L), respectively. FIG. 11 is also a specific example of the regulator unit 14. In FIG. 11, the bias voltage VB + having the same voltage as the reference voltage vref20 is output while controlling the PMOS transistor MP6 connected to the voltage source by the amplifier A2. In FIG. 12, a bias voltage VB− having the same voltage as the reference voltage vref05 is output while controlling the NMOS transistor MN3 connected to the voltage source via the resistance element R2 by the amplifier A3. Both are buffer circuits that reinforce the drive capability while maintaining the voltage values of the reference voltages vref20 and vref05.

  FIG. 13 specifically shows the circuit configuration of the amplifier A2 for the regulator units 14 and 24U of FIG. A differential input stage of NMOS transistors MN4 and MN5 is configured with an active load composed of PMOS transistors MP7 and MP8. Further, a bias current is supplied by the NMOS transistor MN6 whose gate terminal is biased by the reference voltage vref.

  In FIG. 14, the specific example of temperature detection part 12A, 22 is shown. A positive temperature characteristic unit UP1 that connects the diode element D1 and the resistance elements RA and RB, and the resistance element R3 and the diode element D2 are connected from the bias voltage VB + on the positive power supply side to the bias voltage VB− on the negative power supply side. Negative temperature characteristic portion DN1. A terminal nu having a positive temperature characteristic voltage Vnu and a negative temperature characteristic voltage Vnd from between the resistance elements RA and RB of the positive temperature characteristic part UP1 and between the resistance element R3 and the diode element D2 of the negative temperature characteristic part DN1. And nd are connected to the input terminal of the comparator A4. A temperature detection signal TDOUT is output from the comparator A4. Here, for the temperature detection unit 12A, the bias voltage VB− is the ground voltage, and for the temperature detection unit 22, it is the bias voltage VB− from the regulator unit 24L. In either case, the voltage difference VB is applied to the output voltages of the positive temperature characteristic part UP1 and the negative temperature characteristic part DN1.

  As for the temperature detection unit for detecting two or more types of temperatures, such as the temperature detection unit 12B, a positive temperature characteristic unit having an output from an appropriate voltage dividing position obtained by further dividing the resistance elements RA and RB, and It can comprise by further providing a comparator according to the detected temperature number.

  As shown in FIG. 15, the positive temperature characteristic voltage Vnu is a voltage obtained by dividing the voltage obtained by stepping down the forward voltage VF of the diode D1 from the bias voltage VB + of the positive power supply by the resistance elements RA and RB. The negative temperature characteristic voltage Vnd is a voltage obtained by boosting the forward voltage VF of the diode D2 from the bias voltage VB− of the negative power supply. Here, the forward voltage VF has a temperature characteristic of −2 mV / ° C.

  A positive temperature characteristic voltage Vnu set by stepping down the forward voltage VF from the bias voltage VB + shows a positive temperature characteristic obtained by dividing the temperature characteristic of 2 mV / ° C. by the resistance elements RA and RB. On the other hand, the negative temperature characteristic voltage Vnd set by boosting the forward voltage VF from the bias voltage VB− has a negative temperature characteristic of −2 mV / ° C. If the resistance ratio between the resistance elements RA and RB is appropriately adjusted, the voltages Vnu and Vnd can be crossed at a predetermined temperature. As a numerical example, if (VB +) − (VB −) = 2V and VF = 0.7V at a predetermined temperature tx0, the resistance ratio of the resistance elements RA and RB may be set to RA: RB = 6: 7. .

  Here, in the first modification A, since the bias voltages VB + and VB− are supplied as in-phase signals, the characteristics of FIG. 15 are hardly affected by variations in voltage values. When the bias voltage VB− is a ground voltage (in the case of the semiconductor device 1 of the first embodiment and the semiconductor memory 2 of the second embodiment), the negative temperature characteristic voltage Vnd is the forward voltage of the diode D2. Since it is set by boosting with VF, it is not affected by variations in the bias voltage VB + from the voltage bias section 11. On the other hand, since the positive temperature characteristic voltage Vnu is set by stepping down the forward voltage VF from the bias voltage VB +, the bias voltage VB + is little or has a predetermined temperature dependency from the voltage bias units 11 and 41. It is necessary to have a stable supply.

  Consider a case where the bias voltage VB + varies. Assuming that the bias voltage VB− is the ground voltage and there is no variation, the variation in the bias voltage VB + is a variation in the voltage difference VB between the positive / negative temperature characteristic portions UP1 / DN1. In accordance with the variation of the bias voltage VB + toward the negative voltage side, the voltage difference VB also varies toward the negative voltage side, and the positive temperature characteristic voltage Vnu also varies toward the negative voltage side ((F) in FIG. 15). If the bias voltage VB + has a positive temperature characteristic, the voltage difference VB has a positive temperature characteristic accordingly, and the same temperature characteristic appears in the voltage Vnu ((G) in FIG. 15). . Considering the temperature characteristics based on the high temperature region, the characteristics are highly variable on the low temperature side.

  Due to this variation, the temperature tx at which the voltages Vnu and Vnd cross each other shifts from the predetermined temperature tx0 to the high temperature side. In the switching control of the refresh cycle tREF of the semiconductor memory 2, the long cycle refresh cycle tREF is expanded to the high temperature side, and the data retention characteristic of the memory cell 26 is deteriorated. Depending on the setting conditions, the refresh cycle tREF may be longer than the data holding time tST, and data may be lost ((E) in FIG. 4).

This variation is illustrated based on a specific numerical example. From FIG. 14, the voltages Vnu and Vnd are RA: RB = 6: 7,
Vnu = (RB / (RA + RB)) × (VB−VF)
= (7/13) x (VB-VF) (1)
Vnd = VF (2)
If variation of −0.2V occurs with respect to VB = 2V, Vnu ′ = (7/13) × (2-0.2−VF) (3) from the equation (1).
It becomes. From the equations (2) and (3), the cross voltage of the voltages Vnu and Vnd is
(7/13) × (2-0.2−VF) = VF
VF = (1.8 × 7) /20=0.63 (4)
It becomes. Since it is assumed that VF = 0.7 V at the predetermined temperature tx0, the variation in the predetermined temperature tx is as follows from the temperature characteristic of VF (−2 mV / ° C.).
Δtx = tx−tx0 = (630−700) / (− 2) = 35 ° C.
Is required. In contrast to the setting of tx0 = 50 ° C. illustrated in FIG. 4, tx = 85 ° C., and there is no setting margin for tmax = 90 ° C.

  In order to suppress the variation in the predetermined temperature to be detected as described above or to control the variation in the temperature direction with a switching margin for internal operation or the like, the resistance value of the resistance element R1 in the reference unit 13 in FIG. 7 is appropriately set. Thus, by setting a characteristic region (see FIG. 8) having little temperature dependency or having a predetermined temperature dependency, temperature detection can be reliably performed.

  Here, FIGS. 16 and 17 show first and second specific examples in which the diode elements D1 and D2 in the temperature detection units 12A and 22 in FIG. 14 are configured by the semiconductor device 1, the semiconductor memory 2, and the like. In the first and second specific examples, the case of configuring on an N-type substrate is illustrated.

  In the first specific example of FIG. 16, the diode elements D1 and D2 are constituted by a deep diffusion layer and a shallow diffusion layer. The deep diffusion layer constituting the anode terminal uses the P-type well layer 61 separated from the P-type well layer 62 in which the internal circuit is arranged, among the P-type well layers 61 and 62 used for the CMOS device or the like. ing. As the cathode terminal, the N-type diffusion layer 63 of the source / drain layer of the CMOS device formed in the P-type well layer 61 is used. Since the P-type well layer 61 that is separated and independent from the P-type well layer 62 constituting the internal circuit is used, the positive temperature characteristic unit UP1 and the negative temperature characteristic unit that are stable by suppressing the wraparound of noise from the internal circuit are used. DN1 can be configured. Note that the diode elements D1 and D2 can be similarly configured even when the conductivity types of the respective semiconductor layers are reversed.

  In the second specific example of FIG. 17, the case of configuring on an N-type substrate is illustrated. The diode elements D1 and D2 are constituted by an N-type substrate and a P-type diffusion layer. An N-type substrate can be used as a cathode terminal, and an anode terminal can be a P-type diffusion layer 65 that constitutes a source / drain layer of a CMOS device. In order to suppress the influence of noise from the P-type diffusion layer 66 constituting the adjacent internal circuit, an N + type diffusion layer 67 is arranged between the P-type diffusion layer 66 so as to surround the P-type diffusion layer 65. The N + type diffusion layer 67 is biased with a ground voltage or the like as a bias terminal of the N type substrate. It has a function of supplying a stable bias to the cathode terminal of the diode element by absorbing the substrate current from the peripheral circuit, and provides a shield structure from the peripheral circuit. In addition, a diode element can be similarly configured even when the conductivity type of each semiconductor layer is reversed.

  In place of the diode elements D1 and D2, a diode-connected bipolar element or a diode-connected MOS transistor element may be used.

  Next, the effect on the temperature detection units 12A and 22 when the predetermined voltage VB output from the voltage bias units 11, 21, and 41 has a predetermined temperature dependence will be described with reference to FIGS.

  FIG. 18 shows a case where the operating states of the semiconductor device 1, the semiconductor memory 2, and the like are to be changed in a region higher than the predetermined temperature tx0 to be detected ((X) in FIG. 18). For example, in the semiconductor memory 2, it is a temperature region where the refresh cycle tREF should be set short.

  There are two possible temperature dependences in this case. The first is a case where the voltage value of the predetermined voltage VB in the high temperature region is set as a set value, and the negative temperature characteristic based on the set voltage is set as a predetermined temperature dependency. Due to this temperature dependence, the positive temperature characteristic voltage Vnu of the temperature detectors 12A and 22 has a characteristic having a higher voltage value in the low temperature region with reference to the high temperature region ((1) in FIG. 18). As a result, the detected temperature tx (1) shifts to a lower temperature side than the predetermined temperature tx0 and shifts in a temperature direction with a margin with respect to the region (X) where the operating state should be changed.

  The second case is a case where the voltage value of the predetermined voltage VB in the low temperature region is set as a set value, and a positive temperature characteristic based on the set voltage is set as a predetermined temperature dependency. In this case, the positive temperature characteristic voltage Vnu has a higher voltage value in the high temperature region with reference to the low temperature region ((2) in FIG. 18). As a result, the detected temperature tx (2) shifts to a lower temperature side than the predetermined temperature tx0 and shifts in a temperature direction with a margin with respect to the region (X).

  Therefore, if the temperature-dependent variation in the predetermined voltage VB output from the voltage bias units 11, 21, and 41 is within the predetermined temperature dependency range, the detected temperature should change the operating state. (X) does not bite into, and the switching operation by temperature detection can be performed stably.

  FIG. 19 shows a case where the region (X) whose operating state is to be changed is in a lower temperature region than the predetermined temperature tx0 to be detected ((X) in FIG. 19). In this case, by setting the voltage value of the predetermined voltage VB in the low temperature region as a set value and making the negative temperature characteristic a predetermined temperature dependency ((3) in FIG. 19), or the voltage of the predetermined voltage VB in the high temperature region By making the positive temperature characteristic a predetermined temperature dependency with the value as a set value ((4) in FIG. 19), the same operations and effects as in FIG. 18 are obtained.

  Moreover, it can replace with the diodes D1 and D2 which have a negative temperature characteristic in FIG. 14, and can also be set as the structure provided with the pressure | voltage fall part which has a positive temperature characteristic. Also in this case, the same operation and effect can be obtained if the predetermined voltage VB is given the same temperature dependency as in FIGS. Here, as an example of the step-down unit having a positive temperature characteristic, an active load or the like by a MOS transistor can be considered.

Next, a specific example of the refresh control circuit 25 is shown in FIGS.
FIG. 20 shows a first specific example. In this configuration, a control signal REFC is output to the memory cell 26 from an oscillation circuit portion RO in which inverter logic gates are connected in an odd-numbered loop.

  The source terminals of the PMOS transistor and NMOS transistor of each inverter logic gate of the oscillation circuit portion RO are connected to the power supply voltage and the ground voltage via the PMOS transistor (MP configuration transistor) and NMOS transistor (MN configuration transistor), respectively. The drive current of each inverter logic gate of the oscillation circuit portion RO is defined. The drive current is performed by selecting current sources IU1 and IU2 and IL1 and IL2 having different current values by selectors 52 and 53 controlled in accordance with the detection signal TDOUT from the temperature detectors 12A and 22 respectively. In the inverter logic gate, the propagation delay time is controlled according to the drive current, and the switching of the refresh cycle tREF is controlled.

  FIG. 21 shows a second specific example. The oscillation circuit portion RO has the same configuration as that of the first specific example of FIG. In the second specific example, the control of the driving ability for controlling the oscillation period is realized by controlling the power supply voltage. The control voltage Vc is selected by the selector 54 controlled in accordance with the detection signal TDOUT from the temperature detection units 12A and 22, and is connected to the low voltage side terminal of the oscillation circuit portion RO through the buffer circuit A5. The refresh cycle tREF is controlled by controlling the voltage value of the low voltage side terminal of the oscillation circuit portion RO to make the drive power supply voltage variable.

  FIG. 22 shows a third specific example. It has the same configuration as the oscillation circuit portion RO of the first and second specific examples. In the third specific example, the refresh cycle tREF is switched by changing the number of loop stages of the oscillation circuit portion RO by the selector 55 and changing the oscillation cycle. Switching is performed by a detection signal TDOUT from the temperature detection units 12A and 22 input to the selector 55.

  FIG. 23 shows a fourth specific example. A frequency divider circuit in which D-type flip-flops are connected in series is configured, and an oscillation signal from an oscillation circuit (not shown) is input as the first stage input signal φ1. In this configuration, an oscillation signal having a predetermined frequency division ratio is appropriately selected by a selector 56. The selection is performed by the detection signal TDOUT from the temperature detection units 12A and 22 input to the selector 56.

  According to the first and second embodiments described above and these modifications, the temperature detection function is provided according to the temperature dependence of the operating characteristics of the semiconductor device 1 and the like having the temperature detection function. The internal operation or the switching operation of the refresh cycle tREF can be performed at a predetermined temperature tx0 detected by the temperature detectors 12A, 12B, etc. according to the temperature dependency of the charge retention characteristics of the memory cell 26, etc., of the semiconductor memory 2, etc. it can. As a result, internal operation or retention of data such as the memory cell 26 can be performed in a wide operating temperature range (tmin to tmax).

  In particular, in the semiconductor memory 2 or the like, the refresh cycle tREF is set short according to the data holding time tST of the memory cell 26 or the like in the high temperature region, and the refresh cycle tREF is set long in the low temperature region where the data holding time tST is long. Can do. Data can be retained in the high temperature region, and the refresh operation more than necessary in the low temperature region can be suppressed to reduce the current consumption IDD accompanying the refresh operation. In particular, if the predetermined temperature tx0 for switching the refresh cycle tREF is set to be higher than the normal use temperature, the refresh cycle tREF is set longer at the normal use temperature, thereby reducing the current consumption in the normal use state. be able to.

  In the temperature detection unit 22 of the first modification A, the voltage bias VB + is applied to the positive power supply side, the voltage bias VB− is applied to the negative power supply side, and the voltage difference between the positive power supply side and the negative power supply side is predetermined. The voltage VB is maintained. Since the voltage biases VB + and VB− have a DC output characteristic that maintains a predetermined voltage difference and an equivalent and in-phase transient response output characteristic, the voltage between the positive and negative power sources of the temperature detection unit 22 is a predetermined voltage as a DC characteristic. While VB is biased, the voltage difference can be maintained at the predetermined voltage VB in a transient response. Even if the bias voltages VB + and VB− change, the predetermined temperature tx0 to be detected does not change, and a stable temperature can be detected.

  Since the predetermined voltage VB is smaller than the voltage difference between the external power supply voltage and the ground voltage as shown in FIGS. 9 to 12, the voltage fluctuation width is smaller than the allowable voltage fluctuation width in the specifications relating to the external power supply voltage. The temperature detection unit 22 can be biased with a predetermined voltage VB having the above, and fluctuations in the predetermined temperature tx0 to be detected can be further suppressed.

  Further, the bias voltage VB + for biasing the temperature detectors 12A and 12B shown in FIG. 14 may be configured to output a predetermined voltage having a small temperature dependency or a predetermined voltage having a predetermined temperature dependency. Thereby, by defining the temperature dependency of the bias voltage VB + for biasing the temperature detection units 12A and 12B, the detection accuracy of the temperature detection units 12A and 12B can be improved.

  If the predetermined voltage VB is configured to have a predetermined temperature dependency, it can be set in a direction with a margin with respect to the temperature to be detected, and the change in the operation state with the temperature to be detected as a threshold can be reliably ensured. Can be done.

  Reference units 13 and 23 that output reference voltages vref, vref20, and vref05, and regulator units 14, 24U, 24L, and 42 that output bias voltages VB + and VB− generated from the reference voltages vref, vref20, and vref05 are provided. As long as the configuration includes the bias voltages VB + and VB−, the bias voltages VB + and VB− can have equivalent DC characteristics and equivalent and in-phase transient response characteristics.

  Further, according to the specific example of the reference unit 13 shown in FIG. 7, the output voltage vref and the temperature characteristic thereof change according to the resistance value of the resistance element R1, so that if the resistance element R1 is adjusted, the predetermined voltage VB is It can be adjusted to have a slight temperature dependency or a predetermined temperature dependency.

  In addition, if a low-pass filter or a capacitive element is provided in at least one of the supply paths of the bias voltages VB + and VB−, the temperature detection units 12A, 12B, and 22 can be directly or against the voltage fluctuation. Therefore, the fluctuation can be suppressed, and the bias voltage VB to the temperature detection unit 22 can be stabilized.

  As shown in FIG. 14, the temperature detection unit 14 includes a positive temperature characteristic unit UP1 and a negative temperature characteristic unit DN1 whose output characteristics that change depending on the temperature have opposite temperature dependences. By providing the comparator A4 that compares the output values, the predetermined temperature tx0 can be detected by the output signals having opposite characteristics crossing each other.

  The positive temperature characteristic part UP1 and the negative temperature characteristic part DN1 are composed of a diode element D1 and a resistance element RA, RB, and a resistance element R3 and a diode element D2, and the diode elements D1 and D2 are equivalent to each other. If the resistance elements RA, RB, and R3 are further divided and a plurality of output terminals are taken out from an appropriate voltage dividing position, a plurality of temperatures can be detected.

  The diode elements D1 and D2 are formed between the well diffusion layer 61 and the source / drain diffusion layer 63 of the MOS transistor. The well diffusion layer 61 is separated from the well diffusion layer 62 in which the MOS transistor is disposed. Can be configured independently. Further, an N + type diffusion layer which is configured between the substrate layer and the source / drain diffusion layer 65 of the MOS transistor and becomes a shield structure for reducing substrate noise from the outside around the source / drain diffusion layer 65. A configuration having 67 is also possible. Thereby, it is possible to configure the diode elements D1 and D2 in which the noise from the peripheral circuit is prevented. Further, instead of the diode elements D1 and D2, a diode-connected bipolar element or a diode-connected MOS transistor element may be used.

  The temperature detection units 12A and 12B have a configuration in which the negative power supply side is the ground voltage, and have the same functions and effects as the temperature detection unit 22. At this time, if the ground voltage is supplied through a dedicated supply path to the temperature detectors 12A and 12B, it is possible to prevent the noise from the peripheral circuit from wrapping around.

  In the third embodiment shown in FIG. 24, a temperature detection unit 3 in a semiconductor device or semiconductor memory having a temperature detection function is shown. This is a configuration that facilitates correction of the detection result of the temperature detector 3 during the test. In FIG. 24, a detection signal TDOUT50 is a detection signal of a predetermined temperature tx0 (for example, 50 ° C.) desired to be detected during actual operation. The detection signal TDOUT90 is a detection signal of a test temperature (for example, 90 ° C.) during the temperature characteristic test. Dotted lines 71 and 72 are detection signals TDOUT87 and TDOUT93 of temperatures near the test temperature (for example, 87 ° C. and 93 ° C.) during the temperature characteristic test.

  The positive temperature characteristic unit UP2 includes a resistance element group 73 including a plurality of resistance elements instead of the resistance elements RA and RB in the positive temperature characteristic unit UP1. The voltage at each predetermined terminal of the resistor element group 73 is input to each comparator of the comparator group C1 as positive temperature characteristic voltages Vnu50, Vnu90, Vnu87, and Vnu93. At this time, the selection group S1 selects a predetermined terminal from each of the terminals nu2 to nu4, nu10 to 12, nu6 to 8, and nu14 to 16 of the resistance element group 73. The selection group S1 is composed of transfer gates T2 to T4, T10 to T12, T6 to T8, and T14 to T16 made of MOS devices. Selection signals fx <2> and fz <2> are selected for the transfer gates T3, T11, T7, and T15 for selecting a set value for detecting a predetermined temperature in the resistance element group 73, and the set value is positively corrected. The correction signals fx <1> and fz <1> are selected for the transfer gates T2, T10, T6, and T14 that select N, and the transfer gates T4, T12, T8, and T16 that select negative correction are selected. Correction signals fx <3> and fz <3> are selected. Note that the comparison result compared by the comparator group C1 is subjected to inversion of the logic signal, waveform shaping, drive capability, and the like by the inversion buffer group B1, and is output as detection signals TDOUT50, TDOUT90, TDOUT87, and TDOUT93. . Here, the selection / correction signals fx <1> to <3> are low-active signals that are driving signals for PMOS transistors, and the selection / correction signals fz <1> to <3> are driving signals for NMOS transistors. This is a high active signal.

  Hereinafter, two types of correction methods for the predetermined temperature tx0 (for example, 50 ° C.) to be detected by the temperature detection unit 3 will be described. The first method is a method of correcting the detection signal TDOUT90 obtained by detecting a test temperature (for example, 90 ° C.) during the temperature characteristic test. In a normal operation state, the positive temperature characteristic voltage Vnu90 exceeds the negative temperature characteristic voltage Vnd at the test temperature (for example, 90 ° C.), and the detection signal TDOUT90 is logically inverted and outputs a low level signal. However, if the sheet resistance value of the resistive elements constituting the resistive element group 73 is small due to manufacturing variations or the like, the positive temperature characteristic voltage Vnu90 becomes the negative temperature characteristic voltage Vnd even at the test temperature (90 ° C.). Without exceeding, the detection signal TDOUT 90 outputs a high level signal. At this time, if correction is performed by selecting the correction signals fx <1> and fz <1> and selecting the terminal nu10, the positive temperature characteristic voltage Vnu90 rises and the detection signal TDOUT90 is inverted to detect the test temperature. It becomes like this.

  If the sheet resistance value is large, the detection signal TDOUT90 is already a low level signal before reaching the test temperature (90 ° C.). In this case, the signals are sequentially switched from the correction signals fx <1> and fz <1> to the correction signals fx <3> and fz <3> via the selection signals fx <2> and fz <2>. Accordingly, the terminal position of the resistance element group 73 selected by the signal whose detection signal TDOUT90 is inverted to the low level can be set as the correction position.

  The detection of the predetermined temperature tx0 (50 ° C.) is configured by the same resistance partial pressure of the resistance element group 73 as the detection of the test temperature (90 ° C.), so if the same correction as that performed on the detection signal TDOUT90 is performed. The detection signal TDOUT50 is also output correctly. Therefore, the positive temperature characteristic voltage Vnu50 is set to the voltage of the terminal nu4 by the same correction signals fx <3> and fz <3>. Without performing the test at the predetermined temperature tx0 (50 ° C.), the temperature detection at the predetermined temperature (50 ° C.) can be corrected at the same time by the correction by the temperature detection at the test temperature (90 ° C.).

  In the second method, the test temperature (90 ° C.) is detected by using the detection signals TDOUT87 and TDOUT93 in addition to the detection signal TDOUT90. Here, the detection signals TDOUT87 and TDOUT93 are signals that are logically inverted at temperatures near both the high temperature side and the low temperature side with respect to the test temperature (90 ° C.). By correcting so that the output logic levels of the detection signals TDOUT87 and TDOUT93 become opposite logic levels, the detection temperature error from 87 ° C. to 93 ° C. is adjusted with respect to the test temperature (90 ° C.). Further, correction is performed so that the output logic level of the detection signal TDOUT90 is inverted, and adjustment is performed so that accurate temperature detection of the test temperature can be performed.

  These corrections are similarly applied to the detection side of the predetermined temperature tx0 (50 ° C.) that outputs the detection signal TDOUT50, and the test at the test temperature (90 ° C.) is performed without performing the test at the predetermined temperature tx0 (50 ° C.). The correction by the temperature detection can simultaneously correct the temperature detection of the predetermined temperature (50 ° C.).

In addition, the correction to the test temperature is performed after correction between the high temperature side and the low temperature side, and the correction to the test temperature is performed. Further, by adjusting the minute temperature difference between the adjacent temperatures, accurate correction can be performed. Can be done.
Furthermore, it is possible to accurately grasp whether the detection result at the time of detecting the test temperature is shifted in the high temperature side or the low temperature side with respect to the test temperature.

  If the detection portion of the test temperature is activated only during the temperature characteristic test, it becomes inactive during normal use, and there is no possibility that the consumption current IDD will increase.

  25 and 26 show specific examples of temperature characteristics in the temperature detection unit 3. FIG. 25 shows a case where each resistance value of the resistance element group 73 in the positive temperature characteristic part UP2 is at a set value. The output terminal nd of the negative temperature characteristic portion DN1 indicates a fixed negative temperature characteristic voltage Vnd. The output terminal nu of the positive temperature characteristic unit U2 is connected to each terminal nu2 to nu4, nu10 to nu12 of the resistance element group 73 in accordance with the selection by the transfer gates T2 to T4, T10 to T12, T6 to T8, T14 to T16. The voltages nu6 to 8 and nu14 to 16 are output. FIG. 25 shows three types of positive temperature characteristic voltages Vnu. If the selection signals fx <2> and fz <2> are selected, the terminals nu3, nu11, nu7, and nu15 are selected, and the intersection with the negative temperature characteristic voltage Vnd is set as a temperature detection point. At the respective intersections, the logic levels of the detection signals TDOUT50, TDOUT90, TDOUT87, and TDOUT93 are inverted, and temperatures of 50 ° C., 90 ° C., 87 ° C., and 93 ° C. are detected.

  FIG. 26 shows a case where the sheet resistance of the resistance elements constituting the resistance element group 73 is larger than the set value. Since the resistance value of each resistor increases, the voltages of the terminals nu2 to nu4, nu10 to 12, nu6 to 8, and nu14 to 16 of the resistance element group 73 are uniformly increased. With this voltage rise, the intersection of the positive temperature characteristic voltage Vnu and the negative temperature characteristic voltage Vnd at each terminal is uniformly shifted to the low temperature side. For this reason, the temperature detected by each detection signal is shifted to a lower temperature side than the predetermined temperature. In order to eliminate this error, correction signals fx <3> and fz <3> are selected instead of the selection signals fx <2> and fz <2>. Terminals nu4, nu12, nu8, nu16 are selected via transfer gates T4, T12, T8, T16, and all temperature detections (50 ° C., 90 ° C., 87 ° C., 93 ° C.) can be corrected simultaneously. it can.

  According to the third embodiment described above, an error between the test temperature and the detection result can be measured during the temperature characteristic test, and the temperature detection unit can be relatively corrected based on the error amount at this time. The temperature detector can be relatively corrected without performing a temperature detection test at the predetermined temperature tx0. Accordingly, there is no need to newly perform an operation test at the predetermined temperature tx0, and conventionally, the operation temperature range is performed at the maximum value tmax or the minimum value tmin in order to guarantee the operation characteristics in the entire use temperature range (tmin to tmax). This can be done at the same time as the test. The test cost can be reduced by shortening the test time.

  Further, since at least two temperatures having a minute temperature difference selected from the test temperature or a temperature in the vicinity thereof are detected, the test temperature is within the minute temperature difference in a state where the two detection results are mutually contradictory. Since the detection accuracy of the test temperature can be adjusted by adjusting the minute temperature difference, the accuracy of the error amount of the detection result can be adjusted, and the temperature detection unit 3 can be relatively corrected accurately.

  In addition, since at least two temperatures having a minute temperature difference selected from the test temperature or a temperature in the vicinity thereof are detected, whether the detection result is shifted to the high temperature side or the low temperature side with respect to the actual test temperature. Judgment can be made and the correction procedure can be carried out efficiently.

  Further, the detection accuracy of the test temperature is improved by correcting the difference until the detection results of the detection signals TDOUT87 and TDOUT93 contradict each other and then further correcting the difference until the detection result of the detection signal TDOUT90 is inverted. Therefore, the temperature detector 3 can be relatively corrected with high accuracy.

  Further, the same correction amount as the correction amount for the detection error amount of the test temperature in the temperature characteristic test can be corrected as the correction amount of the temperature detection unit 3.

  Further, each of the terminals nu2 to nu4, nu10 to 12, nu6 to 8, nu14 to 16 selectively connected to the positive temperature characteristic voltages Vnu50, Vnu90, Vnu87, and Vnu93 for performing temperature detection is divided by the resistance element group 73. Therefore, the correction amount of the predetermined temperature tx0 can be made equal to the error amount at the test temperature.

  In addition, the test temperature detection part is activated only during the temperature characteristic test. Therefore, the test temperature detection part becomes inactive during normal use and no current is consumed, and the current consumption IDD does not increase.

The present invention is not limited to the first to third embodiments, and it goes without saying that various improvements and modifications can be made without departing from the spirit of the present invention.
For example, in the present embodiment, the temperature detection has been described as one point or two points, but the present invention is not limited to this, and three or more temperature detections can also be performed. It is possible to switch the operating state of the semiconductor device or the like according to temperature detection at three or more points.

  Although the case where the refresh cycle is digitally switched according to the temperature detection has been described, the refresh cycle can be made analog variable by changing the bias current value and the bias voltage value before and after the detected temperature. is there.

  Although the predetermined voltage is a constant value, the present invention is not limited to this, and it is needless to say that the predetermined voltage may vary with a constant allowable voltage width if the circuit configuration permits.

  In the third embodiment, the center position of each terminal of the resistance element group 73 is set as a set value for detection of each temperature, and the positive / negative correction terminals are set before and after that. If it is known in advance, the correction direction can be largely arranged in either direction. It goes without saying that the number of correction terminals can be increased or decreased as necessary.

  In the second method of the third embodiment, the case where the test temperature is detected including the terminals on both sides in addition to the test temperature (90 ° C.) setting terminal is shown, but the present invention is not limited to this. The combination of the detection signal TDOUT90 of the test temperature and the detection signal TDOUT87 of the low temperature side vicinity temperature (87 ° C.) or the detection signal TDOUT93 of the high temperature side vicinity temperature (93 ° C.), or two temperatures of the detection signals TDOUT87 and TDOUT93 The same effect can be achieved by a combination of points. Conversely, if four or more temperature points are used, it is possible to accurately grasp the amount and direction of deviation between the detection result and the actual test temperature at the initial detection of the test temperature.

Here, technical ideas related to the present invention are listed below.
(Supplementary note 1) a temperature detection unit for detecting a predetermined temperature;
A semiconductor having a temperature detection function, comprising: a predetermined voltage having a small temperature dependency or a voltage bias unit that outputs a predetermined voltage having a predetermined temperature dependency in order to bias the temperature detection unit apparatus.
(Appendix 2) The temperature detection unit
A step-down unit connected to the predetermined voltage side and having a step-down characteristic with a negative temperature characteristic;
When performing temperature detection based on an output voltage having a positive temperature characteristic generated through the step-down unit,
When the operating state should be changed above the predetermined temperature to be detected,
The predetermined voltage has a negative temperature characteristic with a voltage value on the high temperature side as a set value, or a positive temperature characteristic with a voltage value on the low temperature side as a set value,
When the operating state should be changed below the predetermined temperature to be detected,
The temperature detection function according to claim 1, wherein the predetermined voltage has a positive temperature characteristic having a voltage value on a high temperature side as a set value, or a negative temperature characteristic having a voltage value on a low temperature side as a set value. A semiconductor device comprising:
(Additional remark 3) The said pressure | voltage fall part contains a diode element, The semiconductor device provided with the temperature detection function of Additional remark 2 characterized by the above-mentioned.
(Supplementary Note 4) The temperature detector
A step-down unit connected to the predetermined voltage side and having a step-down characteristic with a positive temperature characteristic;
When performing temperature detection based on an output voltage having a negative temperature characteristic generated through the step-down unit,
When the operating state should be changed above the predetermined temperature to be detected,
The predetermined voltage has a positive temperature characteristic in which the voltage value on the high temperature side is a set value, or a negative temperature characteristic in which the voltage value on the low temperature side is a set value,
When the operating state should be changed below the predetermined temperature to be detected,
The temperature detection function according to appendix 1, wherein the predetermined voltage has a negative temperature characteristic having a voltage value on a high temperature side as a set value, or a positive temperature characteristic having a voltage value on a low temperature side as a set value. A semiconductor device comprising:
(Supplementary Note 5) The semiconductor device having a temperature detection function according to Supplementary Note 4, wherein the step-down unit includes an active load by a MOS transistor.
(Appendix 6) A temperature detection unit for detecting a predetermined temperature;
A first voltage bias unit that outputs a first voltage that biases the positive power supply side of the temperature detection unit;
A second voltage bias unit that outputs a second voltage stepped down by a predetermined voltage from the first voltage bias unit and biases the negative power supply side of the temperature detection unit;
A semiconductor device having a temperature detection function, wherein the temperature detection unit is biased with the predetermined voltage.
(Supplementary Note 7) The first and second voltage bias units have DC output characteristics that maintain the predetermined voltage as a voltage difference between the first and second voltages, and have equivalent and in-phase transient response output characteristics. A semiconductor device provided with the temperature detection function according to appendix 6, which is provided.
(Additional remark 8) The said predetermined voltage is small compared with the voltage difference between an external power supply voltage and a ground voltage, The semiconductor device provided with the temperature detection function of Additional remark 6 or 7 characterized by the above-mentioned.
(Supplementary Note 9) At least one of the voltage bias unit and the first or second voltage bias unit is
A reference unit for outputting a reference voltage;
The temperature detection function according to any one of appendices 1 to 8, further comprising: a regulator unit that outputs the predetermined voltage or the first or second voltage based on the reference voltage. Semiconductor device.
(Supplementary Note 10) At least one of the voltage bias unit and the reference unit, or at least one of the first voltage bias unit, the second voltage bias unit, and the reference unit,
A first conductivity type MOS transistor;
A resistance element connected to the source terminal of the first conductivity type MOS transistor;
A feedback loop comprising a second conductivity type MOS transistor having a current input terminal connected to the drain terminal of the first conductivity type MOS transistor and a current output terminal connected to the gate terminal of the first conductivity type MOS transistor. And a current mirror circuit constituting
By setting the resistance element of an appropriate resistance value, at least one of the predetermined voltage or the reference voltage, or at least one of the first voltage, the second voltage, or the reference voltage is 10. A semiconductor device having a temperature detection function according to any one of appendices 1 to 9, wherein the semiconductor device is adjusted to have a slight temperature dependency or a predetermined temperature dependency.
(Supplementary Note 11) At least one of the voltage bias unit, the supply path of the predetermined voltage from the first or second voltage bias unit to the temperature detection unit, or the supply path of the first or second voltage A semiconductor device having a temperature detection function according to at least one of Supplementary notes 1 and 10, wherein the semiconductor device includes a low-pass filter or a capacitive element.
(Supplementary Note 12) The temperature detector
A predetermined temperature detector for detecting the predetermined temperature;
A test temperature detector for detecting the test temperature during the temperature characteristic test;
The temperature according to at least one of supplementary notes 1 to 11, further comprising: a correction unit that corrects the predetermined temperature detection unit based on an error amount of a detection result of the test temperature detection unit at the test temperature. A semiconductor device having a detection function.
(Supplementary Note 13) The temperature detection unit
A predetermined temperature detector for detecting the predetermined temperature;
A test temperature detection unit in which the detection temperature during the temperature characteristic test is set to the test temperature, a first vicinity temperature detection unit set to a first vicinity temperature having a minute detection temperature difference on the high temperature side, and a low temperature At least any two of the second vicinity temperature detection parts set to the second vicinity temperature having a minute detection temperature difference on the side,
At the time of detection of the test temperature, at least any two of the at least two detection units are set so that detection results from two detection units at which detection temperatures at both ends are set conflict with each other. A semiconductor device having a temperature detection function according to any one of supplementary notes 1 to 11, further comprising: a correction unit that corrects the predetermined temperature detection unit based on an equivalent amount of correction for each of the first to second components.
(Supplementary Note 14) The test temperature detection unit, the first neighborhood temperature detection unit, and the second neighborhood temperature detection unit,
By detecting the test temperature, an equivalent amount of correction performed on the test temperature detection unit and the first and second neighboring temperature detection units is:
A first correction for correcting a difference until the detection results from the first and second neighboring temperature detection units conflict;
The supplementary note 13 includes a second correction that corrects a difference until the detection result from the test temperature detection unit is reversed after the detection results from the first and second neighboring temperature detection units conflict. A semiconductor device having the temperature detection function described.
(Additional remark 15) The said correction | amendment part performs the correction amount equivalent to the error amount with respect to the said test temperature detection part or the said at least any two detection part to the said predetermined temperature detection part, The additional remark 12 thru | or 12 characterized by the above-mentioned. 14. A semiconductor device comprising the temperature detection function according to at least any one of 14.
(Supplementary Note 16) The predetermined temperature detection unit, the test temperature detection unit, the first neighborhood temperature detection unit, and the second neighborhood temperature detection unit,
A resistive element group to which a voltage having temperature dependence is applied;
15. A semiconductor device having a temperature detection function according to any one of appendices 12 to 14, further comprising a selection unit that selects a predetermined voltage dividing position divided by the resistance element group.
(Supplementary Note 17) The correction unit
18. The semiconductor device having a temperature detection function according to appendix 16, further comprising a correction selection unit that selects an adjacent partial pressure position adjacent to the predetermined partial pressure position.
(Additional remark 18) The said test temperature detection part, the said 1st vicinity temperature detection part, and the 2nd vicinity temperature detection part are activated only at the time of a temperature characteristic test, At least any one of Additional remarks 12 thru | or 14 characterized by the above-mentioned. A semiconductor device having the temperature detection function according to the item.
(Supplementary note 19) The temperature detection unit
First and second circuits connected between the predetermined voltage and the ground voltage, or between the first voltage and the second voltage, and whose output characteristics varying with temperature have temperature dependence opposite to each other; ,
A semiconductor device having a temperature detecting function according to any one of appendices 1 to 18, further comprising a comparator for comparing output values of the first and second circuits.
(Supplementary Note 20) The first circuit includes:
A first circuit unit connected to the predetermined voltage or the first voltage and having temperature dependence;
A first resistance element group connected to the ground voltage or the second voltage;
The connection point between the first circuit unit and the first resistance element group is configured as an output terminal,
The second circuit is connected to the ground voltage or the second voltage, and has a temperature dependency in the same direction as the first circuit unit;
A second resistance element group connected to the predetermined voltage or the first voltage,
20. The semiconductor device having a temperature detection function according to appendix 19, wherein a connection point between the second circuit unit and the second resistance element group is configured as an output terminal.
(Supplementary note 21) The semiconductor device having a temperature detection function according to supplementary note 20, wherein the resistance element group in Supplementary note 16 or 17 is at least one of the first or second resistance element group .
(Supplementary note 22) The semiconductor device having the temperature detection function according to supplementary note 19 or 20, wherein the ground voltage is supplied by a dedicated supply path to the temperature detection unit.
(Supplementary note 23) The first and second circuit units are provided with a temperature detection function according to supplementary note 20, which is a diode element, a diode-connected bipolar element, or a diode-connected MOS transistor element. Semiconductor device.
(Supplementary Note 24) The diode element is formed between a well diffusion layer and a source / drain diffusion layer of the MOS transistor, and the well diffusion layer is separated and independent from the well diffusion layer in which the MOS transistor is disposed. 24. A semiconductor device having a temperature detection function according to appendix 23, which is configured.
(Supplementary Note 25) The diode element is configured between a substrate layer and a source / drain diffusion layer of a MOS transistor, and suppresses the influence of external substrate noise around the source / drain diffusion layer. 24. A semiconductor device having a temperature detection function according to appendix 23, wherein the semiconductor device has a shield structure.
(Supplementary Note 26) The semiconductor device is a semiconductor memory device,
26. The temperature detection function according to claim 1, further comprising: a refresh cycle control unit that switches a refresh operation cycle according to the predetermined temperature detected by the temperature detection unit. Semiconductor device.
(Supplementary Note 27) The refresh cycle control unit sets the refresh operation cycle to be shorter when the temperature is higher than the predetermined temperature or higher than the predetermined temperature, and sets the cycle of the refresh operation when the temperature is lower than the predetermined temperature or lower than the predetermined temperature. 27. A semiconductor device provided with the temperature detection function according to appendix 26, which is set to be long.
(Supplementary Note 28) A test temperature detection step of detecting a test temperature at the time of a temperature characteristic test,
An error measurement step of measuring an error amount of the detection result with respect to the test temperature;
A test method for a semiconductor device having a temperature detection function, comprising: a correction step of correcting a temperature detection unit that detects a predetermined temperature based on the measured error amount.
(Supplementary Note 29) During temperature characteristic test, detection of test temperature, detection of first near temperature having a minute detection temperature difference on the high temperature side with respect to the test temperature, and second detection having a minute detection temperature difference on the low temperature side A test temperature detection step for detecting at least any two types of detection of the vicinity temperature;
An error measurement step of measuring, as a detection error, a difference until the detection results of both end temperatures of the at least one of the two types of detection conflict;
A test method for a semiconductor device having a temperature detection function, comprising: a correction step of correcting a temperature detection unit that detects a predetermined temperature based on the measured error amount.
(Supplementary Note 30) In the test temperature detection step, the test temperature is detected, the first vicinity temperature is detected, and the second vicinity temperature is detected.
The error measurement step includes
A first error measurement step of measuring a difference until the detection results of the first and second neighboring temperatures are contradictory as detection errors;
(Supplementary note 29) including a second error measurement step of measuring, as a detection error, a difference until the detection result of the test temperature is reversed after the detection results of the first and second neighboring temperatures conflict. A test method of a semiconductor device having the temperature detection function described.
(Additional remark 31) At the said correction process, correction | amendment of the amount equivalent to the error amount measured by the said error measurement process is performed to the said temperature detection part, At least any one of Additional remarks 28 thru | or 30 characterized by the above-mentioned. A test method of a semiconductor device having a temperature detection function.
(Supplementary Note 32) The correction in the correction step is performed by selecting an appropriate voltage dividing position from a resistor element group that is included in the temperature detection unit and to which a voltage having temperature dependency is applied. A test method for a semiconductor device having the temperature detection function according to at least one of appendices 28 to 30.
(Supplementary Note 33) A refresh control method for a semiconductor memory device having a temperature detection function, wherein the refresh operation cycle is switched in accordance with a detected temperature detected by a temperature detection unit.
(Supplementary Note 34) When the detected temperature is equal to or higher than the predetermined temperature or higher than the predetermined temperature, the cycle of the refresh operation is set short.
34. A semiconductor memory device having a temperature detection function according to appendix 33, wherein when the detected temperature is lower than or lower than the predetermined temperature, the cycle of the refresh operation is set longer. Refresh control method.

  To achieve the above object, a semiconductor device having a temperature detection function according to appendix 6 includes a temperature detection unit that detects a predetermined temperature, and a first voltage that outputs a first voltage that biases the positive power supply side of the temperature detection unit. A voltage bias unit; and a second voltage bias unit that outputs a second voltage that is stepped down by a predetermined voltage from the first voltage bias unit and biases the negative power supply side of the temperature detection unit. It is characterized by biasing.

  In the semiconductor device having the temperature detection function of Appendix 6, the first voltage is applied to the positive power supply side of the temperature detection unit, the second voltage is applied to the negative power supply side, and the voltage difference between the positive power supply side and the negative power supply side Is maintained at a predetermined voltage.

  At this time, in addition to the DC output characteristic that maintains a predetermined voltage as the voltage difference between the first and second voltages, a transient response output characteristic that is equivalent and in phase may be provided.

  As a result, the first voltage applied to the positive power supply side of the temperature detection unit and the second voltage applied to the negative power supply side maintain a voltage difference of a predetermined voltage. Between the negative power sources, a predetermined voltage is biased as a direct current characteristic, and a voltage difference of the predetermined voltage can be maintained as a transient response characteristic. A predetermined voltage is always biased between the positive and negative power sources of the temperature detector, and a stable temperature can be detected without fluctuation of the predetermined temperature to be detected due to fluctuations in the bias voltage.

  The predetermined voltage is preferably smaller than the voltage difference between the external power supply voltage and the ground voltage. As a result, the temperature detection unit can be biased with a predetermined voltage in which the voltage fluctuation range is suppressed as compared with the allowable voltage fluctuation range in the specifications relating to the external power supply voltage. It is possible to further suppress fluctuations in the predetermined temperature to be detected.

  As another means, a semiconductor device having a temperature detection function includes a temperature detection unit that detects a predetermined temperature, and a predetermined voltage or a predetermined temperature that has little temperature dependence in order to bias the temperature detection unit. It is good also as a structure provided with the voltage bias part which outputs the predetermined voltage which has dependence. Thus, by defining the temperature dependence of the predetermined voltage for biasing the temperature detection unit, the detection accuracy of the temperature detection unit can be improved.

  In addition, the temperature detection unit includes a step-down unit that is connected to a predetermined voltage side and has a step-down characteristic with a negative temperature characteristic, and is based on an output voltage having a positive temperature characteristic generated through the step-down unit. When detecting, if the operating state should be changed above the temperature to be detected, the predetermined voltage is set to the negative temperature characteristic with the voltage value on the high temperature side as the set value or the voltage value on the low temperature side as the set value. If the operating state should be changed below the temperature to be detected, the predetermined voltage is the positive temperature characteristic with the voltage value on the high temperature side as the set value, or the voltage value on the low temperature side. It is good also as a structure which has the negative temperature characteristic which uses as a setting value. Here, the step-down unit preferably includes a diode element.

  Further, the temperature detection unit includes a step-down unit connected to the predetermined voltage side and having a step-down characteristic having a positive temperature characteristic, and performs temperature detection based on an output voltage having a negative temperature characteristic generated via the step-down unit. When the operating state should be changed above the temperature to be detected, the predetermined voltage is a positive temperature characteristic having a voltage value on the high temperature side as a set value, or a negative voltage having a voltage value on the low temperature side as a set value. If the operating state should be changed below the temperature to be detected, the predetermined voltage must be set to the negative temperature characteristic with the voltage value on the high temperature side as the set value or the voltage value on the low temperature side as the set value. It is good also as a structure which has a positive temperature characteristic. Here, the step-down unit preferably includes an active load by a MOS transistor.

  Accordingly, the predetermined temperature can be set in a temperature direction with a margin with respect to the temperature to be detected according to the temperature characteristics of the voltage bias unit and the step-down unit in the temperature detection unit. It is possible to reliably change the operating state as the threshold value.

  In addition, at least one of the voltage bias unit and the first or second voltage bias unit outputs a predetermined voltage or the first or second voltage based on the reference unit that outputs the reference voltage and the reference voltage. It can also be set as a structure provided with a regulator part. Thus, the predetermined voltage, or the first or second voltage is generated from the reference voltage, so that the voltage bias unit having the same DC characteristics and the equivalent and in-phase transient response characteristics, or the first or second voltage bias unit. Can be configured.

  In addition, at least one of the voltage bias unit and the reference unit, or at least one of the first voltage bias unit, the second voltage bias unit, and the reference unit is the first conductivity type MOS transistor, and the first The resistor element is connected to the source terminal of the conductive MOS transistor and the second conductive MOS transistor. The current input terminal is connected to the drain terminal of the first conductive MOS transistor, and the current output terminal is the first. And a current mirror circuit connected to the gate terminal of the conductive MOS transistor to form a feedback loop. Since the output voltage and its temperature characteristics change according to the resistance value of the resistance element, if a resistance element having an appropriate resistance value is set, at least one of the predetermined voltage and the reference voltage, the first voltage, the first voltage, At least one of the two voltages or the reference voltage can be adjusted to have a slight temperature dependency or a predetermined temperature dependency.

  In addition, at least one of a voltage bias unit, a predetermined voltage supply path from the first or second voltage bias unit to the temperature detection unit, and a first or second voltage supply path is a low-pass filter or a capacitor. It is preferable to provide an element. Thereby, even if the voltage fluctuation is input from the supply path of the predetermined voltage or the first or second voltage, the voltage fluctuation can be suppressed directly or via the temperature detection unit. The bias voltage can be stabilized.

  The semiconductor device having a temperature detection function according to appendix 12 is the semiconductor device having the temperature detection function according to at least one of appendices 1 to 11, and the temperature detection unit detects a predetermined temperature. A predetermined temperature detection unit; a test temperature detection unit that detects a test temperature during a temperature characteristic test; and a correction unit that corrects the predetermined temperature detection unit based on an error amount of a detection result of the test temperature detection unit at the test temperature. It is characterized by that.

  In the semiconductor device having the temperature detection function of Supplementary Note 12, an error amount of the detection result with respect to the test temperature at the time of the temperature characteristic test is measured, and a temperature detection unit that detects a predetermined temperature is corrected based on the error amount.

  The semiconductor device having a temperature detection function according to appendix 13 is the semiconductor device having the temperature detection function according to at least one of appendices 1 to 11, wherein the temperature detection unit detects a predetermined temperature. A detection unit, a test temperature detection unit in which the detection temperature at the time of the temperature characteristic test is set to the test temperature, and a first vicinity temperature detection unit set to the first vicinity temperature having a minute detection temperature difference on the high temperature side , And at least any two of the second neighboring temperature detecting parts set to the second neighboring temperature having a minute detected temperature difference on the low temperature side, and at least any one of them when detecting the test temperature Based on the correction of the same amount for each of at least any of the two detection units so that the detection results from the two detection units for which the detection temperatures at both ends of the two detection units are contradictory to each other, the predetermined temperature Inspection Characterized in that it comprises a correcting unit for correcting the parts.

  In the semiconductor device having the temperature detection function according to Supplementary Note 13, when detecting the test temperature during the temperature characteristic test, at least two temperatures selected from the test temperature and the first and second neighboring temperatures sandwiching the test temperature are used. Obtain detection results. Then, the difference until the detection results of the temperature at both ends contradict each other is measured as a detection error, and the temperature detection unit for detecting a predetermined temperature is corrected based on this error amount.

  As a result, the test temperature is detected in a temperature characteristic test that has been performed conventionally, the amount of error from the actual test temperature is measured, and based on this amount of error, the temperature detector that detects the predetermined temperature is Can be corrected automatically. The temperature detector can be corrected relatively without performing the temperature detection test at the predetermined temperature detector or the predetermined temperature to be detected by the temperature detector, reducing the test time and reducing the test cost. can do.

  In addition, in the semiconductor device having the temperature detection function of Supplementary Note 13, since at least two temperatures having a minute temperature difference selected from the test temperature or a temperature in the vicinity thereof are detected, the two detection results are in a mutually contradictory state. The test temperature will be within a minute temperature difference. Since the detection accuracy of the test temperature can be adjusted by adjusting the minute temperature difference, the accuracy of the error amount of the detection result can be adjusted, and the temperature detection unit can be relatively corrected with high accuracy.

  Further, in the semiconductor device having the temperature detection function of Appendix 13, since at least two temperatures having a minute temperature difference selected from the test temperature or a temperature in the vicinity thereof are detected, the detection result is compared with the actual test temperature. It is possible to determine which side is shifted to the high temperature side / low temperature side, and the correction procedure can be performed efficiently.

  In addition, a test temperature detection unit, the first neighborhood temperature detection unit, and the second neighborhood temperature detection unit are provided, and detection results from the first and second neighborhood temperature detection units are contradictory by detecting the test temperature. After the difference until correction is made, the difference until the detection result from the test temperature detection unit is reversed may be further corrected.

  Further, the test temperature, the first neighboring temperature, and the second neighboring temperature are detected in the test temperature detecting step, and the difference until the detection results of the first and second neighboring temperatures are in conflict is detected in the error measuring step. After the measurement, the difference until the detection result of the test temperature is reversed may be measured as a detection error.

  Thereby, after performing the correction | amendment which the detection result in 1st and 2nd vicinity temperature conflicts, it can correct | amend to the position where a test temperature result inverts further. The detection accuracy of the test temperature can be improved, and the temperature detection unit can be relatively corrected with high accuracy.

  Moreover, it is preferable that a correction | amendment part performs the correction amount equivalent to the amount of errors with respect to a test temperature detection part or at least any two detection parts to a predetermined temperature detection part. Further, in the correction step, it is preferable that the temperature detection unit performs a correction equivalent to the error amount measured in the error measurement step. Thereby, the same correction amount as the correction amount for the detection error amount of the test temperature in the temperature characteristic test can be corrected as the correction amount of the predetermined temperature detection unit or the temperature detection unit.

  The predetermined temperature detection unit, the test temperature detection unit, the first neighborhood temperature detection unit, and the second neighborhood temperature detection unit are divided by a resistance element group to which a voltage having temperature dependency is applied and the resistance element group. It is preferable to include a selection unit that selects an appropriate partial pressure position. Moreover, it is preferable that a correction | amendment part is provided with the correction | amendment selection part which selects the adjacent partial pressure position adjacent to a suitable partial pressure position. Thereby, when the temperature to be detected is detected by being converted into a voltage value having temperature dependency, the detection voltage of each detection unit is resistance-divided by the resistance element group and is proportionally proportional to each other. The correction amount of the temperature detection unit can be made equal to the error amount of each detection unit at the test temperature.

  Moreover, it is preferable that the test temperature detector, the first vicinity temperature detector, and the second vicinity temperature detector are activated only during the temperature characteristic test. As a result, the current consumption becomes inactive during normal use and the current consumption is eliminated, so that the current consumption does not increase.

  The semiconductor device having a temperature detection function according to appendix 19 is the semiconductor device having the temperature detection function according to at least one of appendices 1 to 18, wherein the temperature detection unit includes a predetermined voltage and a ground voltage. , Or between the first voltage and the second voltage, and output characteristics of the first and second circuits having output characteristics varying with temperature and having temperature dependence opposite to each other. And a comparator for comparing the values. Thereby, the predetermined temperature can be detected by the output signals having opposite characteristics crossing each other.

  The first circuit includes a first circuit unit connected to the predetermined voltage or the first voltage and having temperature dependency, and a first resistance element group connected to the ground voltage or the second voltage, The connection point between one circuit unit and the first resistance element group is configured as an output terminal, and the second circuit is connected to the ground voltage or the second voltage, and has temperature dependency in the same direction as the first circuit unit. A second circuit unit having a predetermined voltage or a second resistance element group connected to the first voltage, and a connection point between the second circuit unit and the second resistance element group is configured as an output terminal. Is preferred. Thereby, a temperature detection part can be comprised by the 1st and 2nd circuit unit which has the temperature dependence of the same direction, and a 1st and 2nd resistive element group.

  In addition, the resistance element group to which the voltage having temperature dependency provided in the predetermined temperature detection unit, the test temperature detection unit, the first vicinity temperature detection unit, and the second vicinity temperature detection unit is applied is the first or second resistance. It is preferable that at least one of the element groups. Thus, a plurality of temperatures can be detected by extracting a plurality of output terminals from appropriate voltage dividing positions of the first or second resistance element group.

  The ground voltage is preferably supplied through a dedicated supply path to the temperature detection unit. As a result, noise wraparound from the peripheral circuit can be prevented.

  Further, the first and second circuit units can be composed of a diode element, a diode-connected bipolar element, or a diode-connected MOS transistor element.

  The diode element is configured between the well diffusion layer and the source / drain diffusion layer of the MOS transistor, and the well diffusion layer is configured separately from the well diffusion layer in which the MOS transistor is disposed. Is preferred. Also, it is configured between the substrate layer and the source / drain diffusion layer of the MOS transistor, and has a shield structure around the source / drain diffusion layer to suppress the influence of external substrate noise. Also good. As a result, the diode element can be configured using a conventional process for MOS transistors. Furthermore, noise wraparound from the peripheral circuit can be prevented by the separate and independent well diffusion layer and shield structure.

A semiconductor device having a temperature detection function according to appendix 26 is a semiconductor device having the temperature detection function according to at least one of appendices 1 to 25, wherein the semiconductor device is a semiconductor memory device, and the temperature A refresh cycle control unit that switches a refresh operation cycle according to a predetermined temperature detected by the detection unit is provided.
A refresh control method for a semiconductor memory device having a temperature detection function according to attachment 33 is characterized in that the cycle of the refresh operation is switched according to the detected temperature detected by the temperature detection unit.

  In the refresh control method of the semiconductor device having the temperature detection function of appendix 26 and the semiconductor memory device having the temperature detection function of appendix 33, the cycle of the refresh operation is switched according to the temperature detected by the temperature detection unit.

  As a result, the refresh operation can be performed in a cycle adapted to the retention characteristic of the stored charge of the memory cell having temperature dependency, the data can be retained in a wide temperature range, and the refresh operation more than necessary is suppressed, Current consumption associated with the refresh operation can be reduced.

  Further, in the semiconductor device having the temperature detection function according to attachment 27, in the semiconductor device having the temperature detection function according to attachment 26, the refresh cycle control unit has a refresh operation cycle when the temperature is higher than a predetermined temperature or higher than the predetermined temperature. Is set short, and when the temperature is lower than the predetermined temperature or lower than the predetermined temperature, the refresh operation cycle is set longer.

  A refresh control method for a semiconductor memory device having a temperature detection function according to appendix 34 is the refresh control method for a semiconductor memory device having a temperature detection function according to appendix 33, in which the detected temperature is equal to or higher than a predetermined temperature. When the temperature is higher than the temperature, the refresh operation cycle is set short. When the detected temperature is lower than the predetermined temperature or lower than the predetermined temperature, the refresh operation cycle is set longer.

  In the refresh control method of the semiconductor device having the temperature detection function of appendix 27 and the semiconductor memory device having the temperature detection function of appendix 34, the refresh operation cycle is set short when the temperature is higher than the predetermined temperature or higher than the predetermined temperature. When the temperature is lower than the temperature or lower than the predetermined temperature, the refresh operation cycle is set longer.

  Accordingly, in response to the data retention characteristic in which the retention time of the stored charge of the memory cell is shortened as the temperature is increased, the refresh operation cycle is set short in the high temperature region where the data retention time is shortened, and the data retention time is lengthened. The cycle of the refresh operation can be set longer in the low temperature region. Data can be retained in the high temperature region, and the refresh operation more than necessary in the low temperature region can be suppressed to reduce the current consumption accompanying the refresh operation. In particular, if the predetermined temperature for switching the refresh cycle is set higher than the normal use temperature, the refresh cycle is set longer at the normal use temperature, and the current consumption can be reduced in the normal use state. .

It is a circuit block diagram showing a semiconductor device provided with a temperature detection function of a 1st embodiment. It is a characteristic view which shows the temperature characteristic in the semiconductor device of 1st Embodiment. It is a circuit block diagram which shows the semiconductor memory provided with the temperature detection function of 2nd Embodiment. It is a characteristic view which shows the temperature dependence in the refresh control characteristic of the semiconductor memory of 2nd Embodiment. It is a circuit block diagram which shows the 1st modification of 1st and 2nd embodiment. It is a circuit block diagram which shows the 2nd modification of 1st and 2nd embodiment. It is a circuit diagram which shows the specific example of a reference part. It is a characteristic view which shows the output characteristic of the specific example of a reference part. It is a circuit block diagram which shows the specific example of the voltage bias part in a 1st modification. It is a circuit diagram which shows the specific example of the reference part in a 1st modification. It is a circuit diagram which shows the specific example which outputs bias voltage VB + among regulator parts. It is a circuit diagram which shows the specific example which outputs bias voltage VB- among regulator parts. FIG. 12 is a circuit diagram illustrating a specific example of the regulator unit in FIG. 11 at a transistor level. It is a circuit diagram which shows the specific example of a temperature detection part. It is a characteristic view which shows the temperature characteristic in the specific example of a temperature detection part. FIG. 3 is a structural diagram illustrating a first specific example of a diode structure of a temperature detection unit. FIG. 6 is a structural diagram illustrating a second specific example of a diode structure of a temperature detection unit. It is a characteristic view which shows the predetermined temperature dependence in the bias voltage applied to a temperature detection part (when a state change arises in the high temperature side with respect to the detected temperature). It is a characteristic view which shows the predetermined temperature dependence in the bias voltage applied to a temperature detection part (when a state change arises in the low temperature side with respect to the detected temperature). FIG. 3 is a circuit diagram showing a first specific example of a refresh control circuit. It is a circuit diagram which shows the 2nd specific example of a refresh control circuit. It is a circuit diagram which shows the 3rd specific example of a refresh control circuit. It is a circuit diagram which shows the 4th specific example of a refresh control circuit. It is a circuit diagram which shows the temperature detection part in 3rd Embodiment. It is a characteristic view which shows the temperature characteristic in the temperature detection part of 3rd Embodiment. It is a characteristic view which shows the temperature characteristic in the temperature detection part of 3rd Embodiment (when resistance value becomes large with respect to a setting value). It is a characteristic view which illustrates the temperature characteristic of the semiconductor device comprised by the CMOS device. It is a circuit block diagram which shows the refresh control part of the semiconductor memory in a prior art. It is a characteristic view which shows the temperature dependence in the refresh control characteristic of a semiconductor memory.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device provided with temperature detection function 2 Semiconductor memory 11 with temperature detection function 11, 21, 41 Voltage bias part 12A, 12B, 22 Temperature detection part 13, 23 Reference part 14, 24U, 24L, 42, 43 Regulator part 15 switching control circuits 25, 25A, 25B, 25C, 25D, 101
Refresh control circuit 35 (Refresh or switching) control circuit 73 Resistance element group A First modification B Second modification D1, D2 Diode element DN1 Negative temperature characteristic part S1 Selection group UP1, UP2 Positive temperature characteristic part VB +, VB Bias voltage Vnd Negative temperature characteristic voltage Vnu Positive temperature characteristic voltage vref, vref05, vref20
Reference voltage

Claims (2)

A test temperature detection process for detecting a test temperature during a temperature characteristic test;
An error measurement step of measuring an error amount of the detection result with respect to the test temperature;
A test method for a semiconductor device having a temperature detection function, comprising: a correction step of correcting a temperature detection unit that detects a predetermined temperature based on the measured error amount. During temperature characteristic test, detection of test temperature, detection of a first near temperature having a minute detection temperature difference on the high temperature side with respect to the test temperature, and detection of a second near temperature having a minute detection temperature difference on the low temperature side A test temperature detection step of performing at least any two types of detection,
An error measurement step of measuring, as a detection error, a difference until the detection results of both end temperatures of the at least one of the two types of detection conflict;
A test method for a semiconductor device having a temperature detection function, comprising: a correction step of correcting a temperature detection unit that detects a predetermined temperature based on the measured error amount.

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