JP2007019263A - Semiconductor light-emitting device and manufacturing method thereof - Google Patents

Semiconductor light-emitting device and manufacturing method thereof Download PDF

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JP2007019263A
JP2007019263A JP2005199043A JP2005199043A JP2007019263A JP 2007019263 A JP2007019263 A JP 2007019263A JP 2005199043 A JP2005199043 A JP 2005199043A JP 2005199043 A JP2005199043 A JP 2005199043A JP 2007019263 A JP2007019263 A JP 2007019263A
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light emitting
layer
semiconductor light
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emitting device
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Chisato Furukawa
千里 古川
Takafumi Nakamura
隆文 中村
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Toshiba Corp
Toshiba Electronic Device Solutions Corp
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Toshiba Corp
Toshiba Discrete Semiconductor Technology Corp
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<P>PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting device capable of improving light extraction efficiency. <P>SOLUTION: There are provided: an active layer 24 where there are irregularities on a first main surface, and a second main surface opposite to the first one; an n-type cladding layer 25 that is connected to the side of the first main surface where a surface far from the first main surface forms an irregular surface having the same cycle of irregularities as those of the irregular surfaces; a p-type adhesive layer 22 that is connected to the side of the second main surface where a surface far from the second main surface becomes a plane surface substantially; a luminous layer configuration section 20 that can emit light at a specified wavelength; an n-side electrode 41 formed on a surface opposite to the active layer 24 in the n-type cladding layer 25; a p-type GaP substrate 10 that is joined to the adhesive layer 22 at the luminous layer configuration section 20, and substantially transparent to a luminous wavelength; and a p-side electrode 43 formed on a surface opposite to the adhesive layer 22 of the p-type GaP substrate 10. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、光取出し効率の改善を目指す半導体発光素子及び半導体発光素子の製造方法に関する。   The present invention relates to a semiconductor light emitting device aiming at improving light extraction efficiency and a method for manufacturing the semiconductor light emitting device.

近年、表示用等にInGaAlP系材料を用いた可視領域の半導体発光素子が幅広く応用されている。このInGaAlP系材料は、例えば、エピタキシャル成長する活性層の組成をIn0.5(Ga1−XAl0.5P、n型/p型クラッド層の組成をIn0.5(Ga1−YAl0.5Pとした時、XあるいはYを適当に選択することにより、赤色帯から緑色帯の発光が得られる。 In recent years, semiconductor light-emitting elements in the visible region using InGaAlP-based materials for display and the like have been widely applied. In this InGaAlP-based material, for example, the composition of the active layer to be epitaxially grown is In 0.5 (Ga 1 -X Al X ) 0.5 P, and the composition of the n-type / p-type cladding layer is In 0.5 (Ga 1− when the Y Al Y) 0.5 P, by selecting the X or Y appropriately, emitting green band from the red band can be obtained.

表示用等に使用するためには、半導体発光素子をより明るくすることが求められており、それを実現するための提案がなされてきた。より明るい半導体発光素子を得るためには、発光した光を効率よく半導体発光素子の外に取り出す対策が必要である。   In order to use it for display or the like, it is required to make the semiconductor light emitting element brighter, and proposals for realizing it have been made. In order to obtain a brighter semiconductor light emitting device, it is necessary to take measures to efficiently extract emitted light out of the semiconductor light emitting device.

光は、屈折率差のある界面に臨界角以上の角度で入射すると、界面で全反射されてしまうので、その界面の反対側に取り出されることはない。半導体発光素子を囲む外側面を平面で形成すると、半導体発光素子の中で発光した光の一部は、この外側面から外側に取り出されず、光の取出し効率が落ちることになる。   When light is incident on an interface having a difference in refractive index at an angle greater than the critical angle, the light is totally reflected at the interface and is not extracted to the opposite side of the interface. If the outer surface surrounding the semiconductor light emitting element is formed as a flat surface, a part of the light emitted in the semiconductor light emitting element is not extracted from the outer surface to the outside, and the light extraction efficiency is lowered.

これを解決する方法として、n型GaAs基板の表面を凸凹(山と谷)形状とするとともに、この基板上に配置される発光部、すなわち、n型クラッド層、活性層及びp型クラッド層をGaAs基板面上に順次結晶成長してなる構造とし、この発光部を構成する各半導体層の表面形状が、GaAs基板の凸凹形状に対応した凸凹形状となる半導体発光素子が開示されている(例えば、特許文献1参照。)。   As a method for solving this, the surface of the n-type GaAs substrate is made uneven (mountains and valleys), and the light-emitting portion arranged on the substrate, that is, the n-type cladding layer, the active layer, and the p-type cladding layer are formed. There is disclosed a semiconductor light emitting device having a structure in which crystals are sequentially grown on the surface of a GaAs substrate, and the surface shape of each semiconductor layer constituting the light emitting portion is an uneven shape corresponding to the uneven shape of the GaAs substrate (for example, , See Patent Document 1).

この開示された方法では、活性層が凹凸形状を有するため発光面積の増大、及び表面が凹凸形状を有するため光の取出し効率が相対的に高い半導体発光素子が得られる可能性があるが、GaAs基板は可視光に対して吸収が大きいために、発光部(発光層構成部)で発光してGaAs基板を通る光は吸収され、半導体発光素子から外に取り出される割合が落ちるという問題がある。
特開平8−222763号公報(第3頁、図1)
In this disclosed method, there is a possibility that a semiconductor light emitting device having a relatively high light extraction efficiency due to an increase in light emission area due to the active layer having an uneven shape and a relatively high light extraction efficiency due to the surface having an uneven shape may be obtained. Since the substrate absorbs a lot of visible light, there is a problem in that the light emitted from the light emitting portion (light emitting layer constituting portion) and passing through the GaAs substrate is absorbed, and the ratio of the light extracted from the semiconductor light emitting element is reduced.
Japanese Laid-Open Patent Publication No. 8-222276 (page 3, FIG. 1)

本発明は、光取出し効率を向上させることが可能な半導体発光素子及びその製造方法を提供する。   The present invention provides a semiconductor light emitting device capable of improving the light extraction efficiency and a method for manufacturing the same.

本発明の一態様の半導体発光素子は、第1の主面及び前記第1の主面に対向する第2の主面に凹凸面を有する活性層、前記第1の主面の側に接続され、前記第1の主面から遠い面が前記凹凸面と同様な周期の凹凸面をなす第1導電型の第1の成長層、及び、前記第2の主面の側に接続し前記第2の主面から遠い面が実質的に平面をなす第2導電型の第2の成長層を備え、特定の波長で発光可能な発光層構成部と、前記第1の成長層の前記活性層に対向する面に形成された第1導電側電極と、前記発光層構成部の第2の成長層に接合され、前記波長に実質透明な前記第2導電型の半導体基板と、前記半導体基板の前記第2の成長層に対向する面に形成された第2導電側電極とを具備していることを特徴とする。   The semiconductor light-emitting element of one embodiment of the present invention is connected to a first main surface and an active layer having an uneven surface on the second main surface opposite to the first main surface, the first main surface being connected to the first main surface. The first conductivity type first growth layer in which the surface far from the first main surface forms an uneven surface having the same period as the uneven surface, and the second main surface side are connected to the second main surface side. A second growth layer of a second conductivity type in which a surface far from the main surface of the first surface is substantially planar, and a light emitting layer constituting part capable of emitting light at a specific wavelength; and an active layer of the first growth layer A first conductive side electrode formed on the opposing surface; a second conductive type semiconductor substrate that is bonded to the second growth layer of the light emitting layer constituting portion and is substantially transparent to the wavelength; and the semiconductor substrate And a second conductive side electrode formed on a surface facing the second growth layer.

また、本発明の別の態様の半導体発光素子の製造方法は、第1導電型の凹凸面が形成された第1の半導体基板上に、一定の波長で発光可能な、凹凸面を有する前記第1導電型のクラッド層、活性層、第2導電型のクラッド層、及び前記第2導電型の接着層が順番に設けられた発光層構成部を形成する工程と、前記接着層の表面の前記凹凸面を熱処理によって平坦化する工程と、平坦化された前記接着層の表面に、前記第2導電型の前記波長に透明な基板を接着させ、熱処理を行うことにより、接着させた面を接合する工程と、接合して一体化された前記第1の半導体基板、前記発光層構成部及び前記第2導電型の基板の内、前記第2導電型の基板から前記発光層構成部までを残して、他を除去する工程とを具備していることを特徴とする。   According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor light emitting device, wherein the first semiconductor substrate on which the first conductive type uneven surface is formed has the uneven surface capable of emitting light at a predetermined wavelength. Forming a light emitting layer constituting portion in which a first conductivity type cladding layer, an active layer, a second conductivity type cladding layer, and the second conductivity type adhesive layer are sequentially provided; and The step of flattening the uneven surface by heat treatment, and bonding the bonded surface to the surface of the flattened adhesive layer by bonding a transparent substrate to the wavelength of the second conductivity type and performing heat treatment And the first semiconductor substrate, the light emitting layer constituent part, and the second conductive type substrate which are integrated by bonding, leaving the second conductive type substrate to the light emitting layer constituent part. And a step of removing others.

本発明によれば、光取出し効率を向上させることが可能な半導体発光素子及びその製造方法を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the semiconductor light-emitting device which can improve light extraction efficiency, and its manufacturing method can be provided.

以下、本発明の実施例について、図面を参照しながら説明する。以下に示す図では、同一の構成要素には同一の符号を付し、重要な構成要素は他の構成要素に比較して拡大して表示してある。   Embodiments of the present invention will be described below with reference to the drawings. In the figure shown below, the same code | symbol is attached | subjected to the same component and the important component is expanded and displayed compared with the other component.

本発明の実施例1に係る半導体発光素子について、その製造方法も加えて、図1乃至図4を参照しながら説明する。図1は半導体発光素子の構造を模式的に示すもので、図1(a)は平面図、図1(b)は図1(a)のA−A線に沿った断面図、図1(c)は図1(a)の破線円Bの表面部分の凹凸形状を模式的に示す斜視図である。図2は半導体発光素子の製造方法を工程順に模式的に示す層構造断面図である。図3は図2に示す工程に引き続き、半導体発光素子の製造方法を工程順に模式的に示す断面図である。図4は半導体発光素子を塔載した半導体発光装置の構造を模式的に示す断面図である。   A semiconductor light emitting device according to Example 1 of the present invention will be described with reference to FIGS. FIG. 1 schematically shows the structure of a semiconductor light emitting device. FIG. 1A is a plan view, FIG. 1B is a cross-sectional view taken along line AA in FIG. FIG. 3C is a perspective view schematically showing the uneven shape of the surface portion of the broken-line circle B in FIG. FIG. 2 is a cross-sectional view of a layer structure schematically showing a method for manufacturing a semiconductor light emitting device in the order of steps. FIG. 3 is a cross-sectional view schematically showing the method of manufacturing the semiconductor light emitting device in the order of steps following the step shown in FIG. FIG. 4 is a cross-sectional view schematically showing the structure of a semiconductor light emitting device on which a semiconductor light emitting element is mounted.

まず、図1に示すように、半導体発光素子1の主要部は、第2導電型の半導体基板であるp型GaP基板10、p型GaP基板10の上部表面側に配置された発光層構成部20、発光層構成部20の上面の中央部に円形の第1導電側電極であるn側電極41、及びp型GaP基板10の底面には第2導電側電極であるp側電極43が全面に形成されている。発光層構成部20は、p型GaP基板10側から順に、第2の成長層であるp型の接着層22、p型クラッド層23、活性層24、及び第1導電型の第1の成長層であるn型クラッド層25が積層され、各層の境界面及び上部表面は互いに同様な周期の凹凸を有する断面が鋸歯状の凹凸面13をなしている。n側電極41の上部表面は凹凸面13と同様な周期の凹凸を有する面をなしている。一方、発光層構成部20とp型GaP基板10との境界面、p型GaP基板10とp側電極43との境界面、及び、p側電極43の底面は平面をなしている。   First, as shown in FIG. 1, the main part of the semiconductor light emitting element 1 is a p-type GaP substrate 10 which is a second conductivity type semiconductor substrate, and a light emitting layer constituting part disposed on the upper surface side of the p-type GaP substrate 10. 20, an n-side electrode 41 that is a circular first conductive side electrode at the center of the upper surface of the light emitting layer constituting unit 20, and a p-side electrode 43 that is a second conductive side electrode on the bottom surface of the p-type GaP substrate 10 Is formed. The light emitting layer constituting unit 20 includes, in order from the p-type GaP substrate 10 side, a p-type adhesion layer 22, a p-type cladding layer 23, an active layer 24, and a first conductivity type first growth, which are second growth layers. An n-type clad layer 25 as a layer is laminated, and a boundary surface and an upper surface of each layer form a serrated uneven surface 13 having cross sections having unevenness with the same period. The upper surface of the n-side electrode 41 is a surface having irregularities with the same period as the irregular surface 13. On the other hand, the boundary surface between the light emitting layer constituting unit 20 and the p-type GaP substrate 10, the boundary surface between the p-type GaP substrate 10 and the p-side electrode 43, and the bottom surface of the p-side electrode 43 form a flat surface.

更に、図1(a)に示すように、半導体発光素子1の上面は、外形の1辺が約300μmのほぼ正方形をなし、n型クラッド層25の上面に形成された山部14(実線)と谷部15(破線)が、平面図の上下方向に複数個互いに平行に並んだ凹凸面13である。発光層構成部20の上面の中央部には、例えば、AuGe/Auからなる、直径が120μmの円形のn側電極41が形成され、n側電極41の表面は、下層の発光層構成部20の凹凸面13の山部14と谷部15の間隔(周期)をほとんど同じに複写したような構造である。   Furthermore, as shown in FIG. 1A, the upper surface of the semiconductor light emitting device 1 is substantially square with one side of the outer shape being about 300 μm, and a crest 14 formed on the upper surface of the n-type cladding layer 25 (solid line). And the trough part 15 (broken line) is the uneven | corrugated surface 13 in which the plurality was parallelly arranged mutually in the up-down direction of the top view. A circular n-side electrode 41 made of, for example, AuGe / Au and having a diameter of 120 μm is formed at the center of the upper surface of the light-emitting layer constituting unit 20, and the surface of the n-side electrode 41 is formed on the lower light-emitting layer constituting unit 20. In this structure, the intervals (cycles) between the crests 14 and the troughs 15 of the uneven surface 13 are copied almost the same.

図1(b)に示すように、A−A線に沿った断面は、目視上、発光層構成部20の上面からp側電極43までがほぼ250μmの長方形をなしている。従って、側面は、ほぼ250μm×300μmの長方形の外形をなす。発光層構成部20の上部表面側に見られる山部14と谷部15は、ほとんど同じ周期及び高低差で、接着層22の上部表面側にまで複写されている。p型GaP基板10と接着層22は、ほとんど平面からなる接合面35を境に接合されて、一体化されている。なお、機械的強度の確保及び電気的抵抗の低減がなされた状態を接合という。p型GaP基板10の底面側は、例えば、AuZn/Auからなるp側電極43が全面に形成されている。   As shown in FIG. 1B, the cross section along the line AA is a rectangular shape having a visual distance of approximately 250 μm from the upper surface of the light emitting layer constituting unit 20 to the p-side electrode 43. Accordingly, the side surface has a rectangular outer shape of approximately 250 μm × 300 μm. The peaks 14 and valleys 15 seen on the upper surface side of the light emitting layer constituting portion 20 are copied to the upper surface side of the adhesive layer 22 with almost the same period and height difference. The p-type GaP substrate 10 and the adhesive layer 22 are bonded and integrated with a bonding surface 35 that is almost a plane as a boundary. A state in which mechanical strength is ensured and electrical resistance is reduced is referred to as bonding. On the bottom surface side of the p-type GaP substrate 10, for example, a p-side electrode 43 made of AuZn / Au is formed on the entire surface.

図1(a)に示す破線円Bで囲まれた2個の山部14と山部14の間にある谷部15は、例えば、図1(c)に示すような形状をなしている。谷部15を結んで出来る平面と、谷部15から山部14へ向かう斜面とのなす角度45は、例えば、約35度である。活性層24の面積増加を図り、発光層構成部20の構成層界面の一部を反射層として機能させ、エッチング加工及びエピタキシャル成長を実行しようとしたとき、角度45は、30度から60度程度が好ましい。山部14と谷部15の高低差46は、例えば、約1.8μmである。そして、高低差46は、成長または熱処理時の凹凸形状の確保及びInGaPからなる接着層22が厚くなることを避けるために、0.3μmから5μm程度が好ましい。   The two crests 14 surrounded by the broken-line circle B shown in FIG. 1A and the valley 15 between the crests 14 have a shape as shown in FIG. 1C, for example. An angle 45 formed by a plane formed by connecting the valleys 15 and a slope from the valleys 15 toward the peaks 14 is, for example, about 35 degrees. When the area of the active layer 24 is increased, and a part of the constituent layer interface of the light emitting layer constituting unit 20 is made to function as a reflective layer to perform etching processing and epitaxial growth, the angle 45 is about 30 to 60 degrees. preferable. The height difference 46 between the peak portion 14 and the valley portion 15 is, for example, about 1.8 μm. The height difference 46 is preferably about 0.3 μm to 5 μm in order to ensure the uneven shape during growth or heat treatment and avoid the InGaP adhesive layer 22 from becoming thick.

次に、半導体発光素子1の構成要素の詳細を半導体発光素子1の製造工程に従って、図2及び図3を参照ながら説明する。なお、半導体発光素子1の製造工程は、ウェーハを単位として進めて、最後に個片化するが、図2及び図3では、個片化される予定の1つに相当する部分を示す。   Next, the details of the components of the semiconductor light emitting device 1 will be described according to the manufacturing process of the semiconductor light emitting device 1 with reference to FIGS. In addition, although the manufacturing process of the semiconductor light-emitting device 1 proceeds in units of wafers and is finally separated into individual pieces, FIGS. 2 and 3 show a portion corresponding to one to be separated into individual pieces.

図2(a)に示すように、3インチ(約76mm)径のSiドープされたn型GaAs基板29を用意して、周知のフォトリソグラフィ法で、その表面にパターニングされたレジスト31を形成する。n型GaAs基板29は、InGaAlP系の発光層構成部20と格子整合が取れるために選択される。レジスト31は、n型GaAs基板29上の山部を形成する予定の位置にストライプ状に、一定間隔で形成されている。例えば、レジスト31は、幅が約1μm乃至それ以下、間隔が約5μmである。レジスト31が形成されたn型GaAs基板29を、例えば、硫酸、過酸化水素及び水を混合したエッチング液で、異方的にエッチングする。レジスト31に沿った山部と、互いに隣接するレジスト31の中間にある谷部を有するストライプ状の凹凸面33aを形成することが出来る。   As shown in FIG. 2A, an Si-doped n-type GaAs substrate 29 having a diameter of 3 inches (about 76 mm) is prepared, and a patterned resist 31 is formed on the surface thereof by a known photolithography method. . The n-type GaAs substrate 29 is selected because it can be lattice-matched with the InGaAlP-based light emitting layer constituting unit 20. The resists 31 are formed in stripes at regular intervals at positions where the peaks on the n-type GaAs substrate 29 are to be formed. For example, the resist 31 has a width of about 1 μm or less and a distance of about 5 μm. The n-type GaAs substrate 29 on which the resist 31 is formed is anisotropically etched with, for example, an etching solution in which sulfuric acid, hydrogen peroxide, and water are mixed. A striped uneven surface 33a having a peak portion along the resist 31 and a valley portion in the middle of the resists 31 adjacent to each other can be formed.

図2(b)に示すように、エッチング及びレジスト31剥離等が終了したn型GaAs基板29は、山部の間隔が約5μm、エッチング深さ、すなわち、山部と谷部の高低差が約1.8μmの凹凸面33aを有している。なお、レジスト31の幅が大きくなると、山部にn型GaAs基板29のレジスト31に接触した部分が残るが、山部と谷部を結ぶ斜面に比較して面積が小さければ差し支えない。   As shown in FIG. 2 (b), the n-type GaAs substrate 29 after the etching and resist 31 stripping and the like is finished has an interval between crests of about 5 μm and an etching depth, that is, a difference in height between crests and troughs. It has an uneven surface 33a of 1.8 μm. Note that when the width of the resist 31 is increased, a portion of the n-type GaAs substrate 29 that is in contact with the resist 31 remains in the peak portion, but the area may be smaller than the slope connecting the peak portion and the valley portion.

図2(c)に示すように、例えば、周知のMOCVD(Metalorganic Chemical Vapor Deposition)装置等を使用して、エピタキシャル成長層を形成する。n型GaAs基板29の凹凸面33aに、n型GaAsからなる約0.5μm厚のバッファ層27、その表面にn型InAlPからなる約0.05μm厚のエッチング停止層26、その表面にn型InAlPからなる約0.6μm厚のn型クラッド層25、その表面に約0.4μm厚のInGaAlPからなる活性層24、その表面にp型InAlPからなる約0.6μm厚のp型クラッド層23、その表面にp型InGaPからなる約1.1μm厚の接着層22aがエピタキシャル成長されている。   As shown in FIG. 2C, the epitaxial growth layer is formed using, for example, a well-known MOCVD (Metalorganic Chemical Vapor Deposition) apparatus. An approximately 0.5 μm-thick buffer layer 27 made of n-type GaAs, an approximately 0.05 μm-thick etching stop layer 26 made of n-type InAlP on the uneven surface 33a of the n-type GaAs substrate 29, and an n-type on the surface thereof. An n-type cladding layer 25 made of InAlP having a thickness of about 0.6 μm, an active layer 24 made of InGaAlP having a thickness of about 0.4 μm on the surface, and a p-type cladding layer 23 made of p-type InAlP on the surface having a thickness of about 0.6 μm. An adhesive layer 22a made of p-type InGaP and having a thickness of about 1.1 μm is epitaxially grown on the surface.

これらのエピタキシャル成長層の内、活性層は、必要に応じて、MQW構造であってもよい。また、例えば、n型またはp型クラッド層25、23は3元層に置き換えることも可能である。また、n型またはp型クラッド層25、23の活性層24から遠い側に、電流拡散層を形成してもよいし、電極金属と接触する場合、抵抗を低減するためのコンタクト層等を形成してもよい。ここで、接着層22(または22a)及び発光に関与するp型クラッド層23からn型クラッド層25までのエピタキシャル層を、発光層構成部20と称する。   Of these epitaxial growth layers, the active layer may have an MQW structure as required. Further, for example, the n-type or p-type cladding layers 25 and 23 can be replaced with ternary layers. Further, a current diffusion layer may be formed on the side of the n-type or p-type clad layer 25, 23 far from the active layer 24, or a contact layer or the like for reducing the resistance is formed when contacting the electrode metal. May be. Here, the adhesive layer 22 (or 22a) and the epitaxial layer from the p-type cladding layer 23 to the n-type cladding layer 25 involved in light emission are referred to as a light-emitting layer constituting unit 20.

図2(d)に示すように、表面に露出している接着層22は、例えば、MOCVD装置の中に載置された状態で、ホスフィン(PH3)とドーパント(例えば、Zn)を含むガスを供給しながら、熱処理を行うことにより、凹凸面33bの山部の構成元素またはその一部が谷部を埋めるように移動し、結晶成長して(マストランスポート法という)、平坦化されている。接着層22は、最も厚い部分で約2μmの厚さを有している。ここで、平坦化された接着層22の表面にInAlPからなる約0.15μm厚のカバー層がエピタキシャル成長されても差し支えない。   As shown in FIG. 2D, the adhesive layer 22 exposed on the surface is made of, for example, a gas containing phosphine (PH3) and a dopant (for example, Zn) in a state of being placed in an MOCVD apparatus. By performing heat treatment while supplying, the constituent elements of the crests of the concavo-convex surface 33b or a part thereof move so as to fill the troughs, and crystal growth (referred to as a mass transport method) is performed. . The adhesive layer 22 has a thickness of about 2 μm at the thickest portion. Here, a cover layer made of InAlP and having a thickness of about 0.15 μm may be epitaxially grown on the surface of the flattened adhesive layer 22.

次に、図3(a)に示すように、接着層22を上向きに置き、その上に、p型GaP基板10の接着させる表面が下向きになるように載置されて、接着層22とp型GaP基板10とを室温で接着させる。この接着された面が後述の接合面35となる。GaAsは発光した可視光の吸収が大きい。一方、GaPは、吸収がずっと小さく、発光した可視光に実質透明となるので、支持基板として選択される。接着においては、エピタキシャル成長におけるほどの格子整合は必ずしも必要ではない。   Next, as shown in FIG. 3 (a), the adhesive layer 22 is placed facing upward, and placed thereon so that the surface to be bonded of the p-type GaP substrate 10 faces downward. The GaP substrate 10 is bonded at room temperature. This bonded surface becomes a bonding surface 35 described later. GaAs has a large absorption of emitted visible light. On the other hand, GaP is selected as a support substrate because it has much lower absorption and is substantially transparent to the emitted visible light. In bonding, lattice matching as much as in epitaxial growth is not always necessary.

p型GaP基板10は、n型GaAs基板29と同様の結晶方位を有し、例えば、3インチ径、250μm厚で、約3E17/cm3の濃度にZnドープされている。その後、接着層22とp型GaP基板10との接着は、例えば、水素を10%含むアルゴン雰囲気の中、最終的に、温度600℃〜900℃の範囲で熱処理を行い、接着界面の反応を進めて、機械的強度の確保及び電気的抵抗の低減がなされる。なお、接着層22とp型GaP基板10とを室温で接着させる前に、両者を近接させた状態で熱処理を行うことにより、マストランスポート法を実行して、接着層22の表面は一層の平坦化を行っても差し支えない。また、図2(d)に示したMOCVD装置の中で行うマストランスポート法に代えて、接着層22aとp型GaP基板10とを近接させた状態で熱処理を行うことにより、接着層22aの平坦化を図っても差し支えない。   The p-type GaP substrate 10 has the same crystal orientation as that of the n-type GaAs substrate 29. For example, the p-type GaP substrate 10 has a diameter of 3 inches and a thickness of 250 μm, and is doped with Zn at a concentration of about 3E17 / cm 3. Thereafter, the adhesion between the adhesive layer 22 and the p-type GaP substrate 10 is performed by, for example, finally performing a heat treatment in a temperature range of 600 ° C. to 900 ° C. in an argon atmosphere containing 10% hydrogen to react the adhesion interface. As a result, the mechanical strength is ensured and the electrical resistance is reduced. In addition, before bonding the adhesive layer 22 and the p-type GaP substrate 10 at room temperature, a mass transport method is performed by performing a heat treatment in a state where the two are close to each other. Planarization may be performed. Further, in place of the mass transport method performed in the MOCVD apparatus shown in FIG. 2D, by performing a heat treatment in a state where the adhesive layer 22a and the p-type GaP substrate 10 are brought close to each other, the adhesive layer 22a Even if it flattens, it does not interfere.

次に、p型GaP基板10に接合して一体化したn型GaAs基板29側のn型GaAs基板29及びバッファ層27を、アンモニアと過酸化水素水の混合液でエッチング除去し、その後、エッチング停止層26を、例えば、70℃のリン酸でエッチング除去し、n型クラッド層25を表面に露出させる。図3(b)に示すように、発光層構成部20がp型GaP基板10に接合した状態となる。なお、n型GaAs基板29は、研削または研磨等を行って薄くされた後に、エッチング除去されてもよい。   Next, the n-type GaAs substrate 29 and the buffer layer 27 on the n-type GaAs substrate 29 side bonded and integrated with the p-type GaP substrate 10 are removed by etching with a mixed solution of ammonia and hydrogen peroxide, and then etched. The stop layer 26 is removed by etching with phosphoric acid at 70 ° C., for example, and the n-type cladding layer 25 is exposed on the surface. As shown in FIG. 3B, the light emitting layer constituting unit 20 is joined to the p-type GaP substrate 10. The n-type GaAs substrate 29 may be removed by etching after being thinned by grinding or polishing.

図3(c)に示すように、図3(b)で形成したp型GaP基板10、及び、その表面に接合した発光層構成部20は、180度回転して天地を逆にして、p型GaP基板10が下になるように置かれている。p型GaP基板10は、必要に応じて、全面または一部の厚さが調整されても差し支えない。なお、凹凸面13を構成する山部14及び谷部15は、n型GaAs基板29の谷部及び山部にそれぞれ対応している。   As shown in FIG. 3 (c), the p-type GaP substrate 10 formed in FIG. 3 (b) and the light-emitting layer constituting part 20 bonded to the surface thereof are rotated 180 degrees to reverse the top and bottom, and p The type GaP substrate 10 is placed below. The p-type GaP substrate 10 may have its entire surface or a part of its thickness adjusted as necessary. Note that the crests 14 and troughs 15 constituting the uneven surface 13 correspond to the troughs and crests of the n-type GaAs substrate 29, respectively.

次に、図3(d)に示すように、p型GaP基板10及びn型クラッド層25を表面層とする発光層構成部20に電極を形成する。まず、p型GaP基板10の表面に、AuZn/Auを堆積させて、熱処理を行い、p側電極43を形成する。次に、発光層構成部20にパターニングして、AuGe/Auを堆積させて、熱処理を行い、n側電極41を形成する。n側電極41は、例えば、120μm径の円形、p側電極43は全面電極である。なお、製造工程を進んできたウェーハは、例えば、ダイシング(図示略)にて個片化されて、図3(d)に示す半導体発光素子、すなわち、図1に示す半導体発光素子1となる。   Next, as shown in FIG. 3D, an electrode is formed on the light emitting layer constituting section 20 having the p-type GaP substrate 10 and the n-type cladding layer 25 as surface layers. First, AuZn / Au is deposited on the surface of the p-type GaP substrate 10 and heat treatment is performed to form the p-side electrode 43. Next, patterning is performed on the light emitting layer constituting unit 20, AuGe / Au is deposited, heat treatment is performed, and the n-side electrode 41 is formed. The n-side electrode 41 is, for example, a circle having a diameter of 120 μm, and the p-side electrode 43 is a full surface electrode. In addition, the wafer which has advanced the manufacturing process is separated into pieces by, for example, dicing (not shown), and becomes the semiconductor light emitting element shown in FIG. 3D, that is, the semiconductor light emitting element 1 shown in FIG.

図4に示すように、上述の工程を経て形成された半導体発光素子1は、例えば、ヘッダ61にマウントされて、半導体発光装置80に組み立てられる。半導体発光素子1の底面のp側電極43は、例えば、Agペースト等の導電性接着材68を介して、ヘッダ61の凹状をなすカップ部63の底部にマウントされる。半導体発光素子1のn側電極41は、例えば、Auワイヤ69により、リード66の一端部に接続される。カップ部63の斜面は、光を取り出す方向に向かって開口径が大きくなる反射面を形成している。ヘッダ61にはリード65が接続されている。半導体発光素子1、Auワイヤ69、ヘッダ61、及び、リード65、66の一部等が、例えば、エポキシ樹脂からなる封止樹脂71により砲弾状に封止されて、半導体発光装置80となる。   As shown in FIG. 4, the semiconductor light emitting element 1 formed through the above-described steps is mounted on a header 61 and assembled to the semiconductor light emitting device 80, for example. The p-side electrode 43 on the bottom surface of the semiconductor light emitting element 1 is mounted on the bottom of the cup 63 having a concave shape of the header 61 via a conductive adhesive 68 such as Ag paste. The n-side electrode 41 of the semiconductor light emitting element 1 is connected to one end portion of the lead 66 by, for example, an Au wire 69. The slope of the cup part 63 forms a reflecting surface whose opening diameter increases toward the direction of extracting light. A lead 65 is connected to the header 61. The semiconductor light emitting device 1, the Au wire 69, the header 61, a part of the leads 65 and 66, and the like are sealed in a bullet shape with a sealing resin 71 made of, for example, an epoxy resin to form the semiconductor light emitting device 80.

半導体発光装置80となった半導体発光素子1に、リード65、66を介して、p側電極41とn側電極31から通電すると、電流は、発光層構成部20で発光して、光の一部は、n側電極41側の上面から直接、封止樹脂71側に取り出され、ドーム状の封止樹脂71の頂部方向に多く出射される。透明なp型GaP基板10側に達する光の一部は、側面から、封止樹脂71側に取り出され、カップ部63の反射面で反射され、ドーム状の封止樹脂71の頂部方向に多く出射される。なお、臨界角(封止樹脂71の屈折率を1.5として、約27度)以上で、半導体発光素子1の上面又は側面に入射する光は、これらの面で反射され、臨界角以下となる面から、封止樹脂71側に取り出される。   When the semiconductor light-emitting element 1 that has become the semiconductor light-emitting device 80 is energized from the p-side electrode 41 and the n-side electrode 31 via the leads 65 and 66, the current is emitted from the light-emitting layer constituting unit 20, The part is taken out directly from the upper surface on the n-side electrode 41 side to the sealing resin 71 side, and is emitted in the top direction of the dome-shaped sealing resin 71. Part of the light reaching the transparent p-type GaP substrate 10 side is extracted from the side surface to the sealing resin 71 side, reflected by the reflecting surface of the cup portion 63, and much in the top direction of the dome-shaped sealing resin 71 Emitted. Note that light incident on the upper surface or the side surface of the semiconductor light emitting device 1 at a critical angle (approximately 27 degrees when the refractive index of the sealing resin 71 is 1.5) or more is reflected by these surfaces and is less than the critical angle. From this surface, it is taken out to the sealing resin 71 side.

本実施例の半導体発光素子1は、発光層構成部20の発光に関与する部分に凹凸面が形成され、接着に関与する部分が平坦化された特徴を有し、発光する光の吸収が大きいGaAs基板を、光に実質透明なp型GaP基板10に置き換えた構造を持つ。発光した光がp型GaP基板10に入射する直前に、最大で約2μm厚のInGaPの接着層22が配置されている。しかしながら、接着層22は、約250μm厚の従来のGaAs基板に比較すると、大幅に薄く形成されているため、発光層構成部20で発光した光の内、p型GaP基板10方向に向かう光は、接着層22で一部吸収されるものの、その多くは、p型GaP基板10を通り、p型GaP基板10の側面等から半導体発光素子1の外に取り出される。その結果、GaAs基板を使用する上面に凹凸面を有する構造の半導体発光素子に比較して、同じ電流を注入する条件において、約30%明るい半導体発光装置80を得ることが可能である。   The semiconductor light emitting device 1 of the present embodiment has a feature that an uneven surface is formed in a portion related to light emission of the light emitting layer constituting portion 20, and a portion related to adhesion is flattened, and the absorption of emitted light is large. The GaAs substrate is replaced with a p-type GaP substrate 10 that is substantially transparent to light. Immediately before the emitted light is incident on the p-type GaP substrate 10, an InGaP adhesive layer 22 having a maximum thickness of about 2 μm is disposed. However, since the adhesive layer 22 is formed much thinner than a conventional GaAs substrate having a thickness of about 250 μm, light directed toward the p-type GaP substrate 10 out of the light emitted from the light emitting layer constituting unit 20 Although most of it is absorbed by the adhesive layer 22, most of it passes through the p-type GaP substrate 10 and is taken out of the semiconductor light emitting device 1 from the side surface of the p-type GaP substrate 10. As a result, it is possible to obtain a semiconductor light emitting device 80 that is about 30% brighter under the same current injection conditions as compared with a semiconductor light emitting element having a rugged surface on the upper surface using a GaAs substrate.

また、発光層構成部20の上面に形成された凹凸面は、臨界角以下で入射する光の割合を増加させることができ、n側電極との界面では、方向を大きく変えて、側面方向に反射させることができる。発光層構成部20の活性層は、凹凸形状により発光に寄与する面積を増大させることが可能である。また、発光層構成部20の内部の凹凸の境界面の一部は、光を反射させることが可能であり、半導体発光素子1の上面及び側面に対して、臨界角以下で入射する光の割合を増加させることができる。その結果、発光層構成部20の界面及び上面が平面の場合に比較して、より多くの光を半導体発光素子1の外に取り出すことが可能である。   In addition, the uneven surface formed on the upper surface of the light emitting layer constituting unit 20 can increase the ratio of light incident at a critical angle or less, and at the interface with the n-side electrode, the direction is greatly changed to the side surface direction. Can be reflected. The active layer of the light emitting layer constituting unit 20 can increase the area contributing to light emission due to the uneven shape. Moreover, a part of the boundary surface of the unevenness inside the light emitting layer constituting part 20 can reflect light, and the ratio of the light incident on the upper surface and the side surface of the semiconductor light emitting element 1 at a critical angle or less. Can be increased. As a result, it is possible to extract more light out of the semiconductor light emitting element 1 as compared with the case where the interface and upper surface of the light emitting layer constituting unit 20 are flat.

すなわち、本実施例によれば、光取出し効率を向上させることが可能な半導体発光素子及びその製造方法を提供することが可能となる。   That is, according to the present embodiment, it is possible to provide a semiconductor light emitting device capable of improving the light extraction efficiency and a manufacturing method thereof.

更に、発光層構成部20の上面とn側電極との界面は、凹凸面をなし、接触面積が大きくなり、接触抵抗が低減されて、より多くの電流の注入が可能となる。活性層の凹凸形状による発光に寄与する面積の増大と注入電流の増加とにより、より明るい半導体発光素子1を得ることが可能となる。   Furthermore, the interface between the upper surface of the light emitting layer constituting portion 20 and the n-side electrode is an uneven surface, the contact area is increased, the contact resistance is reduced, and more current can be injected. The brighter semiconductor light emitting device 1 can be obtained by increasing the area contributing to light emission due to the uneven shape of the active layer and increasing the injection current.

本発明の実施例2に係る半導体発光素子について、図5を参照しながら説明する。図5は半導体発光素子の製造方法を模式的に示す断面図である。図5は半導体発光素子の構造を模式的に示すもので、図5(a)は平面図、図5(b)は図5(a)のC−C線に沿った断面図、図5(c)は図5(a)の破線円Dの表面部分の凹凸形状を模式的に示す斜視図、図5(d)は図5(c)の凹凸形状の凹と凸を反転させる関係にある凹凸形状を模式的に示す斜視図である。実施例1とは、凹凸面が4角錐を有する形状であることが異なっている。以下、実施例1と同一構成部分には同一の符号を付して、その説明は省略し、異なる構成部分について説明する。   A semiconductor light emitting device according to Example 2 of the present invention will be described with reference to FIG. FIG. 5 is a cross-sectional view schematically showing a method for manufacturing a semiconductor light emitting device. FIG. 5 schematically shows the structure of the semiconductor light emitting device. FIG. 5A is a plan view, FIG. 5B is a cross-sectional view taken along the line CC in FIG. FIG. 5C is a perspective view schematically showing the concavo-convex shape of the surface portion of the broken-line circle D in FIG. 5A, and FIG. 5D is a relationship in which the concavo-convex shape in FIG. 5C is inverted. It is a perspective view which shows an uneven | corrugated shape typically. The difference from Example 1 is that the uneven surface has a shape having a quadrangular pyramid. In the following, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different components will be described.

まず、図5に示すように、半導体発光素子2の主要部、すなわち結晶成長した積層構造及び電極構造は、半導体発光素子1と同様である。積層された発光層構成部20を構成する接着層22、p型クラッド層23、活性層24、及びn型クラッド層25の境界面及び上部表面は4角錐の側面が形成する凹凸面53をなしている。   First, as shown in FIG. 5, the main part of the semiconductor light emitting element 2, that is, the stacked structure and the electrode structure with crystal growth are the same as those of the semiconductor light emitting element 1. The boundary surface and the upper surface of the adhesive layer 22, the p-type cladding layer 23, the active layer 24, and the n-type cladding layer 25 constituting the laminated light emitting layer constituting portion 20 form an uneven surface 53 formed by the sides of a quadrangular pyramid. ing.

更に、図5(a)に示すように、半導体発光素子2の上面は、n型クラッド層25の上面に形成された4角錐の底面となる谷部15(破線)、4角錐の側面の交わる稜(実線)、稜と稜が交わった位置にある4角錐の頂点を有する構造である。発光層構成部20の上面の中央部に形成されたn側電極41の表面は、下層の発光層構成部20の凹凸面53の4角錐の側面をほとんど同じ間隔(周期)で複写したような構造である。   Further, as shown in FIG. 5A, the upper surface of the semiconductor light emitting device 2 intersects the valley 15 (broken line) that becomes the bottom surface of the quadrangular pyramid formed on the upper surface of the n-type cladding layer 25 and the side surfaces of the quadrangular pyramid. This is a structure having a ridge (solid line) and a vertex of a quadrangular pyramid at a position where the ridge and the ridge intersect. The surface of the n-side electrode 41 formed at the center of the upper surface of the light emitting layer constituting part 20 is such that the side surfaces of the four-sided pyramids of the uneven surface 53 of the lower light emitting layer constituting part 20 are copied at almost the same interval (period). Structure.

図5(b)に示すように、C−C線に沿った断面は、半導体発光素子1と同様である。発光層構成部20の上部表面側に見られる山部54と谷部55は、ほとんど同じピッチ及び高低差で、接着層22の上部表面側にまで複写されている。   As shown in FIG. 5B, the cross section along the line CC is the same as that of the semiconductor light emitting device 1. The peaks 54 and valleys 55 seen on the upper surface side of the light emitting layer constituting portion 20 are copied to the upper surface side of the adhesive layer 22 with almost the same pitch and height difference.

図5(a)に示す破線円Dで囲まれた5個の4角錐の部分は、例えば、図5(c)に示すような形状をなしている。谷部55を結んで出来る平面と、谷部55から山部54へ向かう斜面とのなす角度は、例えば、約35度である。山部54と谷部55の高低差は、例えば、約1.8μmである。そして、高低差は、InGaPからなる接着層22が厚くなることを避けるために、最大で5μm程度が好ましい。   The five quadrangular pyramid portions surrounded by the broken-line circle D shown in FIG. 5A have a shape as shown in FIG. 5C, for example. An angle formed between a plane formed by connecting the valley portions 55 and a slope extending from the valley portions 55 to the mountain portions 54 is, for example, about 35 degrees. The height difference between the peak portion 54 and the valley portion 55 is, for example, about 1.8 μm. The height difference is preferably about 5 μm at maximum in order to avoid the adhesive layer 22 made of InGaP from becoming thick.

半導体発光素子2の製造工程は、半導体発光素子1の製造工程とは、n型GaAs基板29上に、図5(d)に示すように、4角錐の頂部をn型GaAs基板29の表面より深い部分に配置した開口部(4角錐開口部57という)を形成するためのレジストのパターニング、及び、接着層のエピタキシャル成長の層厚が異なるが、他はほとんど同じである。そして、製造工程の断面図は、実施例1とほとんど変わらないので、図2を参照して説明する。   The manufacturing process of the semiconductor light emitting element 2 is different from the manufacturing process of the semiconductor light emitting element 1 on the n-type GaAs substrate 29, as shown in FIG. The resist patterning for forming the opening (called the quadrangular pyramid opening 57) arranged in the deep part and the layer thickness of the epitaxial growth of the adhesive layer are different, but the others are almost the same. The sectional view of the manufacturing process is almost the same as that of the first embodiment and will be described with reference to FIG.

すなわち、図2(a)に示すように、レジスト31は、n型GaAs基板29上の4角錐開口部57の底辺を形成する予定の位置に、十字に交わるストライプ状に形成される。例えば、レジスト31は、幅が約1μm乃至それ以下、それぞれの方向の間隔が約5μmである。レジスト31が形成されたn型GaAs基板29は、実施例1と同様にエッチングされる。レジスト31に沿った山部を底辺として、互いに隣接するレジスト31が形成する正方形の中心をn型GaAs基板29方向に掘り進んだ点を頂点とする、図5(d)に示すような4角錐開口部57が形成され、凹凸面を形成することが出来る。なお、レジスト31の幅が大きくなると、頂点にn型GaAs基板29のレジスト31に接触した部分が残るが、4角錐開口部57を構成する斜面に比較して面積が小さければ差し支えない。   That is, as shown in FIG. 2A, the resist 31 is formed in a stripe shape intersecting with a cross at a position where the base of the quadrangular pyramid opening 57 on the n-type GaAs substrate 29 is to be formed. For example, the resist 31 has a width of about 1 μm or less and a distance in each direction of about 5 μm. The n-type GaAs substrate 29 on which the resist 31 is formed is etched as in the first embodiment. A quadrangular pyramid as shown in FIG. 5 (d), with the peak portion along the resist 31 as the base and the apex at the point where the center of the square formed by the adjacent resists 31 is dug in the direction of the n-type GaAs substrate 29. An opening 57 is formed, and an uneven surface can be formed. When the width of the resist 31 is increased, a portion of the n-type GaAs substrate 29 that is in contact with the resist 31 remains at the apex, but the area may be smaller than that of the inclined surface forming the quadrangular pyramid opening 57.

そして、レジスト31のパターン形状により、エッチング形状を変化させても差し支えない。例えば、円形の開口パターンからは、円錐状の開口部、多角形の開口パターンからは、底面を多角形とする多角錐状の開口部を得ることが可能である。エッチングされる結晶面の方位、エッチング液またはエッチングガスの種類、処理条件等により、円錐台状の開口部や多角錐台状の開口部を得ることが可能である。   The etching shape may be changed depending on the pattern shape of the resist 31. For example, it is possible to obtain a conical opening from a circular opening pattern and a polygonal pyramid opening having a polygonal bottom surface from a polygonal opening pattern. Depending on the orientation of the crystal plane to be etched, the type of etching solution or etching gas, the processing conditions, etc., it is possible to obtain a frustum-shaped opening or a polygonal frustum-shaped opening.

次に、図2(c)に示すように、エピタキシャル成長層を形成するが、p型InGaPからなる接着層22aは、厚さが約0.8μmと、実施例1に比較して薄くする。実施例1に比較して、エッチングされた部分は少ないため、マストランスポート法により移動させて埋めるために使用するp型InGaPは少なくて済むことによる。   Next, as shown in FIG. 2C, an epitaxial growth layer is formed. The adhesive layer 22a made of p-type InGaP has a thickness of about 0.8 μm, which is thinner than that of the first embodiment. Compared to the first embodiment, since the etched portion is small, the p-type InGaP used for moving and filling by the mass transport method is small.

なお、図5に示すように、凹凸面53を構成する山部54及び谷部55は、n型GaAs基板29の谷部及び山部にそれぞれ対応していることはいうまでもなく、4角錐開口部57にエピタキシャル成長した4角錐が残されて、凹凸面53が形成される。   As shown in FIG. 5, it goes without saying that the peaks 54 and valleys 55 constituting the uneven surface 53 correspond to the valleys and peaks of the n-type GaAs substrate 29, respectively. A four-sided pyramid that is epitaxially grown is left in the opening 57, and the uneven surface 53 is formed.

以下、実施例1と同様な製造工程を経て、実施例1の半導体発光素子1とは、発光層構成部20の表面の凹凸面53及びn側電極41の表面の凹凸が異なる半導体発光素子2を作製できる。本実施例の半導体発光素子2を実施例1と同様に組み立てて、実施例1と同じ電流を注入する条件において、実施例1で得られた半導体発光装置80と同様な効果が得られる。更に、実施例1の半導体発光装置80よりも約5%明るい半導体発光装置を得ることができる。これは、半導体発光素子2の発光層構成部20の上面に形成された凹凸面53が、異なる4つの方向を有する面を形成しているために、実施例1の半導体発光素子1が有する異なる2つの方向の面に比較して、より多様な方向へ反射させることができ、その結果、臨界角以下で入射させて、半導体発光素子2の外側に取り出される光の割合を増加させることができるためである。   Hereinafter, through the same manufacturing process as in Example 1, the semiconductor light emitting device 2 in which the uneven surface 53 of the surface of the light emitting layer constituting part 20 and the unevenness of the surface of the n-side electrode 41 are different from those of the semiconductor light emitting device 1 of Example 1. Can be produced. The semiconductor light emitting device 2 of this example is assembled in the same manner as in Example 1, and the same effect as that of the semiconductor light emitting device 80 obtained in Example 1 can be obtained under the same current injection conditions as in Example 1. Furthermore, a semiconductor light-emitting device that is about 5% brighter than the semiconductor light-emitting device 80 of Example 1 can be obtained. This is because the uneven surface 53 formed on the upper surface of the light emitting layer constituting part 20 of the semiconductor light emitting device 2 forms a surface having four different directions, so that the semiconductor light emitting device 1 of Example 1 has a different surface. Compared with a plane in two directions, it can be reflected in more various directions, and as a result, it is possible to increase the proportion of light extracted outside the semiconductor light emitting element 2 by being incident at a critical angle or less. Because.

実施例2の変形例として、図5(d)に示すような4角錐開口部57を形成された凹凸面を有する半導体発光素子を形成することが可能である。   As a modification of the second embodiment, it is possible to form a semiconductor light emitting element having a concavo-convex surface formed with a quadrangular pyramid opening 57 as shown in FIG.

実施例2では、n型GaAs基板29に、図5(d)に示すような4角錐開口部57を有する凹凸面を形成して、半導体発光素子2の発光層構成部20の表面には、図5(c)に示すような4角錐を有する凹凸面53を形成した。逆に、n型GaAs基板29に、図5(c)に示すような4角錐を有する凹凸面を形成して、半導体発光素子の発光層構成部20の表面には、図5(d)に示すような互いに直交する2方向にそれぞれ並列した複数の山部、及びこの山部の中間に位置する4角錐開口部57形状の谷部を有する凹凸面を形成することが可能である。   In Example 2, an uneven surface having a quadrangular pyramidal opening 57 as shown in FIG. 5D is formed on the n-type GaAs substrate 29, and the surface of the light emitting layer constituting portion 20 of the semiconductor light emitting element 2 is An uneven surface 53 having a quadrangular pyramid as shown in FIG. On the contrary, an uneven surface having a quadrangular pyramid as shown in FIG. 5C is formed on the n-type GaAs substrate 29, and the surface of the light emitting layer constituting portion 20 of the semiconductor light emitting device is formed as shown in FIG. It is possible to form a concavo-convex surface having a plurality of peak portions parallel to each other in two directions orthogonal to each other as shown, and a trough portion of a quadrangular pyramid opening 57 shape located in the middle of the peak portions.

半導体発光素子の製造工程では、n型GaAs基板29上の4角錐の頂点を形成する予定の位置に、レジスト31が点状に形成される。例えば、レジスト31は、縦横がそれぞれ約1μm乃至それ以下、間隔が約5μmである。実施例2と同様にエッチングして、レジスト31位置を頂点、最近接のレジスト31を結ぶ線の中間を底辺とする4角錐が形成され、凹凸面を形成することが出来る。以下、半導体発光素子2の製造工程とほとんど変わらずに、発光層構成部20の表面に4角錐開口部が形成された凹凸面を有する半導体発光素子を作製することが可能である。なお、p型InGaPからなる接着層22aは、実施例1に比較して厚く成長させる。   In the manufacturing process of the semiconductor light emitting device, the resist 31 is formed in a dot shape at the position where the apex of the four-sided pyramid on the n-type GaAs substrate 29 is to be formed. For example, the resist 31 has a length and width of about 1 μm or less and a distance of about 5 μm. Etching is performed in the same manner as in Example 2 to form a quadrangular pyramid having the apex at the position of the resist 31 and the base of the line connecting the nearest resists 31, thereby forming an uneven surface. In the following, it is possible to produce a semiconductor light emitting device having an uneven surface in which a quadrangular pyramid opening is formed on the surface of the light emitting layer constituting portion 20, almost the same as the manufacturing process of the semiconductor light emitting device 2. Note that the adhesive layer 22a made of p-type InGaP is grown thicker than in the first embodiment.

実施例2と同様な製造工程を経て作製した本変形例の半導体発光素子を、半導体発光装置に組み立てて、実施例2と同じ電流を注入すると、実施例2で得られた半導体発光装置と同様に明るい半導体発光装置を得ることができる。実施例2とほとんど同様な工程で作製できるので、歩留まり等を見ながら、実施例2の半導体発光素子2または本変形例の半導体発光素子を選択することが可能である。   When the semiconductor light emitting element of this modification produced through the same manufacturing process as in Example 2 is assembled into a semiconductor light emitting device and the same current as in Example 2 is injected, the same as the semiconductor light emitting device obtained in Example 2 A bright semiconductor light emitting device can be obtained. Since it can be manufactured through almost the same process as in Example 2, it is possible to select the semiconductor light-emitting element 2 of Example 2 or the semiconductor light-emitting element of this modification while looking at the yield and the like.

本発明は、上述した実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲内で、種々、変形して実施することができる。   The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

例えば、実施例において、凹凸面は、山部及び谷部を結ぶ面は平面で、角は尖った形状である場合を説明した。しかしながら、結晶成長プロセスや熱処理プロセス等を経ると、面と面のなす角部は、丸みを帯びて滑らかな曲面になる可能性がある。しかも、高温雰囲気にさらされる時間が長い程、角部は丸みを帯びる可能性が高くなる。従って、凹凸面は高低差がある限り、角部が丸みを帯びたとしても差し支えない。   For example, in the embodiment, the description has been given of the case where the concavo-convex surface has a shape in which the surface connecting the peak and the valley is a flat surface and the corners are pointed. However, after a crystal growth process, a heat treatment process, or the like, there is a possibility that the corner portion formed by the faces is rounded and becomes a smooth curved surface. Moreover, the longer the time of exposure to a high temperature atmosphere, the higher the possibility that the corners will be rounded. Therefore, as long as the uneven surface has a height difference, the corners may be rounded.

また、実施例1において、山部及び谷部は半導体発光素子の側面に平行である例を示したが、山部及び谷部は側面に対して傾斜、例えば、45度の傾斜をなしても差し支えない。   Moreover, in Example 1, although the peak part and the trough part showed the example parallel to the side surface of a semiconductor light-emitting device, even if it makes a slope, for example, 45 degrees, with respect to a side surface, a peak part and a trough part are made | formed. There is no problem.

また、実施例2において、4角錐は、底面が碁盤の目状に配列された例を示したが、底面が互いに一定距離だけ平行移動した関係に配置されても差し支えない。   Further, in the second embodiment, the quadrangular pyramid has shown an example in which the bottom surfaces are arranged in a grid pattern, but the bottom surfaces may be arranged in a relationship in which they are translated by a certain distance from each other.

また、発光層構成部で発光する光に透明な半導体基板として、p型GaP基板を使用する例を示したが、発光する波長に透明で、導電性を有する半導体基板であれば、GaP以外のものでも差し支えない。   Moreover, although the example which uses a p-type GaP board | substrate was shown as a semiconductor substrate transparent to the light light-emitted in a light emitting layer structure part, if it is a semiconductor substrate which is transparent to the light emission wavelength and has electroconductivity, other than GaP It can be anything.

また、半導体発光装置は砲弾型(またはラジアル型)と呼ばれている構造に仕上げられる例を示したが、光を放出する方向に向かって開口径が大きくなる反射面を有する表面実装型であることは差し支えない。   In addition, the semiconductor light emitting device has been shown to be finished in a structure called a shell type (or radial type). However, the semiconductor light emitting device is a surface mount type having a reflective surface whose opening diameter increases toward the direction of light emission. There is no problem.

本発明は、以下の付記に記載されているような構成が考えられる。
(付記1) 第1導電型の凹凸面が形成された第1の半導体基板上に、一定の波長で発光可能な、凹凸面を有する前記第1導電型のクラッド層、活性層、第2導電型のクラッド層、及び前記第2導電型の接着層が順番に設けられた発光層構成部を形成する工程と、前記接着層の表面の前記凹凸面を熱処理によって平坦化する工程と、平坦化された前記接着層の表面に、前記第2導電型の前記波長に透明な基板を接着させ、熱処理を行うことにより、接着させた面を接合する工程と、接合して一体化された前記第1の半導体基板、前記発光層構成部及び前記第2導電型の基板の内、前記第2導電型の基板から前記発光層構成部までを残して、他を除去する工程とを具備している半導体発光素子の製造方法。
The present invention can be configured as described in the following supplementary notes.
(Additional remark 1) On the 1st semiconductor substrate in which the 1st conductivity type uneven surface was formed, the said 1st conductivity type clad layer, active layer, and 2nd conductivity which can emit light with a fixed wavelength and which have an uneven surface A step of forming a light emitting layer constituting portion in which a cladding layer of a mold and an adhesive layer of the second conductivity type are sequentially provided, a step of flattening the uneven surface of the surface of the adhesive layer by a heat treatment, and a flattening Bonding the bonded surface to the surface of the adhesive layer that is transparent to the wavelength of the second conductivity type and performing a heat treatment; and joining and integrating the first And a step of removing the semiconductor substrate, the light emitting layer constituting portion, and the second conductive type substrate from the second conductive type substrate to the light emitting layer constituting portion. A method for manufacturing a semiconductor light emitting device.

(付記2) 前記第2導電型の基板は、GaPからなる付記1に記載の半導体発光素子の製造方法。 (Additional remark 2) The said 2nd conductivity type board | substrate is a manufacturing method of the semiconductor light-emitting device of Additional remark 1 which consists of GaP.

(付記3) 前記平坦化は、マストランスポート法により行う付記1または2に記載の半導体発光素子の製造方法。 (Additional remark 3) The said planarization is a manufacturing method of the semiconductor light-emitting element of Additional remark 1 or 2 performed by the mass transport method.

本発明の実施例1に係る半導体発光素子の構造を模式的に示すもので、図1(a)は平面図、図1(b)は図1(a)のA−A線に沿った断面図、図1(c)は図1(a)の破線円Bの表面部分の凹凸形状を模式的に示す斜視図である。BRIEF DESCRIPTION OF THE DRAWINGS The structure of the semiconductor light-emitting device based on Example 1 of this invention is shown typically, FIG.1 (a) is a top view, FIG.1 (b) is the cross section along the AA of Fig.1 (a). FIG. 1 and FIG. 1C are perspective views schematically showing the uneven shape of the surface portion of the broken-line circle B in FIG. 本発明の実施例1に係る半導体発光素子の製造方法を工程順に模式的に示す層構造断面図である。It is layer structure sectional drawing which shows typically the manufacturing method of the semiconductor light-emitting device based on Example 1 of this invention in order of a process. 本発明の実施例1に係る半導体発光素子の製造方法を工程順に模式的に示す層構造断面図。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view of a layer structure schematically showing a method for manufacturing a semiconductor light emitting element according to Example 1 of the present invention in the order of steps. 本発明の実施例1に係る半導体発光素子を塔載した半導体発光装置の構造を模式的に示す断面図ある。It is sectional drawing which shows typically the structure of the semiconductor light-emitting device which mounted the semiconductor light-emitting device based on Example 1 of this invention. 本発明の実施例2に係る半導体発光素子の構造を模式的に示すもので、図5(a)は平面図、図5(b)は図5(a)のC−C線に沿った断面図、図5(c)は図5(a)の破線円Dの表面部分の凹凸形状を模式的に示す斜視図、図5(d)は図5(c)の凹凸形状の凹と凸を反転させる関係にある凹凸形状を模式的に示す斜視図である。FIGS. 5A and 5B schematically show the structure of a semiconductor light emitting device according to Example 2 of the present invention, FIG. 5A is a plan view, and FIG. 5B is a cross section taken along line CC in FIG. FIG. 5 (c) is a perspective view schematically showing the uneven shape of the surface portion of the broken-line circle D in FIG. 5 (a), and FIG. 5 (d) shows the concave and convex portions of the uneven shape in FIG. 5 (c). It is a perspective view which shows typically the uneven | corrugated shape in the relationship to reverse.

符号の説明Explanation of symbols

1、2 半導体発光素子
10 p型GaP基板
13、33a、33b、53 凹凸面
14、54 山部
15、55 谷部
20 発光層構成部
22、22a 接着層
23 p型クラッド層
24 活性層
25 n型クラッド層
26 エッチング停止層
27 バッファ層
29 n型GaAs基板
31 レジスト
35 接合面
41 n側電極
43 p側電極
45 角度
46 高低差
57 4角錐開口部
61 ヘッダ
63 カップ部
65、66 リード
68 導電性接着材
69 Auワイヤ
71 封止樹脂
80 半導体発光装置
DESCRIPTION OF SYMBOLS 1, 2 Semiconductor light-emitting device 10 p-type GaP board | substrate 13, 33a, 33b, 53 Uneven surface 14, 54 Mountain part 15, 55 Valley part 20 Light-emitting layer structure part 22, 22a Adhesive layer 23 p-type clad layer 24 Active layer 25 n Type cladding layer 26 Etching stop layer 27 Buffer layer 29 N type GaAs substrate 31 Resist 35 Bonding surface 41 N side electrode 43 P side electrode 45 Angle 46 Height difference 57 Four pyramid opening 61 Header 63 Cup part 65, 66 Lead 68 Conductivity Adhesive 69 Au wire 71 Sealing resin 80 Semiconductor light emitting device

Claims (5)

第1の主面及び前記第1の主面に対向する第2の主面に凹凸面を有する活性層、前記第1の主面の側に接続され、前記第1の主面から遠い面が前記凹凸面と同様な周期の凹凸面をなす第1導電型の第1の成長層、及び、前記第2の主面の側に接続し前記第2の主面から遠い面が実質的に平面をなす第2導電型の第2の成長層を備え、特定の波長で発光可能な発光層構成部と、
前記第1の成長層の前記活性層に対向する面に形成された第1導電側電極と、
前記発光層構成部の第2の成長層に接合され、前記波長に実質透明な前記第2導電型の半導体基板と、
前記半導体基板の前記第2の成長層に対向する面に形成された第2導電側電極と、
を具備していることを特徴とする半導体発光素子。
An active layer having a concavo-convex surface on a first main surface and a second main surface opposite to the first main surface, a surface connected to the first main surface side and distant from the first main surface A first conductivity type first growth layer having an uneven surface with the same period as the uneven surface, and a surface connected to the second main surface side and distant from the second main surface is substantially flat. A light-emitting layer constituting section comprising a second growth layer of the second conductivity type, which is capable of emitting light at a specific wavelength;
A first conductive side electrode formed on a surface of the first growth layer facing the active layer;
A semiconductor substrate of the second conductivity type that is bonded to the second growth layer of the light emitting layer constituting section and is substantially transparent to the wavelength;
A second conductive side electrode formed on a surface of the semiconductor substrate facing the second growth layer;
A semiconductor light emitting element comprising:
前記第1の成長層の凹凸面は、1方向に並列した複数の凸部及び互いに隣接する前記山部の中間に位置する凹部を有していることを特徴とする請求項1に記載の半導体発光素子。   2. The semiconductor according to claim 1, wherein the uneven surface of the first growth layer has a plurality of convex portions arranged in parallel in one direction and a concave portion located in the middle of the adjacent mountain portions. Light emitting element. 前記第1の成長層の凹凸面は、複数の角錐、円錐、角錐台、及び円錐台の内の1つの形状を有していることを特徴とする請求項1に記載の半導体発光素子。   2. The semiconductor light emitting element according to claim 1, wherein the uneven surface of the first growth layer has one of a plurality of pyramids, cones, pyramids, and truncated cones. 前記第1の成長層の凹凸面は、互いに直交する2方向にそれぞれ並列した複数の凸部及び前記山部の中間に位置する凹部を有していることを特徴とする請求項1に記載の半導体発光素子。   The concavo-convex surface of the first growth layer has a plurality of convex portions parallel to each other in two directions orthogonal to each other and a concave portion located in the middle of the peak portion. Semiconductor light emitting device. 第1導電型の凹凸面が形成された第1の半導体基板上に、一定の波長で発光可能な、凹凸面を有する前記第1導電型のクラッド層、活性層、第2導電型のクラッド層、及び前記第2導電型の接着層が順番に設けられた発光層構成部を形成する工程と、
前記接着層の表面の前記凹凸面を熱処理によって平坦化する工程と、
平坦化された前記接着層の表面に、前記第2導電型の前記波長に透明な基板を接着させ、熱処理を行うことにより、接着させた面を接合する工程と、
接合して一体化された前記第1の半導体基板、前記発光層構成部及び前記第2導電型の基板の内、前記第2導電型の基板から前記発光層構成部までを残して、他を除去する工程と、
を具備していることを特徴とする半導体発光素子の製造方法。
The first conductive type cladding layer, the active layer, and the second conductive type clad layer having a concavo-convex surface capable of emitting light at a predetermined wavelength on the first semiconductor substrate on which the concavo-convex surface of the first conductivity type is formed. And forming a light emitting layer constituent part in which the adhesive layer of the second conductivity type is provided in order,
Flattening the uneven surface of the surface of the adhesive layer by heat treatment;
Bonding a bonded surface to the surface of the flattened adhesive layer by bonding a transparent substrate to the wavelength of the second conductivity type and performing a heat treatment;
Of the first semiconductor substrate, the light emitting layer constituting portion, and the second conductivity type substrate that are integrated by bonding, the remaining portions from the second conductivity type substrate to the light emitting layer constituting portion are left, and the rest Removing, and
The manufacturing method of the semiconductor light-emitting device characterized by the above-mentioned.
JP2005199043A 2005-07-07 2005-07-07 Semiconductor light-emitting device and manufacturing method thereof Pending JP2007019263A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010045289A (en) * 2008-08-18 2010-02-25 Shin Etsu Handotai Co Ltd Light-emitting element and manufacturing method thereof
JP2010534943A (en) * 2007-07-26 2010-11-11 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア Light emitting diode with P-type surface
CN102208507A (en) * 2011-05-03 2011-10-05 映瑞光电科技(上海)有限公司 Light-emitting diode (LED) and manufacturing method thereof
US8653547B2 (en) 2010-03-10 2014-02-18 Lg Innotek Co., Ltd Light emitting device and light emitting device package
JP2018006687A (en) * 2016-07-07 2018-01-11 国立大学法人京都大学 Semiconductor light-emitting device and method for manufacturing the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010534943A (en) * 2007-07-26 2010-11-11 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア Light emitting diode with P-type surface
JP2010045289A (en) * 2008-08-18 2010-02-25 Shin Etsu Handotai Co Ltd Light-emitting element and manufacturing method thereof
US8653547B2 (en) 2010-03-10 2014-02-18 Lg Innotek Co., Ltd Light emitting device and light emitting device package
US9455377B2 (en) 2010-03-10 2016-09-27 Lg Innotek Co., Ltd. Light emitting device
US9899567B2 (en) 2010-03-10 2018-02-20 Lg Innotek Co., Ltd. Light emitting device
CN102208507A (en) * 2011-05-03 2011-10-05 映瑞光电科技(上海)有限公司 Light-emitting diode (LED) and manufacturing method thereof
JP2018006687A (en) * 2016-07-07 2018-01-11 国立大学法人京都大学 Semiconductor light-emitting device and method for manufacturing the same

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