JP2007013128A - Manufacturing method for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device by separating a device formation layer which has a thin-film transistor, etc. formed on a substrate from the substrate, which is a low-cost and highly reliable semiconductor manufacturing method. <P>SOLUTION: A metal film is formed on a substrate, plasma treatment is performed on the metal film in a atmosphere of a dinitrogen monoxide to form a metal-oxide film on the surface of the metal film, a primary insulating film is continuously formed on the metal-oxide without being exposed to air, a device formation layer is formed on the primary insulating film, and the device formation layer is separated from the substrate to manufacture a semiconductor device. By forming a film continuously without exposing the metal-oxide film and the primary insulating film to air, it is possible to prevent contaminants such as dust and dirt from mixing into the interface between the metal-oxide film and the primary insulating film. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and in particular, a method for manufacturing a semiconductor device by peeling an element formation layer from a support substrate using a release layer provided between a support substrate and an element formation layer. About.

  In recent years, there is an increasing need for RFID (Radio Frequency Identification) mounted cards and RFID mounted tags that can exchange data in a non-contact manner for all fields that require automatic recognition, such as management of securities and products. A card equipped with an RFID reads and writes data without contact with an external device via a loop antenna inside the card. In addition, since a card equipped with RFID has a larger storage capacity and superior security compared to a magnetic card that records data by a magnetic recording method, a form that can be used in various fields has recently been proposed. .

  In general, an RFID is composed of an antenna and an IC chip, and the IC chip is formed by an element formation layer having a transistor group or the like provided on a silicon wafer. However, in recent years, there has been a demand for lower cost and thinner thickness, and technological development of RFID using an element formation layer provided on a glass substrate or the like has been advanced, and further, element formation provided on a glass substrate has been promoted. Technological development is underway to reduce the thickness of the substrate portion of the layer or to separate and transfer the glass substrate from another supporting substrate. Until now, various techniques have been considered as these methods.

  For example, there are a method of thinning a support substrate by grinding and polishing to take out an element formation layer, a method of removing the support substrate by a chemical reaction, or a method of peeling the support substrate and the element formation layer. For example, as a method of peeling an element formation layer provided on a supporting substrate, an isolation layer made of amorphous silicon (or polysilicon) is provided, and laser light is irradiated through the substrate to form amorphous silicon. There is a technique in which a support substrate is separated by generating voids by releasing contained hydrogen (see Patent Document 1). In addition, a separation layer containing silicon is provided between the element formation layer and the supporting substrate, and the separation layer is removed using a gas containing halogen fluoride to separate the element formation layer from the supporting substrate. There is a technique (see Patent Document 2). As described above, there are many methods for separating the element formation layer provided on the support substrate.

Japanese Patent Laid-Open No. 10-125929 JP-A-8-254686

  However, in the method of removing the support substrate by grinding, polishing, or melting, there is a problem of damage or contamination due to physical force such as stress or vibration. Moreover, in these methods, it is very difficult to reuse the substrate once used, and there is a problem that the cost increases.

  In addition, when the element forming layer provided on the supporting substrate is separated by removing the peeling layer provided between the supporting substrate and the element forming layer, the property of the peeling layer is important. That is, the time required to remove the release layer depends on the selection of the material used for the release layer and the etching agent for removing the release layer. Further, in the case where an element formation layer including a thin film transistor or the like is provided over the separation layer, depending on the material and film quality of the separation layer, the characteristics of the transistor may be affected and the reliability of the semiconductor device may be reduced.

  In view of the above problems, an object of the present invention is to provide a method for manufacturing a semiconductor device with low cost and high reliability.

  In order to solve the above problem, the following means are used in the present invention.

  In the method for manufacturing a semiconductor device according to the present invention, a metal film is formed on a substrate, and plasma treatment or heat treatment is performed on the metal film in a specific gas atmosphere to thereby form a metal oxide film, a metal nitride film, or A metal nitride oxide film is formed, an insulating film such as silicon nitride, silicon oxide, or silicon nitride oxide is formed on the metal oxide film, metal nitride film, or metal nitride oxide film, and an element formation layer is formed on the insulating film. Then, an insulating film is formed to cover the element forming layer, an opening is formed in the insulating film and the element forming layer, and an etching agent is introduced into the opening to introduce a metal film and a metal oxide film, a metal nitride film, or a metal oxynitride oxide. The film formation is removed, and the element formation layer is peeled off from the substrate. The element formation layer in the present invention includes at least a thin film transistor group (TFT). With the thin film transistor group, various kinds of integrated circuits such as a CPU (central processing unit), a memory, or a microprocessor can be provided. In addition to the thin film transistor, the element formation layer may have an antenna. For example, an element formation layer including a thin film transistor group operates using an alternating voltage generated by an antenna, and modulates an alternating voltage applied to the antenna to transmit to a reader / writer. it can. Note that the antenna may be formed together with the thin film transistor group, or may be formed separately from the thin film transistor group and electrically connected later.

  As another method for manufacturing a semiconductor device according to the present invention, a metal film is formed on a substrate, and plasma treatment or heat treatment is performed on the metal film in a specific gas atmosphere to thereby form a metal oxide film or metal nitride on the surface of the metal film. A film or a metal oxynitride film is formed, an insulating film such as silicon nitride, silicon oxide or silicon oxynitride is formed on the metal oxide film, metal nitride film or metal oxynitride film, and an element formation layer is formed on the insulating film Forming an insulating film covering the element formation layer, forming an opening in the insulating film and the element formation layer, and introducing an etchant into the opening to form a metal film, a metal oxide film, a metal nitride film, or a metal The device is characterized in that at least a part of the nitrided oxide film is removed and the element formation layer is peeled off from the substrate by physical means. The physical means is a means recognized not by chemistry but by physics. Specifically, it means a mechanical means or a mechanical means having a process that can be applied to the laws of mechanics. It refers to a means of changing energy (mechanical energy). In other words, peeling using physical means means, for example, by applying an impact (stress) from the outside using a human hand, a wind pressure of a gas blown from a nozzle, a load using an ultrasonic wave or a wedge-shaped member, or the like. Say to peel.

  Of the methods for forming a metal oxide layer, metal nitride layer, or metal nitride oxide layer on the surface of a metal film, here is a principle explanation of the manifestation phenomenon in the case of using plasma treatment. The same concept can be applied to heat treatment.

  By performing plasma treatment on a metal film surface in a single gas atmosphere consisting of a single element or in a mixed gas atmosphere consisting of multiple elements, the metal element near the metal film surface constitutes a plasma. It is easily expected to cause a chemical reaction with the element that performs. For example, if the metal film surface is plasma-treated in a single oxygen gas atmosphere, a metal oxide is formed, and if the metal film surface is plasma-treated in a single nitrogen gas atmosphere, a metal nitride is formed. In the present invention, the surface of the metal film is plasma-treated in a single dinitrogen monoxide gas atmosphere or a mixed gas atmosphere such as dinitrogen monoxide and argon. It is easily expected to cause a chemical reaction with the element. From this, immediately after the plasma treatment is started, metal oxide, metal nitride, or metal nitride oxide begins to form on or near the surface of the metal film, and the metal oxide layer, metal nitride layer or It can also be expected that a metal oxynitride layer will be formed. The state of the metal oxide layer, metal nitride layer, or metal nitride oxide layer in this state is defined as the first state.

With respect to the first state, from the macroscopic and microscopic viewpoints such as the composition, hardness, film thickness, bonding state, crystallinity, orientation state, arrangement state, density, etc. of the metal oxide layer, metal nitride layer or metal nitride oxide layer Information on the continuity and discontinuity of the properties and their microscopic viewpoints excite plasma processed in a single gas atmosphere or a mixed gas atmosphere composed of single or multiple elements It is expected to change with respect to conditions such as the amount of energy to be applied, the degree of vacuum, the amount of gas supply, the processing time, the structure of the vessel forming the plasma, and the like. Further, the cohesive force seen from a macroscopic viewpoint of the metal oxide layer, the metal nitride layer, or the metal oxynitride layer in the first state is defined as the first cohesive force. Further, the adhesion between the metal layer and the metal oxide layer, the metal nitride layer, or the metal oxynitride layer in the first state is defined as a first lower interface adhesion.

In the present invention, an insulating film such as a silicon nitride film, a silicon oxide film, or a silicon nitride oxide film is continuously formed on the metal oxide layer, metal nitride layer, or metal nitride oxide layer in the first state. It is expected that the elements constituting the gas species used for the formation in the first stage of the formation cause a chemical reaction with the metal oxide layer, the metal nitride layer or the metal nitride oxide layer. The state newly changed by this reaction is expected to be different from the first state, and the state of the metal oxide layer, the metal nitride layer, or the metal nitride oxide layer in this state is changed to the second state. State. Further, the cohesion force seen from a macroscopic viewpoint of the metal oxide layer, the metal nitride layer, or the metal oxynitride layer in the second state is defined as the second cohesion force. Further, the adhesion between the metal layer and the metal oxide layer, the metal nitride layer, or the metal nitride oxide layer in the second state is defined as the second lower interface adhesion force, and the metal oxide layer, the metal nitride layer, or the metal nitride oxide The adhesion force between the layer and an insulating film such as a silicon nitride film, a silicon oxide film, or a silicon nitride oxide film is defined as a second upper interface adhesion force.

A method for forming a silicon oxide film, a silicon nitride film, a silicon oxide film, or a silicon nitride oxide film formed on a metal oxide layer, a metal nitride layer, or a metal nitride oxide layer is, for example, chemical vapor deposition (CVD) using monosilane gas or dinitrogen monoxide gas. : Chemical Vapor Deposition) method, and any thin film such as sputtering method using a dinitrogen monoxide gas alone or a mixed gas of dinitrogen monoxide gas and argon gas with silicon as a target. A formation method may be used.

In this second state, it is expected that the structure changes and the physical or mechanical state changes through a process such as formation or processing of an element formation layer on the insulating film. Finally, the state of the metal oxide layer, metal nitride layer, or metal oxynitride layer when the element formation layer is peeled off from the substrate by physical means is set to the Nth state. Further, the cohesive force seen from a macroscopic viewpoint of the metal oxide layer, the metal nitride layer, or the metal oxynitride layer in the Nth state is defined as the Nth cohesive force. Further, the adhesion force between the metal layer and the metal oxide layer, the metal nitride layer, or the metal nitride oxide layer in the Nth state is defined as the Nth lower interface adhesion force, and the metal oxide layer, the metal nitride layer, or the metal nitride oxide layer An adhesion force between the layer and an insulating film such as a silicon nitride film, a silicon oxide film, or a silicon nitride oxide film is defined as an N-th upper interface adhesion force.

When the entire film receives an amount of energy corresponding to these changes due to various processes, structural changes, etc. that have occurred up to the Nth state, in the metal oxide layer, metal nitride layer, or metal nitride oxide layer For example, a discontinuous point in the composition from the microscopic viewpoint or in the vicinity of the point, or in another example, a discontinuous point in the regularity of the coupled state or in the vicinity of the point, or in another example. In other words, it is expected that the point where the density is changing or the vicinity of the point causes energy relaxation locally. A typical example of the phenomenon of locally mitigating energy from the outside is a good example of an earthquake that occurs due to the movement of the crust or the movement of the ground. The point of relaxation is the point that is most likely to change structurally (structural line in the case of an earthquake), but a metal oxide layer, a metal nitride layer, or a metal oxynitride layer is expected to correspond to this case. It is known that a metal oxide layer, a metal nitride layer, or a metal nitride oxide layer is relatively easily changed because of its multiple compositions, bonding states, and the like.

  The manifestation of the peeling phenomenon in the Nth state is the physical or mechanical strength that causes peeling and the Nth cohesive force (physical or mechanical strength) of the layer that causes peeling or the vicinity of the layer that causes peeling. This occurs when the former exceeds the relationship with the adhesive strength (physical or mechanical strength) of the (Nth lower interface or Nth upper interface). Therefore, the mechanical strength in the layer where the peeling occurs or in the vicinity of the layer until the physical means is used may be lower than the physical or mechanical strength for causing the peeling.

  Although plasma processing has been described as a method for forming a metal oxide layer, metal nitride layer, or metal nitride oxide layer on the surface of the metal film, the same can be expected for heat treatment.

  In one embodiment of the method for manufacturing a semiconductor device of the present invention, a metal film is formed over a substrate, and a metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere. An element formation layer is formed over the oxide film, an insulating film is formed to cover the element formation layer, an opening is formed in the insulating film and the element formation layer, and the element formation layer is peeled from the substrate.

  According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a substrate, and plasma treatment is performed on the metal film in a mixed gas atmosphere of dinitrogen monoxide and argon. Forming a film, forming an element formation layer on the metal oxide film, covering the element formation layer, forming an insulating film, forming openings in the insulating film and the element formation layer, and peeling the element formation layer from the substrate; .

  In one embodiment of the method for manufacturing a semiconductor device of the present invention, a metal film is formed over a substrate, and a metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere. A first insulating film is continuously formed on the metal oxide film without being exposed to the element, an element forming layer is formed on the first insulating film, and a second insulating film is formed covering the element forming layer Then, an opening is formed in the second insulating film and the element formation layer, and the element formation layer is peeled from the substrate.

  According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a substrate, and plasma treatment is performed on the metal film in a mixed gas atmosphere of dinitrogen monoxide and argon. Forming a film, continuously forming a first insulating film on the metal oxide film without being exposed to the atmosphere, forming an element forming layer on the first insulating film, and covering the element forming layer with the first insulating film; 2 is formed, an opening is formed in the second insulating film and the element formation layer, and the element formation layer is peeled from the substrate.

  According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a surface of a metal film by forming a metal film over a substrate and performing plasma treatment in an atmosphere containing dinitrogen monoxide. Forming a first insulating film on the metal oxide film, forming an element formation layer having a semiconductor film on the first insulation film, covering the element formation layer, forming a second insulation film, An opening is formed in the insulating film and the element forming layer, the element forming layer is peeled off from the substrate, and the metal oxide film, the first insulating film, and the semiconductor film are continuously formed without being exposed to the atmosphere. To do.

  In one embodiment of the method for manufacturing a semiconductor device of the present invention, a metal film is formed over a substrate, and a metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere. An element forming layer is formed on the oxide film, an insulating film is formed to cover the element forming layer, an opening is formed in the insulating film and the element forming layer, and an etching agent is introduced into the opening to introduce the metal film and the metal oxide The film is removed, and the element formation layer is peeled from the substrate.

  In one embodiment of the method for manufacturing a semiconductor device of the present invention, a metal film is formed over a substrate, and a metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere. An element forming layer is formed on the oxide film, an insulating film is formed to cover the element forming layer, an opening is formed in the insulating film and the element forming layer, and an etching agent is introduced into the opening to introduce the metal film and the metal oxide The film is removed leaving at least part of the film, and the element formation layer is peeled off from the substrate by physical means.

  According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a substrate, and plasma treatment is performed on the metal film in a mixed gas atmosphere of dinitrogen monoxide and argon. A film is formed, an element formation layer is formed on the metal oxide film, an insulating film is formed to cover the element formation layer, an opening is formed in the insulating film and the element formation layer, and an etching agent is introduced into the opening. Then, the metal film and the metal oxide film are removed, and the element formation layer is peeled off from the substrate.

  According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a substrate, and plasma treatment is performed on the metal film in a mixed gas atmosphere of dinitrogen monoxide and argon. A film is formed, an element formation layer is formed on the metal oxide film, an insulating film is formed to cover the element formation layer, an opening is formed in the insulating film and the element formation layer, and an etching agent is introduced into the opening. And removing at least part of the metal film and the metal oxide film, and peeling the element formation layer from the substrate by physical means.

  According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a surface of a metal film by forming a metal film over a substrate and performing plasma treatment in an atmosphere containing dinitrogen monoxide. The first insulating film is continuously formed on the metal oxide film without being exposed to the atmosphere, the element forming layer is formed on the first insulating film, and the second insulating film is formed covering the element forming layer. And forming an opening in the second insulating film and the element formation layer, introducing an etching agent into the opening to remove the metal film and the metal oxide film, and peeling the element formation layer from the substrate. The metal oxide film and the first insulating film can be continuously formed without being exposed to the atmosphere, thereby preventing contamination such as dust from entering the interface between the metal oxide film and the first insulating film. Can do. Therefore, film formation failure due to unevenness caused by dust, contamination, and the like can be prevented, and the production efficiency and reliability of the semiconductor device can be improved.

  The element formation layer can have a semiconductor film. In this case, the first insulating film and the semiconductor film formed over the first insulating film can be continuously formed without being exposed to the atmosphere. Since the first insulating film and the semiconductor film can be formed using a plasma CVD apparatus, they can also be formed in the same chamber. According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a surface of a metal film by forming a metal film over a substrate and performing plasma treatment in an atmosphere containing dinitrogen monoxide. Forming a first insulating film on the metal oxide film, forming an element formation layer having a semiconductor film on the first insulation film, covering the element formation layer, forming a second insulation film, Forming an opening in the insulating film and the element forming layer, introducing an etching agent into the opening to remove the metal film and the metal oxide film, peeling the element forming layer from the substrate, and laminating the first insulating film; The semiconductor film is continuously formed without being exposed to the atmosphere. Since the first insulating film and the semiconductor film can be continuously formed without being exposed to the air, contamination such as dust at the interface between the first insulating film and the semiconductor film can be prevented. . Therefore, film formation failure due to unevenness caused by dust, contamination, and the like can be prevented, and the production efficiency and reliability of the semiconductor device can be improved.

  Further, the metal oxide film, the first insulating film, and the semiconductor film formed over the first insulating film can be continuously formed without being exposed to the atmosphere. Since the metal oxide film, the first insulating film, and the semiconductor film can be formed by a plasma CVD apparatus, they can also be formed in the same chamber. According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a surface of a metal film by forming a metal film over a substrate and performing plasma treatment in an atmosphere containing dinitrogen monoxide. Forming a first insulating film on the metal oxide film, forming an element formation layer having a semiconductor film on the first insulation film, covering the element formation layer, forming a second insulation film, An opening is formed in the insulating film and the element formation layer, an etching agent is introduced into the opening to remove the metal film and the metal oxide film, the element formation layer is peeled from the substrate, and the metal oxide film to be stacked The insulating film and the semiconductor film are continuously formed without being exposed to the atmosphere. By being able to continuously form the metal oxide film, the first insulating film, and the semiconductor film without being exposed to the atmosphere, contaminants such as dust on the interface between the metal oxide film, the first insulating film, and the semiconductor film Can be prevented. Therefore, film formation failure due to unevenness caused by dust, contamination, and the like can be prevented, and the production efficiency and reliability of the semiconductor device can be improved.

  In one embodiment of the method for manufacturing a semiconductor device of the present invention, a metal film is formed over a substrate, and a metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere. A first insulating film is continuously formed on the metal oxide film without being exposed to the element, an element forming layer is formed on the first insulating film, and a second insulating film is formed covering the element forming layer Then, an opening is formed in the second insulating film and the element formation layer, an etching agent is introduced into the opening to remove at least part of the metal film and the metal oxide film, and the element formation layer is physically removed from the substrate. It peels by a general means.

  According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a substrate, and plasma treatment is performed on the metal film in a mixed gas atmosphere of dinitrogen monoxide and argon. Forming a film, continuously forming a first insulating film on the metal oxide film without being exposed to the atmosphere, forming an element forming layer on the first insulating film, and covering the element forming layer with the first insulating film; 2 is formed, an opening is formed in the second insulating film and the element formation layer, an etching agent is introduced into the opening to remove the metal film and the metal oxide film, and the element formation layer is peeled from the substrate To do.

  According to one method for manufacturing a semiconductor device of the present invention, a metal film is formed on a substrate, and plasma treatment is performed on the metal film in a mixed gas atmosphere of dinitrogen monoxide and argon. Forming a film, continuously forming a first insulating film on the metal oxide film without being exposed to the atmosphere, forming an element forming layer on the first insulating film, and covering the element forming layer with the first insulating film; 2 is formed, an opening is formed in the second insulating film and the element formation layer, an etching agent is introduced into the opening to remove at least part of the metal film and the metal oxide film, and the substrate The element forming layer is peeled off by physical means.

  By using the present invention, when a semiconductor device is used as the element formation layer, a semiconductor device finally provided over a thin and flexible substrate can be provided at low cost. Further, by using the method for manufacturing a semiconductor device of the present invention, a highly reliable semiconductor device can be obtained.

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numerals are used in common in different drawings.

(Embodiment 1)
In this embodiment, a structural example of a method for manufacturing a semiconductor device of the present invention will be described with reference to drawings.

  First, the metal film 11 is formed on the surface of the substrate 10 (FIG. 1A). The metal film 11 may be formed as a single layer or may be formed by laminating a plurality of layers. For example, a tungsten (W) film is formed using a sputtering method. Note that an insulating film may be provided over the substrate 10 before the metal film 11 is formed. In particular, when there is a concern about contamination from the substrate, an insulating film is preferably formed between the substrate 10 and the metal film 11.

  Next, plasma treatment is performed on the metal film 11 in a mixed gas atmosphere of dinitrogen monoxide alone or dinitrogen monoxide and other gases, and a metal oxide film, a metal nitride film, or a metal oxynitride is formed on the surface of the metal film 11. A film 12 is formed (FIG. 1B). The metal oxide film, the metal nitride film, or the metal nitride oxide film 12 is formed by a chemical reaction product with a metal element constituting the metal film 11. For example, when a tungsten film is used as the metal film 11, a tungsten oxide film, a tungsten nitride, or a tungsten oxynitride as the metal oxide film, the metal nitride film, or the metal oxynitride film 12 is formed on the surface of the tungsten film by performing plasma treatment. Things are formed. Note that in this embodiment mode, a layer formed of the metal film 11 and the metal oxide film, the metal nitride film, or the metal nitride oxide film 12 is referred to as a peeling layer 19.

  Next, an insulating film 13 is formed over the metal oxide film, the metal nitride film, or the metal nitride oxide film 12 (FIG. 1C). The insulating film 13 may be provided as a single layer, or a plurality of films may be stacked.

  Next, a layer 14 (hereinafter also referred to as a TFT layer 14) composed of a thin film transistor or the like is formed on the insulating film 13. In the present embodiment, a layer formed of the insulating film 13 and the TFT layer 14 is referred to as an element formation layer 30. Subsequently, an insulating film 15 is formed as a protective film so as to cover the element formation layer 30 (FIG. 1D). The insulating film 15 is preferably formed so as to cover the side surface of the element formation layer 30. Here, the insulating film 15 is provided over the entire surface so as to cover the element formation layer 30, but it is not necessarily provided over the entire surface and may be selectively provided.

  Next, the opening 16 is formed in the insulating film 15 and the element formation layer 30, and the peeling layer 19 is exposed (FIG. 1E). The opening 16 is preferably provided in a region avoiding the thin film transistor or the like constituting the element forming layer 30 or in an end portion of the substrate 10. The opening 16 can be formed by laser light irradiation or grinding and cutting the end face of the sample.

  Next, an etchant is introduced from the opening 16 to selectively remove the peeling layer 19 (FIG. 2A). The release layer 19 may be completely removed or may be removed so as to leave a part of the release layer. By leaving a part of the release layer 19, the element formation layer 30 can be held on the substrate 10 even after the release layer is removed. Further, by performing the treatment without removing all of the release layer 19, the consumption of the etching agent can be reduced and the treatment time can be shortened, so that the cost and the efficiency can be improved.

  Next, a first sheet material 17 is provided over the insulating film 15 (FIG. 2B). The first sheet material 17 has adhesiveness on at least one surface, and is provided by bonding the element forming layer 30 and the first sheet material 17 together.

  Next, the element formation layer 30 is peeled from the substrate 10 (FIG. 2C). When a part of the peeling layer 19 remains between the substrate 10 and the element formation layer 30, the element formation layer 30 is peeled from the substrate 10 using physical means. In this case, since the peeling layer 19 provided by the above-described method is used, the element formation layer 30 and the peeling layer are formed by the fact that a certain amount of processes have already passed and the structure has changed at the stage of peeling. Since the adhesiveness 19 is lowered, the element forming layer 30 can be easily peeled from the substrate 10 even if physical means are used.

  Next, the second sheet material 18 is provided on the surface of the element forming layer 30 peeled from the substrate 10. (FIG. 2 (D)). The second sheet material 18 is provided by adhering to the element forming layer 30 and then performing one or both of heat treatment and pressure treatment. By providing the second sheet material, it is possible to reinforce the strength of the element formation layer 30 and prevent intrusion of moisture, contaminants, and the like. In addition, you may seal by providing the sheet material similar to a 2nd sheet material also on the other side in which the 2nd sheet material of the element formation layer was provided. In this case, when it is desired to form the semiconductor device thinner, it is preferable to provide a new sheet material and seal after removing the first sheet material.

  Through the above steps, a flexible semiconductor device can be manufactured. Hereinafter, materials and the like in each process will be specifically described.

  The substrate 10 may be a glass substrate, a quartz substrate, a metal substrate or a stainless steel substrate with an insulating film formed on one surface, a heat-resistant plastic substrate that can withstand the processing temperature in this step, or the like. If such a substrate is used, there is no significant limitation on the area or shape thereof. For example, if the substrate 10 is a rectangle having one side of 1 meter or more and a rectangular shape, the productivity is remarkably improved. be able to. Such an advantage is a great advantage compared to the case of using a circular silicon substrate. In this embodiment mode, the peeled substrate 10 can be reused, so that a semiconductor device can be manufactured at lower cost. For example, even when a high-cost quartz substrate is used, there is an advantage that a semiconductor device can be manufactured at low cost by repeatedly using the quartz substrate.

  The metal film 11 includes tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium (Zr), zinc (Zn), A film made of an element selected from ruthenium (Ru), rhodium (Rh), lead (Pb), osmium (Os), iridium (Ir), or an alloy material or compound material containing the element as a main component, It is formed by stacking. Further, these materials can be formed by using known means (various CVD methods such as sputtering and plasma CVD).

  The insulating film provided between the substrate 10 and the metal film 11 includes silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), and silicon nitride oxide (SiNxOy) (x> y). A single-layer structure of an insulating film containing oxygen or nitrogen, such as these, or a stacked structure thereof can be used. These insulating films can be formed using known means (various CVD methods such as sputtering and plasma CVD).

  The metal oxide film, the metal nitride film, or the metal nitride oxide film 12 is formed on the surface of the metal film 11 by performing plasma treatment on the surface of the metal film 11 in a dinitrogen monoxide atmosphere. For example, when a tungsten film formed by a sputtering method is provided as the metal film 11, a tungsten oxide, tungsten nitride, or tungsten oxynitride is formed on the tungsten film surface by performing plasma treatment on the tungsten film in a dinitrogen monoxide atmosphere. Things can be formed.

  The insulating film 13 is formed by a known means (sputtering method, plasma CVD method or the like) using silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) ( It can be formed using a single layer structure of an insulating film containing oxygen or nitrogen such as x> y) or a stacked structure thereof. For example, in the case where the insulating film 13 is provided with a two-layer structure, a silicon nitride oxide film may be formed as a first insulating film and a silicon oxynitride film may be formed as a second insulating film. When the insulating film 13 is provided in a three-layer structure, a silicon oxynitride film is formed as the first insulating film, a silicon nitride oxide film is formed as the second insulating film, and the third insulating film is formed. A silicon oxynitride film is preferably formed. Alternatively, a silicon oxide film may be formed as the first insulating film, a silicon nitride oxide film may be formed as the second insulating film, and a silicon oxynitride film may be formed as the third insulating film.

  The TFT layer 14 includes at least a thin film transistor (TFT). The TFT layer 14 can be provided with various integrated circuits such as a CPU, a memory, or a microprocessor by the thin film transistor. Further, the TFT layer 14 may take a form having an antenna in addition to the thin film transistor. For example, an integrated circuit including thin film transistors operates using an alternating voltage generated by an antenna, and can transmit to a reader / writer by modulating the alternating voltage applied to the antenna. Note that the antenna may be formed together with the thin film transistor, or may be formed separately from the thin film transistor and electrically connected later.

  As the thin film transistor, an amorphous semiconductor or a crystalline semiconductor can be used. However, in the case where a thin film transistor with higher characteristics is used, it is preferable to use a crystalline semiconductor to provide the thin film transistor. In this case, an amorphous semiconductor film is formed on the insulating film 13 by a known means (sputtering method, LPCVD method, plasma CVD method, etc.), and then the amorphous semiconductor film is formed by a known crystallization method (laser crystal). , A thermal crystallization method using an RTA or furnace annealing furnace, a thermal crystallization method using a metal element that promotes crystallization, a method combining a thermal crystallization method using a metal element that promotes crystallization and a laser crystallization method Etc.) to form a crystalline semiconductor film.

  The semiconductor film constituting the thin film transistor may have any structure. For example, an impurity region (including a source region, a drain region, and an LDD region) may be formed, and a p-channel type, an n-channel type, A CMOS circuit may be provided. In addition, an insulating film (side wall) may be formed so as to be in contact with a side surface of the gate electrode provided above the semiconductor film, and nickel, molybdenum, or one or both of the source region, the drain region, and the gate electrode may be formed. A silicide layer such as cobalt may be formed.

  The insulating film 15 is formed of a film containing carbon such as DLC (diamond-like carbon), a film containing silicon nitride, a film containing silicon nitride oxide, a film made of a resin material such as epoxy, or other organic materials. Note that the insulating film 15 can be formed using a known means (various CVD methods such as a sputtering method and a plasma CVD method, a spin coating method, a droplet discharge method, or a printing method).

As the etching agent, a gas or liquid containing halogen fluoride or an interhalogen compound such as chlorine trifluoride gas can be used. In addition, CF ₄ , SF ₆ , NF ₃ , F _{2 and the} like can be used.

  As the first sheet material 17, a flexible film can be used, and a surface having an adhesive is provided on at least one surface. For example, a sheet material in which an adhesive is provided on a base film used as a base material such as polyester can be used. As the adhesive, a material made of a resin material containing an acrylic resin or the like or a synthetic rubber material can be used.

  The second sheet material 18 can use a flexible film, for example, a film made of polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, paper made of a fibrous material, or a base film. A laminated film of an adhesive synthetic resin film (acrylic synthetic resin, epoxy synthetic resin, etc.) and the like (polyester, polyamide, inorganic vapor deposition film, paper, etc.) can be used. In addition, the film is subjected to heat treatment and pressure treatment, and when the heat treatment and pressure treatment are performed, an adhesive layer provided on the outermost surface of the film or an outermost layer is used. The provided layer (not the adhesive layer) is melted by heat treatment and bonded by pressure. When the element forming layer is sealed with the first sheet material 17 and the second sheet material 18, the first sheet material may be sealed with the same material.

  As described above, according to this embodiment mode, after providing an element formation layer over a rigid substrate such as glass, the element formation layer is peeled from the substrate, whereby a flexible semiconductor device is manufactured. can do. Further, by using the method described in this embodiment, a peeling layer is formed and peeling is performed, whereby a highly reliable semiconductor device can be manufactured at low cost.

(Embodiment 2)
In this embodiment, a method for manufacturing a semiconductor device, which is different from that in the above embodiment, will be described with reference to drawings.

  First, the metal film 11 is formed on the surface of the substrate 10 (FIG. 4A). The metal film 11 may be formed as a single layer or may be formed by laminating a plurality of layers. For example, a tungsten (W) film is formed using a sputtering method. Note that an insulating film may be provided over the substrate 10 before the metal film 11 is formed. In particular, when there is a concern about contamination from the substrate, an insulating film is preferably formed between the substrate 10 and the metal film 11.

  Next, in the present embodiment, the metal film 11 is obtained by performing heat treatment using an RTA, a furnace annealing furnace, or the like in a mixed gas atmosphere of dinitrogen monoxide alone or dinitrogen monoxide and other gases. Then, a metal oxide film, a metal nitride film or a metal oxynitride film 22 is formed on the surface of the metal film 11. Here, an example in which heat treatment is performed by RTA will be described. (FIG. 4B). FIG. 4B shows an apparatus for heating a sample, which includes a chamber 70, a support base 71, a heat source body 72, a heat insulating material 73, and the like. As the heat source 72, a heating wire such as a nickel chrome wire (nichrome wire) or an iron chrome wire, or a lamp such as an infrared lamp or a halogen lamp is used.

  First, the substrate 10 provided with the metal film 11 is placed on the support base 71 in the chamber 70. Then, by heating using the heat source body 72, the metal film 11 is heat-treated in a mixed gas atmosphere of dinitrogen monoxide alone or dinitrogen monoxide and another gas, and the surface of the metal film 11 is oxidized with metal. A film, a metal nitride film, or a metal oxynitride film 22 is formed. By controlling the temperature and time of the heat treatment, the thickness of the metal oxide film, the metal nitride film, or the metal nitride oxide film 22 can be adjusted.

  Note that the example shown in FIG. 4 is merely an example, and any metal film formed on the substrate can be heated to form a metal oxide film, a metal nitride film, or a metal oxynitride film on the surface. Such an apparatus may be used. That is, in this embodiment, it is important to form a metal oxide film, a metal nitride film, or a metal oxynitride film on the surface of the metal film by performing heat treatment on the metal film formed over the substrate. Further, the substrates may be processed one by one, or a large number of substrates may be processed simultaneously. In particular, when it is desired to process many substrates at once, a batch type furnace annealing furnace can be used.

  After that, a semiconductor device can be manufactured through steps similar to those illustrated in FIGS. 1C to 2D described in the above embodiment.

  Note that this embodiment mode can be freely combined with the above embodiment modes. That is, the materials and formation methods described in the above embodiment modes can be freely combined and used in this embodiment mode.

(Embodiment 3)
In this embodiment, a method for manufacturing a semiconductor device, which is different from that described in the above embodiments, will be described with reference to drawings.

  First, a metal oxide film, a metal nitride film, or a metal oxynitride film 31 is formed on the surface of the substrate 10 by performing sputtering in a mixed gas atmosphere of dinitrogen monoxide alone or dinitrogen monoxide and other gases. It is formed (FIG. 5A). For example, by performing sputtering using tungsten as a target in an atmosphere of a dinitrogen monoxide alone or a mixed gas of argon and dinitrogen monoxide, a tungsten oxide film (WOx), a tungsten nitride film (WNx), or a tungsten oxynitride film A film (WNxOy) can be formed on the substrate 10. In addition to tungsten, molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium (Zr), zinc (Zn), ruthenium ( A film made of an element selected from Ru), rhodium (Rh), lead (Pb), osmium (Os), iridium (Ir), or an alloy material or a compound material containing the element as a main component, or a single layer or a multilayer To form. The material may contain silicon (Si).

  Next, the insulating film 13 is formed over the metal oxide film, the metal nitride film, or the metal nitride oxide film 31 (FIG. 5B). The insulating film 13 may be provided as a single layer, or a plurality of films may be stacked.

  Next, a layer 14 (TFT layer 14) composed of a thin film transistor or the like is formed on the insulating film 13. In the present embodiment, the layer formed of the insulating film 13 and the TFT layer 14 is referred to as an element formation layer 30 for convenience. Subsequently, an insulating film 15 is formed as a protective film so as to cover the element formation layer 30 (FIG. 5C). The insulating film 15 is preferably formed so as to cover the side surface of the element formation layer 30. Here, the insulating film 15 is provided over the entire surface so as to cover the element formation layer 30, but it is not necessarily provided over the entire surface and may be selectively provided.

  Next, the opening 16 is formed in the insulating film 15 and the element formation layer 30 to expose the peeling layer 19 (FIG. 5D). The opening 16 is preferably provided in a region avoiding the thin film transistor or the like constituting the element forming layer 30 or in an end portion of the substrate 10. The opening 16 can be formed by laser light irradiation or grinding and cutting the end face of the sample.

  Next, an etching agent such as halogen fluoride such as chlorine trifluoride gas is introduced from the opening 16 to selectively remove the metal oxide film, the metal nitride film, or the metal oxynitride film 31 (FIG. 5). (E)). The metal oxide film, the metal nitride film, or the metal nitride oxide film 31 may be completely removed or may be removed so as to leave a part. Even after the metal oxide film, the metal nitride film, or the metal oxynitride film 31 is removed by leaving a part of the metal oxide film, the metal nitride film, or the metal oxynitride film 31, the element forming layer 30 is formed on the substrate 10. Can be held. Further, by performing the processing without removing all of the metal oxide film, the metal nitride film, or the metal nitride oxide film 31, the consumption of the etching agent can be reduced and the processing time can be shortened. Can be achieved.

  Thereafter, as shown in the above embodiment, the element forming layer 30 can be separated from the substrate 10 by providing the element forming layer 30 with a first sheet material. In the present embodiment, the metal oxide film, the metal nitride film, or the metal nitride oxide film 31 functions as a release layer.

  Note that in this embodiment, sputtering is performed directly on the surface of the substrate 10 in a dinitrogen monoxide simple substance or a mixed gas atmosphere of dinitrogen monoxide and other gases, whereby a metal oxide film, a metal nitride film, or Although an example in which the metal oxynitride film 31 is formed is shown, a metal film may be provided on the substrate 10 in advance, and a metal oxide film, a metal nitride film, or a metal oxynitride film 31 may be provided on the metal film. In this case, the metal elements contained in the metal film and the metal oxide film, the metal nitride film, or the metal oxynitride film may be different.

  Note that this embodiment mode can be freely combined with the above embodiment modes. That is, the materials and formation methods described in the above embodiment modes can be freely combined and used in this embodiment mode.

(Embodiment 4)
In the above embodiment, an example in which a metal film, a metal oxide film, a metal nitride film or a metal nitride oxide film, an insulating film, and an amorphous semiconductor film of a thin film transistor that forms an element formation layer are sequentially formed is shown. . In this embodiment mode, a case where a conductive film, an insulating film, or a semiconductor film are continuously formed as described above will be described with reference to drawings.

  An example of an apparatus provided with a plurality of chambers is shown in FIG. Note that FIG. 3A is a top view of a structural example of the apparatus (continuous film formation system) described in this embodiment.

  The apparatus shown in FIG. 3A includes a first chamber 111, a second chamber 112, a third chamber 113, a fourth chamber 114, load lock chambers 110 and 115, and a common chamber 120. Each chamber is airtight. Each chamber is provided with a vacuum exhaust pump and an inert gas introduction system.

  The load lock chambers 110 and 115 are rooms for carrying samples (processing substrates) into the system. The first to fourth chambers are chambers for forming a conductive film, an insulating film, or a semiconductor film on the substrate 10, etching, plasma processing, and the like. The common chamber 120 is a sample common chamber 120 arranged in common for the load lock chambers 110 and 115 and the first to fourth chambers. Gate valves 122 to 127 are provided between the common chamber 120, the load lock chambers 110 and 115, and the first to fourth chambers 111 to 114. Note that a robot arm 121 is provided in the common chamber 120, and the processing substrate is carried to each room by the robot arm 121.

  As a specific example, a metal film 11 is formed in the first chamber 111 and a metal oxide film, a metal nitride film, or a metal oxynitride film 12 is formed in the second chamber 112 on the substrate 10 as a specific example. An example in which the insulating film 13 is formed in the third chamber 113 and the amorphous semiconductor film is formed in the fourth chamber will be described.

  First, the substrate 10 is carried into the load lock chamber 110 together with a cassette 128 in which a large number of sheets are stored. After loading the cassette 128, the loading door of the load lock chamber 110 is closed. In this state, the gate valve 122 is opened and one processing substrate is taken out from the cassette 128 and placed in the common chamber 120 by the robot arm 121. At this time, the alignment of the substrate 10 is performed in the common chamber 120.

  Next, the gate valve 122 is closed, and then the gate valve 124 is opened. Then, the substrate 10 is transferred to the first chamber 111. A metal film 11 is formed on the substrate 10 by performing a film forming process in the first chamber 111. For example, in the first chamber 111, a tungsten (W) film can be formed by a plasma CVD method or a sputtering method using W as a target.

  Next, after forming the metal film 11, the substrate 10 is pulled out to the common chamber 120 by the robot arm 121 and transferred to the second chamber 112. In the second chamber 112, the surface of the metal film 11 is oxidized by performing plasma treatment on the metal film 11 in a mixed gas atmosphere of dinitrogen monoxide alone or dinitrogen monoxide and other gases. A film, a metal nitride film, or a metal oxynitride film 12 is formed. For example, in the second chamber 112, a tungsten oxide (WOx), a tungsten nitride film (WNx), or a tungsten oxynitride film (WNOx) can be formed by performing plasma treatment on the tungsten film.

  Next, after forming the metal oxide film, the metal nitride film, or the metal oxynitride film 12, the substrate 10 is pulled out to the common chamber 120 by the robot arm 121 and transferred to the third chamber 113. In the third chamber 113, film formation is performed at a temperature of 150 ° C. to 300 ° C. to form the insulating film 13. As the insulating film 13, a single layer film of an insulating film containing oxygen or nitrogen, such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide, or a stacked film thereof can be formed. For example, in the third chamber 113, a silicon nitride oxide film is formed as a first insulating film, a silicon nitride oxide film is formed as a second insulating film, and a third insulating film is formed by plasma CVD. As a result, a silicon oxynitride film can be formed. Note that the present invention is not limited to the plasma CVD method, and may be formed by a sputtering method using a target.

  Next, after forming the insulating film 13, the substrate 10 is pulled out to the common chamber 120 by the robot arm 121 and transferred to the fourth chamber 114. In the fourth chamber 114, film formation is performed at a temperature of 150 ° C. to 300 ° C., and an amorphous semiconductor film is formed by a plasma CVD method. Note that as the amorphous semiconductor film, a microcrystalline semiconductor film, an amorphous germanium film, an amorphous silicon germanium film, a stacked film of these, or the like can be used. Further, the heat treatment for reducing the hydrogen concentration may be omitted by setting the formation temperature of the amorphous semiconductor film to 350 ° C. to 500 ° C. Note that although an example in which the plasma CVD method is used is shown here, the sputtering method using a target may be used.

  As described above, after the amorphous semiconductor film is formed, the substrate 10 is transferred to the load lock chamber 115 by the robot arm 121 and stored in the cassette 129.

  Note that FIG. 3A is just an example, and for example, a conductive film or an insulating film may be formed after the number of chambers is increased and an amorphous semiconductor film is further formed, As described in Embodiment Mode 2, the metal oxide film, the metal nitride film, or the metal oxynitride film 22 may be formed by performing heat treatment in the second chamber 112. Further, as shown in Embodiment Mode 3 above, sputtering is performed on the substrate 10 in the first chamber 111 by performing sputtering in a mixed gas atmosphere of dinitrogen monoxide alone or dinitrogen monoxide and other gases. A metal oxide, metal nitride film, or metal oxynitride film 31 can also be formed. That is, it can be freely combined with the apparatus shown in FIG. 3A using the steps and materials described in the above embodiment modes. 3A illustrates an example in which the first to fourth chambers 111 to 114 are single-type chambers, a configuration in which a large number of sheets are processed at once using a batch-type chamber may be used. .

  Next, the case where the structure is different from that in FIG. 3A is described with reference to FIG. Specifically, FIG. 3A illustrates an example in which a plurality of chambers are used to continuously stack layers, but FIG. 3B illustrates a case where continuous vacuum is maintained in one chamber. Shows an example of film formation.

  The apparatus illustrated in FIG. 3B includes load lock chambers 144 and 146, a chamber 145, and a common chamber 150. Each room is provided with a vacuum exhaust pump and an inert gas introduction system. The common chamber 150 is a sample common chamber that is commonly arranged for the load lock chambers 144 and 145 and the chamber 145. Gate valves 147 to 149 are provided between the common chamber 150 and the load lock chambers 144 and 146 and the chamber 145. Note that a robot arm 151 is provided in the common chamber 150, and the processing substrate is carried to each room by the robot arm 151.

  As a specific example, an example in which a metal film 11, a metal oxide film, a metal nitride film or a metal nitride oxide film 12, an insulating film 13, and an amorphous semiconductor film are formed on the substrate 10 will be described.

  First, the substrate 10 is carried into the load lock chamber 144 together with the cassette 142 storing a large number of sheets. After loading the cassette 142, the loading door of the load lock chamber 144 is closed. In this state, the gate valve 147 is opened, one processing substrate is taken out from the cassette 142, and placed in the common chamber 150 by the robot arm 151. At this time, the alignment of the substrate 10 is performed in the common chamber 150.

  Next, the gate valve 147 is closed, and then the gate valve 149 is opened. Then, the substrate 10 is transferred to the chamber 145 by the robot arm 151. The chamber 145 includes a plurality of targets. By sequentially changing the reaction gas, the metal film 11, the metal oxide film, the metal nitride film or the metal nitride oxide film 12, the insulating film 13, and the amorphous semiconductor film are formed on the substrate 10. Can be laminated continuously.

  Thereafter, the substrate 10 is transferred to the load lock chamber 146 by the robot arm 151 and stored in the cassette 143.

  Note that FIG. 3B is just an example, and for example, a conductive film or an insulating film may be formed after the formation of the amorphous semiconductor film, or as shown in Embodiment Mode 2 above. As described above, the metal oxide film, the metal nitride film, or the metal oxynitride film 22 may be formed by performing heat treatment. Further, as shown in the third embodiment, a metal oxide or metal nitride film is formed on the substrate 10 by performing sputtering in a mixed gas atmosphere of dinitrogen monoxide alone or dinitrogen monoxide and other gases. Alternatively, the metal oxynitride film 31 can be formed. That is, it can be freely combined with the apparatus shown in FIG. 3B by using the steps and materials described in the above embodiment modes. 3B illustrates an example in which the chamber 145 uses a single-type chamber, a configuration in which a large number of sheets are processed at once using a batch-type chamber may be used.

  By using the apparatus shown in FIG. 3B, a film is continuously formed in the same chamber, so that contamination or the like that occurs when the substrate is transferred can be prevented.

  By using the apparatus described in this embodiment mode, a conductive film, an insulating film, or a semiconductor film can be continuously formed without being exposed to the atmosphere even once. Therefore, it is possible to prevent contamination from being mixed and improve production efficiency.

(Embodiment 5)
In this embodiment, a method for manufacturing a semiconductor device of the present invention including a thin film transistor, a memory element, and an antenna will be described with reference to drawings.

  First, the separation layer 702 is formed over one surface of the substrate 701 (FIG. 6A). As the substrate 701, a glass substrate, a quartz substrate, a metal substrate, a stainless steel substrate with an insulating film formed on one surface, a heat-resistant plastic substrate that can withstand the processing temperature in this step, or the like may be used. With such a substrate 701, there is no significant limitation on the area and shape thereof. For example, if the substrate 701 is a rectangular substrate having a side of 1 meter or more and a rectangular shape, productivity is remarkably improved. Can be made. Such an advantage is a great advantage compared to the case of using a circular silicon substrate. Note that in this step, the separation layer 702 is provided over the entire surface of the substrate 701; however, if necessary, the separation layer 702 is provided over the entire surface of the substrate 701 and then processed by photolithography to be selectively provided. May be. In addition, although the separation layer 702 is formed so as to be in contact with the substrate 701, an insulating film serving as a base is formed so as to be in contact with the substrate 701 as necessary, and the separation layer 702 is formed so as to be in contact with the insulation film. May be.

  The separation layer 702 is formed using a metal film and the metal oxide film, the metal nitride film, or the metal nitride oxide film. The metal film is formed by a known means (sputtering method, plasma CVD method, etc.) tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt ( Co), zirconium (Zr), zinc (Zn), ruthenium (Ru), rhodium (Rh), lead (Pb), osmium (Os), iridium (Ir) or an element selected from the above elements A layer made of an alloy material or a compound material is formed as a single layer or a stacked layer. The metal oxide film, metal nitride film, or metal nitride oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere or by performing heat treatment on the metal film in a dinitrogen monoxide atmosphere. Form.

  In the case where the metal film has a single-layer structure, for example, a tungsten layer, a molybdenum layer, or a layer containing a mixture of tungsten and molybdenum is formed. Then, on the surface of the metal film, a layer containing tungsten oxide, nitride or nitride oxide, a layer containing molybdenum oxide, nitride or nitride oxide, or a mixture of tungsten and molybdenum oxide, nitride or A layer including a nitrided oxide is formed. Note that the mixture of tungsten and molybdenum corresponds to, for example, an alloy of tungsten and molybdenum.

  In addition, after a metal film is formed over the substrate 701 as the separation layer 702, a metal oxide film, a metal nitride film, or a metal oxynitride film is formed by a sputtering method using the metal film material as a target in a dinitrogen monoxide atmosphere. It may be formed. In this case, the metal film and the metal oxide film, the metal nitride film, or the metal nitride oxide film can be formed using another metal element. Note that a metal oxide film, a metal nitride film, or a metal nitride oxide film may be directly formed over the substrate 701 and used as the separation layer 702.

  Next, an insulating film 703 serving as a base is formed so as to cover the separation layer 702. As the insulating film 703, a film containing a silicon oxide or a silicon nitride is formed as a single layer or a stacked layer by a known means (such as a sputtering method or a plasma CVD method). In the case where the base insulating film has a two-layer structure, for example, a silicon nitride oxide film may be formed as the first layer and a silicon oxynitride film may be formed as the second layer. When the base insulating film has a three-layer structure, a silicon oxide film is formed as the first insulating film, a silicon nitride oxide film is formed as the second insulating film, and oxynitriding is performed as the third insulating film. A silicon film is preferably formed. Alternatively, a silicon oxynitride film may be formed as the first insulating film, a silicon nitride oxide film may be formed as the second insulating film, and a silicon oxynitride film may be formed as the third insulating film. The insulating film serving as a base functions as a blocking film that prevents impurities from entering from the substrate 701.

  Next, an amorphous semiconductor film 704 (eg, a film containing amorphous silicon) is formed over the insulating film 703. The amorphous semiconductor film 704 is formed with a thickness of 25 to 200 nm (preferably 30 to 150 nm) by a known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like). Subsequently, the amorphous semiconductor film 704 is subjected to a known crystallization method (laser crystallization method, thermal crystallization method using an RTA or furnace annealing furnace, thermal crystallization method using a metal element that promotes crystallization, or crystallization. A crystalline semiconductor film is formed by crystallization by a combination of a thermal crystallization method using a promoting metal element and a laser crystallization method). After that, the obtained crystalline semiconductor film is processed into a desired shape to form crystalline semiconductor films 706 to 710 (FIG. 6B). Note that the separation layer 702, the insulating film 703, and the amorphous semiconductor film 704 can be formed successively as shown in FIG.

  An example of a manufacturing process of the crystalline semiconductor films 706 to 710 will be briefly described below. First, an amorphous semiconductor film having a thickness of 66 nm is formed using a plasma CVD method. Next, after a solution containing nickel, which is a metal element that promotes crystallization, is held on the amorphous semiconductor film, the amorphous semiconductor film is subjected to dehydrogenation treatment (500 ° C., 1 hour), heat Crystallization treatment (550 ° C., 4 hours) is performed to form a crystalline semiconductor film. Thereafter, laser light is irradiated as necessary, and crystalline semiconductor films 706 to 710 are formed by processing using a photolithography method.

In the case of forming a crystalline semiconductor film by a laser crystallization method, a continuous wave or pulsed gas laser or solid state laser is used. As the gas laser, excimer laser, YAG laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, Ti: sapphire laser, or the like is used. As the solid-state laser, a laser using a crystal such as YAG, YVO ₄ , YLF, or YAlO ₃ doped with Cr, Nd, Er, Ho, Ce, Co, Ti, or Tm is used. In particular, a crystal having a large grain size can be obtained by irradiating a fundamental wave of a continuous wave laser and a second to fourth harmonic laser of the fundamental wave. For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. The continuous wave fundamental laser beam and the continuous wave harmonic laser beam may be irradiated, or the continuous wave fundamental laser beam and the pulsed harmonic laser beam may be irradiated. You may do it. By irradiating a plurality of laser beams, energy can be supplemented. Also, it is a pulse oscillation type laser that oscillates the laser light at an oscillation frequency that can be irradiated with the laser light of the next pulse after the semiconductor film is melted by the laser light and solidifies in the scanning direction. Crystal grains grown continuously can be obtained. That is, it is possible to use a pulsed laser in which the lower limit of the oscillation frequency is set so that the period of pulse oscillation is shorter than the time until the semiconductor film is completely solidified after being melted. As such a laser, a pulsed laser beam having an oscillation frequency of 10 MHz or more may be used.

  In addition, when an amorphous semiconductor film is crystallized using a metal element that promotes crystallization, it is possible to perform crystallization at a low temperature for a short time, and the crystal orientation is aligned. Remains in the crystalline semiconductor film, so that the off-current increases and the characteristics are not stable. Therefore, an amorphous semiconductor film functioning as a gettering site is preferably formed over the crystalline semiconductor film. Since the amorphous semiconductor film serving as a gettering site needs to contain an impurity element such as phosphorus or argon, it is preferably formed by a sputtering method which can contain argon at a high concentration. Then, heat treatment (RTA method or thermal annealing using a furnace annealing furnace) is performed to diffuse the metal element in the amorphous semiconductor film, and then the amorphous semiconductor film containing the metal element is removed. To do. Then, the content of the metal element in the crystalline semiconductor film can be reduced or removed.

  Next, a gate insulating film 705 covering the crystalline semiconductor films 706 to 710 is formed. The gate insulating film 705 is formed as a single layer or a stack of films containing a silicon oxide or a silicon nitride by a known means (plasma CVD method or sputtering method). Specifically, a film containing silicon oxide, a film containing silicon oxynitride, or a film containing silicon nitride oxide is formed as a single layer or a stacked layer.

    Further, after forming a substrate, an insulating film, a semiconductor film, a gate insulating film, an interlayer insulating film, and other insulating films constituting a semiconductor device, the substrate, the insulating film, The surface of the semiconductor film, gate insulating film, or interlayer insulating film may be oxidized or nitrided. When a semiconductor film or an insulating film is oxidized or nitrided using plasma treatment, the surface of the semiconductor film or the insulating film is modified so that the insulating film becomes denser than an insulating film formed by a CVD method or a sputtering method. be able to. Therefore, defects such as pinholes can be suppressed and the characteristics of the semiconductor device can be improved. The plasma treatment as described above can be performed on a conductive film such as a gate electrode film, a source wiring, and a drain wiring, and a nitride film or an oxide film can be formed on the surface by performing nitridation or oxidation. .

    In this embodiment, after the gate insulating film 705 is formed, plasma treatment is performed to oxidize or nitride the gate insulating film 705. Although not shown, an oxide film or a nitride film is formed over the gate insulating film 705 by plasma treatment. When silicon oxide (SiOx) or silicon oxynitride (SiOxNy) (x> y) is used as the gate insulating film 705, plasma treatment is performed in an oxygen atmosphere to oxidize the gate insulating film 705, whereby the surface of the gate insulating film A dense film with few defects such as pinholes can be formed as compared with a gate insulating film formed by CVD or sputtering. On the other hand, when the gate insulating film 705 is nitrided by performing plasma treatment in a nitrogen atmosphere, silicon nitride oxide (SiNxOy) (x> y) can be provided as an insulating film on the surface of the gate insulating film 705. Alternatively, the gate insulating film 705 may be oxidized by once performing plasma treatment in an oxygen atmosphere, and then nitrided by performing plasma treatment again in a nitrogen atmosphere.

Note that in the case of oxidizing a film by plasma treatment, an oxygen atmosphere (for example, oxygen (O ₂ ) and a rare gas (including at least one of He, Ne, Ar, Kr, and Xe) atmosphere or oxygen and hydrogen are used. (H ₂ ) and a rare gas atmosphere or dinitrogen monoxide and a rare gas atmosphere). On the other hand, in the case of nitriding a film by plasma treatment, in a nitrogen atmosphere (for example, nitrogen (N ₂ ) and a rare gas (including at least one of He, Ne, Ar, Kr, and Xe) or nitrogen and hydrogen And a rare gas atmosphere or NH ₃ and a rare gas atmosphere). As the rare gas, for example, Ar can be used. A gas in which Ar and Kr are mixed may be used. Therefore, the insulating film formed by the plasma treatment contains a rare gas (including at least one of He, Ne, Ar, Kr, and Xe) used for the plasma processing, and when Ar is used, the insulating film Contains Ar.

The plasma treatment is performed in an atmosphere of the gas at an electron density of 1 × 10 ¹¹ cm ⁻³ or more and an electron temperature of plasma of 1.5 eV or less. More specifically, the electron density is 1 × 10 ¹¹ cm ^{−3 to} 1 × 10 ¹³ cm ⁻³ and the electron temperature of plasma is 0.5 eV to 1.5 eV. Since the electron density of plasma is high and the electron temperature in the vicinity of the object to be processed (here, the gate insulating film 705) formed on the substrate is low, damage to the object to be processed can be prevented. . In addition, since the electron density of plasma is as high as 1 × 10 ¹¹ cm ⁻³ or more, an oxide or a nitride film formed by oxidizing or nitriding an irradiation object using plasma treatment is a CVD method. Compared with a film formed by sputtering or the like, a film having excellent uniformity in film thickness and the like and a dense film can be formed. In addition, since the electron temperature of plasma is as low as 1.5 eV or less, oxidation or nitridation can be performed at a lower temperature than conventional plasma treatment or thermal oxidation. For example, even if the plasma treatment is performed at a temperature lower by 100 degrees or more than the strain point of the glass substrate, the oxidation or nitridation treatment can be sufficiently performed. Note that a high frequency such as a microwave (2.45 GHz) can be used as a frequency for forming plasma. Note that the plasma treatment is performed using the above conditions unless otherwise specified.

    As described above, by performing the plasma treatment before forming the gate electrode film, the semiconductor film exposed due to the coating failure is oxidized or oxidized even when the gate insulating film coating failure occurs at the edge of the semiconductor film. Since nitriding can be performed, a short circuit between the gate electrode film and the semiconductor film due to poor coverage of the gate insulating film at the end of the semiconductor film can be prevented.

  Next, a first conductive film and a second conductive film are stacked over the gate insulating film 705. The first conductive film is formed with a thickness of 20 to 100 nm by a known means (plasma CVD method or sputtering method). The second conductive film is formed with a thickness of 100 to 400 nm by a known means. The first conductive film and the second conductive film include tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium ( Nb) or the like or an alloy material or a compound material containing these elements as a main component. Alternatively, a semiconductor material typified by polycrystalline silicon doped with an impurity element such as phosphorus is used. As examples of combinations of the first conductive film and the second conductive film, a tantalum nitride (TaN) film and a tungsten (W) film, a tungsten nitride (WN) film and a tungsten film, a molybdenum nitride (MoN) film and molybdenum (Mo) film | membrane etc. are mentioned. Since tungsten and tantalum nitride have high heat resistance, heat treatment for thermal activation can be performed after the first conductive film and the second conductive film are formed. In the case of a three-layer structure instead of a two-layer structure, a stacked structure of a molybdenum film, an aluminum film, and a molybdenum film is preferably employed.

  Next, a mask made of a resist is formed using a photolithography method, and etching treatment for forming a gate electrode and a gate line is performed, so that conductive films (also referred to as gate electrodes) 716 to 725 functioning as gate electrodes are formed. Form.

  Next, a resist mask is formed by photolithography, and an impurity element imparting N-type is added to the crystalline semiconductor films 706 and 708 to 710 at a low concentration by ion doping or ion implantation. N-type impurity regions 711 and 713 to 715 and channel formation regions 780 and 782 to 784 are formed. The impurity element imparting N-type may be an element belonging to Group 15, for example, phosphorus (P) or arsenic (As).

  Next, a resist mask is formed by photolithography, and an impurity element imparting P-type conductivity is added to the crystalline semiconductor film 707 to form a P-type impurity region 712 and a channel formation region 781. For example, boron (B) is used as the impurity element imparting P-type.

  Next, an insulating film is formed so as to cover the gate insulating film 705 and the conductive films 716 to 725. As the insulating film, a single layer or a film containing an inorganic material such as silicon, an oxide of silicon, or a silicon nitride, or an organic material such as an organic resin is formed by a known means (plasma CVD method or sputtering method). It is formed by stacking. Next, the insulating film is selectively etched by anisotropic etching mainly in the vertical direction to form insulating films (also referred to as sidewalls) 739 to 743 that are in contact with the side surfaces of the conductive films 716 to 725 (FIG. 6 (C)). Simultaneously with the formation of the insulating films 739 to 743, insulating films 734 to 738 obtained by etching the gate insulating film 705 are formed. The insulating films 739 to 743 are used as a mask for doping when an LDD (Lightly Doped Drain) region is formed later.

  Next, an impurity element imparting n-type conductivity is added to the crystalline semiconductor films 706 and 708 to 710 using a resist mask formed by a photolithography method and the insulating films 739 to 743 as masks. N-type impurity regions (also referred to as LDD regions) 727, 729, 731 and 733, and second N-type impurity regions 726, 728, 730 and 732 are formed. The concentration of the impurity element contained in the first N-type impurity regions 727, 729, 731, and 733 is lower than the concentration of the impurity element in the second N-type impurity regions 726, 728, 730, and 732. Through the above steps, N-type thin film transistors 744 and 746 to 748 and a P-type thin film transistor 745 are completed.

  Note that in order to form the LDD region, the gate electrode has a stacked structure of two or more layers, and the gate electrode is etched or anisotropically etched so that the end has a tapered shape. There are a method using the lower conductive film constituting the mask as a mask and a method using the sidewall insulating film as a mask. A thin film transistor formed by employing the former method has a structure in which an LDD region is disposed so as to overlap a gate electrode with a gate insulating film interposed therebetween. In this structure, the end of the gate electrode has a taper. It is difficult to control the width of the LDD region in order to use etching or anisotropic etching to form a shape, and the LDD region may not be formed unless the etching process is performed well. . On the other hand, the latter method using the sidewall insulating film as a mask makes it easier to control the width of the LDD region than the former method, and the LDD region can be formed reliably.

  Next, an insulating film is formed as a single layer or a stacked layer so as to cover the thin film transistors 744 to 748 (FIG. 7A). The insulating film covering the thin film transistors 744 to 748 is formed by a known means (SOG method, droplet discharge method, etc.), an inorganic material such as silicon oxide or silicon nitride, polyimide, polyamide, benzocyclobutene, acrylic, epoxy. It is formed of a single layer or a laminated layer using an organic material such as siloxane. A siloxane-based material includes, for example, a skeleton structure composed of a bond between silicon and oxygen, a substance containing at least hydrogen as a substituent, or a skeleton structure composed of a bond between silicon and oxygen, and fluorine as a substituent. , A substance containing at least one of an alkyl group and an aromatic hydrocarbon. For example, when the insulating film covering the thin film transistors 744 to 748 has a three-layer structure, a film containing silicon oxide is formed as the first insulating film 749, a film containing resin is formed as the second insulating film 750, A film containing silicon nitride is preferably formed as the third insulating film 751.

  Note that before the insulating films 749 to 751 are formed or after one or more thin films of the insulating films 749 to 751 are formed, the crystallinity of the semiconductor film is restored and the activity of the impurity element added to the semiconductor film is increased. Heat treatment for the purpose of hydrogenation of the semiconductor film is preferably performed. For the heat treatment, thermal annealing, laser annealing, RTA, or the like is preferably applied.

  Next, the insulating films 749 to 751 are etched by photolithography to form contact holes that expose the N-type impurity regions 726 and 728 to 732 and the P-type impurity region 785. Subsequently, a conductive film is formed so as to fill the contact hole, and the conductive film is patterned to form conductive films 752 to 761 functioning as source / drain wirings.

  The conductive films 752 to 761 are made of an element selected from titanium (Ti), aluminum (Al), and neodymium (Nd) by known means (plasma CVD method or sputtering method), or an alloy containing these elements as a main component. The material or compound material is formed as a single layer or a stacked layer. The alloy material containing aluminum as a main component corresponds to, for example, a material containing aluminum as a main component and containing nickel, or an alloy material containing aluminum as a main component and containing nickel and one or both of carbon and silicon. The conductive films 752 to 761 include, for example, a stacked structure of a barrier film, an aluminum silicon (Al—Si) film, and a barrier film, and a stacked structure of a barrier film, an aluminum silicon (Al—Si) film, a titanium nitride (TiN) film, and a barrier film. A structure should be adopted. Note that the barrier film corresponds to a thin film formed of titanium, titanium nitride, molybdenum, or molybdenum nitride. Aluminum and aluminum silicon are suitable materials for forming the conductive films 752 to 761 because they have low resistance and are inexpensive. In addition, when an upper layer and a lower barrier layer are provided, generation of hillocks of aluminum or aluminum silicon can be prevented. In addition, when a barrier film made of titanium, which is a highly reducing element, is formed, even if a thin natural oxide film is formed on the crystalline semiconductor film, the natural oxide film is reduced, and the crystalline semiconductor film is excellent. Contact can be made.

  Next, an insulating film 762 is formed so as to cover the conductive films 752 to 761 (FIG. 7B). The insulating film 762 is formed as a single layer or a stacked layer using an inorganic material or an organic material by a known means (SOG method, droplet discharge method, or the like). The insulating film 762 is preferably formed with a thickness of 0.75 to 3 μm.

  Subsequently, the insulating film 762 is etched by photolithography to form contact holes that expose the conductive films 757, 759, and 761. Subsequently, a conductive film is formed so as to fill the contact hole. The conductive film is formed of a conductive material using a known means (plasma CVD method or sputtering method). Next, the conductive film is patterned to form conductive films 763 to 765. Note that the conductive films 763 to 765 are one of a pair of conductive films included in the memory element. Therefore, the conductive films 763 to 765 are preferably formed in a single layer or a stacked layer using titanium or an alloy material or a compound material containing titanium as a main component. Since titanium has a low resistance value, it leads to a reduction in the size of the memory element, and high integration can be realized. In the photolithography process for forming the conductive films 763 to 765, wet etching may be performed in order to prevent damage to the lower thin film transistors 744 to 748, and hydrogen fluoride (HF) is used as an etchant. Alternatively, a solution composed of ammonia and hydrogen peroxide solution may be used.

  Next, an insulating film 766 is formed so as to cover the conductive films 763 to 765. The insulating film 766 is formed as a single layer or a stacked layer using an inorganic material or an organic material by a known means (SOG method, droplet discharge method, or the like). The insulating film 762 is preferably formed with a thickness of 0.75 to 3 μm. Subsequently, the insulating film 766 is etched by photolithography to form contact holes 767 to 769 that expose the conductive films 763 to 765.

  Next, a conductive film 786 functioning as an antenna is formed in contact with the conductive film 765 (FIG. 8A). The conductive film 786 is formed using a conductive material by a known means (plasma CVD method, sputtering method, printing method, droplet discharge method). Preferably, the conductive film 786 is an element selected from aluminum (Al), titanium (Ti), silver (Ag), and copper (Cu), or an alloy material or a compound material containing these elements as a main component. It is formed by layer or lamination. Specifically, the conductive film 786 is formed using a paste containing silver by a screen printing method, and then heat-treated at 50 to 350 degrees. Alternatively, an aluminum film is formed by a sputtering method, and the aluminum film is formed by patterning. For the patterning of the aluminum film, a wet etching process may be used, and after the wet etching process, a heat treatment of 200 to 300 degrees may be performed.

  Next, an organic compound layer 787 is formed so as to be in contact with the conductive films 763 and 764 (FIG. 8B). The organic compound layer 787 is formed by a known means (such as a droplet discharge method or a vapor deposition method). Subsequently, a conductive film 771 is formed so as to be in contact with the organic compound layer 787. The conductive film 771 is formed by a known means (a sputtering method or a vapor deposition method).

  Through the above steps, a memory element portion 789 including a stack of the conductive film 763, the organic compound layer 787, and the conductive film 771, and a memory element portion 790 including a stack of the conductive film 764, the organic compound layer 787, and the conductive film 771. Is completed.

  Note that in the above manufacturing process, the heat resistance of the organic compound layer 787 is not strong; therefore, the step of forming the organic compound layer 787 is performed after the step of forming the conductive film 786 functioning as an antenna.

  Next, an insulating film 772 functioning as a protective film is formed by a known means (an SOG method, a droplet discharge method, or the like) so as to cover the memory element portions 789 and 790 and the conductive film 786 functioning as an antenna. The insulating film 772 is formed using a film containing carbon such as DLC (diamond-like carbon), a film containing silicon nitride, a film containing silicon nitride oxide, or an organic material, preferably an epoxy resin.

  Next, the insulating film is etched by photolithography or laser light irradiation so that the separation layer 702 is exposed to form openings 773 and 774 (FIG. 9A).

Next, an etchant is introduced into the openings 773 and 774 to remove the peeling layer 702 (FIG. 9B). As the etchant, a gas or liquid containing halogen fluoride or an interhalogen compound is used. For example, chlorine trifluoride (ClF ₃ ) is used as a gas containing halogen fluoride. Then, the element formation layer 791 is peeled from the substrate 701. Note that here, the element formation layer 791 is a combination of the element groups of the thin film transistors 744 to 748 and the memory element portions 789 and 790 and the conductive film 786 functioning as an antenna. Note that the peeling layer 702 may be partially left without being completely removed. By doing so, it is possible to reduce the consumption of the etching agent and shorten the processing time required for removing the release layer. Further, the element formation layer 791 can be held over the substrate 701 even after the peeling layer 702 is removed.

  The substrate 701 from which the element formation layer 791 has been peeled is preferably reused for cost reduction. The insulating film 772 is formed so that the element formation layer 791 is not scattered after the peeling layer 702 is removed. Since the element formation layer 791 is small and thin, the element formation layer 791 is not closely attached to the substrate 701 after the peeling layer 702 is removed, and thus is easily scattered. However, by forming the insulating film 772 over the element formation layer 791, the element formation layer 791 is weighted and scattering from the substrate 701 can be prevented. In addition, although the element formation layer 791 alone is thin and light, by forming the insulating film 772, the element formation layer 791 peeled off from the substrate 701 does not become a shape wound by stress or the like, and a certain degree of strength is secured. can do.

  Next, one surface of the element formation layer 791 is attached to the first sheet material 775 and completely peeled from the substrate 701 (FIG. 10A). In the case where a part of the separation layer 702 is not removed and a part is left, the element formation layer is separated from the substrate 701 using physical means. Subsequently, a second sheet material 776 is provided on the other surface of the element formation layer 791, and then one or both of heat treatment and pressure treatment are performed, and the second sheet material 776 is attached. In addition, the first sheet material 775 is peeled off at the same time or after the second sheet material 776 is provided, and a third sheet material 777 is provided instead. Then, one or both of heat treatment and pressure treatment is performed, and the third sheet material 777 is bonded. Then, a semiconductor device sealed with the second sheet material 776 and the third sheet material 777 is completed (FIG. 10B).

  Note that the first sheet material 775 and the second sheet material 776 may be sealed, but the sheet material for peeling the element formation layer 791 from the substrate 701 and the element formation layer 791 are sealed. When a different sheet material is used for the sheet material, the element formation layer 791 is sealed with the second sheet material 776 and the third sheet material 777 as described above. This is because, for example, when the element forming layer 791 is peeled from the substrate 701, the first sheet material 775 may be adhered to the substrate 701 as well as the element forming layer 791. Effective when you want to use.

  As the second sheet material 776 and the third sheet material 777 used for sealing, a film made of polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, paper made of a fibrous material, a base film (polyester, A laminated film of an adhesive synthetic resin film (such as an acrylic synthetic resin or an epoxy synthetic resin) and the like can be used. In addition, the film is subjected to heat treatment and pressure treatment, and when the heat treatment and pressure treatment are performed, an adhesive layer provided on the outermost surface of the film or an outermost layer is used. The provided layer (not the adhesive layer) is melted by heat treatment and bonded by pressure. Further, an adhesive layer may be provided on the surface of the second sheet material 776 and the third sheet material 777, or the adhesive layer may not be provided. The adhesive layer corresponds to a layer containing an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, or a resin additive. In addition, it is preferable to perform silica coating on the sheet material to be sealed in order to prevent moisture and the like from entering the inside after sealing. For example, a sheet material in which an adhesive layer, a film of polyester, etc. and a silica coat are laminated is used. be able to.

  Note that this embodiment can be freely combined with the above embodiment. That is, the material and the formation method described in the above embodiment can be used in this embodiment, and the material and the formation method described in this embodiment can be used in the above embodiment.

(Embodiment 6)
An example of forming a static RAM (SRAM) as one of the elements constituting the semiconductor device of the present invention will be described with reference to FIGS.

  The semiconductor films 660 and 651 illustrated in FIG. 19A are preferably formed using silicon or a crystalline semiconductor containing silicon as a component. For example, polycrystalline silicon or single crystal silicon obtained by crystallizing a silicon film by laser annealing or the like is applied. In addition, a metal oxide semiconductor, amorphous silicon, or an organic semiconductor that exhibits semiconductor characteristics can be used.

  In any case, the semiconductor film to be formed first is formed over the entire surface or part of the substrate having an insulating surface (a region having a larger area than that determined as a semiconductor region of the transistor). Then, a mask pattern is formed on the semiconductor film by a photolithography technique. By etching the semiconductor film using the mask pattern, island-shaped semiconductor films 660 and 661 having specific shapes including the source and drain regions of the TFT and the channel formation region are formed. The semiconductor films 660 and 661 are determined in consideration of appropriate layout.

  A photomask for forming the semiconductor films 660 and 661 shown in FIG. 19A includes a mask pattern 670 shown in FIG. The mask pattern 670 differs depending on whether the resist used in the photolithography process is a positive type or a negative type. When a positive resist is used, the mask pattern 670 shown in FIG. 19B is manufactured as a light shielding portion. The mask pattern 670 has a shape obtained by deleting the top A of the polygon. Further, the bent portion B has a shape that is bent over a plurality of steps so that the corner portion does not become a right angle. In the photomask pattern, for example, the corners of the pattern (right triangles) are removed so that one side is 10 μm or less.

  The shape of the mask pattern 670 illustrated in FIG. 19B is reflected in the semiconductor films 660 and 661 illustrated in FIG. In that case, a shape similar to the mask pattern 670 may be transferred, or the corner of the mask pattern 670 may be transferred so as to be further rounded. That is, a rounded portion having a smoother pattern shape than the mask pattern 670 may be provided.

  Over the semiconductor films 660 and 661, an insulating film containing at least part of silicon oxide or silicon nitride is formed. One purpose of forming this insulating film is a gate insulating film. Then, as illustrated in FIG. 20A, gate wirings 662, 663, and 664 are formed so as to partially overlap the semiconductor film. The gate wiring 662 is formed corresponding to the semiconductor film 660. The gate wiring 663 is formed corresponding to the semiconductor films 660 and 661. The gate wiring 664 is formed corresponding to the semiconductor films 660 and 661. As the gate wiring, a metal film or a highly conductive semiconductor film is formed, and its shape is formed on the insulating film by a photolithography technique.

  A photomask for forming this gate wiring is provided with a mask pattern 671 shown in FIG. This mask pattern 671 is a corner, and one side of the (right triangle) is 10 μm or less, or less than 1/2 of the line width of the wiring, and the corner is deleted to a size of 1/5 or more of the line width. is doing. The shape of the mask pattern 671 shown in FIG. 20B is reflected in the gate wirings 662, 663, and 664 shown in FIG. In that case, a shape similar to the mask pattern 671 may be transferred, or the corner of the mask pattern 671 may be transferred so as to be further rounded. That is, a rounded portion having a smoother pattern shape than the mask pattern 671 may be provided. In other words, the corner portions of the gate wirings 662, 663, and 664 are rounded at the corner portions that are 1/2 or less of the line width and 1/5 or more. The convex part suppresses the generation of fine powder due to abnormal discharge during dry etching by plasma, and the concave part improves the yield as a result of washing away even if fine powder is easily collected at the corner during cleaning. It has the effect that it can be expected greatly.

  The interlayer insulating film is a film formed next to the gate wirings 662, 663, and 664. The interlayer insulating film is formed using an inorganic insulating material such as silicon oxide or an organic insulating material such as polyimide or acrylic resin. An insulating film such as silicon nitride or silicon nitride oxide may be interposed between the interlayer insulating film and the gate wirings 662, 663, and 664. Further, an insulating film such as silicon nitride or silicon nitride oxide may be provided over the interlayer insulating film. This insulating film can prevent the semiconductor film and the gate insulating film from being contaminated by impurities that are not good for the TFT, such as exogenous metal ions and moisture.

  Openings are formed at predetermined positions in the interlayer insulating film. For example, it is provided corresponding to the gate wiring or semiconductor film in the lower layer. A wiring layer formed of one or more layers of metal or metal compound is formed with a mask pattern by a photolithography technique and formed into a predetermined pattern by etching. Then, as illustrated in FIG. 21A, wirings 675 to 680 are formed so as to partially overlap the semiconductor film. A wiring connects between specific elements. The wiring does not connect a specific element with a straight line, but includes a bent portion due to layout restrictions. In addition, the wiring width changes in the contact portion and other regions. In the contact portion, when the contact hole is equal to or larger than the wiring width, the wiring width is changed to widen at that portion.

  A photomask for forming the wirings 675 to 680 includes a mask pattern 672 shown in FIG. Even in this case, the wiring is a corner portion (right triangle) having a side of 10 μm or less, or 1/2 or less of the line width of the wiring and 1/5 or more of the line width. Remove the corners so that the corners have a rounded pattern. The corners are ½ or less of the line width, and the corners are rounded to 1/5 or more. In such wiring, the convex part suppresses the generation of fine powder due to abnormal discharge when dry etching with plasma, and the concave part is easy to collect even in the case of cleaning even if it is fine powder. As a result of washing away, the yield can be greatly improved. It can be expected that the corner portion of the wiring is electrically conducted by taking a round. In addition, a large number of parallel wires are very convenient for washing away dust.

  In FIG. 21A, n-channel transistors 681 to 684 and p-channel transistors 685 and 686 are formed. The n-channel transistor 683 and the p-channel transistor 685, and the n-channel transistor 684 and the p-channel transistor 686 constitute an inverter. The circuit including these six transistors forms an SRAM. An insulating film such as silicon nitride or silicon oxide may be formed over these transistors.

  Note that this embodiment can be freely combined with the above embodiment. That is, the material and the formation method described in the above embodiment can be used in this embodiment, and the material and the formation method described in this embodiment can be used in the above embodiment.

(Embodiment 7)
In this embodiment mode, a method for processing a shape that can be used in manufacturing the semiconductor device of the present invention will be described.

  In this embodiment mode, when a thin film transistor, a capacitor, a wiring, or the like used in an integrated circuit of a semiconductor device is formed, a resist pattern obtained by etching a resist with an exposure mask is used.

  An exposure mask provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film used in this embodiment will be described with reference to FIG.

  FIG. 22A is an enlarged top view of a part of the exposure mask. FIG. 22B is a partial cross-sectional view of the exposure mask corresponding to FIG. FIG. 22B shows an exposure mask and a substrate on which a resist is applied and formed in correspondence with each other.

22 corresponds to FIG. 23, and the resist pattern 519 produced in FIG. 22 is used for producing the double gate TFT 510 in FIG.

  In FIG. 22A, the exposure mask is provided with light shielding portions 601a and 601b made of a metal film such as Cr, and a portion provided with a semi-permeable film 602 as an auxiliary pattern. The width of the light shielding portion 601a is indicated by t1, the width of the light shielding portion 601b is indicated by t2, and the width of the portion provided with the semipermeable membrane 602 is indicated by S1. It can also be said that the interval between the light shielding part 601b and the light shielding part 601b is S1.

In FIG. 22B, the exposure mask is provided with a light-transmitting substrate 600 provided with a semi-transmissive film 602 made of MoSiN, and light-shielding portions 601 a and 601 b made of a metal film such as Cr so as to be laminated with the semi-transmissive film 602. Provided. In addition, the semipermeable membrane 402 can be formed using MoSi, MoSiO, MoSiON, CrSi, or the like.

  When the resist film is exposed using the exposure mask shown in FIGS. 22A and 22B, a non-exposed region 603a and an exposed region 603b are formed. At the time of exposure, light passes around the light-shielding portion and passes through the semipermeable membrane, so that an exposure region 603b shown in FIG. 22B is formed.

  Then, when development is performed, the exposed region 603b is removed, and a resist pattern 519 shown in FIG. 23A is obtained.

  As another example of the exposure mask, FIG. 22C shows a top view of an exposure mask in which a diffraction grating pattern 612 having a plurality of slits is provided between the light shielding portion 601b and the light shielding portion 601b. Similarly, the resist pattern 519 shown in FIG. 23A can be obtained using the exposure mask shown in FIG.

  As another example of the exposure mask, FIG. 22D shows a top view of an exposure mask in which a space equal to or smaller than the exposure limit is provided between the light shielding portion 601b and the light shielding portion 601b. For example, after exposure under optimal exposure conditions using an exposure mask with t1 of 6 μm, t2 of 6 μm, and S1 of 1 μm, according to the manufacturing process of the first embodiment, the distance between the two channel formation regions is less than 2 μm Thus, a TFT having a double gate structure can be manufactured. Similarly, the resist pattern 519 shown in FIG. 23A can be obtained using the exposure mask shown in FIG.

    In this way, when the resist film is processed by the method shown in FIG. 22, fine processing can be selectively performed without increasing the number of steps, and various resist patterns can be obtained. FIG. 23 shows an example in which a double gate TFT 510, a single gate TFT 520, a capacitor 530, and a wiring 540 are manufactured using such a resist pattern.

    In FIG. 23A, a semiconductor film 501, a semiconductor film 502, and a semiconductor film 503 are formed over a substrate 500 and an insulating film 508. A gate insulating film 504, a first conductive film 505, and a second conductive film 506 are formed so as to cover the semiconductor film 501, the semiconductor film 502, and the semiconductor film 503, and have different shapes manufactured as shown in FIG. A resist pattern 519, a resist pattern 529, a resist pattern 539, and a resist pattern 549 are formed.

    The resist pattern 519 is a shape having two convex portions, the resist pattern 529 is a shape having a gentle step at the side end, and the resist pattern 539 is a shape in which the convex portion is shifted from the center, The resist pattern 549 has a shape having no step and unevenness.

    The resist pattern 519, the resist pattern 529, the resist pattern 539, and the resist pattern 549 are processed by etching, and the first gate electrode 511, the second gate electrode 512a, the second gate electrode 512b, and the first gate are processed. An electrode 521, a second gate electrode 522, a first gate electrode 531, a second gate electrode 532, a first wiring 541, and a second wiring 542 are formed. Impurities having one conductivity type in the semiconductor film 501, the semiconductor film 502, and the semiconductor film 503 using the second gate electrode 512a, the second gate electrode 512b, the second gate electrode 522, and the second gate electrode 532 as masks The element is added to form a low concentration impurity region 514a, a low concentration impurity region 514b, a low concentration impurity region 514c, a low concentration impurity region 524a, a low concentration impurity region 524b, a low concentration impurity region 534a, and a low concentration impurity region 534b ( (See FIG. 23B).

    Further, the first gate electrode 511, the second gate electrode 512a, the second gate electrode 512b, the first gate electrode 521, the second gate electrode 522, the first gate electrode 531 and the second gate electrode 532 are used. Is used as a mask, an impurity element having one conductivity type is added to the semiconductor film 501, the semiconductor film 502, and the semiconductor film 503, and a high concentration impurity region 515a, a high concentration impurity region 515b, a low concentration impurity region 516a, and a low concentration impurity region 516b are added. The high concentration impurity region 525a, the high concentration impurity region 525b, the low concentration impurity region 526a, the low concentration impurity region 526b, the high concentration impurity region 535a, the high concentration impurity region 535b, the low concentration impurity region 536a, and the low concentration impurity region 536b are formed. To do. Further, the resist pattern 513a, the resist pattern 513b, the resist pattern 523, the resist pattern 533, and the resist pattern 543 are removed, so that a double gate TFT 510, a single gate TFT 520, a capacitor 530, and a wiring 540 are manufactured (see FIG. 23C). ).

    When an impurity element imparting n-type conductivity (for example, phosphorus (P)) is used as the impurity element imparting one conductivity type to be added, an n-channel TFT having an impurity region having n-type can be manufactured and added. When an impurity element imparting p-type conductivity (eg, boron (B)) is used as the impurity element imparting one conductivity type, a p-channel TFT having an impurity region having p-type conductivity can be manufactured.

    Further, by controlling the doping conditions for adding an impurity element imparting one conductivity type, the low concentration impurity region is not formed, and all impurity regions can be made high concentration impurity regions. In this embodiment mode, an example is shown in which an impurity element imparting one conductivity type is added in two stages to form impurity regions having different concentrations, but a process of adding an impurity element imparting one conductivity type once Thus, a TFT and a capacitor having a low concentration impurity region and a high concentration impurity region as shown in FIG. 23C can be manufactured.

    Two types of TFTs, a double gate TFT 510 and a single gate TFT 520, can be manufactured in the same process. The double gate TFT 510 has a second gate electrode 512 a and a second gate electrode 512 b which are adjacent to each other on the first gate electrode 511. Since the distance between the second gate electrode 512a and the second gate electrode 512b can be formed short, the width of the low-concentration impurity region 514b can be reduced and the size of the TFT can also be reduced. Therefore, miniaturization is possible, and it is possible to achieve the precision, performance, and weight reduction of the semiconductor device.

    Since the capacitor 530 can form the first gate electrode 531 in a wider shape than the second gate electrode, the region of the low-concentration impurity region 536b can be formed widely. Since the capacitance formed between the low concentration impurity region and the gate electrode is larger than the capacitance formed between the region 537 to which no impurity element is added and the gate electrode, the low concentration impurity region under the first gate electrode 531 is used. A large capacity can be obtained by forming 536b wide.

    The wiring 540 can be formed by stacking the first wiring 541 and the second wiring 542 with substantially the same width without narrowing the width unlike other gate electrodes. Can be produced. In addition, a fine wiring can be manufactured.

    As described above, when this embodiment mode is used, a conductive film or an insulating film can be processed in different shapes according to desired performance in the same process. Therefore, different types of TFTs, wirings with different sizes, and the like can be manufactured without increasing the number of steps. This embodiment mode can be freely combined with each of Embodiment Modes 1 to 7.

(Embodiment 8)
In this embodiment, an embodiment in which the semiconductor device of the present invention is used as an RFID capable of transmitting and receiving data without contact will be described with reference to FIGS.

  The RFID 220 has a function of communicating data without contact, and includes a power supply circuit 211, a clock generation circuit 212, a data demodulation / modulation circuit 213, a control circuit 214 for controlling other circuits, an interface circuit 215, a memory 216, a data bus 217 and an antenna (antenna coil) 218 (FIG. 11A).

  The power supply circuit 211 is a circuit that generates various power supplies to be supplied to each circuit inside the semiconductor device based on the AC signal input from the antenna 218. The clock generation circuit 212 is a circuit that generates various clock signals to be supplied to each circuit in the semiconductor device based on the AC signal input from the antenna 218. The data demodulation / modulation circuit 213 has a function of demodulating / modulating data communicated with the reader / writer 219. The control circuit 214 has a function of controlling the memory 216. The antenna 218 has a function of transmitting and receiving electromagnetic waves or radio waves. The reader / writer 219 controls communication and control with the semiconductor device and processing related to the data. The RFID is not limited to the above-described configuration, and may be a configuration in which other elements such as a power supply voltage limiter circuit and hardware dedicated to cryptographic processing are added.

  The RFID may be of a type in which power supply voltage is supplied to each circuit by radio waves without mounting a power supply (battery), or power supply (battery) is supplied to each circuit instead of an antenna. The power supply voltage may be a type that supplies power voltage by radio waves and a power source.

  When the semiconductor device of the present invention is used for RFID or the like, select a point that performs non-contact communication, a point that multiple reading is possible, a point that data can be written, and a point that can be processed into various shapes Depending on the frequency, there are advantages such as wide directivity and wide recognition range. RFID is applied to IC tags that can identify individual information of people and objects by non-contact wireless communication, labels that can be attached to targets by applying label processing, events and amusement wristbands, etc. can do. Further, the RFID may be molded using a resin material, or may be directly fixed to a metal that hinders wireless communication. Further, the RFID can be used for system operation such as an entrance / exit management system and a payment system.

  Next, one mode when the semiconductor device of the present invention is actually used as an RFID will be described. A reader / writer 320 is provided on the side surface of the portable terminal including the display portion 321, and an RFID 323 is provided on the side surface of the article 322 (FIG. 11B). When the reader / writer 320 is held over the RFID 323 included in the product 322, the display unit 321 displays information about the product, such as a description of the product, such as the raw material and origin of the product, the inspection result for each production process, and the history of the distribution process. Further, when the product 326 is conveyed by the belt conveyor, the product 326 can be inspected using the reader / writer 324 and the RFID 325 provided in the product 326 (FIG. 11C). In this way, by using RFID in the system, information can be easily acquired, and high functionality and high added value are realized.

  Note that this embodiment can be freely combined with the above embodiment.

(Embodiment 9)
Although the semiconductor device of the present invention has a wide range of uses, it can be used for electronic devices, for example. As an electronic device, it can be used for, for example, a television receiver, a computer, a portable information terminal such as a mobile phone, a digital camera, a video camera, a navigation system, and the like. A case where the semiconductor device of the present invention is applied to a cellular phone will be described with reference to FIG.

  The cellular phone includes housings 2700 and 2706, a panel 2701, a housing 2702, a printed wiring board 2703, operation buttons 2704, and a battery 2705. The panel 2701 is detachably incorporated in the housing 2702, and the housing 2702 is fitted on the printed wiring board 2703. The shape and dimensions of the housing 2702 are changed as appropriate in accordance with the electronic device in which the panel 2701 is incorporated. A plurality of packaged semiconductor devices are mounted on the printed wiring board 2703, and the semiconductor device of the present invention can be used as one of them. The plurality of semiconductor devices mounted on the printed wiring board 2703 have any one function of a controller, a central processing unit (CPU), a memory, a power supply circuit, a sound processing circuit, a transmission / reception circuit, and the like.

  The panel 2701 is combined with the printed wiring board 2703 through the connection film 2708. The panel 2701, the housing 2702, and the printed wiring board 2703 are housed in the housings 2700 and 2706 together with the operation buttons 2704 and the battery 2705. A pixel region 2709 included in the panel 2701 is arranged so as to be visible from an opening window provided in the housing 2700.

  The semiconductor device of the present invention is characterized in that it is small, thin, and lightweight. With the above characteristics, a limited space inside the housings 2700 and 2706 of the electronic device can be used effectively.

  The semiconductor device of the present invention can also be used as an RFID, for example, banknotes, coins, securities, certificates, bearer bonds, packaging containers, books, recording media, personal items, vehicles, It can be used in foods, clothing, health supplies, daily necessities, medicines, electronic devices and the like. These examples will be described with reference to FIG.

  Banknotes and coins are money that circulates in the market, and include those that are used in the same way as money in a specific area (cash vouchers), commemorative coins, and the like. Securities refer to checks, securities, promissory notes, etc. (FIG. 13A). The certificate refers to a driver's license, resident's card, etc. (FIG. 10B). Bearer bonds refer to stamps, gift tickets, various gift certificates, and the like (FIG. 10C). Packaging containers refer to wrapping paper for lunch boxes, plastic bottles, and the like (FIG. 10D). Books refer to books, books, and the like (FIG. 10E). The recording media refer to DVD software, video tapes, and the like (FIG. 10F). The vehicles refer to vehicles such as bicycles, ships, and the like (FIG. 10G). Personal belongings refer to bags, glasses, and the like (FIG. 10H). Foods refer to food products, beverages, and the like. Clothing refers to clothing, footwear, and the like. Health supplies refer to medical equipment, health equipment, and the like. Livingware refers to furniture, lighting equipment, and the like. Chemicals refer to pharmaceuticals, agricultural chemicals, and the like. Electronic devices refer to liquid crystal display devices, EL display devices, television devices (TV receivers, flat-screen TV receivers), mobile phones, and the like.

  Forgery can be prevented by providing RFID for bills, coins, securities, certificates, bearer bonds, and the like. In addition, by providing RFID for personal items such as packaging containers, books, and recording media, foods, daily necessities, electronic devices, etc., the efficiency of inspection systems and rental store systems can be improved. . By providing RFID for vehicles, health supplies, medicines, etc., counterfeiting and theft can be prevented, and medicines can prevent mistakes in taking medicine. As a method of providing the RFID, the RFID is provided on the surface of the article or embedded in the article. For example, a book may be embedded in paper, and a package made of an organic resin may be embedded in the organic resin.

  In this way, by providing RFID for packaging containers, recording media, personal items, foods, clothing, daily necessities, electronic devices, etc., it is possible to improve the efficiency of inspection systems and rental store systems. . In addition, forgery and theft can be prevented by providing RFID for vehicles. Moreover, by embedding it in creatures such as animals, it is possible to easily identify individual creatures. For example, by embedding RFID in a living creature such as livestock, it becomes possible to easily identify the year of birth, sex, type, or the like.

  As described above, the semiconductor device of the present invention can be provided and used for any product. Note that this embodiment can be freely combined with the above embodiment.

  The configuration of the power supply circuit and the delay circuit included in the semiconductor device of the present invention and the calculation result of the operation will be described with reference to FIGS.

  The semiconductor device of the present invention includes at least a power supply circuit 430 and a delay circuit 443 (FIG. 14).

  The power supply circuit 430 includes a rectifier circuit that generates a signal (FIG. 15B) obtained by rectifying and smoothing a received carrier wave (FIG. 15A), and a capacitor element that holds the signal generated by the rectifier circuit Have The signal generated by the rectifier circuit is supplied to the delay circuit 443.

  The delay circuit 443 includes an AC power supply 431, a capacitor 432, N-type transistors 433 and 434, a capacitor 435, inverters 436 and 437, a resistor 438, a capacitor 439, inverters 440 and 441, and a capacitor 442. The capacitor elements 432, 435, 439, and 442 and the resistor element 438 include a conductive film, a semiconductor film, a semiconductor film doped with an impurity such as phosphorus or boron, or the like.

  The delay circuit 443 generates a reset signal (FIG. 15C) using a signal (FIG. 15B) input from the power supply circuit 430, and supplies the generated reset signal to each circuit. The reset signal generated by the delay circuit 443 is a signal supplied to the circuit 444 between certain operations. The circuit 444 to which the reset signal is supplied is each circuit included in the semiconductor device, such as a clock signal generation circuit, a correction circuit, a determination circuit, a controller circuit, and an encoding circuit.

  If the generation of the reset signal of the delay circuit 443 is too early, supply of power to each circuit becomes unstable, and each circuit may not perform the reset operation. On the other hand, if the generation of the reset signal of the delay circuit 443 is too late, each circuit may start the next operation without performing the reset operation. As described above, when the delay circuit 443 does not generate a reset signal at a desired timing, each circuit may not function normally. Therefore, the delay circuit 443 needs to generate a reset signal at a desired timing.

  The timing for generating the reset signal of the delay circuit 443 also depends on the resistance value and the capacitance value in the delay circuit 443. More specifically, it depends on the resistance value of the resistance element 438 and the capacitance value of the capacitance element 439. Therefore, the present invention generates a reset signal at a desired timing by optimizing the resistance value of the resistance element 438 and the value of the capacitor element 439.

  More specifically, since the reset signal is generated too early, the resistance value of the resistance element 438 is optimized from 100 kΩ to 400 kΩ. As a result, the time from the input of the carrier wave to the semiconductor device until the generation of the reset signal was m seconds (m> 0, refer to the waveform of the one-dot chain line in FIG. 15C). It was possible to delay until n> 0, see the dotted waveform in FIG. As described above, the semiconductor device can be normally operated by delaying the generation timing of the reset signal and supplying the reset signal to each circuit at a desired timing.

  The experimental results regarding the crystallization state and the peelability of the element formation layer when manufacturing the semiconductor device according to the present invention will be described with reference to FIGS. 16, 17, and 18.

A metal film 1601 is formed over the substrate 1600. As the substrate 1600, an AN-100 substrate (126.6 mm × 126.6 mm, 0.7 mmt) manufactured by Asahi Glass Co., Ltd. was used.

As the metal film 1601, a tungsten film was formed by a sputtering apparatus (see FIG. 16A). In the formation, 0.02 SLM of Ar gas was introduced, and the film was formed to a thickness of 30 nm in a state where the pressure was 0.2 Pa, the power was 1 kW, and the substrate temperature was 200 ° C. Note that 1 SLM is 1000 sccm, that is, 0.06 m ³ / h.

After that, plasma treatment was performed on the surface of the metal film 1601 in a dinitrogen monoxide atmosphere to form a metal oxide film, a metal nitride film, or a metal oxynitride film 1602 (see FIG. 16B). The plasma treatment was performed by a PE-CVD apparatus at a substrate temperature of 345 ° C. for 60 seconds at a dinitrogen monoxide gas flow rate of 0.4 SLM, a pressure of 240 Pa, and a power of 50 W. In addition to this, the plasma treatment was tested in a dinitrogen monoxide atmosphere under the conditions shown in FIG. This time, the flow rate of the dinitrogen monoxide gas was 0.4 SLM, and the substrate temperature was 345 ° C.

Subsequently, an insulating film 1603 was formed over the metal oxide film, the metal nitride film, or the metal nitride oxide film 1602. As the insulating film 1603, a silicon nitride oxide film was formed using a PE-CVD apparatus. The film forming conditions are as follows: RF frequency 13.56 MHz, substrate temperature 345 ° C., monosilane gas 0.015 SLM, hydrogen gas 1.2 SLM, ammonia gas 0.15 SLM, dinitrogen monoxide gas 0 The film was formed at a film forming rate of 13 nm / min and a film thickness of 50 nm at 0.02 SLM, power of 250 W, and pressure of 40 Pa.

Subsequently, an insulating film 1604 was formed over the insulating film 1603. The insulating film 1604 is a silicon oxynitride film formed by a PE-CVD apparatus in a state where the RF frequency is 13.56 MHz and the temperature is 345 ° C., the monosilane gas is 0.03 SLM, the dinitrogen monoxide gas is 1.2 SLM, and the power is 50 W. The pressure was set to 40 Pa, and the film formation rate at this time was 44 nm / min, so that the film thickness was 100 nm.

Subsequently, an amorphous silicon film 1605 was formed over the insulating film 1604 (see FIG. 16C). The amorphous silicon film 1605 has an RF frequency of 13.56 MHz, a substrate temperature of 345 ° C., a monosilane gas of 0.28 SLM, a hydrogen gas of 0.3 SLM, a power of 60 W, a pressure of 170 Pa, and a film thickness of 66 nm. The film was formed as follows.

Thereafter, although not shown, cleaning is performed for the purpose of removing dust on the surface of the amorphous silicon film 1605, and after that, in order to release the hydrogen element contained in the amorphous silicon film, GRTA (Gas) at 650 ° C. for 75 sec. (Rapid Thermal Annealing) treatment was performed.

Thereafter, in order to remove the silicon oxide film formed by the GRTA treatment, the treatment was performed for 90 seconds with a 0.5% HF aqueous solution.

Thereafter, the amorphous silicon film 1605 was crystallized (see FIG. 16D). Crystallization is performed under 13 conditions, in which laser power is increased from 12.5 W to 18.0 W in increments of 0.5 W and further 18.4 W is added, and the stage speeds are 0.2 m / sec, 0.35 m / sec, and. Scanning was performed at 5 m / sec. The laser used was a solid (YVO ₄ ) pulse laser with a wavelength of 532 nm, and the oscillation frequency was 80 MHz and the pulse width was 15 psec.

Thereafter, whether or not the insulating film 1603, the insulating film 1604, and the crystalline silicon film can be peeled was evaluated by a tape peeling test. The crystallization situation and the result of the tape peeling test are shown together in FIG.

In FIG. 18, the film is torn means that the silicon film has been torn when irradiated with laser as a crystal treatment of the amorphous silicon film. Is a state in which the crystalline silicon film has a large grain size.Insufficient crystallization means that the entire area irradiated with the laser has not been transformed into a crystalline silicon film having a large grain size. Sure. The round mark judgment in the tape peeling test indicates that the tape could be peeled even once.

In this embodiment, the peeling layer used in the semiconductor device manufacturing process of the present invention will be described using experimental data.

A metal film 801 is formed over the substrate 800 as a sample, and plasma treatment is performed on the surface of the metal film 801 in a dinitrogen monoxide atmosphere to form a separation layer (metal oxide film, metal nitride film, or metal oxynitride film). Formed. A three-layer insulating film was formed by a CVD method over the separation layer (metal oxide film, metal nitride film, or metal nitride oxide film) 802, and a semiconductor film was formed over the insulating film. Thereafter, the sample was heat-treated at 450 ° C. for 30 minutes in the air. In this embodiment, the metal oxide film, the metal nitride film, or the metal nitride oxide film is referred to as a peeling layer (metal oxide film, metal nitride film, or metal nitride oxide film) 802.

A tungsten film having a thickness of 30 nm is formed as the metal film 801 by a sputtering method, and a tungsten oxide film, a tungsten nitride film, or a tungsten nitride oxide film is oxidized as a peeling layer (metal oxide film, metal nitride film, or metal nitride oxide film) 802. A plasma treatment is performed in a dinitrogen atmosphere, and a 180-nm-thick silicon oxynitride film, a 75-nm-thick tungsten nitride film, and a 75-nm-thick tungsten nitride oxide film are stacked as the insulating film 803 to form a semiconductor film. A 66 nm amorphous silicon film was formed. The insulating film and the semiconductor film were continuously formed by the CVD method. In this embodiment, an insulating film and a semiconductor film are used as elements.

An adhesive was formed on the semiconductor film of the sample after the heat treatment by several tens of μm, a glass substrate serving as a counter substrate was adhered, and the insulating film and the semiconductor film as elements were peeled from the substrate 800 to the counter substrate side. FIG. 24 shows a sample before peeling, FIG. 25 shows a sample on the substrate side after peeling, and FIG. 26 shows a cross-sectional photograph of the sample on the element side after peeling using a transmission electron microscope (hereinafter also referred to as TEM: Transmission Electron Microscope). .

As shown in FIG. 24, a metal film 801, a peeling layer (a metal oxide film, a metal nitride film, or a metal nitride oxide film) 802 and an insulating film 803 are stacked over a substrate 800. The metal film 801 is dark gray close to black, and the peeling layer (metal oxide film, metal nitride film, or metal oxynitride film) 802 on the metal film 801 is light gray. FIG. 25 shows a substrate side after peeling, where a metal film 801 is laminated on the substrate 800, and a peeling layer (metal oxide film, metal nitride film, or metal oxynitride film) 805a separated on the metal film 801 by a peeling process. Remains and is formed. On the other hand, FIG. 26 shows the element side after peeling, and a peeling layer (metal oxide film, metal nitride film, or metal oxynitride film) 805b separated by a peeling process remains on the insulating film 803 and is formed. As shown in FIGS. 25 and 26, the peeling layer (metal oxide film, metal nitride film, or metal oxynitride film) 802 is divided into a substrate side and an element side by a peeling process, and the peeling layer (metal oxide film) on the substrate 800 side is further separated. Most of the film (metal nitride film or metal oxynitride film) 802 (thick film thickness) remains.

Release layer (metal oxide film, metal nitride film or metal nitride oxide film) 802 before peeling, release layer (metal oxide film, metal nitride film or metal nitride oxide film) 805a after peeling, release layer (metal oxide film after peeling) Film, metal nitride film or metal oxynitride film) 805b was subjected to X-ray reflectivity (XRR) measurement, and the density, film thickness, and roughness (surface roughness) of each were determined. The results are shown in Table 1.

As shown in Table 1, the thickness of the substrate-side release layer after peeling remains larger than the thickness of the element-side release layer. The sum of the film thicknesses of the substrate-side release layer and the element-side release layer is almost the same as that of the release layer before release, and it can be seen that the release layer before release was divided into the substrate side and the element side. Further, the density of the substrate-side release layer after peeling and the density of the release layer before peeling were almost the same numerical values.

Next, X-ray photoelectron spectroscopy (ESCA: Electron Spectroscopy for Chemical Analysis, XPS: X-ray Photoelectron Spectroscopy) measurement is performed on the release layer on the substrate side and the release layer on the element side after peeling, and the elements contained in each layer The quantitative ratio of was determined. The results are shown in Table 2 and FIGS. 27 (A) to (C). FIG. 27A shows the relationship between the elements contained in the release layer and the quantitative ratio, FIG. 27B shows the relationship between the oxygen composition in the release layer and the quantitative ratio, and FIG. It is the relationship between the composition of tungsten in the layer and its quantitative ratio. In FIGS. 27A to 27C, the black dot represents the detection amount in the substrate side peeling layer, and the crossed dot represents the detection amount in the element side peeling layer.

In the analysis method of Table 2, the following compositions were assigned from the binding energy of W4f in tungsten (W) and from the binding energy of O1s in oxygen (O). In Table 2, W1 is metal W, W2 is WO ₂ , or WN _x , W3 is WO _2-3 , or WN _x O _y , W4 is WO ₃ , O1 is WO _x , O2 is W _(OHx) , Or WO _x N _y and O 3 are C═O, O—C—O, Si—O or the like. Table 2 shows the composition ratio of elements in each sample, and W, O, N, Si, and C are about 100%. W and O indicate the proportion of the composition in W or O, respectively. W is about 100% for W1 to 4, and O is about 100% for O1 to 3.

Note that a metal film is formed on the substrate, and plasma treatment is performed on the metal film surface in a dinitrogen monoxide atmosphere to form a release layer (metal oxide film, metal nitride film, or metal nitride oxide film) immediately after the release layer is formed. The quantitative ratio of the elements contained was 22.7% for tungsten (W) (2.9% for W1, 0.1% for W2, 6.7% for W3, 90.2% for W4), oxygen (O ) Is 62.6% (O1 is 68.5%, O2 is 24.4%, O3 is 7.2%), nitrogen (N) is 1.7%, silicon (Si) is 1.3%, carbon (C) was 11.7%.

The nitrogen content is increasing in both the substrate-side release layer and the element-side release layer after the heat treatment. In addition, as shown in Table 1, the substrate-side release layer and the element-side release layer have different densities in the substrate-side release layer and the element-side release layer, as shown in FIG. 27C. Thus, the proportion of each composition was also different.

By quantitative analysis of the composition of the elements contained in each layer in the film thickness direction of the release layer before and after the heat treatment by X-ray photoelectron spectroscopy, the change in structure in the release layer before and after the heat treatment was examined. The results are shown in FIGS. 29 and 31 are spectra showing the element content in the release layer after the heat treatment, FIGS. 30 and 32 are the spectra showing the element content in the release layer after the heat treatment, FIG. 31 is the heat release treatment, and FIG. 32 is the heat release treatment release layer. It is a spectrum which shows content of the composition of tungsten in. FIG. 28 shows changes in W2, W3, and W4 with respect to W1 obtained by analyzing the data in FIG. 29 and FIG. Since W1 in the release layer increases as it approaches the tungsten film, the change in W1 is proportional to the depth in the film thickness direction, and therefore W1 is used as a reference. In FIG. 28, the white circle dot is W2 of the peeling layer before heating, the black circle dot is W2 of the peeling layer after heating, the white triangle dot is W3 of the peeling layer before heating, and the black triangle dot is the peeling after heating. The layer W3, the white square dots indicate the release layer W4 before heating, and the black square dots indicate the release layer W4 after heating. In W3 and W4, the amount of the release layer after heating was reduced than before the heating, but only the amount of W2 including the release layer after heating was increased than before the heating. Since W2 is a peak due to WN, it can be said from this that the composition of WN is increased by performing heat treatment on the release layer.

As described above, it was possible to investigate changes in physical properties of the release layer on the substrate side and the element side after peeling, and changes in the composition of the release layer before and after heating.

In this embodiment, the peeling layer used in the semiconductor device manufacturing process of the present invention will be described using experimental data.

As a sample 4-1, a metal film 851 is formed over a substrate 850, and plasma treatment is performed on the surface of the metal film 851 in a dinitrogen monoxide atmosphere to form a release layer (metal oxide film, metal nitride film, or metal oxynitride). Film). A three-layer insulating film was formed by a CVD method over the separation layer (metal oxide film, metal nitride film, or metal nitride oxide film) 852, and a semiconductor film was formed over the insulating film. In this embodiment, the metal oxide film, the metal nitride film, or the metal nitride oxide film is referred to as a peeling layer (metal oxide film, metal nitride film, or metal nitride oxide film) 852.

A titanium film with a thickness of 50 nm is formed as the metal film 851 by a sputtering method, and a titanium oxide film, a titanium nitride film, or a titanium nitride oxide film is oxidized as a peeling layer (metal oxide film, metal nitride film, or metal oxynitride film) 852 Plasma treatment is performed in a dinitrogen atmosphere, and a silicon oxynitride film with a thickness of 200 nm is formed as the insulating film 853, a silicon nitride oxide film with a thickness of 50 nm is formed as the insulating film 854, and a silicon oxynitride film with a thickness of 100 nm is formed as the insulating film 855 And an amorphous silicon film having a film thickness of 66 nm was formed as the semiconductor film 856 to obtain a sample 4-1. The insulating film and the semiconductor film were continuously formed by the CVD method.

The conditions of the plasma treatment under the nitrous oxide atmosphere of Sample 4-1 were as follows: nitrous oxide gas flow rate 500 sccm, power 200 W, pressure 100 Pa, time 60 seconds. FIGS. 26A and 26B respectively show STEM photographs of the cross section of the sample 4-1 observed by the scanning transmission electron microscope (STEM) method of the sample 4-1. FIG. 33B is an enlarged view of FIG.

As shown in FIG. 33, a metal film 851, a peeling layer (metal oxide film, metal nitride film, or metal nitride oxide film) 852, insulating films 853, 854, 855, and a semiconductor film 856 are stacked over a substrate 850. The metal film 851 is dark gray close to black, and the peeling layer (metal oxide film, metal nitride film, or metal oxynitride film) 852 over the metal film 851 is light gray.

FIG. 34 shows energy dispersive X-ray spectroscopy EDX (EDX: Energy Dispersive X-Ray Spectroscopy) of a to d in FIG. 34 (A) corresponding to FIG. 33 (B) and the cross-sectional photograph of FIG. 34 (A). The elemental composition analysis was performed. The results of EDX measurement are shown in FIGS. 34 (B1) to (B4). Since FIG. 34B1 is a metal film 851 which is a titanium film, a peak of titanium can be confirmed, and since FIG. 34B2 is a release layer 852 including a titanium oxide film, peaks of titanium and oxygen can be confirmed. 34B3 shows an insulating layer 853 containing silicon oxynitride, so that peaks of silicon and oxygen can be confirmed. FIG. 34B4 shows a glass substrate 850, so that peaks of silicon and oxygen which are glass components are respectively shown. It could be confirmed. Therefore, in this embodiment, when a titanium film is used as a metal film and plasma treatment is performed in a dinitrogen monoxide atmosphere, a titanium oxide film is formed as a peeling layer (metal oxide film, metal nitride film, or metal oxynitride film). It was confirmed that a certain metal oxide film was formed.

In this embodiment, the peeling layer used in the semiconductor device manufacturing process of the present invention will be described using experimental data.

A metal film was formed on a glass substrate as a sample, and plasma treatment was performed on the metal film surface in a dinitrogen monoxide atmosphere to form a release layer (metal oxide film, metal nitride film, or metal oxynitride film). . A three-layer insulating film was formed by a CVD method over the separation layer (metal oxide film, metal nitride film, or metal nitride oxide film), and a semiconductor film was formed over the insulating film. In this embodiment, the metal oxide film, the metal nitride film, or the metal nitride oxide film is referred to as a peeling layer (metal oxide film, metal nitride film, or metal nitride oxide film).

A titanium film having a thickness of 50 nm is formed as a metal film by a sputtering method, and a titanium oxide film, a titanium nitride film, or a titanium nitride oxide film is used as a separation layer (metal oxide film, metal nitride film, or metal nitride oxide film) as dinitrogen monoxide. A plasma treatment is performed in an atmosphere, and a silicon oxynitride film with a thickness of 200 nm is stacked as an insulating film, a silicon nitride oxide film with a thickness of 50 nm is stacked as an insulating film, and a silicon oxynitride film with a thickness of 100 nm is stacked as an insulating film. An amorphous silicon film having a thickness of 66 nm was formed as the film. The insulating film and the semiconductor film were continuously formed by the CVD method. Samples 5-1 to 5-5 were prepared. Sample 1 was not heat-treated after sample preparation, and other samples 2 to 5 were heat-treated at 500 ° C. for 1 hour. .

The conditions of the plasma treatment under the dinitrogen monoxide atmosphere of Sample 5-1 were as follows: dinitrogen monoxide gas flow rate 500 sccm, power 400 W, pressure 50 Pa, time 60 seconds. The conditions of the plasma treatment under the dinitrogen monoxide atmosphere of Sample 5-2 were as follows: dinitrogen monoxide gas flow rate 500 sccm, power 50 W, pressure 200 Pa, time 60 seconds. The conditions for the plasma treatment under the dinitrogen monoxide atmosphere of Sample 5-3 were as follows: dinitrogen monoxide gas flow rate 500 sccm, power 200 W, pressure 100 Pa, time 60 seconds. The conditions of the plasma treatment under the dinitrogen monoxide atmosphere of sample 5-4 were as follows: dinitrogen monoxide gas flow rate 500 sccm, power 400 W, pressure 50 Pa, time 60 seconds. The conditions of the plasma treatment under the dinitrogen monoxide atmosphere of sample 5-5 were as follows: dinitrogen monoxide gas flow rate 500 sccm, power 400 W, pressure 50 Pa, time 300 seconds.

As a result of performing a tape peeling test on Samples 5-1 to 5-5, in all of Samples 5-1 to 5-5, the semiconductor film was peeled off by the tape, and the metal film remained on the substrate. Therefore, in this example, a semiconductor film was used in a sample in which a titanium film was used as a metal film and plasma treatment was performed in a dinitrogen monoxide atmosphere to produce a separation layer (metal oxide film, metal nitride film, or metal oxynitride film). It was confirmed that the peeling was possible.

4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. The figure which shows the continuous film-forming apparatus of this invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate usage patterns of a semiconductor device of the present invention. 8A and 8B illustrate usage patterns of a semiconductor device of the present invention. 8A and 8B illustrate usage patterns of a semiconductor device of the present invention. 6A and 6B illustrate a structure of a semiconductor device of the present invention. The figure which shows a calculation result. The figure explaining the Example of the semiconductor device of this invention The figure explaining the Example of the semiconductor device of this invention The figure explaining the Example of the semiconductor device of this invention 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 3. FIG. The figure which shows the experimental data of Example 4. FIG. The figure which shows the experimental data of Example 5. FIG.

Claims (17)

Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere,
Forming an element forming layer on the metal oxide film;
Forming an insulating film covering the element forming layer;
Forming an opening in the insulating film and the element formation layer;
A method for manufacturing a semiconductor device, wherein the element formation layer is peeled from the substrate. Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing a plasma treatment in a mixed gas atmosphere of dinitrogen monoxide and argon on the metal film,
Forming an element forming layer on the metal oxide film;
Forming an insulating film covering the element forming layer;
Forming an opening in the insulating film and the element formation layer;
A method for manufacturing a semiconductor device, wherein the element formation layer is peeled from the substrate. Form a metal film on the substrate,
Plasma treatment is performed on the metal film in a dinitrogen monoxide atmosphere to form a metal oxide film on the surface of the metal film, and the first insulation is continuously formed on the metal oxide film without being exposed to the atmosphere. Forming a film,
Forming an element formation layer on the first insulating film;
Forming a second insulating film covering the element formation layer;
Forming an opening in the second insulating film and the element formation layer;
A method for manufacturing a semiconductor device, wherein the element formation layer is peeled from the substrate. Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing plasma treatment in a mixed gas atmosphere of dinitrogen monoxide and argon on the metal film, and the metal oxide film is continuously exposed without being exposed to the atmosphere. Forming a first insulating film thereon;
Forming an element formation layer on the first insulating film;
Forming a second insulating film covering the element formation layer;
Forming an opening in the second insulating film and the element formation layer;
A method for manufacturing a semiconductor device, wherein the element formation layer is peeled from the substrate. Form a metal film on the substrate,
Plasma treatment is performed on the metal film in an atmosphere containing dinitrogen monoxide to form a metal oxide film on the surface of the metal film, a first insulating film is formed on the metal oxide film, and the first Forming an element formation layer having a semiconductor film on the insulating film;
Forming a second insulating film covering the element formation layer;
Forming an opening in the second insulating film and the element formation layer;
Peeling off the element forming layer from the substrate;
The method for manufacturing a semiconductor device, wherein the metal oxide film, the first insulating film, and the semiconductor film to be stacked are continuously formed without being exposed to the atmosphere. Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere,
Forming an element forming layer on the metal oxide film;
Forming an insulating film covering the element forming layer;
Forming an opening in the insulating film and the element formation layer;
An etching agent is introduced into the opening to remove the metal film and the metal oxide film,
A method for manufacturing a semiconductor device, wherein the element formation layer is peeled from the substrate. Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing plasma treatment on the metal film in a dinitrogen monoxide atmosphere,
Forming an element forming layer on the metal oxide film;
Forming an insulating film covering the element forming layer;
Forming an opening in the insulating film and the element formation layer;
An etching agent is introduced into the opening to remove at least part of the metal film and the metal oxide film,
A method for manufacturing a semiconductor device, wherein the element formation layer is separated from the substrate by physical means. Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing a plasma treatment in a mixed gas atmosphere of dinitrogen monoxide and argon on the metal film,
Forming an element forming layer on the metal oxide film;
Forming an insulating film covering the element forming layer;
Forming an opening in the insulating film and the element formation layer;
An etching agent is introduced into the opening to remove the metal film and the metal oxide film,
A method for manufacturing a semiconductor device, wherein the element formation layer is peeled from the substrate. Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing a plasma treatment in a mixed gas atmosphere of dinitrogen monoxide and argon on the metal film,
Forming an element forming layer on the metal oxide film;
Forming an insulating film covering the element forming layer;
Forming an opening in the insulating film and the element formation layer;
An etching agent is introduced into the opening to remove at least part of the metal film and the metal oxide film,
A method for manufacturing a semiconductor device, wherein the element formation layer is separated from the substrate by physical means. Form a metal film on the substrate,
Plasma treatment is performed on the metal film in a dinitrogen monoxide atmosphere to form a metal oxide film on the surface of the metal film, and the first insulation is continuously formed on the metal oxide film without being exposed to the atmosphere. Forming a film,
Forming an element formation layer on the first insulating film;
Forming a second insulating film covering the element formation layer;
Forming an opening in the second insulating film and the element formation layer;
An etching agent is introduced into the opening to remove the metal film and the metal oxide film,
A method for manufacturing a semiconductor device, wherein the element formation layer is peeled from the substrate. Form a metal film on the substrate,
Plasma treatment is performed on the metal film in a dinitrogen monoxide atmosphere to form a metal oxide film on the surface of the metal film, and the first insulation is continuously formed on the metal oxide film without being exposed to the atmosphere. Forming a film,
Forming an element formation layer on the first insulating film;
Forming a second insulating film covering the element formation layer;
Forming an opening in the second insulating film and the element formation layer;
An etching agent is introduced into the opening to remove at least part of the metal film and the metal oxide film,
A method for manufacturing a semiconductor device, wherein the element formation layer is separated from the substrate by physical means. Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing plasma treatment in a mixed gas atmosphere of dinitrogen monoxide and argon on the metal film, and the metal oxide film is continuously exposed without being exposed to the atmosphere. Forming a first insulating film thereon;
Forming an element formation layer on the first insulating film;
Forming a second insulating film covering the element formation layer;
Forming an opening in the second insulating film and the element formation layer;
An etching agent is introduced into the opening to remove the metal film and the metal oxide film,
A method for manufacturing a semiconductor device, wherein the element formation layer is peeled from the substrate. Form a metal film on the substrate,
A metal oxide film is formed on the surface of the metal film by performing plasma treatment in a mixed gas atmosphere of dinitrogen monoxide and argon on the metal film, and the metal oxide film is continuously exposed without being exposed to the atmosphere. Forming a first insulating film thereon;
Forming an element formation layer on the first insulating film;
Forming a second insulating film covering the element formation layer;
Forming an opening in the second insulating film and the element formation layer;
An etching agent is introduced into the opening to remove at least part of the metal film and the metal oxide film,
A method for manufacturing a semiconductor device, wherein the element formation layer is separated from the substrate by physical means. In any one of Claim 5 thru | or Claim 8,
The method for manufacturing a semiconductor device, wherein the metal oxide film and the first insulating film are formed by a plasma CVD apparatus. In any one of Claims 5 thru / or 9,
The method for manufacturing a semiconductor device, wherein the metal oxide film and the first insulating film are formed in the same chamber. Form a metal film on the substrate,
Plasma treatment is performed on the metal film in an atmosphere containing dinitrogen monoxide to form a metal oxide film on the surface of the metal film, a first insulating film is formed on the metal oxide film, and the first Forming an element formation layer having a semiconductor film on the insulating film;
Forming a second insulating film covering the element formation layer;
Forming an opening in the second insulating film and the element formation layer;
An etching agent is introduced into the opening to remove the metal film and the metal oxide film,
Peeling off the element forming layer from the substrate;
The method for manufacturing a semiconductor device, wherein the metal oxide film, the first insulating film, and the semiconductor film to be stacked are continuously formed without being exposed to the atmosphere. In any one of Claims 1 thru | or 16,
The metal film includes tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium (Zr), zinc (Zn), A semiconductor using an element selected from ruthenium (Ru), rhodium (Rh), lead (Pb), osmium (Os), and iridium (Ir), or an alloy material or a compound material containing the element as a main component Device fabrication method.