JP2007003553A - Matrix display device with area photosensor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide, without degrading image quality or sensor sensitivity, a compact matrix display device having an area photosensor. <P>SOLUTION: The number of wirings in a display panel is reduced by integrating an area photosensor control circuit and a matrix display control circuit, and by sharing the wiring in the area photosensor control circuit and the matrix display control circuit. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a matrix display device with an area photosensor having an area photosensor and a matrix display element.

When a fingerprint authentication function or the like is mounted on a mobile phone or PDA, a matrix display device with an area photosensor provided with an area photosensor and a matrix display element is used.
FIG. 2 is a block diagram of a conventional matrix display device with an area photosensor in which, for example, the number of pixels is 5 × 3 (see, for example, Patent Document 1).
The matrix display element of the matrix display device with an area photosensor controls a source driver circuit 202 that supplies a source signal as an image signal to a source wiring 212 extending in the vertical direction of the display sensor region 210 and a gate wiring 213 extending in the horizontal direction. The image is displayed by the gate driver circuit 203.

  On the other hand, the image image of the area photosensor of the matrix display device with an area photosensor is read by the sensor selection control circuit 204 that controls the sensor selection wiring 214 and the sensor signal control circuit 205 connected to the sensor signal wiring 215. Include.

The four circuits display an image image via a wiring and read the image image on a matrix unit 209 including display pixels and photosensors arranged in a matrix on the display sensor panel 10 of the matrix display device. At this time, wiring to the display pixels and photosensors included in the matrix unit 209 is performed individually through the gap between the display pixels and the photosensors. Therefore, each control circuit requires the number of input / output terminals corresponding to the number of matrix units 209 arranged. Note that. Obviously, depending on the configuration of the matrix unit 209, a larger number of wires per matrix unit 209 shown in FIG. 2 is required.
JP 2001-292276 A

However, in the matrix display device with an area photosensor, since the matrix display source wiring 212 and the area photosensor sensor signal wiring 215 exist individually in the display region, the pixel area of the matrix display device is reduced, and the matrix display device As a result, the display quality is degraded. Further, since the source driver circuit 202 and the sensor signal control circuit 205 are separated from each other, the number of input / output terminals and the circuit area of the control circuit are increased, resulting in an expensive control circuit. Furthermore, since the gate driver 203 and the sensor selection control circuit 204 are separated, the number of output nodes and the circuit area of the control circuit are increased, resulting in an expensive control circuit. That is, with the conventional technology, it has been difficult to realize a matrix display device with an area photosensor that is high in image quality and inexpensive.

  The present invention was devised to solve such problems. Specifically, the source driver circuit 202 and the sensor signal control circuit 205 are integrated to reduce the number of input / output terminals of the control circuit. By sharing the wiring, the number of wirings in the display sensor region 210 is reduced. Furthermore, the gate driver circuit 203 and the sensor selection control circuit 204 are integrated, and the main circuit elements are shared to reduce the semiconductor chip area of the control circuit.

  As described above, in the matrix display device with an area photosensor in which the matrix display function using the control circuit of the present invention and the area photosensor function are integrated, a high image quality matrix with a wide aperture ratio with a small wiring area and a large display area The number of input / output terminals of the control circuit for realizing the display and controlling the display device is almost halved, and further, by sharing a part of the control circuit, the chip area of the control circuit is reduced, thereby reducing the manufacturing cost of the control circuit. Reduction can be achieved. Thus, by using the control circuit of the present invention, a matrix display device with an area photosensor with high image quality and low cost can be provided.

  Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a matrix display device with an area photosensor including a display and photosensor control circuit 1 of the present invention. The display and photosensor control circuit 1 of the present invention controls the entire operation of the control circuit 8 to control display pixels arranged in a matrix of the display sensor panel 10. The image image of the photosensor arranged in is processed. The display and photosensor control circuit 1 of the present invention is composed of two blocks: a source driver / sensor signal control circuit 2 and a gate driver / sensor selection control circuit 3. The matrix display and area scanner control circuit of the present invention controls a large number of units 9 arranged in a matrix on the display sensor panel 10, displays an image image of a matrix display device with an area photosensor, and reads the image image.

  FIG. 3 is a block diagram of an embodiment of the source driver and sensor signal control circuit 2. The source driver includes an input / output control signal 102 such as a clock, a horizontal synchronization signal, a vertical synchronization signal, a write control signal, and a read control signal, a display sensor control circuit 101 that receives a command and a display data image signal 103, and a display shift. The register circuit 104, the display level shifter circuit 105, the display multiplexer circuit 106, and the display output buffer 108 are included. A display bias voltage 107 is connected to the display multiplexer circuit 106. On the other hand, the sensor signal control circuit includes a sensor input switch 109, a sensor initialization circuit 110, a sensor AD conversion circuit 111, a sensor shift register circuit 112 with a data latch function, and a sensor data processing circuit 113. The sensor data processing circuit 113 is synchronously controlled by the display sensor control circuit 101. A source signal output from the display output buffer 108 and a photosensor signal input to the sensor input switch 109 are connected to a data line 4 described later by sharing a data input / output terminal S. In the figure, the data input / output terminal Sn means the nth, and the data input / output terminal Sn + 1 means the (n + 1) th data input / output terminal S.

  FIG. 4 is a block diagram of the gate driver and sensor selection control circuit 3. The gate driver includes a selection control circuit 301 to which a selection control signal 302 is connected, a selection shift register circuit 303, a selection level shifter circuit 304, a multiplexer 305 to which a selection bias voltage 306 is connected, and a pixel selection buffer 307. On the other hand, as with the gate driver, the sensor selection control circuit includes a selection control circuit 301 to which a selection control signal 302 is connected, a selection shift register circuit 303, a selection level shifter circuit 304, a multiplexer 305 to which a selection bias voltage 306 is connected, and The sensor selection buffer 308 is configured. The gate driver and the sensor selection control circuit share other circuit elements only as buffers as unique circuit elements. When the pixel selection buffer 307 is selected by the image gate control signal 310d, an image gate signal for selecting a display pixel is supplied to the gate line 6. When the sensor selection buffer 308 is selected by the photogate control signal 310s, a photogate signal for selecting a photosensor is supplied to the sensor selection line 309.

  FIG. 5 shows a color-compatible unit 9 that can be used in this embodiment. In the example in which the red pixel 401, the green pixel 402, and the blue pixel 403 are delta-arranged, a photosensor circuit 404 having a photosensor function such as a photodiode is disposed adjacent to the red pixel 401, the green pixel 402, and the blue pixel 403. Has been. The red pixel 401, the green pixel 402, the blue pixel 403, and the photo sensor circuit 404 include a pixel switch that selectively drives them, for example, a TFT 407 using a thin film transistor TFT, a photo sensor circuit 404, and a sensor switch that selectively reads the sense signal, for example, TFT 408. It is composed of

  The unit 9 includes a data line 405 through which data signals (source signal and photosensor signal as image data) pass, a gate wiring 406 connected to the gate terminal Gp, and a sensor gate wiring 409 through which the photogate terminal Gs goes. The matrix display and the area scanner control circuit of the present invention exchange signals.

  FIG. 6 is a time chart of the matrix display device with an area photosensor according to the present invention. The horizontal axis represents time, and the vertical axis represents the voltage of each signal.

  Next, the operation of the present invention will be described with reference to the drawings.

  The operation of the source driver and sensor signal control circuit 2 will be described with reference to FIG. When an input / output control signal 102 such as a horizontal synchronizing signal, a vertical synchronizing signal, a clock signal, and a chip select signal and a display image data signal 103 are input to the display sensor control circuit 101, one display shift register 104a is duplicated. Image data is sent sequentially. When all the image data in one horizontal scanning period is prepared, the output of the display shift register 104a is increased in voltage by the display level shifter circuit 105 to control the display multiplexer circuit 106, and the display multiplexer circuit 106 has a plurality of display bias voltages. One voltage designated from 107 is transmitted to the display output buffer 108. Here, a source signal is output to the data wiring 4 of the display sensor panel 10 through the display output buffer 108 selected by the display selection control signals 114a, 114b, 116a, 116b, and 116c. N in the data input / output terminal Sn is an arbitrary positive integer and means the nth source terminal. The shift register 104a and the shift register 104b alternately take in image data from the display sensor control circuit 101 and output the image data to the display level shifter circuit 105 every horizontal scanning period. In this embodiment, the shift register 104a, the shift register 104b, and a plurality of shift registers are used, but the number of shift registers is not a requirement of the present invention.

  Next, the image reading operation will be described with reference to FIGS. The photosensor signal output to the data line 4 of the display sensor panel 10 is sent to the sensor initialization circuit 110 via the sensor input switch 109 selected by the sensor selection control signals 115a, 115b, 117a, 117b, and 117c in FIG. Connected. The sensor initialization circuit 110 sets the reference potential of the photosensor signal at the data input / output terminal Sn with the sensor initialization potential Vi at the initialization time tc in FIG. Thereby, the input capacitance of the sensor A / D conversion circuit 111 and the charge in the parasitic capacitance of the data line 4 are initialized. At the reading time ts in FIG. 6, the initialization circuit 110 in FIG. 3 becomes high impedance. The photosensor signal Pn of the photosensor circuit 404 of the display sensor panel 10 becomes a current due to the photoelectric effect, and is passed through the switch element 408 such as a TFT selected by the sensor gate wiring 409 connected to the photogate terminal Gsn and the data line 4. Thus, the input potential Vs of the sensor A / D conversion circuit 111 in FIG. 3 is raised. The potential Vs is converted to digital information by counting pulses of the clock CLKp masking the clock CLK for the time until the threshold voltage Vp is reached, and the analog photosensor signal Pn is input to the shift register 112a with a latch function. Converted and stored as a digital signal. Note that the value of the potential Vs after a certain period within the reading time ts can be converted into a digital signal as an input potential of the sensor A / D conversion circuit 111 regardless of the clock CLKp. In the next horizontal scanning period, it is sent to the image processing circuit 113, and after processing the photosensor signal Pn by arithmetic processing, data is sent to the image processing circuit. The sensor shift register 112 a and the sensor shift register 112 b alternately perform the functions of taking in data obtained by converting the light amount into digital information and outputting it to the control circuit 208. The number of shift registers is not a requirement of the present invention.

  Incidentally, the control signals 115a and 115b in FIG. 3 can select the odd-numbered or even-numbered output buffer 108 or the sensor input switch 109. The control signals 117a, 117b, and 117c can select the 3n, 3n + 1, 3n + 2 output buffer 108, and the sensor input switch 109. (N: Arbitrary integer) Control signals 115a, 115b, 117a, 117b, and 117c are connected to the output buffer 108 and the sensor input switch 109 with respect to the red pixel 401, the green pixel 402, the blue pixel 403, and the photosensor in FIG. It is set according to the arrangement of the circuit 404.

  The gate driver operation for displaying an image will be described with reference to FIGS. When an input / output control signal 302 such as a horizontal synchronizing signal, a vertical synchronizing signal, and a chip select signal is input to the control circuit 301, the shift register 303 is initialized with the vertical synchronizing signal, and then the horizontal synchronizing signal is used as a clock. Two H level data are output while being sequentially shifted. The output of the shift register 303 is increased in voltage by the level shifter circuit 304 and then connected to the control input of the multiplexer 305. The multiplexer 305 selects a voltage from the bias wiring selection according to the signal level of the control input 309 and the shift register 303, and to the gate wiring 6 of the display sensor panel 10 via the output buffer 307 and the gate terminal Gpn according to the gate control signal 310d. And the display pixel 401 to be displayed is selected via the pixel TFT 407. The gate terminal Gpn is an arbitrary positive integer and means the nth image gate terminal.

  A photogate driver operation for reading an image will be described with reference to FIGS. After being initialized by the control circuit 301 to which the control signal 302 is connected, the shift register 303 outputs the pulse data while sequentially shifting the pulse data. The pulse data may be single shot or plural. The output of the shift register 303 is increased in voltage by the level shifter circuit 304 and then connected to the control input of the multiplexer 305. The multiplexer 305 selects a necessary voltage from the selection bias voltage 306 in accordance with the control input 309 and the signal level of the shift register 303 that has been increased in voltage by the level shifter circuit 304, and outputs the output buffer 308 and the photogate in accordance with the photogate control signal 310s. A photosensor circuit 404 to be detected via the sensor TFT 408 is selected via the terminal Gsn and output to the sensor gate wiring 409 of the display sensor panel 10. The photogate terminal Gsn is a positive arbitrary integer and means the nth photogate terminal.

  The difference between the gate driver operation for displaying an image and the photogate driver operation for reading an image is that the potential selected from the output buffer 307 at the gate terminal Gpn, the output buffer 308 at the photogate terminal Gsn, and the selection bias voltage 306. Except for the difference, the operation is the same.

  The output buffer 108 and the output buffer 307, and the sensor input switch 109 and the output buffer 308 operate in synchronization.

  FIG. 6 is a time chart of the matrix display device with an area photosensor according to the present invention. The clock CLK is one of the system clocks of the display and photosensor control circuit 1 of the present invention. The unit selection signal output from the output wiring Gn of the activated multiplexer 305 in FIG. 4 has a pulse width of the image data time tgn. This image data time tgn is masked by the gate control signal 310d to be a gate signal applied to the gate terminal Gp for displaying an image. Further, the image data time tgn masked by the photogate control signal 310s is a photogate signal at the photogate terminal Gs for capturing an image. The sum of the output signals of the gate terminal Gp and the photogate terminal Gs is an image data time tgn that becomes the pulse width of the signal of the unit selection wiring Gn. The source signal to be an image signal is output on the data line 4 when the signal at the gate terminal Gp is at the time tdn in the selected state. The photo sensor signal is output on the data line 4 when the signal of the photo gate terminal Gs is the sensing time tsn in the selected state. The potential Vi is the potential of the data line 4 when the charge on the data line 4 is zero at the initial reference potential of the photosensor signal. The potential Vp is a threshold potential on the data line 4 that is appropriately determined for light quantity measurement. The pulse waveform of the clock CLKp is a waveform obtained by masking the clock CLK with the detection time tm required for the photosensor signal to change from the initial reference potential Vi to the threshold potential Vp after the initialization time tc ends. The number of pulses counted during the detection time tm determines the amount of light incident on the photosensor. By reducing the brightness of the image display that functions as a light when the subject is bright, and by increasing the brightness of the image display that functions as a light when the subject is dark, area photo scan with a wide gradation characteristic with less noise can be performed. it can. By changing the ratio of the signal output time tdn of the image gate terminal Gpn and the sensing time tsn of the photogate terminal Gsn, it is possible to place importance on image display or area photo scan. For example, by setting the output time tdn of the signal at the image gate terminal Gpn to 0% and the sensing time tsn of the signal at the photogate terminal Gsn to 100%, it is possible to widen the read signal of the image image. is there.

  It is well known that the wiring capacity of the data line 4 varies greatly due to the manufacturing process and the quality of the read image is deteriorated. In order to prevent this, the image capacity of the data line 4 can be improved by preliminarily measuring and recording the wiring capacitance of the data line 4 and correcting the image image read from the image sensor using the measurement recording of the wiring capacitance. This correction method will be described with reference to FIGS. 3, 4, and 6 in which the wiring capacity of the data line is previously measured and recorded, the image data is corrected, and the image quality is improved.

  The sensor input switch 109 is selected, the output buffer 108 is set to high impedance, the output buffer 307 and the output buffer 308 are fixed to a constant potential that does not select all the matrix units 9, and then the initialization circuit 110 performs the initialization time tc. Meanwhile, the data line 4 is fixed to the initial reference potential Vi. Next, a constant current is supplied from the initialization circuit 110 to the data line 4 during the reading time tr. The first detection time tm until the potential of the data line 4 input to the A / D converter 111 reaches the threshold potential Vp is measured, and the capacitance components of all the data lines 4 are measured. This capacity data is sent to the sensor data processing circuit 113 via the shift registers 112a and 112b. The sensor data processing circuit 113 corrects the image data of the area photosensor based on the capacity data of the data line 4 to improve the image quality.

It is a block diagram of a matrix display device with an area photosensor of the present invention. It is a block diagram of the conventional matrix display device with an area photosensor. It is a block diagram of the source driver and sensor signal control circuit of the present invention. It is a block diagram of the gate driver and sensor selection control circuit of the present invention. It is a block diagram of the matrix unit of this invention. It is a time chart figure of the matrix display device with an area photosensor of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Display and photo sensor control circuit 2 Source driver and sensor signal control circuit 3 Gate driver and sensor selection control circuit 8, 208 Control circuit 9, 209 Matrix unit 10, 210 Display sensor panel 101 Display sensor control circuit 102 Input / output Control signal 103 Display image data signal 104 Display shift register circuit 105 Display level shifter circuit 106 Display multiplexer circuit 107 Display bias voltage 108 Output buffer 109 Sensor input switch 110 Sensor initialization circuit 111 Sensor A / D conversion circuit 112 Sensor shift register circuit 113 Sensor Data processing circuit 114 Display selection control signal 115 Sensor selection control signal 116 Display selection control signal 117 Sensor selection control signal 202 Source driver circuit 203 Gate / dry circuit Bar circuit 204 Sensor selection control circuit 205 Sensor signal control circuit 301 Selection control circuit 303 Selection shift register circuit 304 Selection level shifter circuit 305 Multiplexer 307 Pixel selection buffer 308 Sensor selection buffer 401 Display pixel 404 Sensor 406 Pixel gate line 407 Pixel TFT
408 Sensor TFT

Claims (5)

A display panel in which a matrix unit composed of a pair of display pixels and a photosensor is arranged in a matrix;
An image control circuit for controlling the display pixels;
A sensor control circuit for controlling the photosensor;
In a matrix display device with an area photosensor comprising:
The image control circuit includes a source driver circuit and a gate driver circuit,
The sensor control circuit includes a sensor signal control circuit and a sensor selection control circuit,
A matrix display device with an area photosensor, wherein the source driver circuit and the sensor signal control circuit are integrated, and the gate driver circuit and the sensor selection control circuit are integrated. 2. A matrix display device with an area photosensor according to claim 1, wherein an output terminal of the source driver circuit and an input terminal of the sensor signal control circuit are made common. 2. The matrix display device with an area photosensor according to claim 1, wherein the output of the source driver circuit is switched between a signal output and a high impedance.   2. A matrix display device with an area photosensor according to claim 1, wherein gate wiring terminals of the gate driver circuit and photogate wiring terminals of the sensor selection control circuit are alternately arranged.   5. The matrix display and area scanner control circuit according to claim 4, wherein the gate wiring terminal is output-controlled by a gate control signal, and the photogate wiring terminal is output-controlled by a photogate control signal.

Images