JP2006517733A - Resistance balance of energy storage device - Google Patents

Abstract

A resistance balance (1) is provided for an energy storage device in the form of a supercapacitor (2). The supercapacitor has two energy storage cells (3, 4). In some embodiments, the balance is placed in the middle of the cell. The balance (1) includes two longitudinal members (5, 6) having the same extension and spaced apart in parallel, which are respectively end (7, 8) and end (9, 10). Extending between. Two transverse members (11, 12) having the same extent and spaced apart in parallel extend between the members (5, 6). The members (11) are each attached to the members (7, 8) immediately adjacent to the ends (7, 9), while the members (12) are adjacent to the respective ends (8, 10). They are attached to members (7, 8) that are spaced inwardly from these.

Description

The present invention relates to resistance balance, and more particularly to resistance balance for energy storage devices.

  The present invention was developed mainly for use in supercapacitors, and will be described below with reference to this application example. However, the present invention is not limited to a specific field of use, and is also suitable for other energy storage devices such as capacitors, fuel cells, primary cells, secondary cells, and combinations of these devices.

  As used herein, the terms “supercapacitor” and “supercapacitors” include electric double layer capacitors, hybrid devices including such capacitors, and similar energy storage devices. Intended. Supercapacitors refer to ultracapacitors, electrochemical capacitors, double layer capacitors and the like.

Description of Prior Art Any description of prior art throughout this specification is deemed to be an admission that such prior art is known or that it constitutes part of the general knowledge in the field. Should not.

  Known forms of energy storage devices, such as supercapacitors, include a housing, two or more electrodes disposed in a housing spaced apart to define at least one energy storage cell, and a selected one It includes two or more terminals connected to the above electrodes and extending from the housing to allow external electrical connection to the electrodes.

  One type of supercapacitor includes a counter electrode immersed in an electrolyte, where the electrodes are maintained in a predetermined, spaced apart, electrically isolated configuration. In some cases, the electrode is maintained by an intermediate insulating separator. In other cases, the separator and electrolyte are integrated. At least one of the electrodes provides a surface on which the electric double layer is formed at the electrode-electrolyte interface. Typically, the electrode includes a current collector made of a conductive substrate. The substrate is typically a metal such as a metal plate, but other known devices use different conductive materials. The substrate preferably has a large surface area to give the supercapacitor a large capacitance. One way to provide such a large surface area is to coat the substrate with a large surface area material. This coating is typically formed from one or more portable carbons, such as carbon fiber, fine carbon, carbon nanotubes, etc., and an adhesive to adhere the carbon to itself and to the current collector. . Other materials such as organic molecules such as polymers and inorganic compounds such as metal oxides, metal hydroxides and metal phosphates can also be used to give the electrode a large surface area. Thus, the electrodes collectively form a single energy storage cell.

The electrodes and intermediate separator (if used) are stacked or wound together and placed in a housing containing the electrolyte. The electrolyte contains ions that are free to move in a matrix such as a liquid or polymer and can react to the charge generated on the electrode surface. Further, each terminal is part of or connected to each electrode and extends therefrom to allow external access to these electrodes. Finally, the housing is sealed to prevent contaminants from entering and electrolyte from exiting.

  Supercapacitors store energy in an electric field that extends across the electric double layer. This type of device is known as a “hybrid supercapacitor” when one or more electrodes accumulate charge in the electric double layer and one or more electrodes accumulate charge by electrochemical reaction.

  In other configurations, two or more such cells are connected in parallel and / or in series between the terminals to provide the desired operating voltage, current capacity and / or capacitance.

  In use, it is not uncommon to include a plurality of cells connected in series, as the voltage that can be practically applied across a single cell is limited. In high voltage applications this happens naturally. However, it is also known to do this for low voltage applications to give a larger operable safety factor. For higher current applications, multiple cells are connected in parallel.

  By further explanation, it is stated that the breakdown voltage of a component in a supercapacitor contributes to the operating voltage of that supercapacitor. Typically, the operating voltage limit is a characteristic of one or more of the following components used in a supercapacitor: salt electrolyte, electrolytic solvent, electrode coating, current collector, separator, and packaging. Alternative supercapacitor configurations include other factors inherent in the design.

  The breakdown voltage of the cell itself, ie the lowest voltage at which the cell fails, is determined by the lowest value of the breakdown voltage of the component. The conventional approach of increasing the breakdown voltage of the cell uses components with higher voltage stability. For example, in some known devices, non-aqueous solvents are used to increase the operating voltage of the cell.

  A supercapacitive cell typically has an operating voltage provided by the manufacturer of the cell. For many cell supercapacitors, the operating voltage is often expressed as the voltage of the supercapacitor as a whole. It is desirable to increase this operating voltage. This not only contributes to the electrical performance of the supercapacitor, as will be explained further below, but also requires fewer cells connected in series for a given applied voltage.

  The operating voltage is typically a nominal number based on the safety margin and cell lifetime requirements designed for the cell, and based on the breakdown voltage of the cell or cells. Some cells can be exposed to voltages higher than the operating voltage for a short period of time without being adversely affected. However, long-term exposure usually degrades the short-term performance characteristics of the cell and shortens its possible operating life.

  If a uniform coating is envisaged, the capacitance (C) obtained from a capacitor of the type described above is proportional to the surface area of the smallest electrode. It will be appreciated that the capacitor can be formed in many configurations and that the capacitance is measured for each electrically isolated cell. Furthermore, the cells can be connected in series and / or in parallel.

  The energy storage capacity of the capacitor is given by the following equation:

  Here, E is the energy at Joule, C is the capacitance at Farad, and V is the operating voltage of the capacitor.

  Another measure of supercapacitor performance is the ability to quickly store and release energy (this is the maximum power P of the capacitor), which is

R is the internal resistance of the supercapacitor.

  The internal resistance R is commonly referred to as an equivalent series resistance or “ESR”. That is, ESR is the sum of the resistances of all components of the supercapacitor where current flows between the external contacts or terminals. Furthermore, the ESR of the device or of individual components of the device is defined as the actual component of impedance at 1000 Hz.

  Importantly, as shown in Equation 2, the power performance of the supercapacitor depends on the ESR. Furthermore, it is the intrinsic oxide coating formed on electrodes made of metals such as aluminum that contribute significantly to the ESR of supercapacitors. It is therefore known to treat this intrinsic oxide layer as a means to reduce ESR.

  Supercapacitors have a much more specific capacitance than conventional capacitors. When this feature is combined with low resistance, such supercapacitors are ideally developed for portable devices, especially GSM (Global System for Mobile Communications), GPRS (General Packet Radio Service), EDGE (GSM Development) Is suitable for high power applications for those using UMTS (Universal Mobile Telecommunications Service) and 3G (third generation) radio technology. Supercapacitors can play a role in hundreds of other applications. The energy and power storage market where supercapacitors exist is currently occupied by batteries and conventional capacitors. While batteries are excellent at storing energy, it is well recognized that designs are compromised to allow energy transfer at high power. Conventional capacitors are capable of high speed (high power) transfer of energy, but it is well recognized that the amount of energy transferred is very low due to the low available capacitance. I will. Due to these limitations on existing batteries and capacitors to market demands, the three main potential areas of supercapacitors: battery replacement (ie devices with high energy density), battery complementation (ie high) Devices with power and energy density), as well as capacitor replacement (ie, devices with high frequency response as well as small and high power density) become apparent.

Currently, the relatively high power density of supercapacitors is ideal for parallel combinations with high energy density batteries to form a composite energy storage system. When the load requires non-constant energy, a peak can be drawn from the charged supercapacitor by supplementing the battery with the supercapacitor. This reduces the load on the battery and in many cases extends the life of the battery and the life of the rechargeable battery.

  Modern mobile devices require a power system that can handle large variations in load. For example, mobile phones have various modes, each with different load requirements. There is a standby mode that requires low power and is relatively constant. However, since this mode needs to find the nearest base station, it is interrupted periodically and signals are transmitted and received, so a high load is required. In a full conversation mode where continuous contact to the base station is required, the load takes the form of a periodic signal where the instantaneous load is completely different from the average value. There are several communication protocols such as GSM and GPRS, all of which are characterized by a periodic load. A parallel supercapacitor-battery composite is particularly suitable for this application. Because the power from the supercapacitor is used during high loads, the duration is usually short and the energy from the battery recharges the supercapacitor and reduces the base load when low power is required. Can be supplied. As digital wireless communication devices are further miniaturized, the size of the battery is reduced and the need for supercapacitors increases.

  Supercapacitors also have applications in the field of hybrid electric vehicles (HEV). Supercapacitors can be used as an integral component of the power transmission paths of these automobiles and are used as the primary power source during acceleration and for the storage of energy that is recovered during regenerative braking. Such a car can probably halve the fuel cost of the car driver and reduce emissions by up to 90%.

  In general conditions, capacitance occurs when two parallel plates are connected to an external circuit and a voltage difference is introduced between the two plates, and the surfaces are charged face to face. The basic relationship of this separation of charges is shown by the following equation:

  Where C denotes the capacitance having units of farad (F), ε is the dielectric constant having units of farad per meter (m), A is the overlapping region of the charged plates, and L Is the separation distance. The dielectric constant of the area between the plates is related to the dielectric constant of the material that can be used to separate the charged surfaces.

  A problem with existing commercial capacitors using conventional materials is that their performance is limited by size. For example, a capacitor based on a metallized coating of a 50 μm thick polyethylene plate develops only 0.425 μF per square meter of capacitor. Therefore, if it exceeds 2.3 million square meters, it is required to develop 1F.

Supercapacitors developed by this application are commonly filed by applicants such as PCT / AU98 / 00406, PCT / AU99 / 00278, PCT / AU9.
9/00780, PCT / AU99 / 01081, PCT / AU00 / 00836, PCT / AU01 / 00553, PCT / AU01 / 00838 and PCT / AU01 / 01613, the contents of which are hereby incorporated by reference. .

  These supercapacitors developed by the applicant overcome the above-mentioned dimensional problems by using very large surface area carbon as the coating material.

In supercapacitors, the charge separation distance is generally very small (typically less than 1 nanometer), which results in high capacitance when combined with a very large surface area (equation 3). See). Here are the technical advantages of supercapacitors over conventional capacitors. This is because charge storage in a very thin layer results in a specific capacitance of about 0.1 Fm ⁻² . This is an increase of several hundred thousand times over the conventional film capacitor. Similarly, the applied controlled potential, reversible nanoscale ion adsorption / desorption process results in the rapid charge / discharge capability of the supercapacitor.

As mentioned above, some supercapacitors utilize highly porous carbon particle electrode coatings with very large surface areas. For example, the surface area can be from 100 m ² per gram to up to 2500 m ² per gram in certain preferred embodiments. The colloidal carbon matrix is not only held together (bonded) but also held together by an adhesive material that has an important role in holding the carbon layer on the surface of the current collecting substrate (adhesion).

  The current collecting substrate is generally a metal foil, but this varies depending on the type of apparatus.

  One variable of interest in the supercapacitor field is the nature of the electrolyte involved. The electrolyte is typically one or more solvents that contain one or more dissolved ionic species. In many cases, the physical and electrochemical properties of the electrolyte are the internal resistance (ESR) of the supercapacitor and the “power spectrum” of the supercapacitor, ie the ability of the supercapacitor to power over various time domains or frequency ranges Is an important factor in determining

  Factors affecting the conductivity (κ) of the electrolyte solution were held December 12-14, 1994 at Deerfield Beach, Florida, Ocean Resort Hotel and Conference Center, Florida Educational “The 4th International Seminar on Double Layer Capacitors and Similar Energy Storage Devices” (“Florida Educational Seminars, Inc.” (Florida 33431, Boca Raton, Suite 358, Grade Road 1900) B. Excerpt from “The Fourth International Seminar on Double Layer Capacitors and Similar Energy Storage Devices”). E. It is described in detail in a paper by B.E.Conway.

In summary, there are two main factors involved in determining conductivity. That is,
a) free charge carrier, concentration of cations and anions,
b) Contribution of ion mobility or conductivity for each ion dissociated by the electrolyte.

Then there are several sub-elements that affect these two main elements. That is,
a) the solubility of the selected salt,
b) Factors such as the degree of dissociation into free ions and the degree of ion pairs of ionic species. This is further influenced by salt concentration, temperature and the dielectric constant of the solvent.

  c) Viscosity of the solvent, which is a temperature dependent property. As the temperature increases, the viscosity decreases accordingly.

  Therefore, the supercapacitor solvent can be designed in consideration of the following criteria.

a) Solvent of selected ionic species b) Degree of dissociation of cation / anion pair in solution c) Dielectric constant d) Electron pair donation e) High ion mobility tolerance f) Free ion solvation and solvation ions G) Temperature coefficient of viscosity (ie, low viscosity in the intended temperature range) h) Equilibrium of ion pairs Also, the solvent must be chemically stable. Aqueous electrolytes such as sulfuric acid and potassium hydroxide solutions are often used. This is because they enable the production of electrolytes with high conductivity. However, water is susceptible to electrolysis to hydrogen and oxygen on charge, has a relatively small electrochemical window of operation, and an externally applied voltage degrades the solvent. In order to maintain electrochemical stability in applications requiring voltages above 1.5V, it is necessary to use series supercapacitor cells, which increases the size associated with non-aqueous devices. Stability is important when a supercapacitor is believed to have to be charged and discharged hundreds of thousands of times during its operating life.

  Of course, there are also processing requirements for solvents such as cost, toxicity, purity and dryness considerations.

  Non-aqueous solvents commonly used in the related fields, such as batteries, have a high dielectric constant aprotic (eg, organic carbonate), a low dielectric constant with a high donor number (eg, dimethoxyethane, tetrahydrofuran or dioxolane), It can be classified as a low dielectric constant (e.g. toluene or mesitylene) with high polarizability, or a medium dielectric constant non-ptronic (e.g. dimethylformamide, butyrolactone) solvent.

  However, in addition to the specific electrolyte requirements of the supercapacitor described above, it is believed that in practice the supercapacitor does not operate in isolation. Rather, in use, they are in a restricted environment in the presence of components that produce high temperatures and other similar components, which must be considered when selecting the electrolyte solvent. Also, it must be taken into account that the supercapacitor must be able to operate at a temperature that is significantly lower (in the sub-freezing range) than the high operating voltage mentioned above.

  Battery energy storage is less dependent on electrolyte cell contribution to ESR, as opposed to supercapacitor electrical transfer, but low ESR is also desirable in batteries. A solvent with a high boiling point always has a high viscosity and consequently a low charge mobility at low temperatures. Thus, high boiling solvents such as cyclic ethers and lactones can be used in batteries regardless of what is the very high ESR in supercapacitors.

  These and other considerations are described in more detail in co-pending application PCT / AU03 / 00334, the contents of which are hereby incorporated by cross-reference.

In the above description, various elements are shown that lead to the design of a supercapacitor for any given application. However, additional complexity arises for applications that require a series combination of supercapacitors. In particular, uniformity between nominally similar supercapacitors is inevitably lacking due to manufacturing tolerances and the need to balance tolerances and costs. That is, any given measurable characteristic of the device is distributed between tolerances as it falls within a given tolerance. The problems arising from the lack of uniformity between supercapacitors to be connected in series are outlined by the following paper.

a) John R. "Voltage Balance of Electrochemical Capacitors-High" included in the Minutes of the 36th International Power Symposium held in Cherry Hill, New Jersey, p. 15-18 (June 1994) by John R. Miller Voltage Equipment Cell Uniformity Requirements ”(“ Electrochemical Capacitor Voltage Balance-Cell Uniformity Requirements for High-Voltage Devices ”)
b) John R. Miller and Susanna M. "Electricity" submitted to the 11th International Seminar on Double Layer Capacitors and Similar Energy Storage Devices held by Desfield Beach, Florida, December 3-5, 2001, by Susannah M. Butler Chemical Capacitor Float Voltage Operation: Effect of Leakage Current on Cell Voltage Uniformity (“Electrochemical Capacitor Float-Voltage Operation: Leakage Current Influence On Cell Voltage Uniformity”)
c) B. E. Conway's Electrochemical Capacitor Self-Battery submitted to the 5th International Seminar on Double-layer Capacitors and Similar Energy Storage Devices held 4-6 December 1995 in Boca Raton, Florida Characterization And Behavior And Mechanism Of Self-Discharge Of Electrochemical Capacitors In Relation To That At Batteries ”
It will be appreciated that a supercapacitor includes one or more cells connected in series. For a given operating voltage, a certain number of these cells are required based on the operating voltage of the cells. It is less important whether these cells are packaged in a single supercapacitor or in multiple series connected supercapacitors. In any case, there is effectively a plurality of supercapacitance cells connected in series. Each of the cells in series has a plurality of electrical characteristics including:

a) The charge current is the current used to charge the cell to its operating voltage (V ₀ ).

b) The charge storage current is a reduced current that flows into the cell during a predetermined period immediately after the cell is held at the operating voltage. (Typically, the predetermined period is tens of hours.)
c) Leakage current (I _L ) is the reduced current that flows into the cell when it is held at the operating voltage over a predetermined period of time.

  d)

Equivalent parallel resistance (EPR), which is the resistance defined by
e) The time constant, also known as the RC time constant, is equal to the product of ESR and capacitance.

f) Response time as defined in PCT / AU99 / 01081 (T ₀ )
g) Volumetric and gravimetric FOM as specified in PCT / AU99 / 01081,
h) Maximum volumetric and gravimetric power density, each defined by Equation 2 per unit volume or unit mass,
i) Volumetric and gravimetric energy densities, each defined by Equation 1 per unit volume or unit mass, classify supercapacitors in terms of their same characteristics as opposed to supercapacitive cells You can also.

  When multiple series-connected cells are used, each of the cells will have the above characteristics, even if the difference is small, regardless of whether these cells are in the same supercapacitor or multiple supercapacitors. Have different values. As a partial solution to this, it is known to “match” the cells for series connection. Typically the matched properties are leakage current, capacitance and ESR. However, this depends on important performance parameters for a given application.

  Matching nominally similar cells or nominally similar supercapacitors is typically based on static and controlled conditions, thus limiting efficiency.

  The above characteristics for a given cell are known to vary with time, cell temperature and voltage to which the cell is exposed. Thus, a cell that is considered well matched during manufacturing does not necessarily maintain its state when the cell is used. This is exacerbated, for example, because of the effect of increasing the difference once it becomes sufficiently apparent for some of the above characteristics.

  As an example, for a plurality of series connected supercapacitive cells, each of the cells is unique for a given temperature and voltage across the cell based on its physical configuration, including any impurities and their chemistry. Equivalent parallel resistance (EPR). If cells in series experience a temperature change during use, this typically results in a change in EPR that is unlikely to be the same for each cell. Thus, a well-aligned cell is easily insufficiently aligned due to environmental effects such as temperature changes and mechanical stresses. This effect is exacerbated when series cells are exposed to differences in environmental influences. This example occurs with stacked cells, where the cell at the bottom of the stack is preferentially heated because it is relatively close to a heat source such as a processor or other circuit or component.

  In the above situation, even if everything is well aligned beforehand, the temperature difference will increase the difference between the EPRs of the series cells. This in turn changes the relative proportion of applied voltage observed by each cell, thus increasing the risk of failure of cells observing a high proportion. Even if the voltage observed by the cell is not close to the breakdown voltage of the cell, the reliability and lifetime of the cell is compromised by the risk of exceeding the operating voltage.

Disclosure of the Invention It is an object of the present invention to overcome or ameliorate at least one of the disadvantages of the prior art or to provide useful alternatives.

  According to a first aspect of the present invention, a resistance balance is provided for an energy storage device having at least two energy storage cells, the resistance balance being arranged in the middle of the cells.

  Preferably, the cells are connected in series and the balance includes a plurality of resistance paths in parallel with each cell. More preferably, the balance includes a plurality of resistance members for defining each path. That is, the path has a uniform resistance along each length. However, in other embodiments, each path includes separate conductive portions connected by a resistive portion. In a further embodiment, the balance includes one or more active elements.

  Preferably, the resistive portion is a surface mount resistor. More preferably, the resistor is electrically connected to the adjacent conductive portion by solder, conductive adhesive or other means. In another embodiment, the active element surface is mounted.

  Preferably, one cell includes a first terminal and a second terminal, the first terminal defining the negative terminal of the device. More preferably, the other cell includes third and fourth terminals, the fourth terminal defines the positive terminal of the device, and the second terminal is electrically connected to the third terminal.

Preferably, the balance is
A frame extending between the first end and the second end;
A first tab extending from the first end to connect to the first terminal;
A second tab spaced from the first tab and extending from the first end to connect to the fourth terminal;
And a third tab extending from the second end for connection with the second and third terminals.

  More preferably, one path extends along a balance between the first tab and the second tab, and the other path is in a balance between the second tab and the third tab. Extending along. More preferably, the conductive portion is a metal track and the resistive portion is a resistor that bridges between the metal tracks. However, in other embodiments, the resistive portion is defined by one or more active elements and one or more resistors. It will be appreciated that in some embodiments, the active device includes one or more operational amplifiers.

  In a preferred form, the first, second and third tabs are electrically connected to the substrate such that the substrate is between the first and second terminals and the third and fourth terminals. To define each resistance path. More preferably, the resistance path resistance is substantially equal. In other embodiments, the resistance of the resistance path changes over time. Preferably, the resistance varies with the voltage across one or more cells.

  Preferably the balance is sandwiched between cells. More preferably, the balance is completely sandwiched between the cells.

  In some embodiments, the balance is one or more sheets. More preferably, the plate is coated with a non-conductive adhesive. Even more preferably, the plate comprises a thin plate. In some embodiments, the plate includes two outer layers of a first resistance and an intermediate layer of a second resistance that is significantly greater than the first resistance.

  In a preferred form, one cell includes a first terminal and a second terminal, the first terminal defining the negative terminal of the device. More preferably, the other cell includes a third terminal and a fourth terminal, the fourth terminal defining the positive terminal of the device, and the second terminal electrically connected to the third terminal. .

Preferably, the balance includes a cradle on which the cell is mounted. More preferably, the cradle includes a plurality of resistance members for defining each path. Even more preferably, each path includes separate conductive portions connected by a resistive portion. However, in other embodiments, the path is substantially uniform resistance. In a further embodiment, the resistance of the resistance path varies depending on the voltage across at least one of the cells.

According to a second aspect of the present invention, there is provided an energy storage device having two energy storage cells each including two terminals,
A first contact connected to one of the terminals of one cell;
A second contact connected to one of the terminals of the other cell;
A third contact connected to the other terminal;
To collectively define the resistance balance of the device, it includes a first contact and a third contact, and two resistance paths extending between the second contact and the third contact, respectively.

  Preferably, the balance is attached to the substrate. More preferably, the substrate is a circuit board. Even more preferably, the resistances of the resistance paths are substantially equal and the first and second contacts are fixed and electrically connected to the plate. In other embodiments, the resistance path is defined by one or more active elements. Preferably, the active element is mounted on the circuit board. More preferably, the active element is a surface mounted on a circuit board.

  Preferably, the balance is placed in the middle of the cell. More preferably, the balance is sandwiched between cells. More preferably, the balance is completely sandwiched between the cells.

  In a preferred form, the first contact defines the positive terminal of the device and the second contact defines the negative terminal of the device. More preferably, the third contact is electrically connected to the plate.

  Preferably, the device includes more than two cells.

  According to a third aspect, a circuit board is provided that includes one or more energy storage devices, which or these devices comprise the resistance balance of the first aspect of the invention.

According to a fourth aspect of the present invention, a circuit board is provided for supporting a plurality of electrically interconnected components, at least one of the components being an energy storage device having: And the following are
At least two energy storage cells connected in series;
Each cell and a resistance balance having a plurality of resistance paths in parallel.

  In one embodiment, the resistance path is defined by a respective resistor. However, in other embodiments, the resistance path is defined at least in part by one or more active elements. Preferably, each resistance path is defined by a combination of one or more resistors and one or more active elements.

According to a fifth aspect of the present invention there is provided an electronic device including an energy storage device, the energy storage device comprising:
At least two energy storage cells connected in series;
Each cell and a resistance balance having a plurality of resistance paths in parallel.

  In one embodiment, the resistance path is defined by a respective resistor. However, in other embodiments, the resistance path is defined at least in part by one or more active elements. Preferably, each resistance path is defined by a combination of one or more resistors and one or more active elements.

  According to a sixth aspect of the present invention, there is provided an energy storage device cradle having at least two energy storage cells, the cradle being disposed in the middle of the cells.

  Preferably, one cell includes a first terminal and a second terminal, the first terminal defining the negative terminal of the device. More preferably, the other cell includes a third terminal and a fourth terminal, the fourth terminal defining a positive terminal for the device, and the second terminal electrically connected to the third terminal. Is done.

Preferably, the cradle is
A frame extending between the first end and the second end;
A first tab extending from the first end to connect to the first terminal;
A second tab spaced from the first tab and extending from the first end to connect to the fourth terminal;
A third tab extending from the second end for connection to the second and third terminals. More preferably, one path extends along the cradle between the first tab and the third tab, and the other path extends along the cradle between the second tab and the third tab. Extend. More preferably, the conductive portion is a metal track and the resistive portion is a resistor that bridges between the metal tracks. However, in other embodiments, the resistance path is at least partially defined by one or more active elements. In a further embodiment, the resistance path is defined by a combination of one or more resistors and one or more active elements.

  In a preferred form, the first, second and third tabs are electrically connected to the substrate such that the substrate is between the first and second terminals and the third and fourth terminals. Each resistance path is defined. More preferably, the resistance path resistance is substantially equal. In some embodiments, the resistance of the resistance path varies depending on the voltage across one or more cells.

  According to a seventh aspect of the present invention, there is provided a cradle for an energy storage device having at least two series connected energy storage cells, the cradle being arranged in the middle of the cell to define a resistance balance Have a plurality of resistance paths in parallel with the respective cells.

  Preferably, the cradle is sandwiched between cells. More preferably, the cradle includes a tab extending outwardly between the cells. Even more preferably, the tab facilitates electrical connection of the cell to external electrical components. In the preferred embodiment, the tab is adjusted for connection to the circuit board. However, in other embodiments, the tabs are adjusted for direct connection to external electrical components.

  In a preferred form, one cell includes a first terminal and a second terminal, the first terminal defining the negative terminal of the device. More preferably, the other cell includes a third terminal and a fourth terminal, the fourth terminal defining a positive terminal for the device, and the second terminal electrically connected to the third terminal. Is done.

  Preferably, the cradle includes a plurality of resistance members for defining respective paths. More preferably, each path includes separate conductive portions connected by a resistive portion. However, in other embodiments, the path has a substantially uniform resistance. In other embodiments, the resistive member includes one or a combination of one or more resistors and one or more active elements.

According to an eighth aspect of the present invention, there is provided an energy storage device cradle having two energy storage cells, each including two terminals, the cradle comprising:
A first contact connected to one of the terminals of one cell;
A second contact connected to one of the terminals of the other cell;
And a third contact connected to the other terminal.

  Preferably, the cradle is mounted on a substrate for electrically interconnecting the contacts. More preferably, the substrate is a circuit board. Even more preferably, the contacts are electrically interconnected so that the substrate defines respective resistance paths between the first and third contacts and the second and third contacts. In the preferred embodiment, the resistance of the resistance path is substantially equal. In other embodiments, the resistance of the resistance path varies in response to a voltage across at least one of the cells.

  Preferably, the cradle is placed in the middle of the cell.

  In a preferred form, the first contact defines the positive terminal of the device and the second contact defines the negative terminal of the device. More preferably, the third contact is electrically connected to the substrate.

  According to a ninth embodiment of the present invention, a resistance balance of at least two series connected energy storage devices is provided, and the balance is connected in parallel with the device to bring the device into a balanced state. It has a high power consumption mode and a low power consumption mode when the device is in a balanced state.

  Preferably, each device has a voltage across it, and in a balanced manner, the voltages across the devices are substantially equal. In some embodiments, the voltage across the balanced device is slightly different than a predetermined threshold. For example, in some embodiments, the threshold is about 0.5 volts. However, alternative threshold values are used in other embodiments.

  Preferably, the energy storage device is a capacitor.

  In one embodiment, in the low mode, the power consumed by the balance is less than 10% of the power consumed by the balance in the high mode.

  Preferably, each device includes a plurality of capacitors in parallel. In some embodiments, each device includes a plurality of capacitors in parallel and / or in series.

  Preferably, the balance is connected in parallel with more than two devices connected in series. In some embodiments, the balance is cascaded with more than 10 devices connected in series. However, since embodiments of the present invention are typically applied to low voltage circuits, fewer than 10 devices connected in series are used.

  Preferably, the balance switches between the two modes. More preferably, the balance is kept in a low mode until the device proceeds from a balanced state by a predetermined amount. However, in other embodiments, the balance gradually moves from one mode to another.

In a preferred form, each of the devices includes two terminals, one of these terminals defining a positive terminal, another terminal defining a negative terminal, and the two remaining terminals defining a common terminal. To do. More preferably, the balance comprises a switching device connected to the positive terminal, the common terminal and the negative terminal for selectively defining a current path between the terminals to switch the balance between the low mode and the high mode. Including.

  Preferably, the switching device is responsive to the voltage between the positive terminal and the common terminal and the voltage between the negative terminal and the common terminal to determine when to switch between the low mode and the high mode. In other embodiments, the switching device is responsive to the voltage between the positive and negative terminals.

  According to a tenth aspect of the present invention, a resistance balance is provided for at least two serially connected energy storage devices, the balance being connected in parallel to the device to bring the device into a balanced state. Low resistance mode and high resistance mode when the device is in a balanced state.

  Preferably, the devices have their respective equivalent parallel resistance (EPR) and balance to provide an effective resistance in parallel with each device in a high resistance mode, the effective resistance being higher than the respective EPR. . More preferably, the effective resistance is at least 10 times higher than the respective EPR. Even more preferably, the effective resistance is at least 100 times higher than the respective EPR.

Preferably, in the low resistance mode, the effective resistance across the device at high voltage is lower than the respective EPR. More preferably, the effective resistance is at least 10 times lower than the respective EPR. Even more preferably, the effective resistance is at least 100 times lower than the respective EPR. However, in other embodiments, the effective resistance is at least 10 ⁶ times lower than the respective EPR.

  As used herein, the term “capacitor” refers to any passive charge storage device having an internal charge separation and thus an internal electric field. Typically such devices have leakage current. This includes electrolytic capacitors, carbon double layer capacitors (otherwise known as supercapacitors, ultracapacitors, etc.). When referring to a supercapacitor or capacitor, it is understood that this includes one such charge storage device or a plurality of such devices connected in parallel, unless the context clearly requires otherwise. Will.

According to an eleventh aspect of the present invention there is provided an electrical device comprising:
A circuit for providing predetermined functionality;
A supply rail to power the circuit;
An energy storage device for supplying energy to the supply rail;
A plurality of series-connected capacitors connected in parallel with the rail;
And a voltage balance device connected in parallel with the capacitor and having a low resistance mode for placing the capacitor in a balanced state and a high resistance mode when the capacitor is in a balanced state.

  Preferably, the predetermined functionality includes wireless transmission.

  According to a twelfth aspect of the present invention, a voltage balance is provided for an energy storage device that experiences a load voltage, the balance being connected in parallel with the device and partially discharging at least one of the devices. Responsive to a predetermined value of the load voltage for.

  Preferably, a discharge occurs through the resistor. That is, the balance has a high power consumption mode for partially discharging the energy storage device and a low power consumption mode otherwise.

  Preferably, the balance is connected in series with a plurality of similar balances to provide a voltage balance of the corresponding plurality of series connected energy storage devices.

In a preferred form, the balance is
A resistor divider connected in parallel to the device to provide a divided voltage derived from the load voltage;
A dissipation resistor;
A switch having a reference voltage, an input responsive to the divider voltage, and an output connected to the dissipation resistor, the switch allowing a current flow in the dissipation resistor to partially discharge the energy storage device Respond to a divider voltage higher than the reference voltage for

  Preferably, the dissipation resistor has a resistance greater than zero.

  Preferably, the switch is an operational amplifier. More preferably, the switch is a MAX 9117 operational amplifier configured as a comparator. However, in other embodiments, alternative amplifiers and alternatively configured amplifiers are used.

  According to a thirteenth aspect of the present invention, a voltage balance is provided for an energy storage device that experiences device voltage, the balance being parallel to the energy storage device to maintain the device voltage below a predetermined threshold. Connected to.

  Preferably, the device voltage is maintained below the threshold by partially discharging the energy storage device. More preferably, the balance includes a dissipation resistor and a variable resistance device responsive to a predetermined value of the capacitor voltage to allow the capacitor to partially discharge through the resistor. Even more preferably, the dissipation resistor has a voltage greater than zero.

Preferably, the variable resistance device is an operational amplifier having:
Internal voltage reference,
An input voltage responsive to the device voltage;
The output voltage applied to the dissipation resistor; and
A comparator responsive to the input and internal reference voltage to determine the output voltage and thus the current flow in the resistor.

According to a fourteenth aspect of the present invention there is provided an electrical device comprising:
A circuit for providing predetermined functionality;
A supply rail to power the circuit;
An energy storage device for supplying energy to the supply rail;
A plurality of series connected capacitors connected in parallel to the rail and experiencing respective capacitor voltages;
A voltage balance responsive to a predetermined value of the capacitor voltage to partially discharge each capacitor.

According to a fifteenth aspect of the present invention, a voltage balance is provided for at least two series-connected energy storage devices having respective leakage currents, the balance being connected in parallel with the device and the difference in leakage currents. In response to a voltage difference across the device to produce a dissipation current substantially equal to.

  Preferably, the dissipated current flows through the resistor. More preferably, the balance includes a resistive divider for providing a reference voltage and a voltage follower responsive to the reference voltage for generating a dissipated current.

  Preferably, the balance is for use with n energy storage devices, where n ≧ 2 and the resistive divider provides a reference voltage of (n−1), and the balance generates a dissipated current. Includes (n-1) voltage followers responsive to each (n-1) reference voltage. More preferably, the dissipation current is substantially equal to the difference between the highest and lowest leakage current provided by the energy storage device.

According to a sixteenth aspect of the present invention, a voltage balance is provided for the energy storage device,
A comparator responsive to a voltage across the device and a reference voltage for providing a control signal;
A discharge circuit responsive to the control signal to partially discharge the device to maintain the voltage across the device below a predetermined value.

  Preferably, the predetermined value is obtained from the reference voltage. More preferably, the predetermined value is equal to the reference voltage. However, in other embodiments, the predetermined value is a fixed percentage of the reference voltage.

  Preferably, the voltage across the balance is provided by a power supply that provides the supply voltage and the reference voltage is independent of the supply voltage.

  In a preferred form, the ratio of power consumed by the balance when discharging and not discharging the energy storage device is at least 10: 1. More preferably, this ratio is at least 100 to 1.

  According to a seventeenth aspect of the present invention, a voltage balance is provided for a plurality of serially connected energy storage devices, wherein the balance is a plurality of the fifteenth aspect connected in parallel with each energy storage device. Including balance.

  According to an eighteenth aspect of the present invention, there is provided an energy storage device comprising two energy storage cells, the cells connected in series and having respective cell voltages biased to be equivalent during use. Have.

  According to a nineteenth aspect of the present invention, there is provided an energy storage device comprising two energy storage cells, wherein the cells are connected in series and each cell voltage biased to a predetermined value during use. Have.

  Preferably, the predetermined values are equal.

  In one embodiment, the device includes more than two cells. Preferably all the cells are connected in series. However, in some embodiments, at least one of the cells is connected in parallel with another cell.

Preferably, the device comprises two serially connected cells and has one or a combination of the following features:
A thickness of less than about 5 mm;
An installation area of less than about 700 mm ² that does not include protruding terminals;
A volume of less than about 3 ml;
An ESR of less than about 400 mΩ,
About 700 mm. the product of ESR and thickness less than mΩ,
About 350 ml. the product of ESR and volume less than mΩ,
A DC capacitance greater than about 0.03 Farad;
A weight of less than about 5 grams;
An operating voltage higher than about 1.8 volts,
A time constant of less than about 0.23 seconds;
A response time (T ₀ ) of less than about 1.5 seconds;
A weight measuring FOM higher than about 2.1 kW / kg;
A gravimetric power density greater than about 6.6 kW / kg;
A gravimetric energy density greater than about 0.08 Wh / kg;
A volumetric FOM higher than about 3.2 kW / liter;
A volumetric power density higher than about 10 kW / liter;
Having a volumetric energy density greater than about 0.1 Wh / liter.

  Preferably the thickness is less than 4.5 mm. More preferably, the thickness is less than about 2.5 mm, and even more preferably less than about 2.1 mm.

  In a preferred form, the footprint excluding protruding terminals is less than or equal to about 17 mm × 28.5 mm.

  Preferably, the product of ESR and thickness is 300 mm. Less than mΩ. More preferably, the product of ESR and thickness is about 200 mm. Less than mΩ. Even more preferably, the product of ESR and thickness is about 100 mm. It is less than mmΩ.

  In a preferred form, the product of ESR and volume is about 200 ml. Less than mΩ. More preferably, the product of ESR and volume is about 100 ml. Less than mΩ.

  Preferably, the volume is less than about 2 ml. In other embodiments, the volume is less than about 1 ml.

  Preferably, the ESR is less than about 100 mΩ. More preferably, the ESR is less than about 60 mΩ.

  Preferably, the DC capacitance is greater than 0.1 farad. More preferably, the DC capacitance is greater than about 0.5 farads. Even more preferably, the DC capacitance is greater than about 1 farad.

  In a preferred form, the weight is less than about 4 grams. More preferably, the weight is less than about 2 grams.

  Preferably, the operating voltage is greater than about 2 volts. More preferably, the operating voltage is greater than about 3 volts. Even more preferably, the operating voltage is greater than about 4 volts.

  Preferably, the time constant is less than about 0.1 seconds. More preferably, the time constant is less than about 0.03 seconds. Even more preferably, the time constant is less than about 0.01 seconds.

Preferably, the response time (T ₀ ) is less than about 1 second. More preferably, the response time (T ₀ ) is less than about 0.2 seconds.

  Preferably, the gravimetric FOM is greater than about 3.4 kW / kg, more preferably greater than about 5 kW / kg. Even more preferably, the gravimetric FOM is greater than about 10 kW / kg.

  Preferably, the gravimetric power density is greater than about 10 kW / kg, more preferably greater than about 15 kW / kg. Even more preferably, the gravimetric FOM is greater than about 30 kW / kg.

  In a preferred form, the gravimetric energy density is greater than about 1 Wh / kg, more preferably greater than about 2 Wh / kg.

  Preferably, the volumetric FOM is higher than 5 kW / liter, more preferably higher than about 8 kW / liter. Even more preferably, the volumetric FOM is greater than about 20 kW / liter.

  Preferably, the volumetric power density is higher than 16 kW / liter, more preferably higher than about 25 kW / liter. Even more preferably, the volumetric power density is greater than about 50 kW / liter.

  Preferably, the volumetric energy density is greater than about 1 Wh / liter. More preferably, the volumetric energy density is greater than about 2 Wh / liter.

  In some embodiments, the device includes a balance that is attached with the cell to provide an equivalently directed voltage bias. One such embodiment includes a resistive path that extends in parallel to each cell.

According to a twentieth aspect of the present invention, an energy storage device is provided, the device comprising:
Including two energy storage cells connected in series, each cell being exposed to a respective cell voltage during use, the apparatus further comprising:
Includes a balance to bias the cell voltage to electrically connect and equalize the cells.

  Preferably, the cell has an operating voltage. More preferably, the operating voltages are substantially equal. Even more preferably, the operating voltage is greater than about 2.3 volts. More preferably, the operating voltage is greater than about 2.5 volts. Even more preferably, the operating voltage is greater than about 2.7 volts. Likewise preferably, the operating voltage is less than about 5 volts.

  Preferably, the balance includes a cell voltage that is lower than the respective operating voltage.

  In a preferred form, the device includes more than two energy storage cells.

According to a twenty-first aspect of the present invention, there is provided an energy storage device having a plurality of energy storage cells, each including two terminals, wherein adjacent terminals are engaged at a junction to connect the cells in series. ,
A first contact connected to one of the first terminals of the series cells;
A second contact connected to one of the last terminals of the series cells;
At least one intermediate contact connected to each joint;
And a resistance path extending between the contacts to collectively define the resistance balance of the device.

  Preferably, at least one of the resistance paths includes a conductive portion and a resistance portion. More preferably, the resistive portion includes a resistor. Even more preferably, the resistive portion includes a resistor. In other embodiments, the resistive portion includes one or more active elements. In a further embodiment, the resistive portion includes a combination of one or more active elements and one or more passive elements. Preferably, the active element includes one or more of an operational amplifier, a diode, a transistor and another active device. Preferably, the passive element includes one or more of a resistor, a capacitor and another passive element.

  Preferred embodiments of the present invention will now be described by way of example only with reference to the accompanying appendix and drawings.

  Appendix 1 features a set of exemplary supercapacitors suitable for use in embodiments of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The energy storage cells used in supercapacitors are typically manufactured in large quantities, as are other electronic components. All high volume products contain some compromises and acceptance of tolerances in key characteristics of the equipment being manufactured. The same is true for supercapacitive cells.

  Referring to FIGS. 1-6, respective histograms showing the distribution of various parameters of a group of nominally similar cells that are mass produced for use in a supercapacitor are shown. While the distribution shown is typical, it will be appreciated that variations may occur between groups depending on various factors, including manufacturing inception and sample size. There are similar distributions for other performance parameters. Some of these parameters are more economical to control within tighter tolerances than others, but exact matches are not expected and cannot be achieved.

One typical parameter that is well matched when matching cells to connect in series is leakage current (I _L ) after a period of tens of hours. This is because the change in I _L gives a corresponding percentage variation in the EPR of the cell. For example, in FIG. 1, the standard deviation is 17% of the average, which means that arbitrarily combined cells (combined to form the supercapacitor of Example 1 of Appendix 1) averaged EPR. It has shown that it has the dispersion | variation of the corresponding ratio in. When a typical EPR is about 12 MΩ, there is a 4 MΩ difference between the standard deviations of ± 1. On the other hand, in FIG. 4, this figure is a group of data combined in series to form the supercapacitor of Example 2 of Appendix 1 during use, with a standard deviation of 67% of the average value. This latter group therefore results in a fairly large variation in EPR.

  2 and 3 show the respective capacitance and ESR distributions of the cells where two cells were selected for the supercapacitor of Example 1. FIG. FIGS. 5 and 6 show the corresponding distribution of cells in which two cells for the supercapacitor of Example 2 were selected. Each of these figures illustrates a practical problem that has occurred in achieving ideal alignment of the same cell.

FIG. 7 shows that there is usually a difference in charge storage current between nominally similar devices. The general characteristics of current are the same in that they decay approximately exponentially over about 48 hours for a particular cell, but the rate of decay varies between cells. this is,
a) Decay of charge storage current and transition to leakage current b) Temperature dependence of leakage current. For example, in FIG. 7, the leakage current is about 6 μA at 70 ° C., in contrast to FIG. 1 which shows that the leakage current is about 0.2 μA for the same cell at about 23 ° C.

  FIG. 8 shows the temperature dependence of the leakage current, which varies between nominally the same cells. That is, there is a distribution of leakage current for 10 cells at all temperatures shown in the figure. Furthermore, this distribution tends to increase with temperature.

  FIG. 9 shows the voltage dependence of leakage current, which varies nominally between the same cells. It will be appreciated that the voltage measured is a cell voltage. There is a distribution of leakage currents of 10 cells at all cell voltages shown in the figure.

  FIG. 10 is similar to FIG. 9, but two specific cells are chosen to show the difference in leakage current and the corresponding cell voltage difference for these cells at 70.degree. When these two cells are paired in series, the leakage current produces different cell voltages that indicate an imbalance between the cells.

  FIG. 11 relates to two cells selected for a small difference in leakage current at 23.degree. When the temperature of these cells is raised to 70 ° C., the leakage current is similar, but the charge current is quite different. If the cells are connected in series, this difference will cause a significant voltage imbalance between the cells. That is, matching a cell to certain environmental conditions does not guarantee that the cell is matched to changes in these conditions.

  FIG. 12 relates to charging and discharging of nominally similar cells at a constant temperature. This shows the difference in leakage current and charge current between cells when the cell voltage is turned on or off. Therefore, it is difficult to achieve a voltage balance between the cells connected in series when the series voltage is turned on and off.

  FIG. 13 is two matched cells from Example 2 connected in series. Since the cells are not balanced for the first 150 hours, the individual cell voltages are forked. However, after 150 hours, the cells are balanced with a pure resistance balance according to the present invention and the individual cell voltages are concentrated due to the bias provided by the balancing. If the cell is a similar cell, the voltage is biased so that the balance is equivalent.

  Embodiments of the present invention are suitable for use with a wide variety of supercapacitors and supercapacitive cells, some of which are illustrated in Appendix 1. However, the embodiments are not limited to use with these examples and are suitable for use with other supercapacitors and cells. For purposes of illustration, embodiments of the present invention are described in earlier PCT patent applications PCT / AU99 / 01081, PCT / AU01 / 00838, PCT / AU01 / 01613, PCT / AU01 /, the disclosures of which are hereby incorporated by cross-reference. It is also suitable for use with the types of cells and supercapacitors included in 01590, PCT / AU02 / 01766 and PCT / AU03 / 00334.

  With reference to FIGS. 14 to 16, a resistance balance 1 for an energy storage device in the form of a supercapacitor 2 is shown. The supercapacitor is best shown in FIG. 18 and has two energy storage cells 3 and 4. The balance is placed in the middle of the cell.

Balance 1 includes two parallel spaced co-extensive longitudinal members 5 and 6, which extend between ends 7 and 8 and ends 9 and 10, respectively. Two parallel spaced co-extensive transverse members 11 and 12 extend between members 5 and 6. Member 11 is mounted immediately adjacent to each of ends 7 and 9, while member 12 is adjacent to each end 8 and 10 but spaced internally therefrom to members 7 and 8. It is done.

  All members are formed integrally with a single circuit board that can be perforated or otherwise formed into the required shape. In this embodiment, the member collectively defines a central opening 13, while members 5, 6 and 12 collectively define an end notch 14.

  A continuous conductive metal track 21 is formed on the members 5, 6 and 11 and extends laterally between the ends 22 and 23. An electrically conductive generally square metal tab 24 is fixedly mounted to member 11 and is on track 21 and in intimate electrical contact therewith. The tab 24 extends laterally across all of the member 11 and longitudinally between the first end 25 and the second end 26 and the ends 7 and 9 which are longitudinally outside the member 11. Extend. Tab 24 includes an upper surface 27 and a lower surface 28.

  The tab 24 is connected to the member 11 by a conductive adhesive (not shown). However, in other embodiments, alternative connection means include soldering or heat or other welding.

  The ends 22 and 23 of the track 21 include vertical portions best shown in FIG. 15 that extend toward the ends 8 and 10, respectively.

  Another conductive metal track 29 extends longitudinally along the member 5 between the end 30 and the generally square metal contact patch 31. End 30 is adjacent to, but spaced from, end 22 of track 21. Similarly, the conductive metal track 33 extends longitudinally along the member 6 between the end 34 and the generally square metal contact patch 35. The end 34 is adjacent to but spaced from the end 23 of the track 21.

  The two metal tabs 37 and 38 are formed from a copper plate and overlap the respective patches 31 and 35 and are in intimate electrical contact therewith.

  Each of these tabs 37 and 38 includes a respective fixed portion 41 and 42 having an upper surface and a lower surface, where the lower surface of the tab overlaps and contacts the patches 31 and 35. The tab includes free portions 45 and 46 that extend longitudinally beyond the ends 8 and 10 of members 5 and 6. In other embodiments, portions 45 and 46 extend laterally beyond members 5 and 6, respectively. In a further embodiment, portions 45 and 46 extend laterally and longitudinally beyond members 5 and 6.

  Balance 1 includes two surface mount resistors 47 and 48. Resistor 47 fills the gap between end 30 of track 29 and end 22 of track 21 to provide a resistance path between tab 24 and tab 37. This path includes tab 24, track 21, resistor 47, track 29, patch 31 and tab 37 in succession. Similarly, resistor 48 fills the gap between end 34 of track 33 and end 23 of track 21 to provide a resistance path between tab 24 and tab 38. This path includes tab 24, track 21, resistor 48, track 33, patch 35 and tab 38 in succession. It will be appreciated that substantially all the resistance between tabs 24 and 37 and 38 is provided by resistors 47 and 48.

  In other embodiments, alternative resistance devices such as standard carbon-based resistors or polymer resistors are used, one of which is described in more detail below.

  As best shown in FIG. 17, cells 3 and 4 include hermetically sealed laminated housings 51 and 52, respectively. Although not shown, there are a plurality of counter electrodes within each of the housings, an insulating separator for securing the electrodes in a spaced configuration, and an electrolyte for allowing ionic conduction between the electrodes. Be placed. In this embodiment, each housing includes a plurality of pairs of stacked electrodes. However, many other configurations are possible including folded or rolled electrodes. Examples of these configurations are shown in the PCT application with publication number WO 02/47097, the contents of which are hereby incorporated by cross-reference.

  Each of the electrodes in the housing 51 is connected to one of the two terminals 53 and 54. These terminals extend longitudinally from the housing, but in opposite directions, to allow external electrical interaction with the electrodes. Similarly, each of the electrodes within housing 52 is connected to one of two terminals 55 and 56. These terminals extend longitudinally from the housing, but in opposite directions, to allow external electrical interaction with the electrodes.

  The mounting of the cells 3 and 4 to the balance 1 is performed by orienting the cells relative to the cradle as shown in FIG. This includes a terminal 54 below and in contact with the lower surface of tab 37 and a terminal 56 above and in contact with the upper surface of tab 38. As schematically shown in the figure, the weld is applied to a pair of abutted components, resulting in two fixed power connections.

  Cells 3 and 4 then fold away from each other and around cradle 2 to assume the direction shown in FIG. As shown, the terminal 53 contacts the lower surface 28 of the tab 24, while the terminal 55 contacts the upper surface 27 of the tab 24. These abutting components are then welded together and effectively electrically connected to terminals 53 and 55 and tab 24. A circuit diagram of the supercapacitor 2 is schematically shown in FIG. That is, cells 3 and 4 are connected in series with each other and in parallel with respective resistors 47 and 48.

  It will be appreciated by those skilled in the art that resistors 47 and 48 are selected to provide substantially the same resistance. Thus, both cells 3 and 4 are maintained at approximately the same voltage by a resistive voltage divider formed by resistors 47 and 48. This ensures that, in use, the risk of overvoltage to one of the cells connected in series is substantially reduced.

  Cells 3 and 4 are thinner than their centers due to their internal electrodes located in the center within housings 51 and 52 around their respective circumferences. Thus, when these cells are folded around balance 1, the opposite housing extends into and touches hole 13 or is closely adjacent. In this way, the members 5, 6, 11 and 12 are further anchored in engagement with the cells 3 and 4. Furthermore, due to this interaction, balance 1 contributes little to the overall thickness of supercapacitor 2.

As shown in FIG. 18, tabs 24 and portions 45 and 46 extend longitudinally beyond balance 1 and housings 51 and 52 are accessible for electrical connection to other circuits or components. It becomes possible. In this embodiment, portions 45 and 46 are electrically connected to a circuit board (not shown) by soldering while tab 24 is left intact. However, in other embodiments, the tab 24 is connected to an associated circuit board or other electrical component to allow the voltage at that tab to be approached and / or controlled.

  In the embodiment shown in the drawings, FIGS. 14 to 19 provide a convenient and cost effective means for enabling resistance balancing for a supercapacitor. That is, the supercapacitor 2 is adapted retroactively to the existing circuit board and can obtain the functionality of each balance. For example, supercapacitor 2 replaces the capacitor in some embodiments and provides a fairly large capacitance to the same volume. In other embodiments, supercapacitor 2 can provide improved stability and lifetime while occupying substantially the same volume by replacing an unbalanced supercapacitor.

  When cells 3 and 4 are stacked one above the other, they occupy only a small area of the substrate to be mounted, thereby increasing design flexibility. In addition, tabs 24 are available to be accessed on demand.

  In the embodiment described above, resistors 47 and 48 are surface mount resistors having a resistance of 150 kΩ with a tolerance of ± 1%. The resistance is selected based on the EPR of the cell at the series operating voltage experienced and is matched to give the desired sensitivity required from the balance. In other embodiments, different resistors, resistor types and tolerances are used.

  In the example of FIG. 14, each of the cells is about 27 mm in length, about 17 mm in width, and about 1 mm in thickness. The total thickness of supercapacitor 2 is about 2.1 mm, which is only slightly thicker than the combined thickness of cells 3 and 4.

  Referring now to FIG. 20, there is shown a communication card 61 for a wireless computer network (not shown), which network is a supercapacitive device (not explicitly shown) having a balance according to FIG. A). In other embodiments, the communication card is a Class 10 or Class 12 GPRS card, and in yet other embodiments it is a PCMCIA card. Those skilled in the art will recognize that many other communication cards and other cards are used in other embodiments.

  Card 61 includes a standard PCB 62, which is loaded with many components to provide the functionality required from the card. The card is for insertion into a slot of an electronic device, in which case a similar card 61 is included in a plurality of electronic devices such as a desktop computer 63, a laptop computer 64, and a printer 65. Once these are included and configured with the required driver, wireless network communication between electronic devices is possible.

  Other cards including balance 1 have different dimensions and provide different functionality. These additional cards are for use with other electronic devices such as video cameras, PDAs, cell phones, modems, servers, and the like. Further, in some cases, the cradle 1 is not attached to the card, but instead is attached directly to the motherboard or other circuit board of the electronic device.

  Referring now to FIGS. 21-26, there is shown an alternative resistance balance 71, shown in dashed lines in FIG. Balance 71 is for an energy storage device in the form of a supercapacitor 72 having two energy storage cells 73 and 74. The balance 71 is placed completely in the middle of the cell. In other embodiments, the balance is disposed substantially between the cells.

  Various embodiments of supercapacitor 72 are shown in Examples 1 through 30 of Appendix 1.

  As shown in FIG. 23, the cell 73 includes a generally rectangular laminated housing 75 having edges 76, 77, 78 and 79. The housing 75 is formed from a single laminate that is first folded in half around the energy storage element 80, which is shown in dashed lines in the figure. It will be appreciated that the fold defines an edge 79. Housing 75 is then heat welded along edges 76 and 78 to define a pocket having an upwardly facing opening (not shown). The liquid electrolyte is inserted into the pocket opening while other contaminants such as gas and water are removed. The housing 75 is heat welded around the opening to keep the element 80 and the electrolyte in the housing 75 sealed. A portion of the heat-sealed housing is folded over itself to define an edge 77.

  Element 80 includes a plurality of opposed and stacked electrodes and an intermediate insulating separator for maintaining the electrodes in a spaced configuration. One half of the electrodes in the stack are electrically connected to a generally rectangular aluminum tab 81 to collectively form a first set of electrodes, while the other half of the electrodes are generally Electrically connected to a rectangular aluminum tab 82, the second set of electrodes are collectively formed. The electrodes in the first set are sandwiched by the electrodes in the second set to provide the maximum counter electrode area. Furthermore, the electrodes are coated with a large surface area material, such as activated carbon, to optimize the opposing surface area between the electrodes.

  Tabs 81 and 82 extend from within housing 75 in opposite directions and are anchored and heat sealed by thermal weld edges 76 and 78, respectively. The tab allows for an external electrical connection to the element 80, the main characteristics being conductivity, strength and suitability for connecting to the component elsewhere.

  The perforated copper terminal 83 includes a body 84 that is electrically connected to the free end of the tab 81 at one end. In this embodiment, the connection is made by welding. However, in other embodiments, welding or conductive adhesive is used. The termination leg 85 typically extends from the other end of the body 84 and has a free end for engaging a circuit board (not shown).

  The EPR of cell 73 is measured between tabs 81 and 82 and is about 1.5 MΩ. Due to manufacturing and material tolerances, EPR variation occurs between similar cells.

  Flat resistive strip 103 is electrically connected to tabs 81 and 82 to define a resistive path between the tabs having a predetermined resistance. In this embodiment, the predetermined resistance is about 150 kΩ. This strip is described in more detail below.

  Cell 74 is similar to cell 73, which is illustrated in FIG. 24, with corresponding features indicated by corresponding reference numerals. In the case of cell 74, terminal 83 is connected to tab 82. Furthermore, the connection with the tab is adjacent to the end of the body 84 from which the leg 85 extends. The reason for this will become clear from the following description.

  The EPR of cell 74 measured between tabs 81 and 82 is about 1.5 MΩ. This will be similar to the EPR of cell 73, but it will be appreciated by those skilled in the art that manufacturing and material tolerances will result in EPR variation between cells. Cells are aligned in some assembly processes. Nevertheless, it is not uncommon for EPR to vary by 10% between nominally similar cells.

The flat resistive strip 104 is electrically connected to the tabs 81 and 82 of the cell 74,
Define a resistance path between the tabs having a predetermined resistance. In this embodiment, the predetermined resistance is about 150 kΩ, which is the same as the predetermined resistance provided by strip 103.

  The next step of assembling the balance 71 is best shown in FIGS. 25 and 26, with cells 73 and 74 being placed side by side.

  The tab 82 of the cell 73 and the tab 81 of the cell 74 are folded at edges 78 and 76, respectively, so that they are generally coextensive upward from the cell. These tabs abut against each other and are welded ultrasonically to each other. In other embodiments, alternative connection methods such as soldering are used.

  The tab 81 of the cell 73 is folded about 180 ° around the edge 76 so that the body 84 of the terminal 83 is above the cell 73 and the leg 85 of the terminal 83 extends longitudinally outward beyond the cell 73. To be present. Similarly, the tab 82 of the cell 74 is folded 180 degrees around the edge 78 so that the body 84 of the terminal 83 is above the cell 74 and the leg 85 of the terminal 83 extends longitudinally beyond the cell 74. To extend outward. As best shown in FIG. 26, terminal 83 connected to cell 74 includes a leg 85 extending downward and outward, while terminal 83 connected to cell 73 extends upward and outward. To do. More importantly, the legs are shifted laterally, as best shown in FIG.

  Connecting the tab 82 of the cell 73 to the tab 81 of the cell 74 has the effect of connecting these cells in series. In this embodiment, terminal 83 of cell 73 defines the positive terminal of supercapacitor 72, while terminal 83 of cell 74 defines the negative terminal of supercapacitor 72.

  The cells 73 and 74 are then folded 180 ° around the connected tabs 81 and 82 to overlap. That is, cells 73 and 74 are advanced from the configuration shown in FIGS. 25 and 26 to the configuration shown in FIGS. 21 and 22.

  In another embodiment, cells 73 and 74 are on the left side of the flat configuration shown in FIGS. Examples of such supercapacitors are provided in Examples 31-44 of Appendix 1.

  In some embodiments, cells 73 and 74 include an intermediate sheet of double-sided adhesive (not shown) for holding the cells in the folded configuration of FIGS. This adhesive also insulates the positive terminal from the negative terminal. However, in other embodiments, a single-sided adhesive strip is wrapped around the folded cell. In yet another embodiment, no adhesive is used, but relies on soldering the legs 85 to a circuit board or other substrate.

  In embodiments where double-sided adhesive is not used between cells 73 and 74, some other insulating material is placed between two adjacent terminals 83 to prevent shorting between these elements. .

  The balance 71 extends in the longitudinal direction between the end portion 87 and the end portion 88 and substantially overlaps the entire top of the cell 74. End 87 overlies body 84 of terminal 83, but end 88 terminates adjacent to connected tabs 81 and 82.

The cell 73 is then folded 180 ° around its edge 78 effectively joined to the edge 76 of the cell 74 to the configuration shown in FIGS. As a result, the combined tabs 81 and 82 are engaged with the end portion 88 of the balance 71, and the end portion 87 is engaged on the opposite side by the main body 84 of the terminal 83.

  The resistance strips 103 and 104 will be described in more detail with reference to FIGS. 27, 28 and 29. FIG. For clarity, only strip 103 is shown, but it will be understood that strip 104 is similar.

  The strip 103 includes two aluminum termination tabs 105 and 106 that are spaced apart. Insulating Teflon® substrate 110 has an end 111 that partially overlaps and is adjacent to tab 105. The substrate 110 extends longitudinally from the end 111 to the end 112, the end 112 partially overlapping the tab 106 and adjacent to the tab 106. Resistive polymer layer 113 is formed over the entire underside of substrate 110 and is electrically connected to tabs 105 and 106 by conductive adhesive contacts 115 and 116, respectively.

Resistive strip is formed by superimposing on a metal surface of about 25 microns thick Teflon having an area of 10,000 mm ² (R) layer. This layer is a precursor of the substrate 110. For example, a 50 micron thick polymer layer sold by Metech, Inc., referred to as the “8600 Series”, is then uniformly applied across the Teflon layer and cured. Layer 113 may be formed. Two strips of liquid adhesive contacts, spaced in parallel, are applied to the layer 113 and each 0.1 mm thick aluminum strip is arranged to engage the adhesive contacts. The contacts can then be cured.

  When the above occurs, the composite laminate material is cut into strips about 3 mm wide and about 23 mm long to form a plurality of resistors 103 and 104. It will be understood that varying values of resistance can be obtained by varying the length, thickness and width of the resistive material. In this embodiment, a 3 mm × 23 mm × 50 micron resistor 103 provides a resistance of about 150 kΩ.

  The resistance and structural properties of the strip 103 are provided almost entirely by the layer 113. The substrate 110 serves as an insulator that facilitates the manufacturing steps and protects the layer 113 from inadvertent electrical contact during use. The adhesive contacts are the precursors for the individual contacts 115 and 116, and the aluminum strip is the precursor for the tabs 105 and 106.

  Adhesive contacts 115 and 116 are formed from a two-component conductive soft epoxy adhesive in this embodiment. For example, Resinlab® SEC 1233 or similar product is used.

  By using such resistive strips and adhesives, the design and manufacture can be made quite flexible. In applications where higher parallel resistance is required, such as suffering lower leakage currents, strips 103 and 104 are simply made thinner and / or longer and / or narrower. Conversely, if lower resistance is sufficient, strips 115 and 116 are made thicker and / or shorter and / or narrower.

The main advantages of strips 103 and 104 are as follows:
1. Although the minimum thickness, i.e., less than 100 microns in this embodiment, this eliminates a substantial addition to the overall thickness of the supercapacitor 72. Typically, even when cells are in contact, there are one or more gaps between them. Preferably, the resistors are placed in these gaps, so that the contribution, if any, to the overall thickness of the supercapacitor is low.

  2. They are simple to manufacture and cost effective and are included in an automated manufacturing process for supercapacitors.

  3. Because it is robust, it is easy to process in a manufacturing environment.

  Referring now to FIGS. 30 and 31, an alternative resistive strip 117 is shown. The strip includes a 0.1 mm thick flexible circuit board 118 that extends between a first end 119 and a second end 120. In this embodiment, the distance between the end 119 and the end 120 is about 27.5 mm, but the width of the plate 118 is about 2.75 mm. However, in other embodiments, alternative distances and widths are used.

  The strip 117 includes a copper layer 121 that is deposited on the plate 118. Layer 121 is selectively chemically etched to provide two generally square end portions 123 and 124 and two elongated intermediate portions 125 and 126 as best shown in FIG. Portions 125 and 126 are electrically isolated from each other by a narrow dividing strip 127 constructed by the absence of copper. Furthermore, the parts 123 and 125 are electrically connected to each other, and the parts 124 and 126 are electrically connected to each other.

  Also included is a 150 kΩ surface mount resistor 128 that bridges between portion 125 and portion 126. The net result is that if the resistance of portion 125 and portion 126 is very low, a resistance of about 150 kΩ is provided between portion 123 and portion 124. Resistor 128 is secured to and electrically engaged with portions 125 and 126. However, in other embodiments, alternative engagement means including a conductive adhesive is used.

  As shown in FIG. 31, strip 117 also includes two 0.1 mm thick aluminum tabs 129 and 130 that are attached to portions 123 and 124 by conductive adhesives 131 and 132, respectively. Since tabs 129 and 130 extend outwardly away from each other, it is easy to connect strip 117 to the cell of the energy storage device. As in the previous embodiment, the connection is generally made by soldering, ultrasonic welding or conductive adhesive.

  It can be seen from FIG. 30 that tabs 129 and 130 are omitted.

  The strip 117 is flexible and resilient and is robust. It is therefore easily integrated into an automatically manufactured energy storage device.

  The strip 117 is used as an alternative to the resistors 103 and 104 in the above embodiment.

The steps for manufacturing the strip 117 will now be described with respect to FIG. Corresponding features are indicated by corresponding reference numbers. In particular, the sequence of steps includes:
1. A thin copper layer 121 is deposited on the flexible circuit board 118.

  2. The copper layer 121 is chemically etched to form a repeating array that is the basis for the plurality of strips 117.

  3. A plurality of surface mount resistors 128 are soldered to interconnect the appropriate adjacent copper portions.

  4). Two end portions 123 and 124 made of copper are coated with a conductive adhesive.

  5. Overlay the two aluminum tabs 129 and 130 on each coating of adhesive.

  6). Allow the adhesive to cure.

  7). The intermediate product is cut along equally spaced parallel cutting lines 135 (shown in broken lines) to form a plurality of similar strips 117.

  The resistance between tabs 129 and 130 is measured to form a matched pair for use with the two cell energy storage devices.

  Typically, in this embodiment, strip 117 is applied to a supercapacitive cell having an EPR of about 1.5 MΩ. Therefore, a resistance of about 150 kΩ is suitable for producing the required resistance balance effect. In other embodiments, the strip 117 is designed to provide greater resistance, especially when lower leakage currents are required, but there are no practical limitations as will be apparent to those skilled in the art.

  Referring now to FIG. 33, an alternative flexible resistive strip 141 is shown. This strip is similar to strip 117 and corresponding features are indicated by corresponding reference numbers. In this embodiment, intermediate portions 125 and 126 are in the form of parallel, offset elongated narrow conductive tracks that extend from respective portions 123 and 124 and end at opposite ends of resistor 128. ing. If the resistance of portions 125 and 126 is minimal, the total resistance between portions 125 and 126 will be substantially equal to the resistance of resistor 128. In this embodiment, the resistance of resistor 128 is about 150 kΩ, but alternative values are used in other embodiments.

  Referring now to FIG. 34, there is shown an alternative resistive strip 145 where corresponding features are indicated by corresponding reference numbers. In this embodiment, strip 127 is straight and portions 125 and 126 are of equal area when viewed from above. Resistor 128 is positioned at or adjacent to portion 123, but in other embodiments is positioned closer to portion 124. In this regard, the strip 145 is very tolerant of any longitudinal positioning error relative to the resistor 128.

  FIG. 35 is similar to FIG. 32 but shows a plurality of strips 145. The process for manufacturing strip 145 is the same as the step for strip 117 except for the etching step that forms strip 127.

Referring to FIG. 36, a further embodiment of the present invention is shown. This includes an electrical device in the form of a long-life toll road transponder 201 intended to be mounted on a vehicle. The transponder includes an electronic circuit 202 for providing a predetermined function. In this embodiment, the transponder detects an inquiry signal generated at a road toll gate (not shown) or responds accordingly. Thus, an identifier unique to the transponder 201 is transmitted wirelessly. This function is further described below. A pair of supply rails 203 and 204 supply power to the circuit 202, and an energy storage device in the form of a battery 205 energizes the supply rails. The two capacitors connected in series are in the form of 0.95 farad carbon double layer supercapacitors 207 and 208 and are connected in parallel with the rail 203. Voltage balance 209 is connected in parallel with supercapacitors 207 and 208 and has a low resistance mode for advancing the supercapacitor to a balanced state and a high resistance mode when the capacitor is in a balanced state.

  In another embodiment, a supply voltage is supplied to rails 203 and 204 using a group of batteries in series or parallel. In this embodiment, battery 205 is a lithium primary battery rated at 2 amps and provides a nominal zero current voltage of 3.9 volts to 2.5 volts over its operating life. In other embodiments, an alternative battery is used.

  Supercapacitors 207 and 208 are rated at 2.3 volts, so they are placed in series to ensure that they are nominally exposed to only half of the voltage between rails 203 and 204. Become. In this embodiment, this exposes each supercapacitor to a maximum nominal voltage of 1.95 volts. In other embodiments, different supercapacitors or capacitive devices are used.

  Due to normal manufacturing tolerances and changes in supercapacitor characteristics over its operating lifetime, it is very unlikely that the EPR of the supercapacitor will always be the same. Therefore, there will always be some imbalance in the voltage found on the separate supercapacitors. To address this effect, balance 209 is connected in parallel with supercapacitors 205 and 206, with a high power consumption mode to advance the supercapacitor to a balanced state, and the supercapacitor is in a balanced state. And a low power consumption mode.

  For convenience, the electrical connection between the negative terminal of supercapacitor 207 and the positive terminal of supercapacitor 208 is referred to as junction 210.

  As best shown in FIG. 37, balance 209 includes a resistive voltage divider network that includes three resistors 211, 212 and 213 connected in series extending between rails 203 and 204. These resistors have nominal resistance values of 22 MΩ, 4.99 MΩ and 22 MΩ, respectively, between the first reference voltage at the junction 215 between resistors 211 and 212 and between resistors 212 and 213. A second reference voltage is applied at the junction 216. Preferably, the resistor has a tolerance of 1% or less.

  Balance 209 also includes two low power comparators 219 and 220, each comprising a positive supply rail 221 connected to rail 203 and a negative supply rail 222 connected to rail 204. The 0.1 μF ceramic capacitor 223 is provided to short-circuit the high frequency transient current.

  Comparators 219 and 220 have positive inputs 225 and 226, negative inputs 227 and 228, and outputs 229 and 230, respectively. Inputs 225 and 226 are directly connected to junctions 216 and 215, respectively, to access the second and first reference voltages. Two 0.01 μF ceramic capacitors 231 extend between respective inputs 225 and 226 and junction 210 to filter high frequency transients.

  Inputs 227 and 228 are connected to junction 210.

The output 229 is connected to a 383Ω resistor 232, which is connected in series with a low leakage BAV199 type diode 233. Similarly, output 230 is connected to a 383Ω resistor 234, which is connected in series with a low leakage BAV199 type diode 235. Also, as shown, the other end of each diode is connected to the junction 210.

In this example, comparators 219 and 220 are Maxim MAX9119 comparators, each of which provides approximately 410 nA at room temperature when the supply voltage is 3.9 volts (the maximum expected operating voltage for balance 209). obtain. For completeness, the following is mentioned:
1. Each comparator typically obtains 350 nA at room temperature when operated with a supply voltage of 1.8 volts (minimum operating voltage for the comparator).

  2. Each comparator typically gets a maximum of 1.2 μA when powered at 5 volts.

  3. The above figures are the maximum operating temperature for the device 201, which is 85 ° C.

  Assuming that comparators 219 and 220 operate at a maximum supply voltage of 3.9 volts, typically at temperatures below about 70 ° C., the typical current obtained by each comparator is less than 500 nA, and the average over the lifetime of the device is It was found to be about 410 nA. Obviously, this current will vary from device 201 to device 201 depending on the respective environment to which the device 201 is exposed. In addition, as will be appreciated by those skilled in the art, when battery 205 is discharged, its voltage drops.

  Balance 209 maintains the voltage across supercapacitors 207 and 208 below a value that makes the supercapacitor susceptible to irreparable damage. For supercapacitors 207 and 208, the voltage is nominally 2.3 volts. Balance 209 includes a safety margin and keeps the maximum voltage across each supercapacitor below 2.15 volts based on the maximum 3.9 volts provided by battery 205.

  In other embodiments, different supercapacitors having different characteristics, such as different safe maximum operating voltages, different form factors, different capacitances, etc. are used. In addition, in some embodiments, alternative capacitive devices such as electrolytic capacitors and ceramic capacitors are used.

  Balance 209 is minimal when supercapacitors 207 and 208 are in a balanced state, i.e., when the voltage between rail 203 and junction 210 matches the voltage between junction 210 and rail 204. Get current. In addition, if the voltage has advanced a small amount, i.e. less than about 10%, from the ideal equal voltage, the balance 209 continues to receive a minimum current.

  Each comparator 219 and 220 is powered by a sufficient supply voltage between rails 203 and 204. Since it has been found that the supply voltage never exceeds a certain value, i.e., 3.9 volts, which is a sufficient charging voltage from the battery 205 in this embodiment, without the possibility of exceeding the maximum safe operating voltage. The divided supply voltage can be used as a reference for the supercapacitors 207 and 208.

  Comparators 219 and 220 function at voltages as low as 1.8 volts when supercapacitors 207 and 208 are in balance, which is 0.9 volts across each supercapacitor. To change.

  When supercapacitors 207 and 208 are in a balanced state or are not moved so much that they are out of balance, outputs 229 and 230 are “low” and “high”, respectively. If this reverse biases both diodes 233 and 235, the current flow through these diodes is very low. Typically, at the operating voltage and temperature being considered, such current is very small, resulting in minimal current obtained by comparators 219 and 220. As mentioned above, the current is on the order of several hundred nanoamperes for each comparator.

  Eventually, the second reference voltage (at junction 216) will exceed the voltage at junction 210 because the voltage across supercapacitor 207 increases relative to the voltage across supercapacitor 208. That is, eventually, the voltage at input 225 will exceed the voltage at input 227. As a result, the output of the comparator 219 goes “high”, and then the diode 233 is forward biased. Thus, a low resistance current path is established from rail 203 to rail 204, which is sequentially advanced through rail 221, comparator 219, output 229, resistor 232, diode 233 and capacitor 208. This current path effectively obtains current from the rail 203, thereby supercapacitor 207 and battery 205, partially discharging the supercapacitor 207 and further charging the supercapacitor 208, and thereby between the supercapacitors. Restore voltage balance. The current is called a balance current.

  The balance current is limited primarily by selecting resistor 232. In an embodiment of the invention, if the resistance of resistor 232 is 383Ω, the balance current is limited to about 3-4 mA. In other embodiments, resistor 232 is selected to deliver a different balance current up to that which can be delivered from output 229 of comparator 219. In some embodiments, the maximum balance current is determined by the maximum operating current that can be carried by the diode 233.

  Comparator 219 includes inherent hysteresis. Thus, when the voltage at input 225 drops a predetermined amount below the voltage at input 227, output 229 will be driven “low”. As a result, the diode 233 is reverse-biased, and the above-described current path is effectively removed. In other embodiments, the hysteresis is set to a predetermined value by using a resistor divider (not shown) connected to an appropriate pin (not shown) of the comparator 219. For embodiments of the invention, a typical value of hysteresis is 4 mV, but this varies with temperature. In addition, the 4 mV range extends from the top of the band to its bottom. Thus, the input must exceed or fall below the reference by half this amount before the output changes state.

  In this embodiment, the action of hysteresis ensures that the supercapacitor does not lose much balance and consumes only a small amount of energy to advance the supercapacitor to a balanced state. By way of example only, if a supercapacitor with a higher (rising) voltage changes the state of each comparator, the comparator will return to its original state if the supercapacitor voltage drops at least by the amount of the width of the hysteresis band. Would return. As described above, the hysteresis band is typically 4 mV in this embodiment. Using these values as an example, the energy change in each capacitor is about 8.2 mJ at a supply voltage of 3.9 volts. It will be appreciated by those skilled in the art that this particular energy change is indicative but depends on many factors such as supply voltage, temperature, and the like.

  In other embodiments, different amounts of hysteresis and / or different values of resistance are used for resistors 232 and 234.

  In the alternative, the voltage across supercapacitor 208 is increased relative to the voltage across supercapacitor 207. This ultimately causes the first reference voltage (at junction 215) to be less than the voltage at junction 210. That is, eventually, the voltage at input 226 will be less than the voltage at input 228. As a result, the output of the comparator 220 goes “low”, and then the diode 234 is forward biased. Thus, a low resistance current path is established from junction 210 to rail 204, which is sequentially advanced through diode 235, resistor 234, output 230 and rail 222. This current path effectively obtains current from the junction 210 and thereby from the supercapacitor 208. At the same time, when the voltage at junction 210 is reduced, supercapacitor 207 will obtain current from rail 203 and thereby from battery 205.

  Current flow along the current path is limited by selecting resistor 234.

  Comparator 220 also includes an inherent hysteresis of about 4 mV. Thus, if the voltage at input 226 exceeds a predetermined amount above the voltage at input 228, the predetermined amount is about 2 mV in this example, but output 230 will be driven "low". As a result, the diode 234 is reverse-biased, and the above-described current path is effectively removed. In other embodiments, the hysteresis is set to a predetermined value by using a resistor divider (not shown) connected to an appropriate pin (not shown) of the comparator 220.

  When the diode is forward biased, the operation of balance 209 will redistribute energy between the supercapacitor and the battery, but will dissipate some of the energy from the supercapacitor at higher voltages. However, since the voltage is low and only the voltage across the supercapacitor can be addressed, the amount of energy dissipated in maintaining voltage balance is also reduced.

  Depending on the structure and application, it can take hours or days or weeks to break the balance of the supercapacitor. When this occurs and one of the comparators switches to forward bias each diode, the voltage difference across the supercapacitor is approximately 0.4 volts when the supply voltage is 3.9 volts. Therefore, in this embodiment, it takes about 8.2 mJ to return the supercapacitor to a balanced state, assuming that the energy difference is dissipated as heat in the worst case. That is, 8.2 mJ dissipates when removed from one supercapacitor, and another 8.2 mJ is extracted from the power supply to fill the other supercapacitor. It is important to note that the latter energy is stored in the other supercapacitor and is not dissipated.

  On the other hand, a resistive balance network typically continuously obtains at least 10 times the maximum expected leakage current of a supercapacitor, and in some cases much more. This results in a much greater amount of energy loss than can be achieved with the balance shown in FIG. On average, a purely balanced resistor would lose 10 times the energy lost by the supercapacitor if it carries 10 times the current of the supercapacitor. In some applications, this level of energy dissipation is entirely acceptable, but there are other applications that cannot be tolerated to compromise the operating life. Using the embodiment of FIG. 36, the stable power required by balance 209 when no need to rebalance can be compared to the power lost to supercapacitor leakage only, which is purely As in the case of a good resistance balance, the value is less than 10 times.

The advantage of balancing with active or active and resistive elements will be more pronounced for higher temperature applications. In particular, since the operating temperature is higher, the leakage current from the supercapacitor increases. Therefore, to enable pure resistance balance, the resistance will be much lower. However, this results in more active power consumption for the resulting balance.

  Resistors 211, 212, and 213 are selected to provide the first and second reference voltages, so their relative resistance is a factor in selecting them. However, they are selected to have an absolutely high resistance to minimize the current flowing through them. That is, if the current continues to flow, this represents a constant leakage on the battery 205, which will unnecessarily spoil the execution time of the device 201, even if it is not reasonable.

  When supercapacitors 207 and 208 are in a balanced state or within a voltage range close to the balanced voltage, comparators 219 and 220 reverse-bias diodes 233 and 235, respectively, to supply power to the comparator Only the current required to do so is obtained by the balance 209. Assuming the maximum battery voltage is 3.9 volts, each comparator will get about 410 nA, which will dissipate about 1.6 μW. It will be appreciated that this nominal value depends on a variety of factors including the associated voltage and temperature. The approximate total power requirement for balance 209 is about 3.5 μW at 3.9 V without using any balance resistor.

  Diodes 233 and 235 are less leaky in that the minimum current flows through them when reverse biased. In this case, the reverse bias current is in the order of several nA at the voltage used.

  Preferably, supercapacitors 207 and 208 or any other capacitive device being used have low leakage characteristics. In this embodiment, the EPR of the supercapacitors 207 and 208 is on the order of 2 MΩ for the voltage and current they incur. To minimize these leakage currents through the supercapacitor and ensure maximum run time for the device 201, the supercapacitor is preferentially selected to include a higher EPR. This also has the advantage of allowing the balance 209 to function more effectively. In a particularly preferred embodiment, a supercapacitor sold by cap-XX, Inc., referred to as model number GS105 with an EPR of about 2 MΩ is used.

  The approximate current consumption of the balance 209 with the supercapacitor in a balanced state is listed in the table below, but the separate components are detailed separately.

Balance 209 is designed as an application where the voltage maintained by battery 205 during the operational life of circuit 202 always exceeds the minimum operating voltage required by comparators 219 and 220. In this embodiment, the minimum value is 1.8 volts, so that the criterion is met. This is because circuit 202 requires at least 2.5 volts between terminals 203 and 204 to function. That is, throughout its operating life, comparators 219 and 220 will operate to balance the voltage between supercapacitors 207 and 208.

  Embodiments of the invention are applicable to various applications, such as notebook PCs; barcode scanners; PDAs; CF cards that implement GSM and / or GPRS functions; GSM and / or GPRS functions PC card; digital camera; camera flash; strobe; toll collection transponder / tag; restaurant paging device; TV remote control and other electronic devices; wireless control devices such as cars, boats, model airplanes And other toys including toys; photovoltaic cells / panels; calculators, clocks, lighting, solar powered devices including beacons (ocean and aviation); isolation / remote phone systems; cordless phones, cell phones, satellite phones and other communications Telephones including equipment; garden lighting (especially those using sunlight); Fuel cells; Portable electronics; Robotics including robot actuators; Solenoid actuators such as remote from supply; High current actuators for short periods; Electric hybrid vehicles; Prosthetic limbs; Sonar buoys; Warning buoys; Battery powered devices are included. However, the device 209 implemented with two comparators can be as low as 0.9 volts per capacitor in applications and / or in a balanced state that requires a relatively low power balance. Ideal for applications that need to be balanced to operate at different voltages.

  Other embodiments of the present invention include measures for the duration of operation, in which case the voltage between rails 203 and 204 temporarily reduces the minimum value required to operate comparators 219 and 220. Below. One such embodiment has the balance 241 shown in FIG. 38, with corresponding features indicated by corresponding reference numbers.

  Additional components included in balance 241 above balance 209 are two balance resistors 243 and 244, both having a resistance of 10 MΩ. Resistor 243 extends between rail 203 and junction 210 in parallel with supercapacitor 207, but resistor 243 extends between junction 210 and rail 204 in parallel with supercapacitor 208. Exists. These resistors function as balance resistors, but function differently due to the operation of the other components in balance 241. In particular, the balance resistors are not selected to ensure that the current through them is well above the supercapacitor leakage current at the expected operating temperature and voltage. That is, a pure resistance balance has a resistance value that is typically selected to obtain a current that is about 5-10 times the leakage current of the supercapacitor to achieve its effect. However, in this embodiment, resistors 243 and 244 are not selected on the same basis. This is because they only need to operate when the voltage between rails 203 and 204 is below the minimum value of 1.8 volts required to operate comparators 219 and 220. Thus, if the balance current at the lower voltage is relatively small, the resistance of resistors 243 and 244 will be higher than expected. This has the added advantage of allowing resistors 243 and 244 to be selected to minimize their current carrying when the supercapacitor is in a balanced state.

  By including resistors 243 and 244, an additional 0.2 μA is provided by the circuit based on battery 205 supplying 3.9 volts. Referring to the table above, this results in a total current of approximately 1.1 μA being obtained from the battery 205 by the balance 241 and the supercapacitor is in a balanced state.

Some comparators may not require balance resistors 243 and 244 even in situations where sufficient voltage is not supplied to the comparator to operate continuously. In this case, the comparators cannot establish a low resistance current path when inoperable and all behave in the same way so that no imbalance occurs. This means that if the comparator does not work but keeps the respective diodes forward biased, or the output impedance of the comparator subsequently causes an imbalance between the supercapacitors 207 and 208. If it is high enough to hinder typical current flow, it will not happen.

  Resistors 243 and 244 are included not due to problems with the imbalance that occurs between supercapacitors 207 and 208 while at low voltage. This is primarily to deal with voltage imbalances that would appear once sufficient supply voltage is restored. If recovery is done as quickly as is typically done, one of the supercapacitors may be exposed to unacceptably high voltages. One example of such an event is that the battery 205 is replaced with a fully charged similar battery that supplies 3.9 volts when it is consumed in that it only supplies a voltage of about 2.5 volts. There is something.

  Balance 209 acts to restore balance to supercapacitors 207 and 208 when an unbalanced voltage distribution is detected. In the embodiment described above, the recovery is achieved primarily through dissipation. That is, the supercapacitor at the higher voltage is discharged through the dissipation resistor. In response, the battery further charges the supercapacitor at a lower voltage. In other embodiments, the recovery may be done by one or a combination of techniques including discharging the capacitor at a higher voltage, or by removing charge from the capacitor having the maximum voltage, which may be Achieved by moving to one or more of the capacitors.

The main benefits of Balance 209 are as follows:
1. When needed to advance the supercapacitor to a balanced state, it is simply a high power and energy consumption mode, otherwise it is a low power and energy consumption mode.

  2. When the supercapacitor is in a balanced state, a very small amount of power is consumed, which allows for improved run time for devices powered by a battery.

  3. A balance resistor need not be used, thereby preventing significant energy from being drained from the battery or other source even when the supercapacitor is in a balanced state.

  4). Even when a balance resistor is used, a higher value resistor is effective to achieve the desired function, thereby minimizing energy loss.

  All of the above embodiments have been provided in the context of a battery powered circuit, but are equally applicable to circuits with other forms of power supply, whether other energy storage devices, outlet power supplies, etc. is there.

The net effect of the device 201 is that the effective average leakage current of a pair of supercapacitors is made equal to more leakage. For the particular supercapacitor used in FIG. 36, these leakage currents are typically on the order of 0.1-5 μA. Thus, even if the two supercapacitors are at the ends of the range, the additional current flow is small and therefore the additional power consumed is also small. That is, device 201 provides an energy efficient means of balancing supercapacitors. To optimize the operation of balance 209, supercapacitors 207 and 208 are matched for the EPR value before being included in device 1. However, typically this is not the end, and as described above, as long as both supercapacitors have leakage currents below their specifications, the net leakage of the pair is the above preferred of the present invention. When used with the examples, it will be within the standards.

  Referring to FIG. 39, there is shown an alternative balance 251 that can be substituted for the balance 209 of FIGS. That is, voltage balance is applied to the supercapacitors 207 and 208 using the device 251. In this case, each supercapacitor is a 0.5 farad carbon double layer device with an estimated maximum operating voltage of 2.3 volts. It will be appreciated that the balance 251 can be applied to balance other energy storage devices, such as capacitors, as in other embodiments.

  The balance 251 includes a resistor divider network having two resistors 253 and 254 of equivalent resistance. These resistors make contact at junction 255 and provide a reference voltage that is half the voltage between rails 203 and 204. In this embodiment, the equal resistance is 33.2 MΩ, although different values are used in other embodiments. These resistors are selected to have a high resistance because they constantly dissipate energy from the battery 205.

  Balance 251 also includes a MAX 4470 operational amplifier 256 set in a voltage follower configuration with junction 255. More specifically, amplifier 256 includes an output 257, a positive input 258 directly connected to junction 255, and a negative input 259 directly connected to output 257. A 10 nF electrolytic capacitor 260 extends from input 258 to rail 204 to filter high frequency transients.

  Resistors 253 and 254 are selected to have a high resistance, but a higher value for that resistance is defined by the magnitude of the bias current obtained by amplifier 256. That is, the bias current generates an error that must be adapted to the overall circuit design. In this embodiment, the bias current for amplifier 256 is typically about 0.2 nA (but up to about 4.25 nA), and resistors 253 and 254 cause voltage errors between rails 203 and 204. It has been selected to maintain within about 50 mV of half the voltage.

  Amplifier 256 includes a positive supply rail 261 connected to rail 203 and a negative supply rail 262 connected to rail 204. That is, in this embodiment, amplifier 256 operates at the maximum voltage supplied by battery 205.

  A 100 nF capacitor 263 is connected between rails 203 and 204 to minimize high frequency noise on the power supply to the operational amplifier.

  The output 257 of the amplifier 256 is connected to one end of the 470Ω resistor 264 and drives it. The other end of the resistor is connected to the junction 210.

Amplifier 256 operates in a voltage follower mode and the reference voltage is one half of the supply voltage between rails 203 and 204. That is, the output 257 is driven so as to be substantially the same voltage as the reference voltage. Inevitably, the internal leakage current in one of the supercapacitors 207 and 208 is greater than the other leakage current, so that the voltage at the junction 210 is reduced so that the voltage on the supercapacitor with the larger leakage current is reduced. It will change. When this happens, amplifier 256 will drive the current through resistor 264 in a direction that reduces the change in voltage, thereby maintaining the voltage balance between supercapacitors 207 and 208.

  The current flowing through resistor 264 after a long period of steady state will be approximately equal to the difference between the leakage current of the supercapacitors 207 and 208 pair. If the limit to the allowable leakage current in the manufactured device is acceptable and the supercapacitors 207 and 208 are initially well matched, then the larger of the above two leakage currents will be acceptable, which is Since it does not change that much, the power consumption of the balance 251 is further minimized.

  The value of resistor 264 determines how quickly the balance current increases as the voltage imbalance increases. This value also determines how quickly the imbalance is corrected if the amplifier 256 can source or sink the desired balance current.

  While amplifier 264 is stable in the illustrated configuration, some amplifiers are not constant when provided with a capacitive load of the illustrated magnitude. Therefore, the designer needs to take this into account when selecting the amplifier 256. Such a selection includes the development of a test circuit and a thorough simulation thereof. It should be noted that high value supercapacitors, such as supercapacitors 207 and 208, may be like an amplifier 256 close to a pure resistive load rather than a capacitor.

  Balance 251 obtains minimal current until a voltage imbalance appears on supercapacitors 207 and 208. Furthermore, even if an imbalance occurs, the only increase in current required by balance 251 is that current required to maintain an approximate voltage balance. That is, the required dissipation current or balance current is substantially equal to the difference in leakage current. This is considered to be a substantially optimal current leakage from the battery 205 to a balance circuit such as the balance 251.

  The approximate current consumption for balance 251 when supercapacitors 207 and 208 are in a balanced state is shown in the table below. Separate components are detailed separately.

  The current for amplifier 256 is typical for that amplifier operating at 4.6 V and room temperature. At higher temperatures, the current will be higher. For example, at 70 ° C., a typical current value obtained by amplifier 256 is 820 nA. However, it will be appreciated that for the overall operating temperature range of amplifier 256, the maximum current steady state current leakage is 1.2 μA at 4.6 volts.

The device 251 using a single operational amplifier can operate with a voltage (over rails 203 and 204) of about 2.25 volts or more, up to a value determined by the capacitor and / or operational amplifier. Applications that are optimal for device 251 include applications that require balancing at low power. Examples of such applications include notebook PCs, barcode scanners, PDAs, CF cards such as GSM and GPRS, PC cards such as GSM and GPRS, digital cameras, camera flashes, strobes, toll collection transponders or tags, Restaurant paging device, TV remote control or other electronic devices, toys including cars, boats, etc., wirelessly controlled devices including toys, calculators, clocks, lighting, and solar cells including beacons for marine and aviation applications Devices, isolated phone systems, phones including cordless phones, garden lighting including solar lighting, flashlights, photovoltaic cells or panels, fuel cells, portable electronics not yet mentioned, robotics including robot actuators Solenoid actuator, remote placed short term High current actuator, an electric vehicle, prostheses, other communication devices, as well as power tools. With the teachings in this specification, one of ordinary skill in the art will appreciate applications of other such embodiments and equivalents thereof.

  An alternative embodiment of the present invention, the protection device 271 is shown in FIG. Corresponding features are indicated by corresponding reference numbers. Device 271 is similar to device 251 and operates similarly, but includes two additional balance resistors 273 and 274. The balance resistors 273 and 274 each have a resistance of 11.5 MΩ. These resistors are similar to resistors 243 and 244 of FIG. 38 and are included to provide the same function. Some applications require the function provided by resistors 273 and 274, which ultimately increases the current required by device 271. In this example, assuming that battery 205 supplies a fully charged voltage of 4.6 volts, an additional current of about 0.2 μA is obtained. Therefore, the total steady current consumption of the device 271 is about 1.05 μA at room temperature.

  The devices 251 and 271 progressively move between a high resistance state and a low resistance state in response to the “balanced state” and “unbalanced state” of the supercapacitors 207 and 208. If the device is advanced toward a low resistance state only when an imbalance exists, the current available from the battery 205 is minimized.

  Devices 251 and 271 are intended to protect and balance the two supercapacitors as shown. However, both of the devices described above can be extended to protect and balance any number of supercapacitors or other capacitive elements. For example, FIG. 41 shows a protection device 281 that balances three supercapacitors 207, 208 and 282. For convenience, corresponding features are indicated by corresponding reference numbers. It will be appreciated by those skilled in the art from the teachings herein that devices 251 and 271 can be further expanded to balance four or more supercapacitors or other capacitive elements. In embodiments where there are many supercapacitors connected in series, it is clear that the bias current obtained from the resistor divider voltage reference will present a practical limit on the number of operational amplifiers that can be connected. Became. However, this is addressed by adding a second or subsequent resistor divider as required.

  A supercapacitor 282 is added on top of the circuit and an additional resistor 283 added to the voltage divider network and extends between supply rails 203 and 204. Resistor 283 provides a second reference voltage at junction 284 to second amplifier 285. As shown, the amplifier 285 obtains power from the rail 203 and the midpoint between the supercapacitors 207 and 208, the junction 210. That is, device 281 includes certain elements of device 251 that are repeated, except for the resistor divider network. This is actually a cascaded configuration where each amplifier balances two adjacent supercapacitors. That is, (n-1) amplifiers are required to balance n supercapacitors, but only one resistor divider network with n resistors is required.

In some embodiments, the resistance value 253 in the resistor divider network is used to reduce the voltage error resulting from the combination of bias currents required by the amplifier to an acceptable level for the required application. 254 and 283 need to be reduced. In steady state, if the supercapacitor has exactly the same leakage current, the current used to power the amplifier will be partially supplied by the output of the adjacent amplifier. To minimize this effect, the amplifier is selected to have a high input impedance as well as a low steady state power consumption.

  Returning to FIG. 40, device 271 is intended to operate with the supply voltage, ie, the voltage between rails 203 and 204, still higher than the minimum required for operation of amplifier 256. In this embodiment, amplifier 256 operates correctly if the supply voltage is above about 2.25 volts. This also allows common mode voltage requirements where the voltages on the capacitors are equal and the input bias current error is up to 50 mV. The upper supply voltage limit for device 271 is determined by the lower of the allowable combined maximum voltage for capacitors 207 and 208 and the maximum voltage limit for amplifier 256. The latter is 6 volts in this embodiment.

  In another embodiment, device 271 is applied to a circuit where the supply voltage is below its minimum value. In order to ensure that the supercapacitor remains balanced, the device 271 includes a balancing resistor (not shown) placed in parallel with the supercapacitor, even though the amplifier 256 is temporarily not operating. Including. As described with respect to the previous embodiment, assuming that the protection device is functional, the value of the balance resistor is selected to minimize an acceptable imbalance.

  If the output impedance of the amplifier 256 is sufficiently high, the device 271 can be operated with a low supply voltage without the need for a balance resistor. However, when amplifier 256 has a low output impedance at a low supply voltage, it tends to move the voltage at output 257 away from the reference value, which inevitably imbalances capacitors 207 and 208. This increases the risk of damaging either of the supercapacitors 207 and 208 when the supply voltage is increased again or the supply is reconnected.

  Amplifier 256 will cease operation normally if the voltage between rails 203 and 204 drops so that the voltage at the input to the amplifier exceeds a certain value of the common mode voltage. This common mode voltage is an acceptable range for both input voltages in order for the operational amplifier to function properly. For the operational amplifier used in this embodiment, this range is between ground, ie, the voltage of the positive supply rail below 0 volts and below 1.1 volts. As will be appreciated by those skilled in the art, if any input of the operational amplifier exceeds a higher value, the operational amplifier will not function properly.

  Device 271 is ideal for applications that need to be balanced with very low supply voltages from about 1.0 volts, but in this case, within the overall design constraints, It is possible to obtain a higher supply current than in the embodiment.

  Device 271 includes balance resistors 273 and 274, and this same effect is achieved in other embodiments (not shown) by using device 251, but resistors 253 and 254 are added to the voltage divider function. It has a low resistance so that the current necessary to perform the balance function can flow. Obviously, the resistance of resistors 253 and 254 in such an embodiment remains proportionally the same to ensure that the voltage division function is performed as well.

A further embodiment of the invention is shown in FIG. 42, and corresponding features are indicated by corresponding reference numerals. In particular, the protection and balancing device 291 is similar to the device 271 and operates in the same manner as actively balancing and protecting the supercapacitors 207 and 208. However, device 291 is configured to operate at a low voltage and actively balances and protects with a supply voltage as low as about 1 volt.

  In this example, supercapacitors 207 and 208 are 100 farad carbon double layer devices with a specified maximum operating voltage of 2.3 volts. In other embodiments, supercapacitors and capacitors with other capacities are balanced and protected. The operational amplifier used in this embodiment obtains a higher current than the previous embodiment, but can function at a lower voltage. Thus, this embodiment is also ideal for applications involving high energy and power consumption, and typically where high capacity supercapacitors are required. Such applications include electric hybrid vehicles. That said, the device 291 is also suitable for low power applications, where the current consumed by the operational amplifier is typically more than nine times that of the previous embodiment, but still absolutely. Low power protection and balance device.

  Resistors 253 and 254 each have a resistance of 3.32 MΩ, while resistor 264 has a resistance of 20Ω. Ceramic capacitors 260 and 263 are both 100 n Farad devices. In other embodiments, other high frequency type capacitors are used.

Resistors 253 and 254 have relatively low values for the following reasons:
In high capacitance applications, the leakage current is relatively high, which has the advantage of keeping the net impedance of the balanced current source including the operational amplifier and resistor low and minimizing the drop across the resistor is there.

  The operational amplifier can drive a relatively high current on the order of 19 mA at 3 volts, but is also relatively tolerant to output shorts. This allows the current to be limited by the characteristics of the operational amplifier when the supercapacitor causes high leakage.

  Capacitor 260 has a relatively high value to maintain the RC time constant of the sub-circuit including the resistor and capacitor. Since a relatively low value resistor is used in this embodiment, a capacitor having a larger capacitance is used to obtain the same level of filtering effect. In practice, considering cost and size, it is often required not to increase the capacitance to provide the exact same RC time constant.

  Device 291 includes an operational amplifier 292 of the MAX4289 type.

  Similar to the embodiment of FIG. 40, a device 291 is shown that balances and protects two capacitors, but it can be extended to balance and protect any number of capacitors.

  By selecting the amplifier 292, it is possible to operate the device 291 with a total supply voltage as low as 1.0 volts, ie, the voltage between the rails 203 and 204. The only prerequisite for this particular type and model of amplifier is to keep the voltage at inputs 258 and 259 low (supply voltage -0.2 volts). This precondition is satisfied in most applications. In embodiments where the prerequisites are not met, an alternative device 293 shown in FIG. 43 is used. That is, device 294 is actually device 291 with 115 kΩ balance resistors 295 and 296.

The comments and descriptions above regarding voltages outside the common-mode range but while the operational amplifier is still operating apply equally to this embodiment. Particularly in this embodiment, the voltage at the non-inverting input or the positive input of the operational amplifier cannot fall within this range, and the voltage at the inverting input or the negative input of the operational amplifier is almost discharged from the upper capacitor. It will only fall within the above range if the lower capacitor still has a voltage across it. This latter situation is neither standard nor expected.

  Amplifier 292 can operate at a lower voltage than amplifier 256, for example, but obtains a higher current. This makes the devices 291 and 294 optimal for protecting and balancing relatively high capacitance supercapacitors and capacitors that typically have high leakage currents. However, devices 291 and 294 are also suitable for applications where typical current consumption of 9-18 μA (up to 40 μA) is not considered a disadvantage.

  The approximate current consumption of the device 291 when the supercapacitor is in a balanced state is shown in the table below. Separate components are detailed separately.

  This suggests that the current consumed in steady state is about 17 μA, but is expected to be typically much less consumed by the circuit because of the lower operating voltage. For example, if the voltage between rails 203 and 204 is 1 volt, amplifier 292 typically obtains about 9 μA (typically up to about 14 μA). In a further example, if the voltage between rails 203 and 204 is 3.0 volts, amplifier 292 typically obtains about 12 μA (typically up to about 25 μA). It will also be seen that the maximum current that amplifier 292 can obtain is less than 40 μA over the full operating temperature range when operating at 4.6V. These currents are obtained by the protective device whether it is in steady state or not when nominally balancing the supercapacitor. The nominal balance state is defined by the zero voltage difference between inputs 258 and 259 of amplifier 292. It will be appreciated that in a nominally balanced state, the supercapacitor cannot be exposed to exactly the same voltage. However, typically, any difference is small compared to the voltage across the supercapacitor.

  For these protection devices, such as device 291 that includes one or more operational amplifiers in a voltage follower configuration, the balance current is balanced in contrast to other embodiments that include one or more operational amplifiers in a comparator configuration. Steady progress is made from an unbalanced state to an unbalanced state. Resistors 253 and 254 continuously obtain current, but the balanced current flowing through resistor 264 is zero or very close to zero when the supercapacitor is nominally balanced, but over supercapacitors 207 and 208. It increases gradually as the voltage difference increases. That is, the balance current increases as the supercapacitor voltage imbalance increases.

The current numbers included in the above table are for the device 291 when the capacitors are nominally balanced. In this state, the device 291 obtains a minimum current and is therefore referred to as a high resistance mode. If the voltage across the two supercapacitors is not balanced, a larger current flows through device 291. This is referred to as a low resistance mode. However, the transition between these modes is gradual and continuous, unlike the other embodiments described above where the transition is gradual.

  When device 291 is in the low resistance mode, the current available from battery 205 is increased, but typically only for a short period. This is because that is enough current to restore the nominal voltage balance.

  In long term and / or steady state, the current delivered by device 291 will ultimately be the difference between supercapacitor leakage. In other words, the balance current will typically flow almost continuously at a value determined by this difference. There will be larger transient current differences due to short-term effects such as temperature differences between supercapacitors and other environmental factors shared by imbalances.

  Since device 294 shown in FIG. 43 includes balance resistors 295 and 296, it obtains an additional 20 μA from battery 205 when the voltage between rails 203 and 204 is 4.6 volts. This results in a total current leakage of about 37 μA at room temperature. In terms of current consumption, device 294 consumes approximately 170 μW in the low power consumption mode at a supply voltage of 4.6 volts.

  Devices 291 and 294 use operational amplifiers with internal reference voltages and are best suited for applications that require balancing at low power, but in this case the voltage on each capacitor does not fall below 1.8 volts. It is also preferred that the supply voltage does not suffer a sufficiently large variation or is not interrupted regularly or frequently. In other words, this embodiment is best suited for applications where the supply voltage is constantly present and on. In some such applications, the balance resistor reduces the risk of exposing one or more of the supercapacitors to an abnormally high voltage as the supply voltage increases after it drops or shuts down. Device 294 is preferably used.

  A further embodiment of the invention is shown in FIGS. Corresponding features are indicated by corresponding reference numbers. More specifically, as best shown in FIG. 44, the protection device 301 (represented by the dashed block) includes three separate but similar series-connected sub-devices 302, 303 and 304. . As shown, these sub-devices are in parallel with supercapacitors 282, 207 and 208, respectively.

  In this embodiment, supercapacitors 282, 207 and 208 are all 0.5 farad carbon double layer supercapacitors. In other embodiments, alternative capacitive supercapacitors or capacitors are used. Furthermore, in this specific embodiment, three sub-devices connected in series are used, while in other embodiments, a different number of supercapacitors connected in series are used. It will be apparent to those skilled in the art from the teachings herein that each of the sub-devices 302, 303 and 304 separately monitors and protects the respective capacitive device. Thus, separate sub-devices can be cascaded to protect any desired number of capacitors connected in series.

  For convenience, the conductors other than rails 203 and 204, which connect the supercapacitor in parallel with the sub-device, are referred to as rails 305 and 306.

Subdevice 303 will now be described in more detail with respect to FIG. It will be understood that other sub-devices include similar components and functions for each supercapacitor connected in parallel. Sub-unit 303 includes a comparator 310 that provides a control signal at the output 311 of the comparator in response to the voltage across supercapacitor 207 and the reference voltage generated internally by comparator 310. The discharge circuit is in the form of a 44.2 kΩ resistor 312 and maintains the voltage across the supercapacitor below a predetermined value in response to a control signal for partially discharging the supercapacitor 207.

  Comparator 310 is a MAX 9117 type operational amplifier and includes a positive input 313, a negative input 314, a positive power rail 315 and a negative power rail 316. Rails 315 and 316 are connected directly to rails 305 and 306, respectively, so that comparator 310 is powered by whatever the voltage across supercapacitor 207 is.

  Device 303 also includes two resistors 317 and 318 connected in series that contact at junction 319 and extend collectively between rails 305 and 306. That is, the resistor is in parallel with the supercapacitor 207, so the voltage at junction 319 is a fixed ratio of the voltage across the supercapacitor. In this example, resistors 317 and 318 have a resistance of 22.1 MΩ and 29.4 MΩ, respectively. Also included are three capacitors 321, 322, and 323 to provide the device 310 with high frequency stability. In this embodiment, capacitors 321, 322, and 323 have capacitances of 10 nF, 10 nF, and 100 nF, respectively.

  Input 313 is connected to junction 319, and input 314 is connected to rail 306 via capacitor 322. That is, the input 313 responds to the voltage between the rails 305 and 306 despite being in a proportional manner, and the input 314 connected to the internal reference voltage excludes the high frequency voltage shorted to the rail 306. Is an open circuit.

  The device 301 can be used in applications where the operating voltage between rails 203 and 204 does not fall below 5.4 volts, or more specifically, the operating voltage across each of the supercapacitors 207, 208 and 282 is 1.8 volts. Designed to be used in applications that do not fall below.

  Comparator 310 includes an internal reference voltage, allowing supercapacitor 208 to be protected independently. In the above embodiment, the reference voltage is derived from the voltage between rails 203 and 204, but in this embodiment, the internally generated reference is the voltage between rails 203 and 204 or rail 305. And the voltage between 306 and 306 is not obtained. By separating the reference voltage from the rail voltage in this way, each sub-device can be adjusted independently with respect to the protected supercapacitor or other capacitive device. This also increases the modularization of protection functions that are easily extended to applications with different numbers of capacitive devices connected in series that require protection and balance.

  If the voltage at junction 319 is less than the internally generated reference voltage, comparator 310 will get a minimum current when output 311 is substantially the same voltage as rail 306. However, if the voltage at junction 315 exceeds the reference voltage, output 311 will be driven near the voltage at rail 305. This creates a current path from rail 305 to rail 306 via rail 315, output 311 and resistor 312. That is, supercapacitor 208 is partially discharged, thereby dissipating energy substantially in resistor 312.

  Resistors 317 and 318 are selected such that the voltage between rails 315 and 316 is less than the maximum operating voltage of supercapacitor 208 when the voltage at junction 315 is equal to the reference voltage. The range of safety factors included in this calculation depends on the design parameters and the nature of the capacitive device being protected.

  When the supercapacitor 208 is discharged, the voltage at the junction 319 becomes lower than the reference voltage. Due to the hysteresis of the comparator 310, this discharge will continue despite being transient. Once the delay due to hysteresis has passed, output 311 will again be driven to substantially the same voltage as rail 306.

  The device 303 thus switches between a low power consumption mode and a high power consumption mode when the voltage across the supercapacitor 208 is within the desired range, and the voltage across the supercapacitor 208 is within that range. Return to. This is accomplished by creating a relatively low resistance path in parallel with supercapacitor 208 when the voltage across that supercapacitor increases to an undesirable level. However, when the voltage is returned to an acceptable level, device 303 presents a very high resistance path in parallel with supercapacitor 208 in that very little current is available. Thus, overvoltage protection for the supercapacitor 208 is provided without the need to consistently obtain relatively high currents. In this way, the overall power consumption of the protection and balance circuit is reduced without compromising the protection provided.

  The approximate current consumption of sub-device 303 with supercapacitor 208 held at a “safe” operating voltage is shown in the table below. Separate components are detailed separately.

  In resistors 317 and 318, the nominal voltage at which sub-device 303 becomes active and begins to discharge supercapacitor 208 is typically 2.19 volts. Due to tolerances between similar comparators, this value varies between a typical maximum of 2.29 volts and a typical minimum of 2.10 volts.

  If device 303 is in a low resistance mode in that it is discharging or balancing currents, the discharge current through resistor 312 will be assumed if the voltage between rails 305 and 306 is 2.19 volts. , About 50 μA. The amount of current is set by appropriately selecting the resistance of resistor 312. Examples of this are shown in the table below.

  At room temperature, comparator 310, a MAX 9117 type comparator, typically obtains 690 nA at 2.19 volts. At the same voltage but at 70 ° C., the comparator 310 typically obtains less than 820 nA, and its temperature and voltage is less than 1.3 μA at maximum.

  If each of the sub-devices 302, 303, and 304 includes similar components that are similarly arranged, when any one of the comparators 310 begins to discharge the corresponding supercapacitor, the battery 205 simultaneously It will be appreciated that the capacitor is charged. This restores the voltage balance. If the voltage on the discharge supercapacitor falls below a threshold determined by the voltage divider resistors 317 and 318 and the hysteresis inherent in the comparator 310, the discharge stops and the current consumption of the circuit is reduced to its quiescent consumption. Return.

Subdevices 302, 303 and 304 use the absolute reference voltage to determine when a balance and protection operation should begin instead of referring to the ratio of the total voltage across all balanced supercapacitors. As a result, device 301 is ideal for applications where the operating voltage between rails 203 and 204 typically remains within a narrow range. More preferably, the voltage remains at a higher level. In a preferred application, rails 203 and 204 are connected to a power source at the outlet, or battery 205 is periodically recharged or replaced. Examples of such applications are:
• Toll collection transponders and other devices using long-lasting batteries that last for several years.

  • Most applications powered by an outlet power source.

  Applications where the supercapacitor stores energy locally to supply a short local high current, eg remotely located, powered via a long / thin wire or from a low current source Solenoid actuator.

  ・ Robot actuators and robot engineering in general.

  A combination with a supercapacitor used at the output of the regulator and DC-DC converter.

  The sub-device is designed so that the voltage at which the balancing operation begins is close to the normal operating voltage. More specifically, in this configuration, the normal operating voltage for supercapacitors 282, 207 and 208 is about 2 volts based on the supply voltage being about 6 volts. Each supercapacitor is rated at 2.3 volts. Comparator 310 switches to a high power consumption mode when its voltage reaches 2.19 volts. This is based on the fact that the supply voltage is not expected to drop below about 5.1 volts during normal use, and when restored to 6 volts, the voltage on each capacitor is raised by about 0.3 volts. . As such, individual capacitor voltages will not exceed 2.5 volts (which is their maximum value for a particular short period) before rebalancing. The sub-device is thus safe to prevent the supercapacitor with the least leakage from being overcharged when the maximum voltage is restored if the supply voltage spends some time below the normal value. Ensure that margin is sufficient, within design constraints.

As described above, the voltage across the supercapacitor is determined by the value divided at junction 319. This value is compared with a reference voltage generated internally by the comparator 310. For this embodiment, the reference voltage is nominally 1.25 volts. The total range of hysteresis voltage with respect to the input is typically 4 mV.

  Although the reference voltage supplied by the comparator 310 varies slightly with the voltage across the rails 305 and 306, it is understood that this is typically a small range of voltages applied to the device 310. right. The reference voltage also varies with temperature and this should be taken into account.

  Although a device 301 in parallel with three supercapacitors is shown, the sub-device is applicable to a series capacitor network where two or more capacitors are used.

  In the device 301, the current obtained for the comparator is higher than that of the circuit of another embodiment that does not use the internally generated reference voltage. However, the current available from the battery 205 is reduced because the comparator operates only at a lower voltage, i.e. only connected in parallel with a single supercapacitor.

  In other embodiments, the device 301 includes a different number of series connected sub-devices corresponding to the number of series connected capacitors that require protection and balance. That is, each capacitor is provided with its own balance circuit, so that the capacitors need not be the same as each other. That is, the sub-device can be customized for the individual capacitors to be protected by selecting the values of resistors 317 and 318.

  An alternative embodiment of sub-device 303 is illustrated in FIG. 46, with corresponding features indicated by corresponding reference numbers. More specifically, sub-device 331 includes an 11 MΩ balance resistor 332 connected in parallel with supercapacitor 208. Resistor 332 is primarily intended to provide an inherent balance in applications where low or nonexistent source voltages must be applied. That is, here, the voltage between rails 305 and 306 is below the minimum operating voltage for comparator 310. In this embodiment, the minimum voltage is approximately 1.8 volts, assuming this corresponds to the guaranteed minimum specified operating voltage of comparator 310. However, if the actual comparator 310 operates at a lower voltage due to standard variations, the sub-device 303 will operate at that lower voltage. In other embodiments, an alternative comparator is used.

  Including resistor 332 provides an additional and continuous 0.2 μA from battery 205, which assumes that the potential difference between rails 305 and 306 is 2.19 volts, relative to device 331. The total resistance is set to the high resistance mode at about 0.93 μA.

  Those skilled in the art will appreciate that in other embodiments, the balance resistor 332 can be substituted by adjusting the value of resistor 317.

  Comparator 310 is preferably selected to ensure that its output does not go high when the supply voltage is below the minimum operating voltage.

  Typically, the circuit 202 rapidly discharges the supercapacitor when the battery is disconnected or its voltage falls towards the end of the discharge cycle. If the capacitor is normally balanced just prior to the event, there will be no possibility of imbalance and overvoltage problems.

Subdevice 303 and similar devices do not require a diode between output 311 and the lower rail if output 311 is very close to the voltage on rail 306 when output 311 is low. In embodiments where the selected comparator provides a small voltage at output 311, a diode may be added if low. In particular, the anode of the diode is connected to resistor 312 and the cathode is connected to rail 306. Thereby, the current obtained in the high resistance mode is reduced. However, to ensure similar performance in the low resistance mode, the value of resistor 312 is adjusted due to the inherent voltage drop that would exist across the diode when forward biased.

  Applications for sub-devices 303, 304 and 305 include notebook PCs; barcode scanners; PDAs; CF cards such as GSM and GPRS; PC cards such as GSM and GPRS; digital cameras; camera flash; Transponders or tags for restaurants; paging devices in restaurants; remote controls and other electronic appliances or devices for television; toys such as cars, boats; wirelessly controlled devices including toys; computers, clocks, lights and marine or aviation beacons Including solar powered devices; isolated telephone systems; other communication devices; telephones including cordless phones; garden lighting, especially lighting using solar radiation; flashlights; photovoltaic cells / panels; fuel cells; Electronic equipment; Robotics and robot actuators; Soleno De actuator; remotely located short time high current actuator; electric hybrid vehicle; and the like power tools; prostheses; Sonabui.

  47 and 48, further embodiments of the invention are shown, all of which are based on active elements. These circuits are simple to construct and implement and are cost effective, but typically will consume more power than the corresponding ones of the above-described embodiments. Furthermore, these embodiments are better suited for applications where the temperature range is more limited. This makes them ideal for low cost applications such as various types of toys. Other applications include: electronic cameras; flash circuits; strobe circuits; robot actuators and robotics in general; devices powered by fuel cells; paging devices in restaurants; long / high resistance power powered by outlet power Actuators at the end of the power lead or where current leakage in the circuit is not a significant problem; or other applications where recharging of supercapacitors or other capacitive devices is frequent.

  In the embodiment of FIGS. 47 (a)-(f), the active device includes a MOSFET and a diode. In any case, the circuit is intended for an application in which a plurality of capacitors are connected in series. For convenience, only one of the capacitors to be balanced is shown, which is shown on the left side of each circuit. Other similar circuits with corresponding capacitors are connected above and / or below each circuit.

  These circuits are also used in applications where the ambient temperature is relatively stable and the threshold turn-on voltage of the MOSFET being used is known at that temperature. Typically, the latter is met, which means that the MOSFET has a well-defined threshold voltage specification or that a particular MOSFET is selected for its known matched threshold voltage value. Because.

  Since the threshold voltage of MOSFETs is temperature dependent, the use of the circuit illustrated in FIG. 47 has applications where the temperature variation is small and capacitors are not used at or near their maximum voltage ratings. Limited to examples optimally. This ensures that the safety margin of the capacitor voltage value is widened without the risk of the capacitor becoming overvoltage.

The voltage at which the MOSFET begins to turn on determines the voltage at which the corresponding capacitor settles to a steady state. Variations will be reduced in those circuits using the Zener diode reference (FIGS. 47 (c) and 47 (f)). Nevertheless, lack of consistent external control of the switching voltage may necessitate careful selection and matching of components to obtain consistent protection and balance across a group of capacitors.

For some MOSFETs, off-state leakage current, ie, V _GS = 0 volts, is important. These components, when included in the circuit of FIG. 47, limit their application to capacitors having relatively high leakage currents.

  Since zener diodes also have a relatively high leakage current, the resistors in series with them must be carefully selected so that the voltage at the gate of the MOSFET does not begin to rise until it reaches the correct voltage.

  The circuits of FIGS. 47 (a) and 47 (d) are the simplest and rely on a MOSFET that turns on when the voltage across the power supply reaches a threshold voltage and begins to "leak" current from the corresponding capacitor.

  In the overall circuit of FIG. 47, a resistor in series with the drain of each MOSFET, when combined with the MOSFET characteristics, determines the rate at which the balance current increases with voltage.

  The circuits in FIGS. 47 (b) and 47 (e) send the divided voltage to the gate, thus increasing the effective threshold voltage of the circuit.

  The circuits in FIGS. 47 (c) and 47 (f) are intended to turn on immediately after the voltage rises above the breakdown voltage of the Zener diode. The resistor in combination with the diode is low enough so that the diode does not begin to raise the voltage at the gate of the MOSFET before the power supply reaches the actual breakdown voltage. In another embodiment, the Zener diode is replaced with a low power, ie low current, voltage reference device. Such devices typically provide a more accurate turn-on voltage, although their internal design is more complex.

  Referring now to FIGS. 48 (a)-(d), there is shown an alternative embodiment of the present invention in which the active device includes a bipolar transistor and a diode. These circuits are relatively simple and are best used when their cost is a powerful design parameter. With careful component selection and matching, all circuits function to protect the corresponding capacitors and balance a group of capacitors connected in series. That said, because of transistor temperature sensitivity and gradual turn-on, these circuits are not well suited for applications that require accurate voltage balance points and relatively low currents in the balance circuit. It will be a thing.

  Also, FIGS. 48 (a) -48 (d) show only a portion of each circuit, but the other capacitors are protected and balanced, and their corresponding balance for clarity. It will be understood that the circuit is omitted. Similar to the circuit as shown in FIG. 45, the circuit of FIG. 48 is cascaded with a group of series capacitors.

  The circuits shown in FIGS. 48 (a) and 48 (c) are the simplest and are the least resistant to component variations. As the voltage across the capacitor to be balanced increases, the transistor gradually turns on and progressively higher current flows. The amount of current depends on the value of the collector resistor and the gain of the transistor. Optimal results are achieved when these circuits are used in a temperature stable environment and the transistors are selected to match the features.

  The circuits shown in FIGS. 47B and 47D use a voltage reference device, in this case a Zener diode. However, in other embodiments, a low current voltage reference IC is used. The components are selected so that the transistor begins to turn on near the desired voltage balance point. The value of the balance voltage is controlled much better than in the circuits shown in FIGS. 48 (a) and 48 (c).

  These circuits are optimally used in applications where there is some safety margin between the normal operating voltage on the capacitor and the maximum allowable voltage. Furthermore, the circuit is preferably designed to discharge the respective capacitors when the voltage starts to exceed normal operating levels. This leaves significant margin for errors due to temperature changes or mismatches in the components.

  The circuits of FIGS. 48 (a) and 48 (c) are also best applied to high leakage current capacitors. This is because the current flowing through the voltage reference device before reaching these reference voltages tends to be higher than in other embodiments of the invention. Furthermore, the circuit tends to turn on gradually.

  In the above-described embodiments of the invention, examples of suitable active elements are provided. In other embodiments, other similar components or combinations of components that provide equivalent functionality are used. Such similar components or combinations of components will be known to those skilled in the art due to the advantages of the teachings herein.

  It will be appreciated by those skilled in the art that the active elements used in the preferred embodiments are selected taking into account the power supply and load characteristics that each embodiment is designed to operate. In addition, for active elements as disclosed in the above-described embodiments, there are variations among similar designated devices, and these variations are apparently similar to circuits that incorporate similar devices, especially power supplies. That it may need to be taken into account to ensure that the behavior of the active element is such that it does not exhibit sufficiently different behavior or active elements below normal working levels when The assignee will understand. For example, in this state, the active element, ie the operational amplifier, must prevent the load from discharging the capacitor in a short time. As another example, an embodiment in which two operational amplifiers are used, or an embodiment where current consumption for each operational amplifier may need to be taken into account, and a balanced load on the capacitor is reliably represented. Examples for this are given. Further examples include those where a single operational amplifier may be used or it may be necessary to take into account ensuring that the output of the operational amplifier does not discharge one of the capacitors. .

  In all of the above embodiments, a balance resistor is optional. Including or omitting these typically takes into account the behavior of the active element when the supply voltage drops to a low level or between series connected capacitors that are balanced. The inventors have found that it is determined taking into account the magnitude of the current flowing so as to cause an imbalance. In applications where the power source, typically the battery, remains connected (ie, the power remains constantly on), the balance resistor is usually not needed. In embodiments where power is supplied by the battery and the balance resistor is omitted, there is the advantage of longer run time over an equivalent circuit with the balance resistor.

  Although the embodiments described above are described with respect to balancing one or more supercapacitors, they are also suitable for balancing a corresponding number of other capacitive devices.

  Embodiments of the invention have been developed to overcome the inherent problems in matching supercapacitors. As a result, the embodiment can operate over a wider range of environmental conditions and can better accommodate the tolerances required by a particular application.

  By using an embodiment of the present invention, it is possible to increase the operating voltage of the cell, thereby allowing fewer cells to be used in series and operated at a given voltage. In addition, the voltage across the series cells is ensured to be uniform, thus eliminating the more conservative safety factor required for prior art series connected cells.

  Because of the higher operating voltage, each cell supplies a higher energy density and power density.

  Embodiments of the present invention address not only the problem of electrostatic differences between cells, but also the dynamic changes that naturally occur when cells are incorporated into supercapacitors and applied to electronic circuits.

  There are supercapacitors and other energy storage devices that include asymmetric cell geometries or other factors that result in opposing electrodes having different capacitances. Embodiments of the present invention are also applicable to devices where the overall cell voltage is still balanced against cells connected in series.

  Examples of applications for embodiments of the invention include notebook PCs; barcode scanners; PDAs; CF cards such as GSM, GPRS, EDGE, UMTS, 3G; PC cards such as GSM, GPRS, EDGE, UMTS, 3G; Still camera; Digital video camera; Digital SLR camera; Camera flash; Strobe; Transponder or tag for toll collection; RFID tag; Automatic measuring instrument and system; UPS system; Load averaging system; Paging device in restaurant; Remote controls and other electronic appliances or devices; toys such as cars, boats; wirelessly controlled devices including toys; solar-powered devices including computers, watches, lights and marine or aviation beacons; isolated telephone systems; Communication devices, including cordless phones Phones; garden lighting, especially those that use solar radiation; flashlights; photovoltaic cells / panels; fuel cells; all portable electronic devices, whether powered by batteries or fuel cells; robots Engineering and robot actuators; load control and balance devices for electric motors; solenoid actuators; remotely located short term high current actuators; electric hybrid vehicles; prosthetic limbs; sonar buoys;

  Those skilled in the art will appreciate that the present invention is applicable to both high power devices and systems and low power devices and systems.

  Some of the examples shown in Appendix 1 contain data for energy storage devices with an associated housing, but some have been corrected to remove the effects of that housing. The latter is intended to indicate the effective thickness and density of the cell itself regardless of the packaging material.

  That said, for practical applications it is necessary to include the housing within the scope of the calculation. A variety of housings are available, one of which is cited in PCT patent application PCT / AU01 / 00838, the disclosure of which is incorporated herein by cross reference.

FIG. 11 shows a charging current and / or leakage current of at least 120 μA, which is not uncommon for the above-described embodiments. If such a current is obtained from a dual cell device and the operating voltage is 4.5 volts, the total effective resistance of the device is about 37.5 kΩ. Thus, to limit the voltage across one cell to 2.7 volts to prevent cell damage, the voltage across the other cell is 1.8 volts and its effective resistance is 15 kΩ.

  In an embodiment that relies on a balance having only one or more resistive elements, the conservative resistance value to be included in parallel with each cell is less than about 15 kΩ. Considering the demand for the safety factor, it has been found that the minimum resistance value used in such an embodiment is about 10 kΩ. However, in other embodiments, higher resistance values are used when long-lived energy sources are the dominant design criteria, for example for mobile applications. Thus, in some other embodiments, the resistance value is at least 39 kΩ. More preferably, the resistance value is greater than about 100 kΩ, and even more preferably greater than about 270 kΩ. In a further embodiment, the resistance value is greater than about 330 kΩ, more preferably greater than about 390 kΩ. Alternate embodiments may also utilize higher resistance values above about 470 kΩ in some embodiments. It has been found that resistance values above about 680 kΩ are advantageous when long-life batteries are used. In some embodiments, the resistance value is greater than about 1 MΩ.

  While the invention has been described with reference to specific examples, those skilled in the art will appreciate that this can be embodied in many other forms.

FIG. 6 is a histogram of the leakage current of 1956 individual cells used in the double cell supercapacitor of Example 1, with an average leakage current of 0.179 microamperes and a standard deviation of 0.030 microamperes (17% of the average value). ). 2 is a histogram of the capacitance of the cell of FIG. 1, with an average value of 0.475 farads and a standard deviation of 0.011 farads (2.3% of the mean value). 2 is an ESR histogram of the cell of FIG. 1, with an average value of 25.8 milliohms and a standard deviation of 1.5 milliohms (5.8% of the mean value). 1354 is a 1354 individual cell leakage current histogram used in the double cell supercapacitor of Example 2, with an average leakage current of 0.151 microamps and a standard deviation of 0.102 microamps (67% of average). ). 5 is a histogram of the capacitance of the cell of FIG. 4, with an average value of 0.557 farads and a standard deviation of 0.015 farads (2.7% of the mean value). 4 is a histogram of the ESR of the cell of FIG. 4, with an average value of 33.7 microohms and a standard deviation of 1.9 milliohms (5.7% of the average value). FIG. 4 is a graph of charge current versus time for 10 typical cells used in the supercapacitor of Example 1, with current measured at 70 ° C. and 2.3 volts. FIG. 6 is a graph of leakage current versus temperature for a typical 10 cells of the cell used in the supercapacitor of Example 1 measured at a constant voltage (2.5 volts in this example). FIG. 4 is a graph of leakage current versus voltage for a typical 10 cells of the cell used in the supercapacitor of Example 1 measured at a constant temperature (70 ° C. in this example). FIG. 5 is a graph of leakage current versus cell voltage for two typical unmatched cells of the cell used in the supercapacitor of Example 1 measured at a constant temperature (70 ° C. in this example). FIG. 6 is a graph of charge current versus time for two typical matched cells of Example 1 supercapacitor measured at 70 ° C. and 2.3 volts for 38 hours. Three charges of a typical 8 cell of the cell used in the supercapacitor of Example 2, measured at 50 ° C. and charged to 1.0 volt with a 1 kΩ resistor in series and shorted with 1 kΩ / It is a graph of a discharge cycle. FIG. 4 is the voltage distribution of the double cell supercapacitor of Example 2 tested with and without a balance resistor, with an operating voltage of 4.5 volts and a temperature of 50 ° C. FIG. 1 is a perspective view of resistance balance according to one aspect of the present invention. FIG. It is a top view of the balance of FIG. It is a bottom view of the balance of FIG. FIG. 15 is a perspective view of a partially assembled supercapacitor including the balance of FIG. 14. FIG. 15 is a perspective view of a fully assembled supercapacitor including the balance of FIG. 14. It is a circuit diagram of the super capacitor of FIG. It is the schematic of the PC card with which the resistance balance of FIG. 14 is mounted | worn. FIG. 6 is a top view of an alternative supercapacitor including a resistance balance according to another embodiment of the present invention. FIG. 22 is a side view of the supercapacitor of FIG. 21. FIG. 22 is a top view of one cell included in the supercapacitor of FIG. 21. FIG. 22 is a top view of the other cell included in the supercapacitor of FIG. 21. FIG. 22 is a top view of the cell of FIGS. 23 and 24 in an intermediate stage of the assembly of the supercapacitor of FIG. It is a side view of the cell of FIG. FIG. 22 is a side view of a resistor strip included in the supercapacitor of FIG. 21. FIG. 28 is a top view of the strip of FIG. 27. FIG. 28 is a bottom view of the strip of FIG. 27. FIG. 28 is a plan view of an alternative resistive strip to the resistive strip shown in FIG. 27. FIG. 31 is a side view of the strip of FIG. 30. FIG. 31 is a plan view of the plurality of strips of FIG. 30 being formed. FIG. 31 is a plan view of an alternative resistive strip to the resistive strip shown in FIG. 30. FIG. 28 is a plan view of yet another alternative resistive strip of the resistive strip shown in FIG. 27. FIG. 35 is a plan view of the plurality of strips of FIG. 34 being formed. 1 is a block diagram of a power device including a balance according to one embodiment of the present invention. FIG. FIG. 24 is a circuit diagram of the balance shown in FIG. 23. FIG. 6 is a circuit diagram of an alternative embodiment of the balance of the present invention including a high impedance balance resistor. FIG. 6 is a circuit diagram of a further alternative embodiment of the present invention. FIG. 27 is a circuit diagram of a further embodiment of the present invention that includes a balance resistor but is similar to the embodiment of FIG. FIG. 27 is a circuit diagram of another embodiment of the present invention for protecting and balancing more than two capacitors, including a combination of two of the devices of FIG. 26 quasi-cascaded. FIG. 6 is a circuit diagram of a further embodiment of the present invention. FIG. 30 is a circuit diagram of another embodiment of the present invention similar to FIG. 29 and including a balancing resistor. FIG. 6 is an alternative balanced circuit diagram according to the present invention. FIG. 32 is a detailed view of one of the balancing sub-devices of FIG. 31; FIG. 32 is a circuit diagram of an apparatus similar to that of FIG. 31 but including a balance resistor. (A) to (f) are circuit diagrams of further embodiments of active balance according to the present invention, based on MOSFET devices. (A) to (d) are circuit diagrams of further embodiments of active balance according to the present invention, based on bipolar devices.

[Reference diagram]

Claims (10)

An energy storage device having a plurality of energy storage cells each including two terminals, wherein adjacent terminals are engaged at a junction to connect the cells in series, the device comprising:
A first contact connected to one of the terminals of the first cell of the series cells;
A second contact connected to one of the terminals of the last cell of the series cells;
At least one intermediate contact connected to each junction;
An energy storage device including a resistance path extending between contacts for collectively defining a resistance balance for the device.   The apparatus of claim 1, wherein at least one of the resistive paths includes a conductive portion and a resistive portion.   The apparatus of claim 2, wherein the resistive portion comprises a resistor.   The apparatus of claim 3, wherein the resistive portion comprises a resistor.   The apparatus of claim 2, wherein the resistive portion includes one or more active elements.   The apparatus of claim 5, wherein the resistive portion comprises a combination of one or more active elements and one or more passive elements.   The apparatus of claim 6, wherein the active device comprises one or more of an operational amplifier; a diode; a transistor; and another active device.   The device of claim 7, wherein the passive device comprises one or more of a resistor; a capacitor; and another passive device.   The apparatus of claim 1, wherein at least one of the cells is a supercapacitive cell.   The apparatus of claim 9, wherein the supercapacitive cell is a carbon-based supercapacitive cell.

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