JP2006339768A - Image processing circuit and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To aim at gaining both the reduction in a circuit size and the achievement of a plurality of functions. <P>SOLUTION: An imaging apparatus 12 captures an image for outputting as image data. An image processor 18 performs prescribed processing to the image data outputted from the imaging apparatus 12 for processing to the image data meeting the specifications of a display, such as an LCD 28. A frame buffer 20 stores the processed image data temporarily. The LCD 28 displays the image data in the frame buffer 20. An MPEG codec section 48 decodes image data to be coded inputted from the outside. A selector 16 selects one of the image data outputted from the imaging apparatus 12 and those obtained by decoding the image data to be coded for inputting to the image processor 18. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an image processing circuit having an image photographing function and a display function, and an electronic apparatus equipped with the image processing circuit.

  In general, in an image processing circuit mounted on an electronic apparatus having an imaging device and a display device such as a digital camera with an LCD, image processing for displaying image data output from the imaging device on the display device is performed. For this reason, an image processing circuit is mounted in the preceding stage of the frame buffer that temporarily stores image data (see, for example, Patent Document 1).

In addition, in an image processing circuit mounted on an electronic device for browsing encoded image data obtained via wired or wireless communication, a data decoding unit is required to display the encoded image data on a display device. It is necessary to temporarily store the decoded image data in the frame buffer.
JP 2004-356844 A

  In recent years, a large number of portable electronic devices having a plurality of functions such as a camera function, a communication function, and an image browsing function as described above are on the market. For devices that emphasize portability, one of the development goals is to achieve both reduction in circuit scale and realization of multiple functions.

  The present invention has been made in view of such circumstances, and an object thereof is to provide a technique for reducing the circuit scale in an image processing circuit having an image photographing function and a display function.

  An aspect of the present invention is an image processing circuit including an image processing unit that processes image data output from an imaging device for display on a display device. The image processing unit decodes encoded image data. It is shared with a circuit for processing the obtained image data.

  According to this aspect, since the image data output from the imaging device and the image data obtained by decoding the encoded image data are processed by the common image processing unit, it is necessary to include a plurality of image processing units. Therefore, the circuit scale can be reduced.

  Another embodiment of the present invention is also an image processing circuit. The image processing circuit includes an image processing unit that processes image data to be displayed on a display device, and image data output from an imaging device and image data obtained by decoding encoded image data. And a selector for selecting and inputting to the image processing unit.

  According to this aspect, either the image data output from the imaging unit or the image data obtained by decoding the encoded image data is selectively input to the image processing unit by the selector. The subsequent image data can also be displayed on the display device after predetermined processing.

  Yet another embodiment of the present invention is also an image processing circuit. The image processing circuit performs predetermined processing on image data output from an external imaging device and processes the image data to meet the specifications of the external display device, and displays the image data on the display device. A frame buffer for temporarily storing processed image data, a decoding unit for decoding encoded image data input from the outside, and image data decoded by the decoding unit instead of image data output from the imaging device And a selector to be input to the image processing unit.

  According to this aspect, by inputting the decoded image data to the image processing unit via the selector, the decoded image data can also be subjected to predetermined processing before being displayed on the display device. In addition, since both the image data output from the imaging unit and the decoded image data are input to the common image processing unit, it is not necessary to have a plurality of image processing circuits, and the scale of the image processing circuit is reduced. be able to.

  Yet another embodiment of the present invention is an electronic device. This electronic device includes a data communication unit that acquires encoded image data by wireless communication, and any of the image processing circuits described above.

  According to this aspect, in an electronic device having both a communication function and an imaging function, encoded image data obtained by wireless communication is also displayed on the display device after predetermined processing is performed on the decoded image data. be able to. Note that the electronic apparatus may include one or both of an imaging device that captures an image and outputs it as image data, and a display device that displays the image data in the frame buffer.

  It should be noted that any combination of the above-described constituent elements and a representation obtained by converting the expression of the present invention between apparatuses, methods, systems, and the like are also effective as an aspect of the present invention.

  According to the present invention, the scale of the image processing circuit can be reduced.

  FIG. 1 shows a configuration of an image processing circuit 100 according to an embodiment of the present invention. The configuration of the image processing circuit 100 is mainly depicted by functional blocks realized by cooperation of hardware elements and software elements. This functional block can be realized with any analog front-end processor in hardware, microprocessor such as DSP (Digital Signal Processor), memory, and analog circuit elements such as operational amplifiers and capacitors, etc. This is realized by a program loaded on the computer. Accordingly, those skilled in the art will understand that these functional blocks can be realized in various forms by hardware only, software only, or a combination thereof.

  The image processing circuit 100 includes an interface (I / F) unit 14, a selector 16, an image processing unit 18, a frame buffer 20, an LCD interface unit 24, and an MPEG decoding unit 46.

  The interface unit 14 receives unencoded image data captured by an imaging device (not shown). The input image data is transferred to the image processing unit 18 via the selector 16.

  The image processing unit 18 performs predetermined processing on the uncompressed image data transferred via the interface unit 14 and the selector 16, and matches the specifications of a display device (not shown) connected to the image processing circuit 100. Convert the image data. More specifically, the image processing unit 18 uses the storage area 18a as a work area, enlarges, reduces, rotates, or partially converts the transferred uncompressed image data according to the specifications of the display device. Apply processing such as cropping of the image area. For example, when the size of the image data captured by the imaging device is 800 × 600 pixels and the number of pixels of the display device is 480 × 360, image data reduction processing is executed. When the image data captured by the imaging device is a horizontally long image and the screen of the display device is vertically long, the image data is rotated so as to be displayed vertically. Alternatively, the image processing unit 18 may perform processing such as filtering such as contour coordination and blurring on the transferred uncompressed image data. The processed image data is sent to the frame buffer 20.

  The frame buffer 20 is composed of a semiconductor memory such as SRAM or DRAM, and temporarily stores the image data transferred from the image processing unit 18.

  The LCD interface unit 24 transfers the image data in the frame buffer 20 to a display device connected to the image processing circuit 100. As will be described later, when the image data is data derived from a moving image, it is read from the frame buffer 20 in units of frames and displayed on the display device at a predetermined frame rate.

  The MPEG decoding unit 46 has a function of decoding encoded moving image data encoded in accordance with the MPEG (Moving Picture Expert Group) standard. The MPEG decoding unit 46 receives the encoded image data from the outside via a data communication unit (not shown), or reads and acquires it from a storage device (not shown).

The MPEG decoding unit 46 includes a storage area 46a as a work area, and has an entropy decoding unit, an inverse quantization unit, an inverse DCT unit, and a motion prediction unit (not shown) for decoding. The encoded moving image data is divided into a plurality of macroblocks defined by the MPEG standard for each frame, and a decoding process is executed for each macroblock. The encoded moving image data is entropy decoded, and the decoded image data is inversely quantized to generate DCT coefficients. By performing inverse DCT on the DCT coefficient and further performing motion compensation on the decoded image data, moving image data is generated frame by frame. The decoded moving image data is transferred to the selector 16 in units of frames.
The MPEG decoding unit 46 is an example of a decoding unit in the embodiment.

  The selector 16 selects either the image data captured by the imaging device or the decoded moving image data output from the MPEG decoding unit 46 according to a control signal provided from a control unit (not shown) as an image processing unit. Send to 18. The selector 16 may be configured to select image data captured by the imaging device when there is no control signal.

  The decoded moving image data is transferred to the image processing unit 18 via the selector 16. The image processing unit 18 performs the above-described processing on the image data captured by the imaging device for each frame of the decoded moving image data. The processed frame is stored in the frame buffer 20. The image processing unit 18 may delete some frames and not transfer them to the frame buffer 20 when the frame rate at the time of creating the moving image data is larger than the frame rate in the display device.

  Thus, by passing the moving image data decoded by the MPEG decoding unit 46 through the image processing unit 18, it is possible to perform processing according to the specifications of the display device connected to the image processing circuit 100.

As described above, according to the present embodiment, the image data output from the imaging unit and the image data obtained by decoding the encoded moving image data are processed by the common image processing unit. The circuit scale can be reduced. In addition, since the image data output from the imaging means and the image data obtained by decoding the encoded image data are selectively input to the image processing unit by the selector, the decoded image data is also predetermined. Can be displayed on the display device.
Further, since the processing of the image data after decoding is executed by the image processing unit instead of being executed by software, an excessive load is not applied to the codec unit. Furthermore, image data can be processed at high speed by providing dedicated hardware as an image processing unit.

  FIG. 2 shows an image processing circuit 200 according to another embodiment of the present invention. The image processing circuit 200 includes a selector 22 and an input / output interface unit 26 in addition to the functional blocks described with reference to FIG. Also, an MPEG codec unit 48 is provided instead of the MPEG decoding unit.

  In addition to the MPEG image data decoding function, the MPEG codec section 48 also has a moving image data encoding function according to the MPEG standard. The MPEG codec section 48 includes a storage area 48a as a work area, and includes a DCT section, a quantization section, an entropy coding section, and a motion prediction section (not shown) for coding. The MPEG codec unit 48 is an example of a moving image data decoding processing unit in the claims.

  The selector 22 passes the image data in the frame buffer 20 to any of the LCD interface unit 24, the input / output interface unit 26, or the MPEG codec unit 48 in accordance with a signal from a control unit (not shown).

  The input / output interface unit 26 outputs the image data transferred via the selector 22 to an external storage device (not shown) connected to the image processing circuit 100. Further, the input / output interface unit 26 reads the encoded image data stored in the external storage device and transfers it to the MPEG codec unit 48.

  According to the configuration shown in FIG. 2, instead of outputting the image data captured by the imaging device and transferred via the selector 16, the image processing unit 18, and the frame buffer 20 to the LCD interface unit 24, the MPEG codec unit 48. Can be output. This is used, for example, when image data is encoded and stored in a case where images continuously shot by an imaging device are continuously reproduced and displayed as a pseudo moving image on a display device.

  FIG. 3 shows an image processing circuit 300 according to still another embodiment of the present invention. In addition to the functional blocks provided in the image processing circuit 200 described with reference to FIG. 2, the image processing circuit 300 executes still image encoding processing and decoding processing according to the JPEG (Joint Photographic Coding Expert Group) standard. A JPEG codec unit 50 is further provided.

The JPEG codec unit 50 performs DCT encoding, quantization, and entropy encoding on uncompressed still image data, and compresses and encodes image data. Further, the JPEG codec unit 50 performs entropy decoding, inverse quantization, and inverse DCT on the encoded still image data to decode still image data. The JPEG codec unit 50 preferably shares a part of a circuit such as the MPEG codec unit 48 and the DCT unit, but may have a different configuration. Further, the storage area 48a and the storage area 50a may be shared.
The JPEG codec unit 50 is an example of a still image data decoding processing unit in the claims.

  The selector 16 receives decoded video data transferred from the MPEG codec unit 48, decoded still image data transferred from the JPEG codec unit 50, or an interface unit according to a control signal supplied from a control unit (not shown). One of the imaged image data transferred from the image processing unit 14 is selectively supplied to the image processing unit 18. The selected image data is subjected to the above-described processing in the image processing unit 18 and stored in the frame buffer 20.

  According to the configuration of FIG. 3, not only the decoded moving image data but also the still image data can be displayed on the display device after performing a predetermined process in the image processing unit.

  FIG. 4 shows a configuration of the electronic apparatus 10 including the image processing circuit 200 described in the above embodiment. In addition to the image processing circuit 200, the electronic device 10 includes an imaging device 12, an LCD 28, an external storage device 30, an antenna 42, and a data communication unit 44.

  The imaging device 12 captures an object outside the electronic device 10 and outputs it as digital image data. The imaging device 12 is, for example, a CCD (charge-coupled device) camera, and an optical signal from an imaging target is input to an imaging element such as a CCD via a lens and converted into an electrical signal. The analog signal is subjected to processing such as A / D conversion and converted to digital image data. The converted image data is input to the image processing circuit 200 via the interface unit 14.

  The LCD 28 generates an image signal from the image data transferred from the frame buffer 20 via the selector 22 and the LCD interface unit 24 and displays it on the screen.

  The external storage device 30 is connected to the image processing circuit 200 via the input / output interface unit 26. The external storage device 30 may store image data picked up by the image pickup device 12 and subjected to predetermined processing, and may also store moving image data after being decoded or encoded by the MPEG codec unit 48. As the external storage device 30, a storage device of an arbitrary form such as a hard disk drive or a flash memory can be used.

  The data communication unit 44 receives the encoded moving image data via the antenna 42 and supplies it to the MPEG codec unit 48.

  In this embodiment, an image processing unit that is usually provided in an electronic apparatus including an imaging device and a display device such as an LCD is also used for processing to display the decoded moving image data on the display device. I tried to do it. Accordingly, it is not necessary to have redundant hardware for the image processing unit, so that the circuit scale of the image processing circuit 100 can be reduced. Therefore, the electronic device 10 can be downsized.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

  The electronic device 10 receives not only encoded image data, but may also receive uncompressed image data. In this case, the data communication unit 44 transfers the encoded image data to the MPEG codec unit 48 when receiving the encoded image data, and transfers the data to the interface unit 14 when receiving the uncompressed image data. The uncompressed image data transferred to the interface unit 14 is transferred to the image processing unit 18 in units of frames via the selector 16. With this configuration, it is possible to perform processing according to the display specifications of the LCD 28 even on uncompressed image data.

  The image processing circuit according to the embodiment is assumed to be mounted on a portable electronic device including an imaging device and a display device such as a digital camera and a mobile phone with a camera photographing function. However, the present invention is not limited to this, and the image processing circuit may be mounted on a stationary electronic device such as a personal computer.

It is a figure which shows the structure of the image processing circuit in one Embodiment of this invention. It is a figure which shows the structure of the image processing circuit in another embodiment of this invention. It is a figure which shows the structure of the image processing circuit by another embodiment of this invention. It is a figure which shows the structure of the electronic device carrying an image processing circuit.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 Electronic device, 12 Imaging device, 16 Selector, 18 Image processing part, 20 Frame buffer, 22 Selector, 28 LCD, 30 External storage device, 42 Antenna, 44 Data communication part, 46 MPEG decoding part, 48 MPEG codec part, 50 JPEG codec unit, 100, 200, 300 Image processing circuit.

Claims (9)

In an image processing circuit including an image processing unit that processes image data output from an imaging device to display on a display device,
The image processing circuit, wherein the image processing unit is shared with a circuit for processing image data obtained by decoding encoded image data. An image processing unit for processing image data to be displayed on a display device;
A selector that selects any one of the image data output from the imaging device and the image data obtained by decoding the encoded image data and inputs the selected image data to the image processing unit;
An image processing circuit comprising: An image processing unit that performs predetermined processing on image data output from an external imaging device and processes the image data according to the specifications of the external display device;
A frame buffer for temporarily storing processed image data for display on the display device;
A decoding unit for decoding encoded image data input from the outside;
Instead of the image data output from the imaging device, a selector that causes the image processing unit to input the image data decoded by the decoding unit;
An image processing circuit comprising:   4. The image processing according to claim 3, wherein the encoded image data is data derived from a moving image, and the image data decoded by the decoding unit is input to the image processing unit in units of frames. circuit.   The image processing circuit according to claim 3, further comprising: an encoding unit that encodes image data processed by the image processing unit. The decoding unit
A moving image data decoding processing unit for decoding the encoded moving image data, and a still image data decoding processing unit for decoding the encoded still image data,
The image processing circuit according to claim 3, wherein the selector selects one of the encoded moving image data and the encoded still image data in accordance with an external signal so as to be switchable.   7. The image processing circuit according to claim 3, wherein the image processing circuit is integrated on the same semiconductor substrate. A data communication unit for acquiring encoded image data by wireless communication;
An image processing circuit according to any one of claims 3 to 7,
An electronic device comprising: An imaging device that captures an image and outputs it as image data;
A display device for displaying the image data in the frame buffer;
The electronic apparatus according to claim 8, further comprising:

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