JP2006333450A - Polar coordinate modulation circuit, polar coordinate modulation method, integrated circuit, and radio transmission apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a polar coordinate modulation circuit, a polar coordinate modulation method, an integrated circuit, and a radio transmission apparatus, wherein a path delay difference between a phase signal and an amplitude signal is compensated for with high precision, in a polar coordinate modulation system, while increase in the circuit scale is being suppressed. <P>SOLUTION: A delay amount determining part 102 stores, as table data, delay amount information based on the step response characteristics of a power amplifying part 105, with respect to the amplitude values of amplitude signals and transmission level information S1. In this way, delay adjustment is made with an amplitude signal and transmission level information S1 used as reference signals, whereby the path delay difference between the amplitude signal and the phase signal is compensated for, while the increase of the circuit scale is being suppressed. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a polar modulation circuit, a polar modulation method, an integrated circuit, and a wireless transmission device that ensure synchronization when combining a phase modulation signal and an amplitude modulation signal in a polar modulation system that realizes a highly efficient transmitter.

  In recent cellular phone services, demand for data communication is increasing in addition to voice calls, so it is important to improve communication speed. For example, in a GSM (Global System for Mobile communications) system that is widely used mainly in Europe and Asia, a voice call has conventionally been performed by GMSK modulation that shifts the phase of a carrier wave according to transmission data. It was. Further, by shifting the phase and amplitude of the carrier wave according to the transmission data, 3π / 8 rotating 8-PSK modulation (hereinafter abbreviated as 8-PSK modulation) in which bit information per symbol is tripled with respect to GMSK modulation. EDGE (Enhanced Data rates for GSM Evolution) system that also performs data communication is proposed.

  In the linear modulation method with amplitude fluctuation such as 8-PSK modulation, the linearity requirement for the power amplification unit of the radio transmitter unit is severe. In general, the power efficiency in the linear region of the power amplification unit is lower than the power efficiency in the saturation region. Therefore, when the conventional quadrature modulation method is applied to the linear modulation method, it is difficult to increase the power efficiency.

  Therefore, the transmission signal is separated into a constant amplitude phase signal and an amplitude signal, phase modulated by a phase modulator based on the constant amplitude phase signal, and a constant amplitude phase modulated signal at a level at which the power amplifying unit saturates. And a method of synthesizing amplitude modulation by driving the control voltage of the power amplifier at high speed is known. This is called an EER method (Envelopment Elimination & Restoration) or a polar modulation method (a polar modulation method, a polar modulation method), and is a method for realizing high efficiency of the power amplification unit by a linear modulation method (for example, Non-Patent Document 1). Hereinafter, in order to clarify that the modulation method is different from the orthogonal modulation method, it is called a polar coordinate modulation method.

  FIG. 11 is a diagram obtained by extracting and plotting a portion of 200 to 400 [μs] in one GSM time slot (577 [μs]) with respect to an amplitude signal at the time of 8-PSK modulation. In FIG. 11, the horizontal axis represents the elapsed time from the start of the time slot, and the vertical axis represents the amplitude of the amplitude signal. In the polar coordinate modulation method, since the constant amplitude phase modulation signal is input to the power amplification unit, the power amplification unit can be used at the saturation operating point, which is advantageous in terms of power efficiency.

  However, in order to express an amplitude signal in which an inflection point between the maximum value and the minimum value of the amplitude exists within 2 [μs] as shown in FIG. 11, it is necessary to drive the control voltage of the power amplifier at high speed. . Therefore, an improvement technique (distortion compensation technique) is required for the output response of the power amplification unit with respect to changes in the input control voltage.

  In addition, the polar modulation method is a method in which a transmission signal is once separated into an amplitude signal and a phase signal and then recombined. Therefore, the synchronization between the amplitude signal and the phase signal is performed after the separation and until recombining. Otherwise, the transmission signal cannot be expressed accurately during recombination. Therefore, there is a need for a synchronization adjustment technique for synchronizing the amplitude signal and the phase signal.

  As described so far, the prior art relating to the two techniques required in the polar modulation method will be described.

  First, as a conventional technique related to distortion compensation and synchronization adjustment in a polar modulation method, an output signal amplitude characteristic (AM-AM: Amplitude Modulation to Amplitude Modulation conversion) with respect to a control voltage in a saturation operation type power amplification unit with a predetermined input high-frequency signal amplitude. ) And passing phase characteristics (AM-PM: Amplitude Modulation to Phase Modulation conversion) are stored in a memory. In this prior art, predistortion type distortion compensation is performed with reference to the memory, and a transmission signal is separated into an amplitude signal and a phase signal, and then a delay adjustment unit is disposed in the path of the amplitude signal or the phase signal. , Ensuring synchronization between both signals (see, for example, Patent Document 1).

  FIG. 12 is a block diagram showing a conventional transmission apparatus described in Patent Document 1. In FIG. As illustrated in FIG. 12, the transmission device includes an amplitude including a power amplification unit (PA) 900, a polar coordinate conversion unit 901, a delay adjustment unit 902, a memory 903, an amplitude information correction unit 904, and an amplitude modulation unit 905. A controller unit 906 and a phase modulation signal generator 909 having a phase information correction unit 907 and a phase modulation unit 908 are provided.

  The polar coordinate converter 901 separates an IQ signal (I, Q) input from a baseband signal generator (not shown) into an amplitude signal r and a constant amplitude phase signal θ. The delay adjustment unit 902 gives predetermined delays to the input amplitude signal r and phase signal θ, respectively, and ensures synchronization between the output amplitude signal r2 and phase signal θ2. The memory 903 stores the AM-AM characteristic and the AM-PM characteristic for the control signal input to the power amplification unit 900 in a state where a predetermined input high frequency signal amplitude is given to the power amplification unit 900. In addition, an amplitude correction signal and a phase correction signal that are the reverse characteristics of the power amplification unit 900 are output according to the input amplitude signal r2.

  The amplitude information correction unit 904 corrects the input amplitude signal based on the amplitude correction signal output from the memory 903. The amplitude modulation unit 905 drives the control voltage of the power amplification unit 900 at high speed based on the output signal from the amplitude information correction unit 904. The phase information correction unit 907 performs correction on the input phase signal based on the phase correction signal output from the memory 903. The phase modulation unit 908 performs phase modulation based on the output signal from the phase information correction unit 907.

  As described above, the amplitude modulation signal and the phase modulation signal distorted in advance in consideration of the inverse characteristic of the output characteristic with respect to the input control signal to the power amplification unit 900 are the actual amplitude and phase generated in the power amplification unit 900. Under the influence of distortion, a desired output amplitude and phase are obtained, and output responsiveness (linearity) to the input control voltage can be improved. In addition, since the delay adjustment unit 902 can ensure synchronization between the amplitude signal and the phase signal, the transmission signal can be accurately expressed.

  However, the technique described in Patent Document 1 does not disclose a specific method for distortion compensation or a specific method for synchronization adjustment. Therefore, for example, it is not possible to cope with a case where the synchronization between the amplitude signal and the phase signal is lost due to some factor.

  FIG. 13 is a graph plotting the pass phase characteristics when a control voltage that gradually changes (monotonously increases or monotonously decreases) over time is applied to the power amplifier. In FIG. 13, the horizontal axis represents the normalized control voltage, and the vertical axis represents the passing phase rotation amount based on the normalized control voltage 1. A solid line in the figure represents a passing phase characteristic when the normalized control voltage is gradually changed from a low voltage (0) to a high voltage (1) in a monotonically increasing manner (up characteristic). A dotted line in the figure represents a passing phase characteristic when the normalized control voltage is gradually changed from a high voltage (1) to a low voltage (0) in a monotonically decreasing manner (downward characteristic). Note that both the solid line and the dotted line show a case where a predetermined level of input high-frequency signal amplitude (same value) is supplied at which the power amplification unit performs saturation operation.

  In the polar modulation method, since the control voltage of the power amplification unit is driven at high speed, a difference occurs in the charge time and discharge time for the capacitance (including parasitic capacitance) in the control voltage input unit to the power amplification unit. For this reason, as shown in FIG. 13, when the control voltage application condition changes from a low voltage to a high voltage and when the control voltage changes from a high voltage to a low voltage, even if the change width of the control voltage is the same value, The amount of change is different. That is, the phase characteristic changes at the signal change point, which means that the synchronization between the amplitude signal and the phase signal is lost.

  Next, a conventional technique related to synchronization adjustment at a signal change point in the polar coordinate modulation method will be described. As such a conventional technique, there is one that detects the output signal amplitude of the power amplifier and differentiates the detected signal to obtain a signal change point. In this prior art, after obtaining a signal change point, a delay with respect to a reference clock supplied to a digital-analog conversion circuit (hereinafter abbreviated as a DA converter) that converts an amplitude signal and a phase signal from a digital format to an analog format is adjusted. Then, the synchronization timing at the signal change point is adjusted (for example, see Patent Document 2).

  FIG. 14 is a block diagram showing a conventional transmission device described in Patent Document 2. In FIG. As illustrated in FIG. 14, the transmission apparatus includes a power amplification unit 900, an amplitude modulation unit 905, a phase modulation unit 908, DA converters 1101 and 1102, a reference clock 1103, a change point detection circuit 1104, and a delay unit 1105.

  The DA converter 1101 converts a digital IQ signal (I, Q) input from a baseband signal generator (not shown) into an analog IQ signal. The DA converter 1102 converts the digital amplitude signal (r) extracted from the digital IQ signal (I, Q) by a polar coordinate converter (not shown) into an analog amplitude signal. The reference clock 1103 supplies the DA converters 1101 and 1102 with a clock serving as a reference for the conversion operation.

  The amplitude modulation unit 905 drives the power supply voltage of the power amplification unit 900 at high speed based on the analog amplitude signal. The phase modulation unit 908 generates a phase modulation signal based on the analog IQ signal and outputs the phase modulation signal to the power amplification unit 900. The change point detection circuit 1104 differentiates the output signal of the power amplifying unit 900 and then detects a signal change point from the positive / negative of the differential value. The delay unit 1105 adjusts the conversion timing of the DA converters 1101 and 1102, that is, the synchronization between the amplitude signal and the phase signal extracted from the IQ signal, at the signal change point detected by the change point detection circuit 1104. . With this configuration, it is possible to detect a signal change point and ensure synchronization of the amplitude signal and the phase signal at the signal change point.

Japanese translation of PCT publication No. 2004-501527 (FIG. 11) JP-T 2002-530992 (FIG. 2) Kenington, Peter B, “High-Linearity RF Amplifier Design”, Artech House Pulishers (Page 162, Figure 4.18)

  In the polar modulation method, in order to accurately represent a transmission signal, a synchronization adjustment technique that ensures synchronization between the amplitude signal and the phase signal is necessary. Next, problems that have not been solved by the prior art with respect to the technique necessary for realizing the polar modulation method as described above will be described.

  The synchronization adjustment technique using the polar modulation method disclosed in Patent Document 1 does not disclose a specific method for ensuring synchronization, and therefore cannot cope with a case where the synchronization between the amplitude signal and the phase signal is shifted due to some factor.

  The synchronization adjustment technique at the signal change point in the polar modulation method shown in Patent Document 2 requires a system for branching and feeding back the output signal of the power amplification unit 900, which increases the circuit scale and power. Loss at the output portion of the amplifying unit 900 increases, and the efficiency of the transmission device decreases. In addition, it is impossible to deal with a case where there is a cause of loss of synchronization other than the signal change point.

  The present invention has been made in view of the above-described conventional circumstances, and in the polar modulation method, it is possible to ensure synchronization during synthesis of a phase modulation signal and an amplitude modulation signal while suppressing an increase in circuit scale. It is an object of the present invention to provide a polar modulation circuit, a polar modulation method, an integrated circuit, and a wireless transmission device.

  A polar modulation circuit according to the present invention includes a polar coordinate conversion unit that generates an amplitude signal from a baseband quadrature signal generated from transmission data, an amplitude modulation unit that generates an amplitude modulation signal based on the amplitude signal, Based on a signal having at least a phase component of the baseband quadrature signal, a phase modulation unit that generates a phase modulation signal in a radio frequency band, the phase modulation signal as an input high frequency signal, and the amplitude modulation signal as a control signal And amplifying unit for generating transmission data in a radio frequency band, and the amplitude signal and the phase signal according to transmission level information indicating the amplitude value of the amplitude signal or the wireless transmission level of the transmission data A delay amount determination unit for storing delay amount information for correcting a delay difference between paths, and the amplitude signal or at least the phase component based on the delay amount information; Including a delay adjusting unit for delaying for the signal.

  With this configuration, it is possible to compensate for the delay difference between the paths of the phase signal and the amplitude signal with a simple configuration without requiring a system for branching and feeding back the output signal from the amplification unit.

  Secondly, the polar modulation circuit of the present invention is the first polar modulation circuit, which stores predetermined amplitude correction predistortion distortion compensation data, and based on the amplitude signal, the amplitude signal or And a memory unit for outputting an amplitude correction signal or a phase correction signal for each of the signals having at least a phase component.

  With this configuration, in addition to the effect of the first polar modulation circuit, distortion compensation accuracy can be improved.

  Thirdly, a polar modulation circuit according to the present invention is the first or second polar modulation circuit, wherein the delay amount information is a step response characteristic of an output of the amplification unit with respect to an input control signal to the amplification unit. Is a value determined based on

  With this configuration, in addition to the effect of the first or second polar modulation circuit, the delay adjustment amount can be easily determined.

  Fourthly, the polar modulation circuit according to the present invention is the first or second polar modulation circuit, wherein the delay amount determination unit uses the delay amount information as the amplitude value of the amplitude signal or the transmission level information. Each has a data table to be stored.

  With this configuration, in the polar coordinate modulation method, synchronization at the time of combining the phase modulation signal and the amplitude modulation signal can be ensured while suppressing an increase in circuit scale.

  Fifthly, the polar modulation circuit according to the present invention is the first or second polar modulation circuit, wherein the phase modulation unit has a predetermined amplitude value based on the phase information output from the delay adjustment unit. And a quadrature coordinate conversion unit that generates a quadrature coordinate conversion unit that generates a phase modulation signal of a radio frequency band based on the quadrature signal and outputs the phase modulation signal to the amplification unit.

  With this configuration, it is possible to reduce the circuit scale for ensuring synchronization during the synthesis of the phase modulation signal and the amplitude modulation signal.

  Sixthly, the polar modulation circuit according to the present invention is the first to third polar modulation circuits, wherein the delay adjustment unit is a unit of a predetermined operation clock of a digital signal processing unit constituting the polar modulation circuit. A first delay adjustment unit that performs delay adjustment; and a second delay adjustment unit that performs delay adjustment in less than the clock unit.

  With this configuration, it is possible to improve the accuracy of the delay adjustment step without being restricted by a predetermined operation clock of the digital signal processing unit.

  Seventhly, the polar modulation circuit of the present invention is the sixth polar modulation circuit, wherein the second delay adjustment unit includes a plurality of signal amplitude values after delay adjustment in units of a predetermined operation clock and the delay. Linear interpolation based on quantity information.

  With this configuration, the accuracy of the delay adjustment step can be improved with a simple configuration.

  Eighth, a polar modulation circuit according to the present invention includes a polar coordinate conversion unit that generates an amplitude signal from a baseband quadrature signal generated from transmission data, an amplitude modulation unit that generates an amplitude modulation signal based on the amplitude signal, Based on a signal having at least a phase component of the baseband quadrature signal, a phase modulation unit that generates a phase modulation signal in a radio frequency band, the phase modulation signal as an input high frequency signal, and the amplitude modulation signal as a control signal The amplitude signal and the phase signal according to transmission level information indicating the amplitude value of the amplitude signal or the wireless transmission level of the transmission data A phase adjustment amount determination unit that stores phase adjustment amount information for correcting a phase difference between the amplitude signal and the phase adjustment amount information, based on the phase adjustment amount information. And a phase adjusting unit for adjusting the phase of a signal having a.

  With this configuration, it is possible to reduce the circuit scale for ensuring synchronization during the synthesis of the phase modulation signal and the amplitude modulation signal.

  Ninthly, the polar modulation circuit of the present invention is the eighth polar modulation circuit, which stores predetermined amplitude correction predistortion distortion compensation data, and based on the amplitude signal, the amplitude signal or And a memory unit for outputting an amplitude correction signal or a phase correction signal for each of the signals having at least a phase component.

  With this configuration, it is possible to ensure synchronization during synthesis of the phase modulation signal and the amplitude modulation signal and to improve distortion compensation accuracy.

  A polar modulation circuit according to the present invention is, in a tenth aspect, the ninth polar modulation circuit, wherein the phase adjustment unit includes a multiplication circuit that multiplies the phase adjustment amount information and the phase correction signal.

  With this configuration, it is possible to reduce the circuit scale for ensuring synchronization during the synthesis of the phase modulation signal and the amplitude modulation signal.

  The polar modulation circuit according to the present invention is, in an eleventh aspect, the ninth polar modulation circuit, wherein the phase adjustment amount determination unit calculates the phase adjustment amount information for each amplitude value of the amplitude signal or the transmission level information. The data table to be stored in

  With this configuration, in the polar coordinate modulation method, synchronization at the time of combining the phase modulation signal and the amplitude modulation signal can be ensured while suppressing an increase in circuit scale.

  A polar modulation method according to the present invention includes, in a twelfth aspect, a polar coordinate conversion step for generating an amplitude signal from a baseband orthogonal signal generated by transmission data, an amplitude modulation step for generating an amplitude modulation signal based on the amplitude signal, A phase modulation step for generating a radio frequency band phase modulation signal based on a signal having at least a phase component of the baseband quadrature signal, the phase modulation signal as an input high frequency signal, and the amplitude modulation signal as a control signal The amplitude signal and the phase signal in accordance with the amplification step for generating transmission data in a radio frequency band, and transmission level information indicating the amplitude value of the amplitude signal or the radio transmission level of the transmission data. A delay amount determination step for storing delay amount information for correcting a delay difference between paths, and the amplitude signal based on the delay amount information. Or comprising the relative signal having at least a phase component, a delay adjustment step for delaying, the.

  By this method, it is possible to easily compensate for the delay difference between the phase signal and the amplitude signal without branching and feeding back the output signal after the amplification step.

  An integrated circuit of the present invention is thirteenth mounted with any one of the first to eleventh polar modulation circuits.

  With this configuration, in addition to the effects of any one of the first to eleventh polar modulation circuits, the circuit scale can be reduced.

  14thly, the radio | wireless transmitter of this invention has the polar modulation circuit in any one of the said 1st thru | or 11th, or the said 13th integrated circuit.

  With this configuration, a highly efficient wireless transmission device can be realized.

  According to the present invention, in a polar modulation method, a polar modulation circuit, a polar modulation method, an integrated circuit, and wireless transmission capable of compensating for a delay difference between paths of a phase signal and an amplitude signal while suppressing an increase in circuit scale. An apparatus can be provided.

(First embodiment)
In the first embodiment of the present invention, the operation of the power amplification unit in the polar modulation circuit is analyzed to estimate the cause of the delay, and the cause of the delay is specified, thereby performing the predistortion synchronization adjustment, and the power A method of ensuring synchronization without using a feedback system that branches an output signal from an amplifier will be described.

  FIG. 1 is a diagram illustrating an example of a schematic configuration of a polar modulation circuit according to the first embodiment of the present invention. As shown in FIG. 1, this polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller unit 109 having an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, and a phase. A phase modulation signal generation unit 112 having a modulation unit 111, a memory 101, a delay amount determination unit 102, and delay adjustment units 103 and 104 are provided.

  When the polar modulation circuit of the present invention is used for a transmission device, the polar coordinate conversion unit 106 converts an IQ signal (I, Q), which is transmission data input from a baseband signal generation unit of a transmission device (not shown), into an amplitude signal. Separated into r and a constant amplitude phase signal θ. Here, for example, the amplitude signal r (t) is normalized so that the maximum value is 1.

  The amplitude information correction unit 107 corrects the input amplitude signal based on the amplitude correction signal output from the memory 101. The amplitude modulation unit 108 drives the control voltage of the power amplification unit 105 at high speed based on the output signal from the amplitude information correction unit 107.

  The phase information correction unit 110 performs correction on the input phase signal based on the phase correction signal output from the memory 101. Phase modulation section 111 generates a radio frequency band phase modulation signal based on the output signal from phase information correction section 110 and outputs the phase modulation signal to power amplification section 105.

  The power amplifying unit 105 inputs the phase modulation signal output from the phase modulation unit 111 as an input high frequency signal, and inputs the amplitude modulation signal output from the amplitude modulation unit 108 as a control signal, so that the radio frequency band Generate transmission data.

  The transmission level information S1 is an average output level from an antenna (not shown) arranged after the power amplifying unit 105 transmitted from a control unit (not shown) when the polar modulation circuit of the present invention is used for a transmission device. Information to be determined and input to the memory 101 and the delay amount determination unit 102. Here, for example, in the case of a mobile station transmitting by 8-PSK modulation in the 900 MHz GSM band, the transmission level information corresponds to the antenna output level defined in 2 dB steps between 33 dBm and 5 dBm. Is.

  The memory 101 stores an AM-AM characteristic and an AM-PM characteristic with respect to a control signal input to the power amplifier 105 in a state where a predetermined input high-frequency signal amplitude is given to the power amplifier 105.

  The memory 101 accesses the stored AM-AM characteristic and AM-PM characteristic using the amplitude signal r (t) output from the polar coordinate conversion unit 106 as a reference signal, and reverses the AM-AM characteristic. An amplitude correction signal Rcomp (t) that is a characteristic is output to the amplitude information correction unit 107, and a phase correction signal Tcomp (t) that is an inverse characteristic of the AM-PM characteristic is output to the phase information correction unit 110.

  In addition, the memory 101 performs AM-AM characteristic normalization processing based on the transmission level information S1. Specifically, for the desired output level (average power), in the stored AM-AM data, based on the maximum transmission power in consideration of the maximum value-average value (peak factor) of amplitude information corresponding to the modulation method. By correcting the output signal amplitude, correction is performed for each desired output level. This normalization enables access to AM-AM data using the input amplitude information r (t) as an address designation signal.

  The delay amount determination unit 102 refers to the amplitude value r of the amplitude signal r (t) output from the polar coordinate conversion unit 106 and the delay amount obtained in advance corresponding to the transmission level information S1 from the data table. And the phase difference θ are calculated. Then, delay amount information for correcting the synchronization shift is transmitted to the delay adjustment units 103 and 104. The detailed operation of the delay amount determination unit 102 will be described later.

  Based on the delay amount information transmitted from the delay amount determination unit 102, the delay adjustment unit 103 delays the phase signal θ (t) output from the polar coordinate conversion unit 106 by a time τ. θ (t−τ) is generated and output to the phase information correction unit 110.

  Based on the delay amount information transmitted from the delay amount determination unit 102, the delay adjustment unit 104 delays the phase correction signal Tcomp (t) transmitted from the memory 101 by a time τ. Tcomp (t−τ) is generated and output to the phase information correction unit 110.

  Here, the delay adjustment unit 104 provides a delay amount equivalent to that of the delay adjustment unit 103, thereby ensuring synchronization between the phase signal and the phase information correction signal, which is an input signal to the phase information correction unit 110. is doing.

  Next, an example of a method for correcting the amplitude signal and the phase signal will be described with reference to FIG. FIG. 2 is a diagram illustrating an example of AM-AM characteristics and AM-PM characteristics of the power amplifying unit 105.

  In FIG. 2, an AM-AM characteristic 201 is an output voltage characteristic (AM-AM characteristic) with respect to a control voltage, an AM-PM characteristic 202 is a passing phase characteristic (AM-PM characteristic) with respect to the control voltage, and a network analyzer. Etc. can be easily obtained. FIG. 2 shows the relationship between the output voltage, the control voltage, and the phase rotation amount in the desired power amplifying unit 105, and also shows an example of a distortion compensation method.

  That is, regarding the AM-AM characteristic 201, conversion from the output voltage axis to the control voltage axis results in obtaining the inverse characteristic of the AM-AM characteristic 201, and the signal output from the polar coordinate conversion unit 106 is changed to AM. A corrected amplitude signal r2 (t) 204 obtained from the inverse characteristic of the AM characteristic 201 is obtained, and distortion compensation of the amplitude signal can be performed.

  Further, regarding the AM-PM characteristic 202, the corrected amplitude signal r2 (t) becomes a control voltage to be input to the power amplification unit 105. Therefore, by converting the control voltage axis to the phase rotation amount axis, the memory is obtained. The phase correction signal Tcomp (t) 205 transmitted from 101 can be obtained. By subtracting the phase correction signal Tcomp (t) 205 from the input phase signal, distortion compensation of the phase signal can be performed.

  By configuring as described above, as a first effect of the first embodiment of the present invention, an amplitude modulation signal distorted in advance in consideration of the reverse characteristic of the output characteristic with respect to the input control signal to the power amplification unit The phase modulation signal takes into account the delay amount generated in the power amplification unit, and is affected by the actual amplitude and phase distortion to become a desired output amplitude and phase, and the linearity of the output signal with respect to the input control voltage is reduced. Can be improved.

  Moreover, you may provide the structure shown in FIG. 3 as another example of the transmitter in the 1st Embodiment of this invention.

  FIG. 3 is a diagram illustrating another example of a schematic configuration of the polar modulation circuit according to the first embodiment of the present invention. As shown in FIG. 3, this polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller unit 109 having an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, and a phase. A phase modulation signal generation unit 112 having a modulation unit 111, a delay amount determination unit 102, delay adjustment units 103 and 301, and a memory 302 are provided. In the polar modulation circuit of FIG. 1, a delay adjustment unit 301 is provided instead of the delay adjustment unit 104, and a memory 302 is provided instead of the memory 101. In addition, the same code | symbol is attached | subjected about the part which overlaps with the polar coordinate modulation circuit of FIG.

  The transmission level information S1 is transmission level information of the power amplifying unit 105 transmitted from a control unit of the transmission device (not shown) when the polar coordinate modulation circuit of the present invention is used for the transmission device, and includes a memory 302 and a delay amount determination unit. 102 is input.

  Based on the delay amount information transmitted from the delay amount determination unit 102, the delay adjustment unit 301 delays the amplitude signal r (t) transmitted from the polar coordinate conversion unit 106 by a time τ. r (t−τ) is generated, and an amplitude signal r (t−τ) is output to the memory 302 as an AM-PM characteristic reference signal, and an amplitude signal r (t) is used as the AM-AM characteristic reference signal. ) Is output.

  Here, the delay time τ given to the AM-PM characteristic reference signal is the same as the delay time τ given to the phase signal θ (t) transmitted from the polar coordinate converter 106 by the delay adjustment unit 103. Thus, synchronization between the phase signal and the phase information correction signal, which is an input signal to the phase information correction unit 110, is ensured.

  The memory 302 stores the AM-AM characteristic and AM-PM characteristic for the input control signal of the power amplification unit 105 when a high-frequency signal having a predetermined amplitude is input. In addition, the memory 302 accesses the AM-AM characteristic using one amplitude signal r (t) of the signals output from the delay adjustment unit 301 as a reference signal, and performs amplitude correction that is an inverse characteristic of the AM-AM characteristic. The signal Rcomp (t) is output to the amplitude information correction unit 107, and the AM-PM characteristic is accessed using the other amplitude signal r (t-τ) of the signals output from the delay adjustment unit 301 as a reference signal. A phase correction signal Tcomp (t) that is an inverse characteristic of the AM-PM characteristic is output to the phase information correction unit 110.

  Further, in the memory 302, the AM-AM characteristic normalization process based on the transmission level information S1 similar to that in the memory 101 is performed, but since it has already been described with reference to FIG. The other constituent elements in FIG. 3 are the same as the operations and functions in FIG. By configuring as described above, an effect equivalent to that of the polar coordinate modulation circuit shown in FIG. 1 can be obtained.

  Next, the operation of the delay amount determination unit 102 will be described in detail. Here, prior to the description of the operation, characteristics of the power amplifying unit 105 used in the polar modulation method will be described.

  FIG. 4 is a peripheral block diagram of the power amplifier 105 in the polar modulation method. In FIG. 4, a transistor 401 constitutes the power amplification unit 105, and includes a base terminal 402, an emitter terminal 403, and a collector terminal 404 of the transistor 401, and a depletion layer capacitor 405 is connected to the base terminal 402 of the transistor 401. It is a capacitance formed between the collector terminal 404. In this example, for simplification, it is assumed that the power amplifying unit 105 is configured by one stage of the transistor 401.

  In the power amplification unit 105 used in the polar coordinate modulation method, a signal is input as shown in FIG. That is, a phase modulation signal obtained by carrier-modulating a baseband signal is input to the base terminal 402, and a baseband signal is input to the collector terminal 404. Here, usually, the frequencies of the baseband signal and the carrier signal are significantly different.

  At this time, the collector potential of the collector terminal 404 changes in accordance with the control signal of the transistor 401 generated by the amplitude modulation unit 108 based on the amplitude signal in the baseband, that is, in FIG. The depletion layer capacitance 405 changes. In particular, the depletion layer capacitance 405 increases when the average potential of the collector terminal 404 is controlled to be lowered in order to reduce the output average power of the transistor 401.

  In the polar coordinate modulation method, the inventor of the present application has the difference between the frequency of the input signal to the base terminal 402 and the input signal to the collector terminal 404 and the difference between the base terminal 402 and the collector terminal 404 due to the change in the control voltage. It was noted that the depletion layer capacitance 405 between them changed. In this case, the relative delay amount between the phase modulation signal input to the base terminal 402 and the amplitude modulation signal changes due to the influence of the change of the depletion layer capacitance 405 according to the amplitude value of the control voltage.

  Specifically, in the example of FIG. 4, even when synchronization is applied when the control voltage of the amplitude signal maximum value level is applied, the capacitance value and the minimum value level of the depletion layer capacitor 405 at the maximum value level of the amplitude signal are used. The capacitance values at the minimum value level are different from those at the maximum value level. For this reason, the mechanism is such that when the amplitude signal is at the minimum value level, the amount of delay of the amplitude signal increases and synchronization is lost compared to when the amplitude signal is at the maximum value level.

  In a wireless system that performs transmission power control, the change in the capacity value is further increased, and it is necessary to reestablish synchronization at the maximum transmission power level and at the minimum transmission power level.

  Therefore, by adjusting the synchronization according to the amplitude value of the control voltage to the power amplifying unit 105, it is not necessary to deal with the cause of loss of synchronization other than the signal change point and to feed back the output signal of the power amplifying unit 105. And realized that.

  Next, the operation of the delay amount determination unit 102 will be described. As described above, out of synchronization occurs according to the amplitude value of the control voltage to the power amplification unit 105. Therefore, how much delay occurs is determined in accordance with the amplitude value of the control voltage (the output signal of the amplitude modulation unit 108). FIG. 5 shows step response characteristics when a fixed control voltage is applied to the power amplifier 105 in order to obtain a constant output level. In FIG. 5, the horizontal axis indicates the startup time from the application of the control voltage until the desired output level is reached, and the vertical axis indicates the output power of the power amplification unit 105.

  Step response characteristics A501 and step response characteristics B502 indicate step response characteristics when the output power level is lowered in the order of step response characteristics A501 and step response characteristics B502. A delay amount 503 indicates a delay amount generated between the step response characteristic A501 and the step response characteristic B502.

  In the example shown in FIG. 5, two types of step response characteristics are shown for the control voltage level (output power level) input to the collector terminal 404, but when a control voltage with a finer interval and wider range is applied. These step response characteristics can be acquired in advance. In this case, for example, synchronization between the amplitude signal and the phase signal is matched at the maximum value level among the transmission average power levels of the target wireless system. When the transmission level is controlled, the delay adjustment associated with the transmission level change is always performed based on the delay amount 503 for each control voltage value (output power) obtained in advance as described above. Synchronization can be ensured. Further, even with the same transmission level, synchronization can be ensured with higher accuracy by performing delay adjustment according to the amplitude value of the control signal representing the amplitude component of the modulation signal.

  That is, the delay amount determination unit 102 prepares the delay amount 503 obtained as described above as table data for each amplitude value and transmission level information S1 of the amplitude signal, and the amplitude value of the amplitude signal or the transmission level. By using the information S1 as a reference signal and transmitting the delay amount information to the delay adjustment unit, it is possible to adjust the synchronization between the amplitude signal and the phase signal.

  In order to correspond to the signal change point of the amplitude signal r (t), the delay amount determination unit 102 samples the amplitude signal within a predetermined time and obtains the relative relationship between the amplitude signals, thereby changing the signal. It is also possible to ensure synchronization at a point. For example, when the previous sampling value and the current sampling value are subtracted and the sign of the calculation result is inverted, it is determined as the signal change point.

  As described above, in the first embodiment of the present invention, the delay amount determination unit 102 determines the amplitude value of the amplitude signal based on the step response characteristics of the power amplification unit 105 and the transmission level information S1. The delay amount information is stored as table data, and the delay amount of the phase modulation signal is adjusted according to the amplitude of the amplitude signal. Thereby, as a second effect of the first embodiment of the present invention, the phase modulation signal and the amplitude modulation signal caused by the change in the amplitude value of the amplitude signal including the signal change point, which could not be solved by the conventional technique Can be dealt with without using a system that branches and feeds back the output signal of the power amplifier 105.

  Since the delay amount changes according to the carrier frequency and the baseband frequency, table data of the delay amount corresponding to the carrier frequency or the baseband signal bandwidth may be prepared. Then, by adjusting the delay amount based on the carrier frequency information transmitted from the control unit of the transmission device (not shown) and the system information equivalent to the baseband bandwidth, synchronization can be ensured with higher accuracy. Needless to say, you can.

  In the first embodiment of the present invention, the delay adjustment unit is inserted into the phase signal path, and the delay adjustment unit is also inserted into the phase correction signal generation path along with the delay adjustment unit. A delay adjustment unit may be inserted in the path and the amplitude correction signal generation path. Needless to say, the delay adjustment unit may be inserted into both the amplitude signal path, the amplitude correction signal generation path, the phase signal path, and the phase correction signal generation path.

  In the first embodiment of the present invention, the method of ensuring synchronization without using a feedback system for branching the output signal from the power amplifier has been described. However, a feedback circuit is provided for purposes other than ensuring synchronization. Needless to say, it may be used in combination with the polar modulation circuit.

  Further, when the polar modulation circuit according to the first embodiment of the present invention is used in the transmission apparatus, the phase information correction unit between the steps of the amplitude information correction unit 107 and the amplitude modulation unit 108 in FIG. 1 or FIG. A DA converter (not shown) is arranged between the stage 110 and the phase modulation unit 111.

(Second Embodiment)
In the second embodiment of the present invention, a circuit configuration capable of reducing the circuit scale as compared with the first embodiment of the present invention will be described.

  FIG. 6 is a diagram illustrating an example of a schematic configuration of a polar modulation circuit according to the second embodiment of the present invention. As shown in FIG. 6, the polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller unit 109 including an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, and a delay. A phase modulation signal generation unit 112B having an adjustment unit 103B and a phase modulation unit 111, a delay amount determination unit 102, and a memory 101 are provided. In the polar modulation circuit of FIG. 1 shown in the first embodiment of the present invention, the phase information correction unit 110 is used instead of the delay adjustment unit 103 located between the polar coordinate conversion unit 106 and the phase information correction unit 110. The delay adjustment unit 103B is provided between the stage and the phase modulation unit 111, and the delay adjustment unit 104 is deleted. In addition, the same code | symbol is attached | subjected about the part which overlaps with the polar coordinate modulation circuit of FIG.

  The delay amount determination unit 102 refers to the delay amount obtained in advance corresponding to the amplitude value of the amplitude signal r (t) output from the polar coordinate conversion unit 106 and the transmission level information S1 from the data table. Then, a synchronization shift between the amplitude signal r and the phase signal θ is calculated, and delay amount information for correcting the synchronization shift is transmitted to the delay adjustment unit 103B. The operation of the delay amount determination unit 102 has been described in the first embodiment, and a description thereof will be omitted.

  Based on the delay amount information transmitted from the delay amount determination unit 102, the delay adjustment unit 103B delays the phase signal θ2 (t) output from the phase information correction unit 110 by a time τ. The phase signal θ <b> 2 (t−τ) to which the signal is given is generated and output to the phase modulation unit 111.

  The other constituent elements in FIG. 6 are the same as the operations and functions in FIG. With the configuration described above, the same effects as those of the polar modulation circuit shown in FIG. 1 can be obtained, and the circuit scale can be reduced as compared with the polar modulation circuit shown in FIG.

  In the second embodiment of the present invention, the delay adjustment unit 103B is inserted in the phase signal path. However, the present invention is not limited to this, and the amplitude signal path may be inserted even if the delay adjustment unit 103B is inserted in the amplitude signal path. Needless to say, the delay adjustment unit 103B may be inserted into both paths of the phase signal path.

  Further, when the polar modulation circuit according to the second embodiment of the present invention is used in the transmission apparatus, the interstage between the amplitude information correction unit 107 and the amplitude modulation unit 108, the delay adjustment unit 103B and the phase modulation unit 111 in FIG. A DA converter (not shown) is disposed between the two stages. However, when the delay adjustment unit 103B is configured by an analog circuit, a DA converter (not shown) is arranged between the phase information correction unit 110 and the delay adjustment unit 103B.

(Third embodiment)
In the third embodiment of the present invention, a case where a quadrature modulator is used as the phase modulation unit in the second embodiment of the present invention will be described.

  FIG. 7 is a diagram illustrating an example of a schematic configuration of a polar modulation circuit according to the third embodiment of the present invention. As shown in FIG. 7, this polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller unit 109 having an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, and a delay. A phase modulation signal generation unit 112C having an adjustment unit 103B, an orthogonal coordinate conversion unit 113, and an orthogonal modulation unit 111C, a delay amount determination unit 102, and a memory 101 are provided. Further, the orthogonal coordinate conversion unit 113 is added to the polar modulation circuit of FIG. 6 shown in the second embodiment of the present invention, and the phase modulation unit 111 is replaced with the orthogonal modulation unit 111C. In addition, the same code | symbol is attached | subjected about the part which overlaps with the polar coordinate modulation circuit of FIG.

  Based on the delay amount information transmitted from the delay amount determination unit 102, the delay adjustment unit 103B delays the phase signal θ2 (t) output from the phase information correction unit 110 by a time τ. The phase information θ2 (t−τ) given is generated and output to the orthogonal coordinate transformation unit 113.

  The orthogonal coordinate conversion unit 113 generates an orthogonal signal having a predetermined amplitude value based on the phase information θ2 (t−τ) output from the delay adjustment unit 103B, and outputs the orthogonal signal to the orthogonal modulation unit 111C.

  The orthogonal modulation unit 111 </ b> C generates a radio frequency band phase modulation signal based on the orthogonal signal output from the orthogonal coordinate conversion unit 113 and outputs the phase modulation signal to the power amplification unit 105.

  The power amplifying unit 105 inputs the phase modulation signal output from the quadrature modulation unit 111C as an input high-frequency signal, and also inputs the amplitude modulation signal output from the amplitude modulation unit 108 as a control signal. Generate transmission data.

  The other constituent elements in FIG. 7 are the same as the operation and action in FIG. With the above configuration, a polar modulation circuit can be configured using a quadrature modulator.

  In the third embodiment of the present invention, the delay adjustment unit 103B is inserted in the phase signal path. However, the present invention is not limited to this, and the amplitude signal path may be inserted even if the delay adjustment unit 103B is inserted in the amplitude signal path. Needless to say, the delay adjustment unit 103B may be inserted into both paths of the phase signal path.

  Further, when the polar modulation circuit according to the third embodiment of the present invention is used in the transmission device, the interstage between the amplitude information correction unit 107 and the amplitude modulation unit 108 in FIG. 7, the orthogonal coordinate conversion unit 113 and the orthogonal modulation unit. A DA converter (not shown) is arranged between the stage and 111C.

(Fourth embodiment)
The fourth embodiment of the present invention describes an example of the circuit configuration of the delay adjustment unit in the first to third embodiments of the present invention. The fourth embodiment of the present invention describes a delay adjustment operation using the delay adjustment unit.

  An example of the schematic configuration of the polar modulation circuit according to the fourth embodiment of the present invention will be described with reference to FIG. Note that FIG. 6 has been described in the second embodiment of the present invention, and description of overlapping parts is omitted.

  When the transmitting apparatus is configured using the polar coordinate modulation circuit shown in FIG. 6, the digital signal processing unit operates on the basis of a clock having a predetermined frequency. Therefore, by using a general delay circuit in the digital circuit, the reference clock The delay adjustment (first delay adjustment unit) in units of periods is easy.

  In addition, by dividing the reference clock to reduce the cycle time, it is possible to adjust the delay with high accuracy. However, since the current consumption increases by operating the frequency divider circuit or by operating the digital circuit at a high speed, there is a trade-off between the accuracy of delay adjustment by the frequency division of the reference clock and the current consumption. .

  Here, the delay adjustment unit according to the first to third embodiments of the present invention realizes a delay adjustment step of less than the reference clock cycle unit, thereby achieving high-accuracy according to the output signal from the delay amount determination unit. The delay adjustment is performed. For this reason, it is necessary to obtain a delay adjustment step less than the reference clock period by a method other than the frequency division configuration of the reference clock.

  Therefore, an example will be described in which a delay adjustment step of less than a reference clock cycle unit is obtained by arithmetic processing without using a frequency divider configuration.

One period of the reference clock is τ _clk . Also, the time (t−n × τ _clk ) and the time (t− (n + 1) × τ _clk ) (n Are the amplitude values of the phase signal at 0 (an integer greater than or equal to 0), θ (t_n) and θ (t_n + 1). Here, assuming that a delay time of less than one cycle is τ _d , if τ _clk is sufficiently short, the amplitude value of the phase signal at time (t− (n × τ _clk + τ _d )) is expressed by the following equation (1 ).

An example of the configuration of the delay adjustment unit 103B that realizes the above equation (1) is shown in FIG. Here, assuming that the predetermined delay adjustment amount is τ (= n × τ _clk + τ _d ), the delay adjustment for n cycles of the reference clock is performed by the first delay adjustment unit 103C, and Z is a general delay circuit. Expressed as ^-n . Further, the delay adjustment of less than the reference clock unit is performed by the second delay adjustment unit 103D.

As described above, in the polar modulation circuit shown in FIG. 6, the delay adjustment unit 103B is configured as shown in FIG. 8, and the amplitude signal or transmission level information is based on the step response characteristics as shown in FIG. The n and τ _d corresponding to S1 are stored as table data in the delay amount determination unit 102, and the delay amount of the phase signal is adjusted according to the amplitude of the amplitude signal. It is possible to accurately compensate for the delay difference between paths of the phase signal and the amplitude signal without using a system that branches and feeds back the output signal.

  In the fourth embodiment of the present invention, a method for obtaining a desired signal amplitude by linear interpolation from the signal amplitudes at two adjacent times is shown. Approximation accuracy can be improved by performing weighting with respect to the signal amplitude and then adding, and considering the positive and negative with respect to the signal change.

(Fifth embodiment)
The fifth embodiment of the present invention describes a circuit configuration that obtains an operation equivalent to that of the delay adjustment unit in the first embodiment of the present invention in the phase adjustment unit configured by a multiplier circuit. A circuit configuration capable of further reducing the circuit scale as compared with the first embodiment of the invention will be described.

  FIG. 9 is a diagram showing a schematic configuration of a polar modulation circuit according to the fifth embodiment of the present invention. As shown in FIG. 9, the polar modulation circuit includes a power amplification unit 105, a polar coordinate conversion unit 106, an amplitude controller 109 having an amplitude information correction unit 107 and an amplitude modulation unit 108, a phase information correction unit 110, and a phase modulation. A phase modulation signal generator 112 having a unit 111, a memory 101, a phase adjustment amount determination unit 601, and a phase adjustment unit 602. In the polar modulation circuit of FIG. 1, the delay adjustment unit 103 is deleted, and a phase adjustment amount determination unit 601 is provided instead of the delay amount determination unit 102, and a phase adjustment unit 602 is provided instead of the delay adjustment unit 104. ing. In the first embodiment of the present invention, portions that are the same as those of the polar coordinate modulation circuit of FIG.

  The transmission level information S1 is transmission level information of the power amplifying unit 105 output from a control unit (not shown) when the polar coordinate modulation circuit of the present invention is used in a transmission device, and is sent to the memory 101 and the phase adjustment amount determination unit 601. Entered.

  The phase adjustment amount determination unit 601 calculates a synchronization shift between the amplitude signal r (t) and the phase signal θ from the amplitude value of the amplitude signal r (t) output from the polar coordinate conversion unit 106 and the transmission level information S1. Then, phase adjustment amount information equivalent to correcting the synchronization shift is output to the phase adjustment unit 602. The detailed operation of the phase adjustment amount determination unit 601 will be described later.

  The phase adjustment unit 602 performs predetermined phase adjustment on the phase correction signal Tcomp (t) output from the memory 101 based on the phase adjustment amount information transmitted from the phase adjustment amount determination unit 601, and performs phase adjustment. A correction signal Tcomp2 (t) is generated and output to the phase information correction unit 110. The detailed operation of the phase adjustment unit 602 will be described later. The other constituent elements in FIG. 9 are the same as the operations and functions in FIG.

  Next, operations of the phase adjustment amount determination unit 601 and the phase adjustment unit 602 will be described in detail. Here, prior to the description of the operation, it will be described that the synchronization shift correction and the phase adjustment are equivalent. FIG. 10 shows AM-PM characteristics for compensation. In FIG. 10, the horizontal axis represents the control voltage (x), and the vertical axis represents the passing phase rotation amount (y).

  The AM-PM characteristic A701 indicated by a solid line in FIG. 10 is obtained by graphing the phase relationship between the input signal and output signal of the power amplifier 105 for each control voltage using a network analyzer or the like. This is the same as the AM-PM characteristic in FIG. Further, an AM-PM characteristic B702 indicated by a dotted line indicates a phase relationship between an input signal and an output signal of the power amplifier 105 expected in an actual polar modulation circuit.

  In such measurement, since the relative relationship between the input signal and the output signal is obtained, for example, the relationship between the input signal and the output signal among the influences of the depletion layer capacitance 405 between the base and the collector in FIG. As for what works, it appears in the measurement data. That is, in the region where the control voltage is low, the depletion layer capacitance 405 between the base and the collector increases, and the base-collector which increases in addition to the component amplified in the power amplification unit 105 is present at the output terminal of the power amplification unit 105. The component leaking from the input unit to the output unit via the depletion layer capacitance 405 increases, and the passing phase characteristic changes.

  On the other hand, as described in the first embodiment of the present invention, among the influences of the depletion layer capacitance 405 between the base and the collector, the influence related to the amplitude signal and the phase signal can be expressed by the power amplification unit 105. Anything that affects the relationship between the input signal and the control voltage does not appear in the measurement data. Therefore, if the AM-PM characteristic A701 is used as it is, a synchronous adjustment technique as shown in the first embodiment of the present invention is essential in order to eliminate the influence of the depletion layer capacitance 405 between the base and the collector. .

  In the fifth embodiment of the present invention, the adjustment of the synchronization is replaced with the adjustment of the phase, that is, in the region where the control voltage is reduced, the amplitude is affected by the depletion layer capacitance 405 between the base and the collector. We paid attention to the fact that the phase signal is delayed with respect to the signal.

Specifically, compared to the AM-PM characteristic A701 indicated by the solid line in FIG. 10, the AM-PM characteristic B702 as indicated by the dotted line in FIG. 10 is used as the compensation data. That is, when the AM-PM characteristic A701 can be expressed by the function of the expression (2), the depletion layer capacitance 405 between the base and the collector increases in the region where the control voltage is low, and the phase signal is compared with the amplitude signal. In consideration of the delay, the function shown in Equation (3) is given as the phase adjustment amount as the AM-PM characteristic B702. Here, RF_freq in Expression (3) indicates the frequency of the input signal to the high-frequency signal input terminal of the power amplifier 105, and the change in the depletion layer capacitance 405 between the base and the collector and the frequency difference between the amplitude signal and the phase signal. It is considered that the synchronization between the amplitude signal and the phase signal is shifted due to the above.

  FIG. 9 shows a configuration in which the above-described synchronization adjustment is replaced with a phase adjustment. That is, the phase adjustment amount indicated by f2 (x, RF_freq) in the equation (3) for the amplitude signal is obtained from the amplitude signal r (t), the transmission level information S1, and the known AM-AM characteristic, The adjustment amount determination unit 601 stores the amplitude signal as table data, and outputs the phase adjustment amount information to the phase adjustment unit 602 using the amplitude signal r (t) as a reference signal.

  Based on the phase adjustment amount information transmitted from the phase adjustment amount determination unit 601, the phase adjustment unit 602 applies the phase adjustment amount (f2 (x2) to the phase correction signal Tcomp (t) output from the memory 101. , RF_freq)) to generate Tcomp2 (t), which is output to the phase information correction unit 110.

  As described above, in the fifth embodiment of the present invention, the synchronization adjustment and the phase adjustment can be handled as equivalents, so that the delay adjustment unit with a large circuit scale can be replaced with a multiplication circuit with a small circuit scale. In addition to the signal change point that could not be solved by the prior art, the out-of-synchronization correspondence at the time of synthesis of the phase modulation signal and the amplitude modulation signal is changed to the output signal of the power amplification unit 105. Can be performed without using a feedback system.

  Since the amount of phase adjustment changes according to the baseband frequency, table data with a delay amount corresponding to the baseband signal bandwidth is prepared, and the baseband bandwidth transmitted from the control unit of the transmission device (not shown) It goes without saying that synchronization can be ensured with higher accuracy by adjusting the delay amount based on equivalent system information.

  It goes without saying that the same effect can be realized and the circuit scale can be further reduced even if the multiplication processing in the phase adjustment unit 602 is performed in advance on the AM-PM data stored in the memory 101.

  Furthermore, it goes without saying that more accurate synchronization can be achieved by combining the first embodiment and the fifth embodiment of the present invention.

  Note that the polar modulation circuit described in the above embodiment is configured to perform distortion compensation in the power amplifying unit 105 by outputting an amplitude correction signal and a phase correction signal corresponding to the amplitude value of the amplitude signal from the memory unit 101. As shown, by omitting the memory unit 101, the amplitude information correction unit 107, the phase information correction unit 110, and the delay adjustment unit 104, a polar coordinate modulation circuit for the purpose of ensuring synchronization only can be configured.

  Note that the polar modulation circuit described in the above embodiment can be formed as an integrated circuit by being generated over a silicon substrate.

  Moreover, the polar modulation circuit described in the above embodiment inputs an IQ signal from a signal generator that generates an arbitrary IQ signal to the polar coordinate conversion unit, and connects the output of the power amplification unit 105 to the antenna. It can also be configured as a transmission device.

  The polar modulation circuit of the present invention has an effect capable of compensating for a delay difference between paths of a phase signal and an amplitude signal while suppressing an increase in circuit scale in the polar modulation method. Useful for devices and the like.

The figure which shows the structure of the polar modulation circuit by the 1st Embodiment of this invention. The figure which shows the AM-AM characteristic of the power amplification part by the 1st Embodiment of this invention, and AM-PM characteristic The figure which shows the other structure of the polar modulation circuit by the 1st Embodiment of this invention. The figure which shows the structure of the power amplification part by the 1st Embodiment of this invention The figure which shows the step response characteristic of the power amplification part by the 1st Embodiment of this invention The figure which shows the structure of the polar modulation circuit by the 2nd Embodiment of this invention. The figure which shows the structure of the polar modulation circuit by the 3rd Embodiment of this invention. The figure which shows the structure of the delay adjustment part by the 4th Embodiment of this invention. The figure which shows the structure of the polar modulation circuit by the 5th Embodiment of this invention. The figure which shows the AM-PM characteristic of the power amplification part by the 5th Embodiment of this invention The figure which shows an example of the amplitude signal at the time of 8-PSK modulation by a prior art The block diagram which shows the structure of the transmitter by a prior art The figure which shows the change of the AM-PM characteristic of the power amplification part by a prior art The block diagram which shows the structure of the transmitter by a prior art

Explanation of symbols

101, 302, 903 Memory 102 Delay amount determination unit 103, 103B, 104, 301, 902 Delay adjustment unit 103C First delay adjustment unit 103D Second delay adjustment unit 105, 900 Power amplification unit 106, 901 Polar coordinate conversion unit 107 , 904 Amplitude information correction unit 108, 905 Amplitude modulation unit 109, 906 Amplitude controller unit 110, 907 Phase information correction unit 111, 908 Phase modulation unit 112, 112B, 112C, 909 Phase modulation signal generation unit 111C Quadrature modulation unit 113 Orthogonal coordinate Conversion unit 201 AM-AM characteristics 202, 701, 702 AM-PM characteristics 203 Amplitude signal 204 Corrected amplitude signal 205 Phase correction signal 401 Transistor 402 Base terminal 403 Emitter terminal 404 Collector terminal 405 Base-collector capacitance 501 502 power amplifier even step response characteristic 503 delay 601 phase adjustment amount determining unit 602 phase adjuster 1101 and 1102 DA converter 1103 reference clock 1104 change point detection circuit 1105 the delay unit

Claims (14)

A polar coordinate conversion unit that generates an amplitude signal from a baseband orthogonal signal generated by transmission data; and
An amplitude modulation unit that generates an amplitude modulation signal based on the amplitude signal;
A phase modulation unit that generates a phase modulation signal in a radio frequency band based on a signal having at least a phase component of the baseband quadrature signal;
The phase modulation signal is input as an input high-frequency signal, and the amplitude modulation signal is input as a control signal, thereby generating transmission data in a radio frequency band; and
A delay amount determination unit for storing delay amount information for correcting a delay difference between the amplitude signal and the phase signal according to transmission level information indicating the amplitude value of the amplitude signal or the wireless transmission level of the transmission data. When,
Based on the delay amount information, a delay adjustment unit that gives a delay to the amplitude signal or the signal having at least the phase component;
Polar coordinate modulation circuit. The polar modulation circuit according to claim 1,
Memory that stores predetermined amplitude correction predistortion distortion compensation data and outputs an amplitude correction signal or a phase correction signal to the amplitude signal or the signal having at least the phase component based on the amplitude signal, respectively. Part,
A polar modulation circuit. A polar modulation circuit according to claim 1 or 2,
The polar modulation circuit, wherein the delay amount information is a value determined based on a step response characteristic of an output of the amplification unit with respect to an input control signal to the amplification unit. A polar modulation circuit according to claim 1 or 2,
The polar amount modulation circuit includes a data table in which the delay amount determination unit stores the delay amount information for each amplitude value of the amplitude signal or the transmission level information. A polar modulation circuit according to claim 1 or 2,
The phase modulation unit generates an orthogonal signal having a predetermined amplitude value based on the phase information output from the delay adjustment unit, and
A polar modulation circuit comprising: a quadrature modulation unit that generates a phase modulation signal in a radio frequency band based on the quadrature signal and outputs the phase modulation signal to the amplification unit. A polar modulation circuit according to any one of claims 1 to 3,
The delay adjustment unit includes a first delay adjustment unit that performs delay adjustment in units of a predetermined operation clock of a digital signal processing unit that constitutes the polar coordinate modulation circuit;
A polar modulation circuit comprising: a second delay adjustment unit that performs delay adjustment in less than the clock unit. The polar modulation circuit according to claim 6,
The second delay adjustment unit is a polar modulation circuit that performs linear interpolation based on a plurality of signal amplitude values after delay adjustment in units of a predetermined operation clock and the delay amount information. A polar coordinate conversion unit that generates an amplitude signal from a baseband orthogonal signal generated by transmission data; and
An amplitude modulation unit that generates an amplitude modulation signal based on the amplitude signal;
A phase modulation unit that generates a phase modulation signal in a radio frequency band based on a signal having at least a phase component of the baseband quadrature signal;
The phase modulation signal is input as an input high-frequency signal, and the amplitude modulation signal is input as a control signal, thereby generating transmission data in a radio frequency band; and
Phase adjustment amount determination for storing phase adjustment amount information for correcting a phase difference between the amplitude signal and the phase signal according to transmission level information indicating the amplitude value of the amplitude signal or the wireless transmission level of the transmission data And
A phase adjustment unit that adjusts the phase of the amplitude signal or the signal having at least a phase component based on the phase adjustment amount information;
A polar modulation circuit. The polar modulation circuit according to claim 8, wherein
Memory that stores predetermined amplitude correction predistortion distortion compensation data and outputs an amplitude correction signal or a phase correction signal to the amplitude signal or the signal having at least the phase component based on the amplitude signal, respectively. Part,
A polar modulation circuit. The polar modulation circuit according to claim 9, wherein
The phase adjustment unit is a polar modulation circuit configured by a multiplication circuit that multiplies the phase adjustment amount information and the phase correction signal. The polar modulation circuit according to claim 9, wherein
The polar modulation circuit having a data table for storing the phase adjustment amount information for each amplitude value of the amplitude signal or the transmission level information. A polar coordinate conversion step for generating an amplitude signal from a baseband orthogonal signal generated by transmission data;
An amplitude modulation step of generating an amplitude modulation signal based on the amplitude signal;
A phase modulation step of generating a radio frequency band phase modulation signal based on a signal having at least a phase component of the baseband quadrature signal;
An amplification step of generating transmission data in a radio frequency band by inputting the phase modulation signal as an input high-frequency signal and inputting the amplitude modulation signal as a control signal;
Delay amount determination for storing delay amount information for correcting a delay difference between the amplitude signal and the phase signal according to transmission level information indicating the amplitude value of the amplitude signal or the wireless transmission level of the transmission data Steps,
A delay adjusting step for giving a delay to the amplitude signal or the signal having at least the phase component based on the delay amount information;
Polar coordinate modulation method comprising:   An integrated circuit on which the polar coordinate modulation circuit according to claim 1 is mounted.   A radio transmission apparatus comprising the polar modulation circuit according to any one of claims 1 to 11 or the integrated circuit according to claim 13.

Images