JP2006331136A - Moving vector detection apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a moving vector detection apparatus for generating an interpolated image, with less unnaturalness caused by the misdetection of a moving vector, by using a single moving vector detection circuit. <P>SOLUTION: The single moving vector detection circuit 21 detects a plurality of moving vector candidates from a correlation detection signal PV11 output from a correlation detection circuit 3, uses a moving vector MV12 one frame before, which is input from a moving vector memory 22, as a reference moving vector and detects the moving vector candidate having a vector direction most close to a vector direction indicated by the reference moving vector as a moving vector. Since the moving vector detection circuit 21 can detect a moving vector having closer correlation in a continuous frame flow, errors in the detection of moving vectors can be reduced. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a motion vector detection device, and in particular, motion vector detection for detecting a motion vector of an input image signal based on a correlation detection result between an input image signal and a delayed image signal obtained by delaying the input image signal by one frame or more. Relates to the device.

  Motion vector information is often used in image quality enhancement processing in television receivers, such as I / P conversion for converting interlaced signals for interlaced scanning into progressive signals for progressive scanning, and frame frequency conversion for image signals.

  FIG. 6 is a block diagram showing an example of a conventional motion vector detection apparatus applied to a frame frequency double speed conversion system. In the figure, an input image signal S11 is input to an image memory 1, where a delayed image signal S12 is output after being delayed by one frame. The delayed image signal S12 is further input to the image memory 2 and further delayed by one frame, whereby an image signal S13 delayed by a total of two frames is output from the image memory 2 with respect to the input image signal S11.

  Three image signals S11, S12, and S13 delayed by one frame are respectively input to the correlation detection circuit 3. Here, the motion vector in the one-frame delayed image signal S12 is converted into the preceding and following frames centered on the target pixel or region. The signal level difference is calculated. Correlation detection signals PV11 composed of the difference value calculated by the correlation detection circuit 3 and the vector information at that time are collectively input to the motion vector detection circuit 4 by the number of calculated combinations.

  FIG. 7 shows the state of motion vector detection. Correlation detection is performed in all moving directions, but in order to simplify the explanation, FIG. 7 shows a state in which the moving object 10 is moving horizontally, and the three horizontal lines are image signals S11 different from each other by one frame. , S12, and S13 represent the same scanning line line (the same applies to FIG. 8). In the correlation detection signal PV11 for the moving object 10 in FIG. 7, the difference value of the pixel on the vector indicated by the thick arrow or the block including the pixel is the smallest.

  Among the correlation detection signals PV11 input to the motion vector detection circuit 4, the one with the smallest absolute value of the difference value (PV11 represented by the thick arrow in FIG. 7) is detected as the motion vector MV1. Is output. In FIG. 6, the interpolated frame generation circuit 5 matches the motion vector MV1 detected by the motion vector detection circuit 4 with the 1 frame delayed image signal S12 between the input image signal S11 and the 1 frame delayed image signal S12. A likely frame is predicted and output as an interpolated frame signal S14. The input image signal S11 and the interpolated frame signal S14 created by predicting a frame that does not originally exist from the movements of the preceding and following frames are supplied to the timing control circuit 6 using the frame frequency conversion image memory and written, and are written. The interpolation frame signal S14 and the input image signal S11 are sequentially read out at a double speed. Therefore, the input image signal S11 is output from the timing control circuit 6 as an image signal S15 having a frequency twice the frame frequency before being input to the system.

  The problem here is motion vector detection in an image as shown in FIG. In FIG. 8, on both sides of the first moving object image that moves in the horizontal direction in the order of a1, a2, and a3, the second moving object image that moves in the horizontal direction in the order of b1, b2, and b3, and c1, If there is a third moving object image that moves in the horizontal direction in the order of c2 and c3, and they have similar colors and similar gradations, The motion vector indicated by 11 is detected from b1 and b3, and the motion vector indicated by 12 is detected from images c1 and c3 for the third moving object image. When the motion vector of the image a2 is detected, the first difference value A between the image a1 and the image a3 and the second difference value B between the image b1 and the image c3 are the same value. May be detected.

  When the frame frequency is increased, if an originally nonexistent frame is predicted based on the motion of the previous and subsequent frames, an unnatural interpolation frame may be generated due to the erroneous detection of the motion vector detection as described above. . Therefore, conventionally, there has been proposed a false detection avoidance plan for detecting a motion vector, in particular, a frame-by-block motion vector by dividing a frame into several blocks (see, for example, Patent Document 1).

  In Patent Document 1, in order to suppress erroneous detection of a motion vector, when one block-unit motion vector is obtained, a difference value calculation between a destination block and a pixel unit is further performed, and the calculation result is set to a certain threshold value or more. A method for suppressing errors in an interpolated image by detecting two types of motion vectors, which are further divided into the following and further detecting motion vectors for an area equal to or greater than a threshold, is disclosed.

JP 2004-31669 A

  However, the conventional motion vector detection device described in Patent Document 1 requires two motion vector search circuits, and reduces erroneous interpolation when there are moving objects with different motions in the block. It does not improve the motion vector detection accuracy.

  The present invention has been made in view of the above points, and provides a motion vector detection device for generating an interpolated image with less unnaturalness caused by erroneous detection of a motion vector using a single motion vector detection circuit. The purpose is to do.

  To achieve the above object, the present invention detects a motion vector of an input image signal based on a correlation detection result between the input image signal and a delayed image signal obtained by delaying the input image signal by one frame or more. A first delay means for delaying an input image signal to obtain one or more delayed image signals different from each other by m frames (m is an integer of 1 or 2) with respect to the input image signal; Correlation detecting means for detecting the correlation between the signal and one or more delayed image signals and outputting the correlation detection result, and among the plurality of motion vector candidates obtained from the correlation detection result, based on the reference motion vector, A motion vector detecting means for detecting a motion vector candidate in one direction as a motion vector, and the motion vector detected by the motion vector detecting means is delayed by one frame, A second delay unit that supplies the motion vector detection unit as a reference motion vector so that a motion vector candidate closest to the vector direction indicated by the reference motion vector can be easily detected as a motion vector by the motion vector detection unit. It is characterized by that.

  In this invention, when the motion vector is detected by the motion vector detection means, the motion vector one frame before detected by the motion vector detection means is used as the reference motion vector, and the vector closest to the vector direction indicated by the reference motion vector Since motion vector candidates in the direction are detected as motion vectors, it is possible to make it easier to detect more correlated motion vectors in a continuous frame flow.

  In order to achieve the above object, according to the present invention, the first delay unit is configured to delay the input image signal by one frame and output a one-frame delayed image signal, and the correlation detection unit includes: In a first range consisting of a horizontal direction h1 pixel (h1 is an integer of 1 or more) and a vertical direction v1 pixel (v1 is an integer of 1 or more) including the target pixel before movement in the one-frame delayed image signal Each pixel includes a horizontal h2 pixel (h2 is an integer of 1 or more) and a vertical v2 pixel (v2 is an integer of 1 or more) including a target pixel that is a candidate for a post-movement position in the input image signal. Each of the signal level differences between the pixels within the second range is output as a correlation detection result.

  In the present invention, since the first delay means outputs only one frame delayed image signal, a simple configuration can be achieved.

  According to the present invention, when a motion vector is detected by the motion vector detection means, the motion vector one frame before detected by the motion vector detection means is set as the reference motion vector, and the motion vector in the vector direction indicated by the reference motion vector is the most. By making it easy to detect motion vector candidates in near vector directions as motion vectors, even if motion vector candidates in several different directions are detected to have almost the same correlation, Since more correlated motion vector candidates in consideration of the temporal flow can be detected as motion vectors, motion vector detection errors can be reduced.

  Next, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 shows a block diagram of a first embodiment of a motion vector detection apparatus according to the present invention applied to a frame frequency double speed conversion system. In the figure, the same components as those in FIG. 6 are denoted by the same reference numerals, and the description thereof is omitted as appropriate. In FIG. 1, a correlation detection circuit 3 receives an input image signal S11, a one-frame delayed image signal S12 from the image memory 1, and a two-frame delayed image signal S13 from the image memory 2, and receives these input image signals. Is used to obtain a plurality of motion vector candidates PV11 that are absolute values of differences in luminance values, for example.

  The plurality of motion vector candidates PV11 are input to the motion vector detection circuit 21. The motion vector detection circuit 21 detects a motion vector MV12 from a motion vector memory 22 to be described later and a motion vector candidate PV11. The motion vector MV11 is detected by the interpolation frame generation circuit 5 and the motion vector. Each is input to the memory 22.

  Since the motion vector memory 22 is configured to output the input motion vector MV11 with a delay of one frame period, when the motion vector MV11 is input to the motion vector memory 22, the motion vector memory MV11 is stored in the motion vector memory 22 until then. Also, the motion vector MV12 detected one frame before is output and input to the motion vector detection circuit 21. During the period when the motion vector MV12 is not yet output from the motion vector memory 22, the motion vector detection circuit 21 detects the motion vector without referring to the motion vector MV12 from the motion vector memory 22.

  The interpolated frame generation circuit 5 aligns the 1-frame delayed image signal S12 with the motion vector MV11 output from the motion vector detection circuit 21, and comes between the input image signal S11 and the 1-frame delayed image signal S12. A frame is predicted and output as an interpolated frame signal S14.

  The timing control circuit 6 using the frame frequency conversion image memory receives the input image signal S11 and the interpolated frame signal S14 as input signals, writes them sequentially in the memory, and then interpolates at twice the speed at the time of writing. The frame signal S14 and the input image signal S11 are sequentially read out. As a result, the input image signal S11 is output as the image signal S15 with the frame frequency converted to double from the timing control circuit 6 using the frame frequency converted image memory.

  Next, the operation of the motion vector detection circuit 21 will be described in more detail. As in the prior art, the correlation detection circuit 3 described above is a pixel in which the motion vector in the one-frame delayed image signal S12 is detected in the three image signals S11, S12, S13 delayed by one frame, or a block divided into several The signal level difference between the preceding and succeeding frames is calculated centering on, and a correlation detection signal PV11 comprising the calculated difference value and the vector information at that time is obtained. The correlation detection signal PV11 is output from the correlation detection circuit 3 as many as the calculated number of combinations and is input to the motion vector detection circuit 21.

  The motion vector detection circuit 21 uses the vector information corresponding to the smallest difference value in the correlation detection signal PV11 as a motion vector. As shown in FIG. 2A and FIG. When the values A and B are substantially equal and different motion vectors can occur to the same extent, there is a possibility that an unnatural motion vector is selected in the moving image flow.

  Therefore, in the present embodiment, the motion vector detection circuit 21 is input from the motion vector memory 22, as indicated by 13 in FIG. 2B, the same pixel detected in the previous frame, or the vicinity of the same block In order to make it easier to select a motion vector in the same direction with reference to the motion vector MV12, a value α that varies depending on the magnitude of the motion vector difference is added to the difference value B of other motion vector candidates. As a result, when several candidates are considered for the motion vector as shown in FIG. 2 (b), the motion vector 14 (MV11) is continuous in the flow of time rather than determining the minimum value as it is. Will be chosen.

  In this way, by using the motion vector MV11 selected by the motion vector detection circuit 21 and generating the interpolation frame by the interpolation frame generation circuit 5, it is possible to reduce erroneous interpolation as compared with the prior art. It is possible to generate an interpolated image with less unnaturalness due to false detection of.

(Second Embodiment)
FIG. 3 shows a block diagram of a second embodiment of a motion vector detection apparatus according to the present invention, applied to a frame frequency double speed conversion system. In the figure, the same components as in FIG. The second embodiment shown in FIG. 3 is different from the first embodiment of FIG. 1 in that the number of frames used for motion vector detection is reduced to two. Thereby, according to the present embodiment, one frame delay image memory can be reduced as compared with the first embodiment, but the detection accuracy is reduced by performing motion prediction only between two frames. .

  In the circuit for outputting the input image signal shown in FIG. 3 at twice the frame frequency as input, the correlation detection circuit 25 receives the input image signal S11 and the 1-frame delayed image signal S12 from the image memory 1 as inputs. Using the input image signals of these two consecutive frames, a correlation detection calculation process similar to the conventional one is performed to obtain a plurality of motion vector candidates PV21.

  The plurality of motion vector candidates PV21 are input to the motion vector detection circuit 26. The motion vector detection circuit 26 detects a motion vector MV21 from a motion vector MV22 and a motion vector candidate PV21 from a motion vector memory 27 described later, and uses the detected motion vector MV21 as an interpolation frame generation circuit 5 and a motion vector memory. 27 respectively.

  Since the motion vector memory 27 is configured to output the input motion vector with a delay of one frame period, when the motion vector MV21 is input, it is detected one frame before the previously held MV21. The obtained motion vector MV22 is output and input to the motion vector detection circuit 26. Note that, during a period in which the motion vector MV22 is not yet stored in the motion vector memory 27, the motion vector detection circuit 26 detects the motion vector without referring to the motion vector MV22 from the motion vector memory 27.

  The interpolated frame generation circuit 5 aligns the 1-frame delayed image signal S12 with the motion vector MV21 output from the motion vector detection circuit 26, and comes between the input image signal S11 and the 1-frame delayed image signal S12. A frame is predicted and output as an interpolated frame signal S24. The timing control circuit 6 using the frame frequency converted image memory receives the input image signal S11 and the interpolated frame signal S24 as input signals, writes them sequentially in the memory, and then interpolates at twice the speed at the time of writing. The frame signal S24 and the input image signal S11 are sequentially read out. As a result, the timing control circuit 6 using the frame frequency converted image memory outputs the input image signal S11 as an image signal S25 in which the frame frequency is doubled.

  Here, in the correlation detection circuit 25, in order to reduce erroneous interpolation due to the small number of frames to be compared, the difference comparison target (target pixel) shown in an ellipse in FIG. 4 and the target pixel are shown. In the range consisting of the peripheral pixel information centered on the pixel, the target pixel and the peripheral pixel information are compared in block units of, for example, 3 × 3 dots, and the correlation between both is obtained to obtain the correlation detection signal PV22.

  In FIG. 4, the blocks BL11 and BL12 each show a correlation range on one line of the one-frame delayed image signal S12, and the blocks BL21, BL22, and BL23 on the same one line as S12 of the input image signal S11. Indicates the range in which correlation is given. In the above description, the block unit is 3 × 3 dots. However, for convenience of illustration, in FIG. 4 and FIG. 5 described later, one circle indicates one dot (one pixel), and the block is on one line. Only shows about. However, this block may be one or more pixels in both the horizontal and vertical directions.

  The correlation detection circuit 25 calculates a signal level difference centering on a pixel of interest for which a motion vector between two input image signals S11 and S12 is desired to be detected or a block divided into several. That is, the correlation detection circuit 25 includes a horizontal direction h1 pixel (h1 is an integer of 1 or more) and a vertical direction v1 pixel (v1 is an integer of 1 or more) including the target pixel before movement in the one-frame delayed image signal S12. A horizontal direction h2 pixel (h2 is an integer of 1 or more) and a vertical direction v2 pixel (including a target pixel that is a candidate for a post-movement position in the input image signal S11) Each of the signal level differences (for example, the absolute value of the difference value of luminance) between each pixel in the second range consisting of v2 is an integer equal to or greater than 1 is output as the correlation detection signal PV22.

  The motion vector detection circuit 26 in FIG. 3 basically uses the vector information corresponding to the smallest difference value in the correlation detection signal PV22 output from the correlation detection circuit 25 as a motion vector. Thus, for one line block BL12 with one frame delayed image signal S12, the difference values C and D between the blocks BL22 and BL23 on the same line of the input image signal S11 as described above become almost the same value. There is a possibility of detection.

  Therefore, in the present embodiment, the motion vector detection circuit 26 finally detects the motion vector MV21 in consideration of the motion vector MV22 detected one frame before from the motion vector memory 27 shown in FIG. That is, as shown in FIG. 5, the motion vector detection circuit 26 selects the motion vector 17 in the same direction with reference to the same pixel detected one frame before or the motion vector 16 (MV22) near the same block. To make it easier, a value β that varies depending on the difference in motion vector is added to the difference value C of other motion vector candidates.

  Thereby, the motion vector detection circuit 26 can detect the motion vector 17 corresponding to the difference value D having a small value by comparing the difference value C + β and the difference value D. As shown in FIG. When several candidates are considered for the motion vector, a motion vector that is continuous in the flow of time is selected rather than determining the minimum value as it is. The motion vector MV21 detected by the motion vector detection circuit 26 in this way is input to the interpolation frame generation circuit 5 and the motion vector memory 27, respectively.

  The motion vector memory 27 outputs a motion vector MV22 held one frame period and detected one frame before the motion vector MV21 and is input to the motion vector detection circuit 26. During a period when there is no motion vector MV22, the motion vector detection circuit 26 detects a motion vector without referring to the motion vector MV22.

  The interpolation frame generation circuit 5 generates an interpolation frame signal S24 according to the information of the motion vector MV21 output from the motion vector detection circuit 26. The input image signal S11 and the interpolated frame signal S24 are input to the timing control circuit 6 and written in the memories in the timing control circuit 6, respectively. As described above, the frame frequency is twice the frame frequency of the input image signal S11. Thus, the interpolated frame signal S24 and the input image signal S11 are sequentially read from the memory at twice the speed at the time of writing, and the image signal S25 having a frame frequency twice that at the time of input is output.

  As described above, according to the present embodiment, similarly to the first embodiment, it is possible to reduce the number of erroneous interpolations as compared with the conventional case, and an interpolation image with less unnaturalness due to erroneous detection of motion vectors can be obtained. In addition to this, since one frame delay image memory can be reduced, an inexpensive and simple configuration can be achieved.

  Of course, the present invention is not limited to the above-described embodiment, and can be applied to other than the frame frequency double speed conversion system.

It is a block diagram of a 1st embodiment of the present invention. FIG. 7 is a diagram showing a comparison between the motion vector detection method in the embodiment of FIG. 1 and a conventional example. It is a block diagram of the 2nd Embodiment of this invention. FIG. 4 is an explanatory diagram of motion vector detection when the embodiment of FIG. 3 is not used. FIG. 4 is an explanatory diagram of motion vector detection when the embodiment of FIG. 3 is used. It is a block diagram of an example of the conventional motion vector detection apparatus. It is conventional motion vector detection explanatory drawing. It is a figure explaining the misdetection which may occur with the conventional motion vector detection apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 2 Image memory 3, 25 Correlation detection circuit 5 Interpolation frame generation circuit 6 Timing control circuit using frame frequency conversion image memory 12, 13, 14, 16, 17 Motion vector 21, 26 Motion vector detection circuit 22, 27 Motion Vector memory S11 Input image signal S12 1 frame delayed image signal S13 2 frame delayed image signal S14, S24 Interpolated frame signal S15, S25 Frame frequency conversion output image signal PV11 Correlation detection signal MV11, MV21 Motion vector MV12, MV22 1 frame delayed motion vector

Claims (2)

In a motion vector detection device that detects a motion vector of an input image signal based on a correlation detection result between the input image signal and a delayed image signal obtained by delaying the input image signal by one frame or more,
First delay means for delaying the input image signal to obtain one or more delayed image signals different from each other by m frames (m is an integer of 1 or 2) with respect to the input image signal;
Correlation detecting means for detecting a correlation between the input image signal and the one or more delayed image signals, and outputting a correlation detection result;
A motion vector detection means for detecting a motion vector candidate in one direction as a motion vector based on a reference motion vector among a plurality of motion vector candidates obtained from the correlation detection result;
Second delay means for delaying the motion vector detected by the motion vector detection means by one frame and supplying the motion vector detection means to the motion vector detection means as the reference motion vector. A motion vector detection apparatus characterized in that the motion vector candidate in the vector direction closest to the vector direction indicated by the reference motion vector is easily detected as the motion vector. The first delay unit is configured to delay the input image signal by one frame and output a one-frame delayed image signal, and the correlation detection unit detects a target pixel before movement in the one-frame delayed image signal. Each pixel in a first range including a horizontal direction h1 pixel (h1 is an integer of 1 or more) and a vertical direction v1 pixel (v1 is an integer of 1 or more), and a post-movement position in the input image signal Between the pixels in the second range including the horizontal direction h2 pixel (h2 is an integer of 1 or more) and the vertical direction v2 pixel (v2 is an integer of 1 or more) 2. The motion vector detection device according to claim 1, wherein each of the signal level differences is output as the correlation detection result.

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