JP2006331086A5 - - Google Patents

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JP2006331086A5
JP2006331086A5 JP2005153877A JP2005153877A JP2006331086A5 JP 2006331086 A5 JP2006331086 A5 JP 2006331086A5 JP 2005153877 A JP2005153877 A JP 2005153877A JP 2005153877 A JP2005153877 A JP 2005153877A JP 2006331086 A5 JP2006331086 A5 JP 2006331086A5
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register
memory
data
contents
failure
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JP2006331086A (en
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CPUの作業領域となるメモリの故障若しくは異常を診断するメモリ診断方法において、診断処理のための複数のレジスタを用意し、前記メモリの内容を転送されたレジスタのデータをビット反転演算してテストデータを生成し、前記テストデータを前記メモリ及びレジスタの間を相互に転送して後、前記複数レジスタの内容の一致、不一致によって前記メモリの故障若しくは異常を診断することを特徴とするメモリ診断方法。 In a memory diagnosis method for diagnosing a failure or abnormality of a memory serving as a work area of a CPU, a plurality of registers for diagnosis processing are prepared, and the data of the register to which the contents of the memory are transferred are subjected to bit inversion operation to test data The memory diagnosis method is characterized in that after the test data is transferred between the memory and the register to each other, a failure or an abnormality of the memory is diagnosed by a match or mismatch of the contents of the plurality of registers. CPUの作業領域となるメモリの故障若しくは異常を診断するメモリ診断方法において、診断処理のための第1レジスタ乃至第3レジスタを具備し、前記メモリの内容を前記第1レジスタに転送し、前記第1レジスタのデータをビット反転演算して前記第2レジスタにセットし、前記第2レジスタのデータを前記メモリに転送し、更に前記メモリのデータを前記第3レジスタに転送し、前記第2レジスタ及び第3レジスタの内容を比較判定1し、不一致の場合に前記メモリの故障を判定することを特徴とするメモリ診断方法。 A memory diagnostic method for diagnosing a failure or abnormality in a memory serving as a work area of a CPU, comprising first to third registers for diagnostic processing, transferring the contents of the memory to the first register, and 1 register data is bit-inverted and set in the second register, the second register data is transferred to the memory, the memory data is further transferred to the third register, the second register and A memory diagnostic method comprising: comparing and determining the contents of a third register, and determining a failure of the memory if they do not match. 前記比較判定1において一致した場合、前記第1レジスタのデータを前記メモリにライトし、更に前記メモリのデータを前記第3レジスタに転送し、前記第3レジスタ及び前記第1レジスタの内容を比較判定2し、不一致の場合に前記メモリの故障を判定する請求項2に記載のメモリ診断方法。 If they match in the comparison determination 1, the data of the first register is written to the memory, the data of the memory is further transferred to the third register, and the contents of the third register and the first register are compared and determined. 3. The memory diagnosis method according to claim 2, wherein a failure of the memory is determined when there is a mismatch. 前記比較判定2において一致した場合、正常として復帰するようになっている請求項3に記載のメモリ診断方法。 The memory diagnosis method according to claim 3, wherein when the comparison / determination 2 coincides, the state is returned as normal. CPUの作業領域となるメモリの故障若しくは異常を診断するメモリ診断方法において、診断処理のための第1レジスタ及び第2レジスタを具備し、前記メモリの内容を前記第1レジスタに転送し、前記第1レジスタのデータをビット反転演算して前記第2レジスタにセットし、前記第2レジスタのデータを前記メモリに転送し、更に前記メモリのデータを前記第1レジスタに転送し、前記第1レジスタ及び前記第2レジスタの内容を比較判定1し、不一致の場合に前記メモリの故障を判定することを特徴とするメモリ診断方法。 A memory diagnostic method for diagnosing a failure or abnormality of a memory serving as a work area of a CPU, comprising a first register and a second register for diagnostic processing, transferring the contents of the memory to the first register, and 1 register data is bit-inverted and set in the second register, the second register data is transferred to the memory, the memory data is further transferred to the first register, the first register and A memory diagnosis method comprising: comparing and determining the contents of the second register, and determining failure of the memory if they do not match. 前記比較判定1において一致した場合、前記第2レジスタのデータを反転演算して前記第1レジスタに記憶し、前記第1レジスタのデータを前記メモリにライトし、更に前記メモリのデータを前記第2レジスタに転送し、前記第1レジスタ及び前記第2レジスタの内容を比較判定2し、不一致の場合に前記メモリの故障を判定する請求項5に記載のメモリ診断方法。 If they match in the comparison determination 1, the data in the second register is inverted and stored in the first register, the data in the first register is written to the memory, and the data in the memory is further stored in the second register. The memory diagnosis method according to claim 5, wherein the memory diagnosis method transfers to a register, compares and determines the contents of the first register and the second register, and determines a failure of the memory when there is a mismatch. 前記比較判定2において一致した場合、正常として復帰するようになっている請求項6に記載のメモリ診断方法。 The memory diagnosis method according to claim 6, wherein when the comparison / determination 2 matches, the memory is returned as normal. CPUの作業領域となるメモリを有し、前記CPU及びメモリの協働により操舵トルク値及び車速に基づいて電流指令値を演算し、前記電流指令値に基づいてステアリング機構に操舵補助力を付与するモータを制御するようになっている電動パワーステアリング装置の制御装置において、診断処理のための複数のレジスタを有し、前記メモリの内容を転送されたレジスタのデータをビット反転演算してテストデータを生成し、前記テストデータを前記メモリ及びレジスタの間を相互に転送して後、前記複数レジスタの内容の一致、不一致によって前記メモリの故障若しくは異常を診断する診断機能を具備したことを特徴とする電動パワーステアリング装置の制御装置。 A memory serving as a work area for the CPU; a current command value is calculated based on a steering torque value and a vehicle speed by cooperation of the CPU and the memory; and a steering assist force is applied to the steering mechanism based on the current command value In a control device for an electric power steering device adapted to control a motor, the control device has a plurality of registers for diagnosis processing, and performs bit inversion operation on the data of the register transferred with the contents of the memory to obtain test data. And a diagnostic function for diagnosing a failure or abnormality of the memory by matching or mismatching of the contents of the plurality of registers after generating and transferring the test data between the memory and the register. Control device for electric power steering device. 前記複数のレジスタが第1レジスタ乃至第3レジスタであり、前記診断機能が、前記メモリの内容を前記第1レジスタに転送し、前記第1レジスタのデータをビット反転演算して前記第2レジスタにセットし、前記第2レジスタのデータを前記メモリに転送し、更に前記メモリのデータを前記第3レジスタに転送し、前記第2レジスタ及び第3レジスタの内容を比較判定1し、不一致の場合に前記メモリの故障と判定するようになっている請求項8に記載の電動パワーステアリング装置の制御装置。 The plurality of registers are a first register to a third register, and the diagnosis function transfers the contents of the memory to the first register, performs bit inversion operation on the data of the first register, and stores the data in the second register. Set, transfer the data in the second register to the memory, further transfer the data in the memory to the third register, compare and determine the contents of the second register and the third register, and if they do not match The control device for the electric power steering apparatus according to claim 8, wherein the memory is determined to be faulty. 前記比較判定1において一致した場合、前記第1レジスタのデータを前記メモリにライトし、更に前記メモリのデータを前記第3レジスタに転送し、前記第3レジスタ及び前記第1レジスタの内容を比較判定2し、不一致の場合に前記メモリの故障を判定するようになっている請求項9に記載の電動パワーステアリング装置の制御装置。 If they match in the comparison determination 1, the data in the first register is written to the memory, the data in the memory is further transferred to the third register, and the contents of the third register and the first register are compared and determined. 10. The control device for an electric power steering apparatus according to claim 9, wherein a failure of the memory is determined when there is a mismatch. 前記複数のレジスタが第1レジスタ及び第2レジスタであり、前記診断機能が、前記メモリの内容を前記第1レジスタに転送し、前記第1レジスタのデータをビット反転演算して前記第2レジスタにセットし、前記第2レジスタのデータを前記メモリに転送し、更に前記メモリのデータを前記第1レジスタに転送し、前記第1レジスタ及び前記第2レジスタの内容を比較判定1し、不一致の場合に前記メモリの故障を判定するようになっている請求項8に記載の電動パワーステアリング装置の制御装置。 The plurality of registers are a first register and a second register, and the diagnosis function transfers the contents of the memory to the first register, performs bit inversion operation on the data in the first register, and stores the data in the second register. When the data of the second register is transferred to the memory, the data of the memory is further transferred to the first register, the contents of the first register and the second register are compared and judged 1, and there is a mismatch 9. The control device for an electric power steering apparatus according to claim 8, wherein a failure of the memory is determined. 前記比較判定1において一致した場合、前記第2レジスタのデータを反転演算して前記第1レジスタに記憶し、前記第1レジスタのデータを前記メモリにライトし、更に前記メモリのデータを前記第2レジスタに転送し、前記第1レジスタ及び前記第2レジスタの内容を比較判定2し、不一致の場合に前記メモリの故障を判定するようになっている請求項11に記載の電動パワーステアリング装置の制御装置。
If they match in the comparison determination 1, the data in the second register is inverted and stored in the first register, the data in the first register is written to the memory, and the data in the memory is further stored in the second register. 12. The control of the electric power steering apparatus according to claim 11, wherein the contents of the first register and the second register are transferred to a register, and the contents of the first register and the second register are compared and determined, and if there is a mismatch, the failure of the memory is determined. apparatus.
JP2005153877A 2005-05-26 2005-05-26 Memory diagnostic method and electric power steering device with the function Pending JP2006331086A (en)

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JP2006331086A5 true JP2006331086A5 (en) 2008-04-17

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* Cited by examiner, † Cited by third party
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JP2009269501A (en) * 2008-05-08 2009-11-19 Nsk Ltd Electric power steering device
JP5151791B2 (en) * 2008-08-07 2013-02-27 日本精工株式会社 Electric power steering device
JP5233506B2 (en) * 2008-08-25 2013-07-10 日本精工株式会社 Electric power steering device
JP5402050B2 (en) * 2009-02-12 2014-01-29 日本精工株式会社 Electric power steering device
JP5441531B2 (en) 2009-07-10 2014-03-12 ヤマハ発動機株式会社 Ship propulsion machine
JP5326889B2 (en) 2009-07-13 2013-10-30 株式会社ジェイテクト Electric power steering device
JP5208872B2 (en) * 2009-07-15 2013-06-12 日立オートモティブシステムズ株式会社 Memory diagnostic device for vehicle equipment control device
JP5338544B2 (en) 2009-07-28 2013-11-13 株式会社ジェイテクト Electric power steering device

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JPS59107494A (en) * 1982-12-10 1984-06-21 Fujitsu Ltd Monitor system for sound memory fault
JPS6165562A (en) * 1984-09-05 1986-04-04 Fujitsu Ltd Memory checking system
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