JP2006324565A - Semiconductor device and method for manufacturing same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an SiC power device that achieves a low resistance wiring and a via plug with a low resistance and a high aspect ratio. <P>SOLUTION: This semiconductor device comprises: a silicon carbide semiconductor substrate 11; a source electrode (ohmic electrode) 15 formed on the main surface of the silicon carbide semiconductor substrate 11; a via plug 25 or wiring 21 to be used for electric connection to the source electrode 15; and a drain electrode (ohmic electrode) 22 formed on the back of the silicon carbide semiconductor substrate 11. A material with a melting point higher than the sintering temperature of the drain electrode 22 is used for the via plug 25 or wiring 21, or tungsten or copper is preferably used for the plug or wiring. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a via plug and wiring structure of a semiconductor device, in particular, a power device, and a manufacturing method thereof.

  As the momentum for protecting the global environment increases year by year, the development of electric vehicles is being accelerated in favor of preferential measures for low-emission vehicles. Electric vehicles are divided into electric cars and hybrid cars due to the positioning of the electric power section, and the widespread use of electric cars solves many problems such as miniaturization and high performance of the power supply section, improvement of drive mechanism, and maintenance of charging infrastructure. is necessary. Semiconductor power devices are one of the key devices used in electric vehicles, and are extremely important as a platform technology for a low-pollution society. The device characteristics required for electric devices by electric vehicles are high breakdown voltage, low loss, high heat resistance, and the like. In addition, since the car is a limited space, the device itself is also required to be downsized.

  Against this background, silicon carbide (SiC) materials have superior physical properties such as dielectric breakdown voltage, thermal conductivity, saturation drift speed, and forbidden band, compared to silicon (Si), with high breakdown voltage, low loss, and fast response. It is highly expected as a material for realizing high heat-resistant power devices, and innovation from Si semiconductor power devices to SiC semiconductor power devices is being promoted. For example, the heat resistance during operation of a device made of Si is about 150 ° C., whereas SiC has a wide gap and is about 300 ° C. In general, the breakdown electrolysis strength of SiC semiconductors is 7 times stronger than that of Si semiconductors. Therefore, when forming the same vertical MOS device structure, the drift layer necessary to maintain the breakdown voltage must be thin. Therefore, it is considered to be a low-loss element.

  Developments such as miniaturization of elements and reduction of wiring resistance are progressing toward the realization of low-loss elements utilizing the characteristics of SiC semiconductors. FIG. 3 shows a cross section of a unit unit of a general MOS device structure in a SiC semiconductor power device.

In FIG. 3, 11 is a silicon carbide semiconductor substrate, 12 is a p-type impurity region (base region) formed by ion-implanting p-type impurities into a predetermined region of the surface layer portion of the silicon carbide semiconductor substrate, and 13 is a p-type impurity. An n-type impurity region (source region) formed by ion-implanting an n-type impurity into a predetermined region of the surface layer portion of the impurity region 12, 14 is an electrical connection between the p-type impurity region 12 and the source electrode (ohmic electrode) 15. This is a p-type impurity region (p + contact layer) for making a positive contact. 16 is a gate insulating film made of SiO ₂ or the like formed on the substrate, 17 is a gate electrode formed on the gate insulating film 16, and 18 is an interlayer insulation for ensuring insulation between the source electrode 15 and the gate electrode 17. Films 24 and 20 are each a via plug formed to integrate the element and electrically connect the source electrode 15 to the lead frame, and wiring, and 22 is a drain electrode formed on the back surface of the semiconductor substrate 11. (Ohmic electrode). Here, the silicon carbide semiconductor substrate is a semiconductor substrate having at least a portion of silicon carbide, and may include, for example, silicon carbide epitaxially grown on a substrate made of silicon carbide, or made of Si. You may have the silicon carbide heteroepitaxially grown on the board | substrate. Of course, the substrate itself made of silicon carbide may be used.

  An example of a method for forming the above-described conventional SiC-MOS device is shown in FIG. In the conventional forming method, the upper wiring is formed after the back surface electrode is formed.

  First, as shown in FIG. 4A, a p-type impurity region 12, an n-type source region 13, a p-type impurity region 14, a gate oxide film 16, a gate electrode 17, and a source electrode 15 are formed on a silicon carbide semiconductor substrate 11. To do. Thereafter, the back electrode 22 is formed as shown in FIG. 4B, and then the interlayer insulating film 18 is formed as shown in FIG. 4C. Next, as shown in FIGS. 5A and 5B, a via hole 23 is formed in the interlayer insulating film 18 using a mask 19. Then, by depositing aluminum (Al), the via plug 24 and the upper wiring formation 20 are performed to form the wiring electrode 20 (FIG. 5C).

  The source electrode 15 and the drain electrode 22 of the ohmic electrode react, for example, at the interface with silicon carbide when silicide is formed when nickel (Ni) is formed on a silicon carbide semiconductor substrate and then heat-treated at a high temperature, for example, about 1000 ° C. It is formed by doing.

  The via plug region and the upper wiring are made of Al which is advantageous in terms of conductivity, wire bonding, workability, and cost.

However, when Al is used, diffusion (electromigration) occurs due to the interaction between Al atoms in the wiring and electrons passing through the wiring film during operation, and voids occur at about 200 ° C or higher, and hillocks occur at about 300 ° C or higher. A minute protrusion called is generated, which leads to a failure such as disconnection or short circuit between wirings. Therefore, ensuring the heat resistance of 300 ° C or higher during operation, which is required for SiC power devices, is an issue. As a method for realizing high heat resistance of 300 ° C or higher, for example, between an electrode and a SiC substrate. Prior art employing a diffusion blocking layer is shown. According to this, in the ohmic electrode structure having an Al wiring on the SiC substrate, the electrode piece or the heating reaction against the phenomenon that Al atoms of the wiring Al piece diffuse through the electrode film piece and the heating reaction layer at a high temperature. It is said that durability at high temperature is improved by providing an Al diffusion blocking layer between the layer and the wiring Al piece (see, for example, Patent Document 1).
JP 2004-111596 A

  However, in the manufacturing method in which the back electrode formation described above is formed before the upper wiring formation, the substrate resistance cannot be reduced. This is because, in order to reduce resistance during operation, the silicon carbide semiconductor substrate 11 serving as a resistor needs to be thinned. However, if the substrate is thin during element formation, problems such as substrate cracking and substrate warping occur. In order to solve this problem, it is conceivable to form a backside ohmic electrode after thinning the substrate by backside polishing or the like after element formation and upper wiring formation in a thick substrate state. When forming an ohmic electrode of SiC, a high-temperature sintering of about 1000 ° C is essential, but if an Al-based material with a melting point of about 660 ° C is used for the upper wiring and via plug, it cannot withstand the high-temperature sintering. There is a problem.

  In addition, the SiC semiconductor power device as described in Patent Document 1 can cope with a high temperature operation of about 300 ° C., but includes a process including substrate polishing for realizing the above-described further low resistance required for the power device in the future. Cannot be constructed, and the process is complicated.

  In addition, via plugs require high aspect ratios for miniaturization of devices, but when via plugs have a diameter of 1 μm or less, when Al material is used as the wiring material, the thin wiring part formed by migration is used. There is a problem that disconnection occurs and contact failure occurs.

  An object of the present invention is to provide a power device having a low on-resistance by solving the problems related to the heat resistance of the wiring and via plug and the realization of a high aspect ratio.

  In order to solve the above problems, in the semiconductor device of the present invention, a first ohmic electrode on a main surface of a silicon carbide semiconductor substrate, and a via plug or wiring for making electrical connection with the first ohmic electrode; And a second ohmic electrode on the back surface, and the via plug or the wiring is made of a material having a melting point higher than a sintering temperature of the second ohmic electrode. As a result, the deterioration of the via plug and the wiring when the sintering temperature necessary for forming the ohmic electrode can be reduced, so that the via plug and the wiring can be formed before the ohmic electrode is formed.

  A first conductivity type semiconductor region and a second conductivity type semiconductor region are formed inside the first conductivity type semiconductor region on the main surface side of the silicon carbide semiconductor substrate, and the second conductivity type semiconductor region is formed. An insulating film provided on the silicon carbide semiconductor substrate so as to have at least a part of the opening; and a third electrode formed on the insulating film, wherein the first ohmic electrode is the second ohmic electrode. It is preferable to be in contact with a conductive semiconductor region. By using such a configuration, a SiC power device such as a MOS-FET can be realized.

  The second ohmic electrode formed on the back surface preferably contains nickel, and the melting point of the material used for the via plug and the wiring is preferably equal to or higher than the sintering temperature for forming the second ohmic electrode. Specifically, it is preferably 1000 ° C. or higher. As a result, nickel silicide having high heat resistance and low resistance can be used as the second ohmic electrode, and the via plug and the wiring can be formed even at a temperature of about 1000 ° C., which is a temperature necessary for forming the second ohmic electrode. Since deterioration can be reduced, a via plug and a wiring can be formed before the ohmic electrode is formed.

  When the sintering temperature for forming the second ohmic electrode can be further reduced, the selection range of materials used for the via plug and the wiring is expanded, and a material having a lower melting point can be selected. For example, when the sintering temperature for forming the second ohmic electrode can be lower than 800 ° C., the material used for the via plug and the wiring may be selected from materials having a melting point of 800 ° C. or higher.

  Furthermore, it is preferable that at least one of the via plug or the wiring is mainly composed of tungsten or copper. Here, the main component indicates that the composition content is more than 50%. For example, when the via plug or the wiring is made of tungsten containing silicon, 50% or more of tungsten is contained with respect to the entire composition. This makes it possible to reduce the degradation of the via plug and wiring when the sintering temperature necessary for forming the ohmic electrode is reached, so that the via plug and wiring can be formed before the ohmic electrode is formed, and the low resistance via plug and wiring are formed. Can be realized. In addition, when tungsten or copper is used for the via plug, it can cope with a high aspect ratio and can be miniaturized.

  In order to solve the above problems, in the method for manufacturing a semiconductor device of the present invention, a via plug or wiring is formed on the main surface of the silicon carbide semiconductor substrate, and then an ohmic electrode is formed on the back surface side. This makes it possible to form an ohmic electrode after the substrate is thinned by polishing or the like after the wiring is formed, and the substrate that becomes a resistor during operation can be thinned, so that the resistance can be reduced.

  Further, a first conductive type semiconductor region on the main surface side of the silicon carbide semiconductor substrate, a second conductive type semiconductor region inside the first conductive type semiconductor region, and at least a part of the second conductive type semiconductor region An insulating film provided on the silicon carbide semiconductor substrate so as to have an opening, and a third electrode formed on the insulating film, wherein the first electrode is a semiconductor region of the second conductivity type. It ’s good to be in contact with. By using such a configuration, a SiC power device such as a MOS-FET can be realized.

  Furthermore, it is preferable that after forming the via plug or the wiring on the main surface of the silicon carbide semiconductor substrate, a part of the silicon carbide semiconductor substrate is removed from the back surface side and the substrate is processed thinly. This makes it possible to reduce the resistance because the substrate serving as a resistor during operation can be made thin while avoiding problems due to substrate cracking and substrate warpage during element formation. In addition, it is preferable that the silicon carbide semiconductor substrate is thinly processed from the back side before the first ohmic electrode is formed on the silicon carbide semiconductor. Thereby, the board | substrate used as a resistor at the time of operation | movement can be made thin.

  According to the present invention, a via plug or a wiring made of a material having a melting point higher than the heat treatment temperature at the time of forming the ohmic junction electrode on the back surface of the semiconductor is formed on the surface of the semiconductor device, so that the via plug and the wiring are formed before the ohmic electrode is formed. Therefore, a low resistance device can be obtained.

  Further, the on-resistance can be reduced by a method of polishing the substrate after forming the via plug and the wiring to form the back electrode.

  Hereinafter, embodiments (examples) of the present invention will be described. In the following, the structure and manufacturing method of a vertical MOSFET using a silicon carbide semiconductor substrate will be described as an example.

  In the structure of the semiconductor device of the present invention, the via plug and the upper wiring are made of a material having a melting point of 1000 ° C. or higher, for example, tungsten, unlike conventional Al.

Below, the manufacturing method of the semiconductor device of this invention is demonstrated. First, as shown in FIG. 1A, a p-type impurity region (p-type base region) 12, an n-type source region 13, a p-type impurity region (p + contact layer) 14, a gate oxide film are formed on a silicon carbide semiconductor substrate 11. 16, a gate electrode 17 and a source electrode 15 are formed. Up to this point, the configuration is the same as that described in the prior art. Next, SiO ₂ to be the interlayer insulating film 18 is formed by CVD. The thickness of the interlayer insulating film 18 is desirably 0.5 to 5 μm. As a method for forming the interlayer insulating film, a thin film process other than CVD, such as a sputtering method or a vacuum evaporation method, can be used.

Next, as shown in FIGS. 1B and 1C, a resist mask 19 and the like are formed, and dry etching is performed using a gas such as CF ₄ . Etching is performed, for example, with 20 sccm of CF ₄ and a power of 500 W. Then, by performing the dry etching on the interlayer insulating film 18, for example, an opening having a diameter of about 1 μm is formed. After the opening is formed, the resist is removed with acetone or the like to form the via hole 23 shown in FIG.

Subsequently, as shown in FIG. 2A, after forming the via hole 23, in order to form the via plug 25 and the wiring 21, tungsten, a mixed gas of SiH ₄ and WF ₆ or a mixed gas of WF ₆ and H ₂ is used. Alternatively, a conductive film containing tungsten is formed by CVD. These films can be formed by using a thin film process such as sputtering other than CVD, and the present invention is not limited to a tungsten film formed by CVD.

  Next, as shown in FIG. 2B, the back surface of the SiC substrate 11 is polished with a diamond slurry abrasive or the like. As the polishing means, dry etching or the like can be used in addition to polishing using an abrasive containing diamond.

  Finally, as shown in FIG. 2C, in order to form the ohmic electrode 22 to be the back electrode, Ni having a thickness of 0.2 μm is formed by vapor deposition. After forming the Ni layer, in order to ensure ohmic connection, sintering is performed at 1000 ° C. for 1 minute while flowing Ar at 1000 sccm. Sintering can be performed at about 1000 ° C. to achieve ohmic connection, and the back electrode can be formed by various thin film processes such as CVD, sputtering, and vacuum deposition, as well as plating, coating, It can also be implemented by appropriately selecting conditions from methods such as construction.

  In the semiconductor device according to the present embodiment manufactured through the above process, a tungsten-based material having a melting point higher than the sintering temperature of the back ohmic electrode is selected as the via plug and the wiring. No significant change such as melting was observed in the via plug and the wiring portion.

  A comparative example for the above-described embodiment will be described. As a comparative example, a method for manufacturing a vertical MOSFET using a silicon carbide semiconductor substrate will be described below.

  The manufacturing process of the MOSFET based on this comparative example is basically the same as the embodiment shown in FIGS. 1 and 2, except that aluminum (Al) is used instead of tungsten as the wiring and via plug. . Therefore, a process for forming a mask on the interlayer insulating film, forming a via hole by etching using the mask, and thereafter removing the resist mask is the same as that of the first embodiment described above. a) to (c).

In this comparative example, as the next step of FIG. 1C, wiring and via plugs are formed of Al on the upper and lower sides and the side of the interlayer insulating film 18. The interlayer insulating film 18 is formed by CVD to a thickness of 1.5 μm, and then a resist mask 19 and the like are formed on the interlayer insulating film 18 to etch the interlayer insulating film 18 having a thickness of 1.5 μm. I do. The dry etching used at this time is performed with 20 sccm of CF ₄ and a power of 500 W, thereby forming a via hole 23. The via hole diameter is 1 μm.

  The Al wiring is formed with a thickness of 3 μm on the interlayer insulating film 18 by vapor deposition. At this time, a via plug is also formed of Al in the via hole 23 by vapor deposition. In forming the wiring and via plug, first, a resist mask is applied, and wet etching is performed by heating a mixed acid containing phosphoric acid as a main component to 40.degree. Thereafter, sintering is performed at 350 ° C. for 30 minutes to improve the adhesion of the Al wiring.

  Next, a resist mask or the like is applied, dry etching is performed, and unnecessary portions of the wiring are removed by etching. Then, backside polishing is performed with a diamond slurry abrasive, and the substrate is polished to a half thickness.

  Finally, Ni having a film thickness of 0.2 μm is formed on the back surface by vapor deposition. In order to ensure an ohmic connection, sintering is performed at 950 ° C. for 1 minute while flowing Ar at 1000 sccm.

  In the production of the comparative example described above, after the sintering, the Al wiring is melted, and the Al wiring is eluted, so that it cannot be used as a semiconductor device. Further, in order to prevent melting of the Al wiring, the sintering temperature may be suppressed to 400 ° C. or lower. However, in this case, the ohmic junction on the back surface cannot be obtained, and the on-resistance of the power device is extremely increased.

  As can be seen from the above embodiments and comparative examples, by using tungsten as the via plug and the wiring material, high-temperature sintering, which is impossible with conventional aluminum wiring, is possible. By realizing high-temperature sintering, a silicide compound of the electrode material is formed, and an ohmic connection can be secured. This makes it possible to form a low-resistance SiC ohmic electrode and realize a high-performance SiC semiconductor device. . In addition, even when the aspect ratio of the via plug is increased with the miniaturization of the element, the migration of the tungsten material is smaller than that of the aluminum material, so that disconnection hardly occurs when forming a plug with a small diameter, and a high aspect ratio via plug can be obtained. And good contact is obtained.

  It is also possible to manufacture a device using copper (Cu) as a via plug and a wiring material by the same method. In order to form via plugs and wiring, a Cu film is formed by CVD. It is also possible to use a thin film process such as sputtering other than CVD for forming the Cu film, and the present invention is not limited to the Cu film formed by CVD film formation. Substrate polishing and back electrode formation after film formation can be realized by a manufacturing method similar to that for tungsten.

  In the description of the present embodiment, the case where the material of the via plug and the wiring is made of tungsten and copper as 100% has been described. However, the present invention is not limited to this, and includes these as the main components, and from the sintering temperature of the back electrode If the melting point is high, the same effect is obtained.

  Moreover, although the case where the material of the back electrode is Ni has been described, the present invention is not limited to this, and any electrode material capable of obtaining an ohmic junction with respect to silicon carbide has the same effect as the present embodiment.

  In this embodiment, a 4H—SiC (0001) substrate is used as the silicon carbide semiconductor substrate and the Si surface is the main surface. However, the silicon carbide semiconductor substrate may be a semiconductor substrate having at least a portion of silicon carbide. For example, the same effect as in the present embodiment is obtained, and even if the C surface is used as the main surface, the same effect as in the present embodiment is obtained. Furthermore, the substrate is not limited to the (0001) plane, and may be a substrate having another crystal plane as a main surface, or may be another polytype typified by 6H—SiC or 3C—SiC.

  As described above, according to the semiconductor device of the present invention, the problem with respect to the heat resistance of the wiring and the via plug can be solved, and a semiconductor power device with high heat resistance and low on-resistance can be realized.

  The semiconductor device of the present invention is capable of high heat resistance operation and can reduce the on-resistance. Therefore, the semiconductor device is not particularly limited. For example, by applying it to a semiconductor power device, the semiconductor device is smaller than conventional and has less energy loss. Small devices can be realized.

Manufacturing process diagram of semiconductor device according to an embodiment of the present invention Manufacturing process diagram of semiconductor device according to an embodiment of the present invention Sectional drawing which shows the structure of the conventional semiconductor device typically Manufacturing process diagram of conventional semiconductor devices Manufacturing process diagram of conventional semiconductor devices

Explanation of symbols

11 Silicon carbide semiconductor substrate 12 p-type impurity region (base region)
13 n-type impurity region (source region)
14 p-type impurity region (P + contact layer)
15 Source electrode (ohmic electrode)
16 Gate oxide film 17 Gate electrode 18 Interlayer insulating film 19 Mask 20 Al wiring 21 Tungsten wiring 22 Drain electrode (ohmic electrode)
23 via hole 24, 25 via plug

Claims (7)

A silicon carbide semiconductor substrate; a first ohmic electrode formed on a main surface of the silicon carbide semiconductor substrate; a via plug or a wiring for establishing electrical connection with the first ohmic electrode; and the silicon carbide semiconductor substrate A semiconductor device, wherein the via plug or the wiring is made of a material having a melting point higher than the sintering temperature of the second ohmic electrode. A first conductivity type semiconductor region and a second conductivity type semiconductor region inside the first conductivity type semiconductor region are formed on a main surface side of the silicon carbide semiconductor substrate, and the second conductivity type semiconductor is formed. An insulating film provided on the silicon carbide semiconductor substrate so as to have an opening in at least a part of the region; and a third electrode formed on the insulating film, wherein the first ohmic electrode includes the first ohmic electrode The semiconductor device according to claim 1, wherein the semiconductor device is in contact with the semiconductor region of the second conductivity type. The semiconductor device according to claim 1, wherein the second ohmic electrode includes nickel. 4. The semiconductor device according to claim 1, wherein at least one of the via plug and the wiring contains tungsten or copper as a main component. 5. Forming a first ohmic electrode on a main surface of the silicon carbide semiconductor substrate and forming a via plug or wiring for making electrical connection with the first ohmic electrode; and forming a via plug or wiring on the back surface of the silicon carbide semiconductor substrate. And a step B of forming an ohmic electrode. Forming a first conductive type semiconductor region on the main surface side of the silicon carbide semiconductor substrate and a second conductive type semiconductor region inside the first conductive type semiconductor region; and the second conductive type. A process D for forming an insulating film so as to have an opening in at least a part of the semiconductor region of the mold, and a process E for forming a third electrode on the insulating film. 6. The method of manufacturing a semiconductor device according to claim 5, wherein the step B is performed after the step. 7. A part of the substrate is removed from the back side of the silicon carbide semiconductor substrate after Step C, Step D, Step E and before Step B, and the substrate is thinned. The manufacturing method of the semiconductor device of description.

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