JP2006324267A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device where a power amplifier preventing destruction by counter electro-motive force, which occurs in an inductor without deterioration of an amplification characteristic, and a power amplifier bias circuit are realized. <P>SOLUTION: A diode 9a is connected to a bias line 5 connecting a collector terminal and a power terminal 6 of a bipolar transistor 2 so that an anode comes to a collector terminal-side. When runaway starts in a certain cell, the diode 9a clips counter electromotive voltage so as to lower it. Thus, large voltage on the bipolar transistor 2 is suppressed. In a stage where runaway does not occur, loss by a resistance component is eliminated in a course supplied to a base terminal and consequently, conventional deterioration of output power at the time of high output is suppressed. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device such as a power amplifier having an amplification stage using, for example, a heterobipolar transistor and a bias circuit for the power amplifier.

  In recent years, with the development of communication equipment, the demand for high-output and high-frequency semiconductor devices has increased significantly. In particular, mobile phones are battery-driven for high-output operations and long-time calls. An output semiconductor device is required. That is, there is a demand for a high-output semiconductor device that minimizes power loss inside the semiconductor and efficiently converts applied DC power into high-frequency power.

  In recent years, field effect transistors (FETs) using GaAs semiconductors have been widely used as transistors for high-power semiconductor devices that meet such demands. Recently, bipolar transistors (using heterojunctions of compound semiconductors) Heterojunction Bipolar Transistor (hereinafter abbreviated as HBT) (see, for example, Patent Document 1) has attracted attention as a transistor for a high-power semiconductor device because of its excellent high-frequency characteristics and high-current drive capability.

A semiconductor device using the high output bipolar transistor as described above will be described below.
FIG. 10 is a circuit diagram showing a configuration example of a conventional semiconductor device using a high output bipolar transistor. As shown in FIG. 10, the input terminal 1 is connected to the base terminal of the bipolar transistor Q (1) 2, and the collector terminal of the bipolar transistor Q (1) 2 is connected to a line 5 through which only a DC signal passes. A bias voltage is applied from the power supply terminal 6, and the emitter terminal of the bipolar transistor Q (1) 2 is connected to the ground (GND). The high frequency signal is input from the input terminal 1, amplified by the bipolar transistor Q (1) 2, and output from the output terminal 7. The capacitor 8 is connected to short-circuit to GND so that the amplified high frequency signal does not enter the power supply terminal 6.

In this case, it is possible to increase the bandwidth by grounding with a line having a characteristic wavelength with a length of 1/4 wavelength (thin line), but the thickness of the conductor forming the pattern is 18 μm with glass epoxy or Teflon substrate. In the case of a thin film pattern on a ceramic substrate or the like, there are only a few μm. Therefore, in the case of a circuit through which a large current flows, care must be taken not to burn the pattern. In these situations, the lower the characteristic impedance, the greater the effect of the capacitor.
JP-A-7-7014

  However, in the conventional semiconductor device having the circuit configuration as described above, if the collector terminal voltage is vigorously turned on and off by, for example, digital modulation, the amplifying transistor may be broken. That is, when the current flowing through the inductor is suddenly stopped, a high counter electromotive voltage is generated in the inductor, and when the counter electromotive voltage exceeds the maximum rating of the transistor, the transistor is broken.

  The present invention solves the above-described conventional problems, and can realize a power amplifier and a power amplifier bias circuit capable of preventing destruction due to a counter electromotive voltage generated in an inductor without deterioration of amplification characteristics. Provided is a semiconductor device.

  In order to solve the above-described problems, a semiconductor device according to claim 1 of the present invention has a base terminal of a bipolar transistor connected to an input terminal, a collector terminal connected to an output terminal, and an emitter terminal connected to ground. A semiconductor device including a circuit in which the collector terminal is connected to a power supply terminal through a line through which only a DC signal passes, the cathode of a diode characteristic circuit being connected to the power supply terminal side of the line, and the collector terminal of the line The anode of the diode characteristic circuit is connected to the side.

  According to a second aspect of the present invention, in the semiconductor device, the base terminal of the bipolar transistor is connected to the input terminal, the collector terminal is connected to the output terminal, the emitter terminal is connected to the ground, and the collector terminal is connected to the DC signal. A semiconductor device including a circuit connected to a power supply terminal through a line through which only the diode passes, the cathode of the diode characteristic circuit and one end of the resistor are connected, and the other end of the resistor is connected to the power supply terminal side of the line The anode of the diode characteristic circuit is connected to the collector terminal side of the line.

  According to a third aspect of the present invention, there is provided a semiconductor device having a base terminal of a bipolar transistor connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a DC signal. A semiconductor device including a circuit connected to a power supply terminal through a line through which only the diode passes, wherein a plurality of diode characteristic circuits are connected in series in the same polarity direction, and the diode characteristic circuit in the foremost stage is connected to the power supply terminal side of the line. The cathode is connected, and the anode of the diode characteristic circuit at the last stage is connected to the collector terminal side of the line.

  According to a fourth aspect of the present invention, there is provided a semiconductor device having a base terminal of a bipolar transistor connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a DC signal. A semiconductor device including a circuit connected to a power supply terminal through a line that only passes through, connecting all cathodes of a plurality of diode characteristic circuits to the power supply terminal side of the line, and the collector terminal side of the line All the anodes of a plurality of diode characteristic circuits are connected.

  According to a fifth aspect of the present invention, there is provided a semiconductor device having a bipolar transistor having a base terminal connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a DC signal. A semiconductor device including a circuit connected to a power supply terminal through a line through which only the diode passes, the cathode of a diode characteristic circuit is connected to the power supply terminal side of the line, and the diode characteristic circuit is connected to a collector terminal of the bipolar transistor The anode is connected.

  In the semiconductor device according to claim 6 of the present invention, the base terminal of the bipolar transistor is connected to the input terminal, the collector terminal is connected to the output terminal through a resistor, the emitter terminal is connected to the ground, and the resistor and the A semiconductor device including a circuit in which a connection point with an output terminal is connected to a power supply terminal through a line through which only a DC signal passes, the cathode of a diode characteristic circuit being connected to the power supply terminal side of the line, and the bipolar transistor The anode of the diode characteristic circuit is connected to the collector terminal.

  According to a seventh aspect of the present invention, there is provided a semiconductor device having a bipolar transistor having a base terminal connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a DC signal. 6. A semiconductor device including a circuit connected to a power supply terminal through a line through which only a diode passes, comprising the circuit configuration of the connection of the diode characteristic circuit according to claim 1 and the connection of the diode characteristic circuit according to claim 5. Features.

  The semiconductor device according to an eighth aspect of the present invention is the semiconductor device according to any one of the first to seventh aspects, wherein the bipolar transistor circuit includes a plurality of bipolar transistors connected in parallel. It is characterized by comprising.

  A semiconductor device according to claim 9 of the present invention is the semiconductor device according to any one of claims 1 to 8, wherein the bipolar transistor is a heterojunction bipolar transistor. To do.

A semiconductor device according to a tenth aspect of the present invention is the semiconductor device according to any one of the first to ninth aspects, wherein the line is a quarter wavelength line. To do.
A semiconductor device according to an eleventh aspect of the present invention is the semiconductor device according to any one of the first to tenth aspects, wherein the diode characteristic circuit uses a heterojunction bipolar transistor and a base terminal thereof. And a collector terminal connected to each other.

  A semiconductor device according to claim 12 of the present invention is the semiconductor device according to any one of claims 1 to 10, wherein the diode characteristic circuit uses a heterojunction bipolar transistor, and a base terminal thereof. And an emitter terminal connected to each other.

  A semiconductor device according to claim 13 of the present invention is the semiconductor device according to any one of claims 1 to 10, wherein the diode characteristic circuit includes a collector layer and a base layer of a heterojunction bipolar transistor. And the collector layer of the diode characteristic circuit is made common with the collector layer of the bipolar transistor.

  A semiconductor device according to a fourteenth aspect of the present invention is the semiconductor device according to any one of the first to thirteenth aspects, wherein the diode characteristic circuit has two different potential barriers. It is characterized by that.

  As described above, by connecting the diode characteristic circuit in parallel with the bias line connecting the collector terminal and the power supply terminal of the bipolar transistor so that the anode is on the collector terminal side, a large back electromotive voltage is applied to the bias line. When generated, the back electromotive voltage is clipped by a diode characteristic circuit, so that a large voltage can be prevented from being applied to the bipolar transistor.

  As described above, according to the present invention, for example, when a runaway starts in a certain cell and a large back electromotive voltage is generated in the bias line, the back electromotive voltage is lowered by the diode characteristic circuit and a large voltage is applied to the bipolar transistor. In order to prevent loss due to resistance components in the path supplied to the base terminal at the stage where runaway has not occurred, the output power at the time of high output will not be reduced as a result. can do.

  Therefore, it is possible to realize a power amplifier and a power amplifier bias circuit that can eliminate the deterioration of the amplification characteristics due to the base resistance as in the prior art and prevent the breakdown due to the counter electromotive voltage generated in the inductor.

Hereinafter, a semiconductor device showing an embodiment of the present invention will be specifically described with reference to the drawings.
(Embodiment 1)
A semiconductor device according to the first embodiment of the present invention will be described.

  FIG. 1 is a circuit diagram showing a configuration of the semiconductor device according to the first embodiment. In FIG. 1, a bipolar transistor Q (1) 2 for signal amplification having an NPN conductivity type is connected to an input terminal 1 to which a high frequency (RF) signal is input. The input terminal 1 is configured to receive a DC bias and an RF signal for the base terminal of the bipolar transistor Q (1) 2. The bias of the collector terminal of the bipolar transistor Q (1) 2 is applied from the power supply terminal 6 via the line 5 through which only the DC signal passes. The emitter terminal of the bipolar transistor Q (1) 2 is connected to the ground (GND).

  Here, the capacitor 8 short-circuits the RF signal to GND. For example, the length of the line 5 through which only the DC signal passes is set to a quarter wavelength of the RF signal input from the input terminal 1. Thus, the second harmonic, which is a parasitic harmonic of the signal amplified by the bipolar transistor Q (1) 2, can be short-circuited. A diode characteristic circuit 9a is connected in parallel to the line 5 through which only the DC signal passes.

  As shown in FIG. 1, the diode characteristic circuit 9 a connects the anode to the collector terminal side of the line 5 and connects the cathode to the power supply terminal side of the line 5, so that the RF signal input from the input terminal 1 suddenly increases. If the counter electromotive voltage generated at both ends of the line 5 through which only the DC signal passes increases when a current suddenly flows on the collector terminal side, the current flows through the diode characteristic circuit 9a and the counter electromotive voltage Can be suppressed.

In this embodiment, the bipolar transistor is described, but it goes without saying that the same effect can be obtained even in a heterojunction bipolar transistor.
Needless to say, the same effect can be obtained by using a diode configuration in which the collector terminal and the base terminal of the heterobipolar transistor are connected as the diode characteristic circuit.

Needless to say, the diode characteristic circuit can achieve the same effect even with a diode using a Schottky junction.
In the present embodiment, the case where the RF input signal changes suddenly is described. Needless to say, the same effect can be obtained even when the base bias voltage changes suddenly, for example.

In the present embodiment, the case where the RF input signal changes abruptly is described, but it goes without saying that the same effect can be obtained even when the voltage of the power supply terminal 6 changes abruptly, for example.
(Embodiment 2)
A semiconductor device according to a second embodiment of the present invention will be described.

  FIG. 2 is a circuit diagram showing a configuration of the semiconductor device according to the second embodiment. In FIG. 2, the base terminals of the heteroamplifiers Q (1) 2, Q (2) 3, Q (3) 4 for signal amplification whose conductivity type is the NPN type are input to the respective base terminals. Connected to the input terminal 1 connected in common. The reason why such a configuration is adopted is that the collector operating current is limited in a single HBT, so that a power amplifier having a large output is generally connected in parallel so that the collector current can be increased.

  In the present embodiment, the bias of the collector terminal of each of the heterobipolar transistors Q (1) 2, Q (2) 3, Q (3) 4 connected in parallel is connected via the line 5 through which only DC passes. Applied from the power supply terminal 6. Here, the capacitor 8 short-circuits the RF signal to the GND. For example, the length of the bias line 5 is set to a quarter wavelength of the RF signal input from the input terminal 1, so that the amplified RF signal is amplified. This is to short-circuit the second harmonic of the signal. A diode characteristic circuit 9a is connected in parallel to the line 5 through which only DC passes.

  As shown in FIG. 2, the diode characteristic circuit 9 a connects the anode to the collector terminal side of the line 5 and connects the cathode to the power supply terminal side of the line 5, so that the RF signal input from the input terminal 1 suddenly increases. When the counter electromotive voltage generated at both ends of the bias line 5 becomes large when a current flows suddenly on the collector terminal side, the current flows through the diode characteristic circuit 9a to suppress the counter electromotive voltage. it can.

In this embodiment, the heterobipolar transistor is described, but it goes without saying that the same effect can be obtained with a bipolar transistor.
It goes without saying that the same effect can be obtained even if a diode characteristic circuit using a diode structure in which a collector terminal and a base terminal of a heterobipolar transistor are connected is used.

In the present embodiment, the configuration is such that three HBT cells are used, but it goes without saying that the same effect can be obtained if the configuration includes a plurality of HBT cells.
In the present embodiment, the case where the RF input signal changes suddenly is described. Needless to say, the same effect can be obtained even when the base bias voltage changes suddenly, for example.

In the present embodiment, the case where the RF input signal changes abruptly is described, but it goes without saying that the same effect can be obtained even when the voltage of the power supply terminal 6 changes abruptly, for example.
(Embodiment 3)
A semiconductor device according to a third embodiment of the present invention will be described.

  FIG. 3 is a circuit diagram showing a configuration of the semiconductor device according to the third embodiment. As shown in FIG. 3, the present embodiment is characterized in that a resistor 10 is connected in series to the diode characteristic circuit (1) 9b having the same characteristics as the diode characteristic circuit 9a of the second embodiment.

  By adopting such a configuration, even when the output signal level exceeds the threshold level, the output signal level is not suddenly made constant as in the limiter of the second embodiment, but the diode characteristic circuit (1). Since the threshold voltage gradually increases while the terminal voltage of the resistor 10 rises due to the current after turning on 9b, the output signal level that is clip-limited increases and the level of the output signal also increases. The proportion of will decrease.

As described above, when a modulation signal that frequently generates a counter electromotive voltage is input, in Embodiment 2, all of the counter electromotive voltage is absorbed and generated by the internal resistance of the diode characteristic circuit 9a. This may lead to destruction of the diode characteristic circuit 9a, but by connecting the resistor 10 in series with the diode characteristic circuit (1) 9b, a sudden heat rise of the diode characteristic circuit (1) 9b can be prevented. Can be suppressed.
(Embodiment 4)
A semiconductor device according to a fourth embodiment of the present invention will be described.

  FIG. 4 is a circuit diagram showing a configuration of the semiconductor device according to the fourth embodiment. As shown in FIG. 4, in this embodiment, the diode characteristic circuit (2) 11a is further connected in series to the diode characteristic circuit (1) 9b having the same characteristics as the diode characteristic circuit 9a of the second embodiment. There is a feature.

  In general, according to the static characteristics of the diode characteristics circuit, even if a forward voltage is applied to the junction in the pn diode, current does not flow immediately, but it flows only when the forward applied voltage exceeds a certain value. start. This is because there is a wall called a potential barrier at the junction surface of the pn junction, and the value is called a threshold value. In English, the threshold value is called a threshold (threshold). I will write. The height of the barrier, ie, VF, is 0.6V to 0.7V for silicon, 0.2V to 0.3V for germanium, and 1.1 to 1.2V for GaAs.

  Depending on the modulation method of the communication system, if the voltage in the reverse direction of the power amplifier is snapped with a voltage that is too low, the modulation signal may be distorted. However, by adopting the configuration of the present embodiment, it is twice the VF. This problem can be avoided because the voltage snaps.

In this embodiment, two stages of diodes are connected in series. However, when three or more stages are connected in series, the snapping voltage is the number of stages × VF, and the snap voltage is designed according to the communication system. Needless to say, you can.
(Embodiment 5)
A semiconductor device according to a fifth embodiment of the present invention will be described.

  FIG. 5 is a circuit diagram showing a configuration of the semiconductor device according to the fifth embodiment. As shown in FIG. 5, the present embodiment is characterized in that a diode characteristic circuit (3) 11b is further connected in parallel to the diode characteristic circuit 9a of the second embodiment.

When it is necessary to snap a lower reverse electromotive voltage, by adopting the configuration of the present embodiment, it is ½ times VF according to the static characteristics of the diode characteristic circuit described in the fourth embodiment. This problem can be avoided because snapping occurs at a voltage of.
(Embodiment 6)
A semiconductor device according to a sixth embodiment of the present invention will be described.

  FIG. 6 is a circuit diagram showing a configuration of the semiconductor device according to the sixth embodiment. In the second embodiment, the collector terminals of a plurality of transistors Q (1) 2, Q (2) 3, and Q (3) 4 are connected to one point, and the diode is snapped to the back electromotive voltage with respect to the connection point. In contrast to the case where the characteristic circuit 9a is connected, as shown in FIG. 6, in this embodiment, the diode characteristic circuits (4) 12, (5) 13, ( 6) 14 is connected.

  As shown in FIG. 6, in a configuration in which a plurality of HBTs are connected in parallel on a chip, a part of DC power supplied as a power source or a part of high-frequency power as a signal is usually converted into heat as power loss. In this case, thermal density distribution occurs due to thermal interference between adjacent HBTs, and collector current concentrates on the HBT where heat is concentrated. Such a phenomenon is called a collapse phenomenon. It becomes impossible to operate, resulting in a decrease in gain and a decrease in power efficiency. In some cases, this causes deterioration or destruction of the element.

When the characteristics of each transistor change due to such thermal density, when the circuit configuration is such that the back electromotive voltage is suppressed at the connection point after connecting the collector terminal of each transistor as in the second embodiment, Although the collapse phenomenon cannot be suppressed, in this embodiment, since the back electromotive voltage generated in each transistor can be suppressed, the cause of the sudden occurrence of the collapse phenomenon can be eliminated.
(Embodiment 7)
A semiconductor device according to a seventh embodiment of the present invention will be described.

  FIG. 7 is a circuit diagram showing a configuration of the semiconductor device according to the seventh embodiment. As shown in FIG. 7, in this embodiment, resistors (1) 15, (2) 16, and (3) 17 are connected between the collector terminal and the output terminal 7 of each transistor in the sixth embodiment. There is a special feature.

In the fifth embodiment, the purpose is to suppress the occurrence of a back electromotive force due to excessive current flow and to suppress the occurrence of the collapse phenomenon. However, once the collapse phenomenon occurs, the steady state change occurs. Therefore, in this embodiment, since the back electromotive voltage is not generated due to the parasitic inductance of the wiring, the effect of snapping by the diode characteristic circuit may not be sufficiently exhibited. However, in the present embodiment, the voltage increases due to the resistance even in the current density due to the steady collapse phenomenon, and can be snapped by the diode characteristic circuit.
(Embodiment 8)
A semiconductor device according to an eighth embodiment of the present invention will be described.

  FIG. 8 is a circuit diagram showing a configuration of the semiconductor device according to the eighth embodiment. As shown in FIG. 8, the present embodiment is characterized in that the connection structure in the second embodiment and the connection structure in the sixth embodiment are combined in the diode characteristic circuit.

With the above configuration, it is possible to have both the effects of the second embodiment and the sixth embodiment. That is, when the RF signal input from the input terminal 1 suddenly fluctuates and a current flows suddenly on the collector terminal side, if the back electromotive voltage generated at both ends of the bias line 5 increases, the diode characteristic circuit 9a Therefore, even if the characteristics of each transistor change due to thermal density, the back electromotive voltage generated in each transistor can be suppressed. The cause of the occurrence of the collapse phenomenon can be eliminated.
(Embodiment 9)
A semiconductor device according to a ninth embodiment of the present invention will be described.

  FIG. 9 is a circuit diagram showing a configuration of the semiconductor device of the ninth embodiment. As shown in FIG. 9, in this embodiment, a so-called InGaP HBT structure is shown as an example, but this embodiment is characterized by the side of the conventional InGaP HBT structure in the right half of the drawing. In addition, a PN diode made of p-GaAs 22 and GaAs 23 is formed on the same epitaxial substrate.

  As described above, by forming the PN diode on the same substrate, when the operating temperature of the semiconductor device changes, the VF of the diode characteristic circuit changes according to the characteristic change of the bipolar transistor. Thereby, the relative snap voltage with respect to the bipolar transistor can be made constant.

  The semiconductor device of the present invention can realize a power amplifier and a power amplifier bias circuit capable of preventing breakdown due to a counter electromotive voltage generated in an inductor without deterioration of amplification characteristics. The present invention can be applied to a power amplifier having an amplification stage consisting of:

1 is a circuit diagram showing a configuration of a semiconductor device according to a first embodiment of the present invention. The circuit diagram which shows the structure of the semiconductor device of Embodiment 2 of this invention The circuit diagram which shows the structure of the semiconductor device of Embodiment 3 of this invention The circuit diagram which shows the structure of the semiconductor device of Embodiment 4 of this invention A circuit diagram showing composition of a semiconductor device of Embodiment 5 of the present invention. The circuit diagram which shows the structure of the semiconductor device of Embodiment 6 of this invention The circuit diagram which shows the structure of the semiconductor device of Embodiment 7 of this invention Circuit diagram showing a configuration of a semiconductor device according to an eighth embodiment of the present invention. Structural diagram showing a configuration of a semiconductor device according to a ninth embodiment of the present invention. A circuit diagram showing a configuration example of a conventional semiconductor device

Explanation of symbols

1 input (terminal)
2 Transistor Q (1)
3 Transistor Q (2)
4 Transistor Q (3)
5 Line through which only DC signal passes 6 Power supply (terminal)
7 Output (terminal)
8 Capacitor 9a Diode 9b Diode (1)
10 Resistance 11a Diode (2)
11b Diode (3)
12 Diode (4)
13 Diode (5)
14 Diode (6)
15 Resistance (1)
16 Resistance (2)
17 Resistance (3)
18 InGaAs
19 GaAs
20 InGaP
21 p-GaAs
22 p-GaAs
23 GaAs
24 N + GaAs
25 Emitter electrode 26 Base electrode 27 Collector electrode

Claims (14)

  The circuit includes a bipolar transistor having a base terminal connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a power supply terminal through a line through which only a DC signal passes. A semiconductor device comprising: a cathode of a diode characteristic circuit connected to a power supply terminal side of the line; and an anode of the diode characteristic circuit connected to a collector terminal side of the line.   The circuit includes a bipolar transistor having a base terminal connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a power supply terminal through a line through which only a DC signal passes. In the semiconductor device, the cathode of the diode characteristic circuit and one end of the resistor are connected, the other end of the resistor is connected to the power supply terminal side of the line, and the anode of the diode characteristic circuit is connected to the collector terminal side of the line. A semiconductor device characterized by being connected.   The circuit includes a bipolar transistor having a base terminal connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a power supply terminal through a line through which only a DC signal passes. A semiconductor device, wherein a plurality of diode characteristic circuits are connected in series in the same polarity direction, the cathode of the diode characteristic circuit in the foremost stage is connected to the power supply terminal side of the line, and the last stage is connected to the collector terminal side of the line A semiconductor device characterized in that an anode of the diode characteristic circuit is connected.   The circuit includes a bipolar transistor having a base terminal connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a power supply terminal through a line through which only a DC signal passes. In the semiconductor device, all the cathodes of the plurality of diode characteristic circuits are connected to the power supply terminal side of the line, and all the anodes of the plurality of diode characteristic circuits are connected to the collector terminal side of the line. A semiconductor device.   The circuit includes a bipolar transistor having a base terminal connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a power supply terminal through a line through which only a DC signal passes. A semiconductor device comprising: a cathode of a diode characteristic circuit connected to a power supply terminal side of the line; and an anode of the diode characteristic circuit connected to a collector terminal of the bipolar transistor.   The base terminal of the bipolar transistor is connected to the input terminal, the collector terminal is connected to the output terminal through a resistor, the emitter terminal is connected to the ground, and the connection point between the resistor and the output terminal is through a line through which only a DC signal passes. A semiconductor device including a circuit connected to a power supply terminal, wherein the cathode of the diode characteristic circuit is connected to the power supply terminal side of the line, and the anode of the diode characteristic circuit is connected to the collector terminal of the bipolar transistor. A featured semiconductor device.   The circuit includes a bipolar transistor having a base terminal connected to an input terminal, a collector terminal connected to an output terminal, an emitter terminal connected to ground, and the collector terminal connected to a power supply terminal through a line through which only a DC signal passes. 6. A semiconductor device comprising the circuit configuration of connection of the diode characteristic circuit according to claim 1 and connection of the diode characteristic circuit according to claim 5.   The semiconductor device according to claim 1, wherein the circuit using the bipolar transistor is configured by connecting a plurality of bipolar transistors in parallel.   The semiconductor device according to claim 1, wherein the bipolar transistor is a heterojunction bipolar transistor.   The semiconductor device according to claim 1, wherein the line is a quarter-wave line.   11. The semiconductor device according to claim 1, wherein the diode characteristic circuit is configured by using a heterojunction bipolar transistor and connecting a base terminal and a collector terminal thereof.   11. The semiconductor device according to claim 1, wherein the diode characteristic circuit is configured by using a heterojunction bipolar transistor and connecting a base terminal and an emitter terminal thereof.   The diode characteristic circuit includes a collector layer and a base layer of a heterojunction bipolar transistor, and the collector layer of the diode characteristic circuit is shared with the collector layer of the bipolar transistor. The semiconductor device according to any one of 10.   14. The semiconductor device according to claim 1, wherein the diode characteristic circuit has two different potential barriers.

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