JP2006308712A - Display device and precharging method of display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that it becomes difficult to write precharge signals of black level and gray level to a signal line in a horizontal blanking period since the signal line has larger capacity and the horizontal scanning period becomes shorter as the number of pixels increases. <P>SOLUTION: In two-step precharging for writing the black level and half-tone level to the signal lines in two steps, precharging of the black level is carried out not in all horizontal scanning periods at each time, but at intervals of every designated thinned-out horizontal scanning periods. Then scanning periods to be thinned out are made short and horizontal scanning periods for the two-step precharging are made correspondingly long by short amount to surely write the precharge signals PSIG in a horizontal blanking period. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a display device and a precharge method for the display device, and more particularly to a flat panel type in which pixels including electro-optical elements such as liquid crystal cells and EL (electro luminescence) elements are two-dimensionally arranged in a matrix. The present invention relates to a display device and a precharge method for the display device.

  In a flat display device, for example, a liquid crystal display device using a liquid crystal cell as an electro-optical element, pixels including the liquid crystal cell are two-dimensionally arranged in a matrix, and a scanning line is provided for each pixel row with respect to the matrix-like pixel arrangement. A pixel array section in which signal lines are wired for each pixel column, a vertical drive circuit for selecting each pixel of the pixel array section in units of rows, and a signal line to each pixel in a row selected by the vertical drive circuit And a horizontal drive circuit for writing a video signal via the video signal, and adopts, for example, an active matrix system as a drive system.

  In this active matrix type liquid crystal display device, in general, the polarity of a video signal written to each pixel is inverted every 1H (H is a horizontal scanning period), and this is further inverted for each field, so-called 1H inversion driving method. Has been adopted. In the case of this 1H inversion driving method, if the charge / discharge current due to the writing of the video signal to the signal line is large, the potential of the signal line fluctuates, so that the fluctuation of the potential appears as vertical stripes on the display screen. This contributes to a worsening of Mitty (screen uniformity).

  In order to minimize the charging / discharging current due to the video signal writing and improve the uniformity, horizontal blanking is applied to the precharge signal at the halftone level, for example, the gray level, prior to the video signal writing to the signal line. A precharge method in which signal lines are written in advance during a period is employed.

  On the other hand, when the precharge signal level is set to the halftone level, the following problem occurs. In a liquid crystal display device, a TFT (Thin Film Transistor) is generally used as a pixel transistor. In an a-Si (amorphous-silicon) TFT, since a-Si is highly sensitive photoelectric conversion, a leakage current flows between the source and drain of the TFT by light irradiation (so-called light leakage). In particular, when used as a liquid crystal light valve for projection, the amount of light leakage is relatively large due to the incidence of powerful light.

  Under such circumstances, when the precharge signal level is set to a halftone level, for example, a gray level, when a normally white liquid crystal display device displays, for example, a black window pattern, the display area of the window pattern is displayed. Since the signal line potential is different from the signal line potential in the other gray regions, the source-drain potentials of the pixel transistors in both regions are different, so that the amount of light leakage in both regions is also different. Due to this, black information in the window pattern leaks to the signal line through the pixel transistor, so that vertical (vertical) crosstalk (hereinafter referred to as “vertical crosstalk”) occurs, The quality will be lost.

  In order to reduce the vertical crosstalk, the precharge signal level may be set to the black level. This is because by writing a black level as a precharge signal to the signal line in advance, the potential between the source and drain of the pixel transistor can be made constant in all pixel regions, so that the amount of light leakage is also uniform in all pixel regions. Thus, for example, vertical crosstalk when a black window pattern is displayed can be reduced.

  In order to realize both the vertical crosstalk reduction function and the vertical stripe reduction function described above and improve the image quality, an active matrix display device using a conventional precharge system has a black level and a gray level. A two-step precharge method has been adopted in which both levels are precharged to the signal line in two steps during the horizontal blanking period (see, for example, Patent Documents 1 and 2).

JP 10-143113 A JP 2000-267067 A

  By the way, in recent years, with the spread of digital television broadcasting, it is expected that the number of display devices will increase. As the number of pixels increases, the length of the signal line increases accordingly, the capacity of the signal line increases, and the amount of information to be written increases, so the horizontal scanning period decreases, and accordingly the horizontal blanking period Is also shortened. The same can be said when dealing with higher frame rates.

  As described above, when the capacity of the signal line is large and the horizontal scanning period is shortened, it takes a certain amount of time to write a predetermined potential to the signal line by precharging. It becomes difficult to write the charge signal to the signal line within the horizontal blanking period. There is a concern that image quality may be deteriorated due to insufficient writing of the precharge signal.

  Therefore, the present invention provides a high-quality, high-quality display image by two-step precharging even if the capacity of the signal line increases or the horizontal scanning period becomes short as the number of pixels and the frame rate increase. It is an object of the present invention to provide a display device and a precharge method for the display device that can obtain the above.

  In order to achieve the above object, the present invention includes a pixel array unit in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and signal lines are wired for each pixel column with respect to the matrix. In the display device, the pixels of the pixel array unit are sequentially selected in units of rows, and the video signal is written to the pixels of the selected pixel row prior to writing the video signal through the signal line. When writing the precharge signal of the maximum amplitude level and the halftone level to the signal line in two steps, the halftone level is written in all horizontal scans while thinning out the maximum amplitude level every predetermined horizontal scanning period. A configuration is employed in which writing of the halftone level is performed on all signal lines while performing writing every time over a period or thinning out writing of the maximum amplitude level for each predetermined signal line.

  In the two-step precharge in which the precharge signal having the maximum amplitude level and the halftone level of the video signal is written to the signal line in two steps, the precharge at the maximum amplitude level is not performed every time over the entire horizontal scanning period. By thinning out every horizontal scanning period, the horizontal scanning period to be thinned out can be shortened, so that the horizontal scanning period for performing two-step precharge can be set longer by the shortening.

  Alternatively, in the two-step precharge, the maximum amplitude level is not precharged for all the signal lines, but is thinned out for each predetermined signal line. For example, one signal line for performing the maximum amplitude level precharge is provided. By thinning out every other time, the number of signal lines for precharging at the maximum amplitude level is halved. As a result, the capacity of the signal line, that is, the load capacity of the buffer unit for driving the signal line is also halved, and the time required to write the maximum amplitude level to the signal line can be reduced by half. A long horizontal scanning period for precharging can be set.

  According to the present invention, since the horizontal scanning period for performing the two-step precharge can be set to be long, the capacity of the signal line increases as the number of pixels and the frame rate increase, and the horizontal scanning period becomes shorter. Since the precharge signal can be reliably written within the horizontal blanking period, a display image with high image quality and high image quality can be obtained without causing image quality failure due to insufficient writing of the precharge signal.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[First Embodiment]
FIG. 1 is a system configuration diagram showing an outline of the overall configuration of the display device according to the first embodiment of the present invention. Here, as an example, an active matrix liquid crystal display device using a liquid crystal cell as an electro-optical element of a pixel will be described as an example.

  As shown in FIG. 1, in addition to the pixel array unit 11, the active matrix liquid crystal display device 10 according to the present embodiment includes peripheral circuits that drive each pixel of the pixel array unit 11, such as a vertical drive circuit 12, a horizontal The drive circuit 13 and the precharge circuit 14 are provided, and these peripheral circuits are formed on the same substrate 15 (hereinafter referred to as “liquid crystal panel”) 15 as the pixel array unit 11. 15 video signal analog buffer unit 16 provided outside 15 receives N-system video signals SIG # 1 to SIG # N, precharge buffer unit 17 receives precharge signal PSIG, and control circuit unit 18 receives various control pulses. Each is designed to be entered.

  In the pixel array unit 11, pixels 20 including liquid crystal cells as electro-optical elements are two-dimensionally arranged in a matrix (m rows and n columns) on a transparent insulating substrate, for example, a first glass substrate (not shown). In this matrix arrangement, scanning lines 25-1 to 25-m are wired for each pixel row, and signal lines 26-1 to 26-n are wired for each pixel column. The second glass substrate is disposed opposite to the first glass substrate with a predetermined gap, and the liquid crystal material is sealed in the gap between the two glass substrates to constitute the liquid crystal panel 15. Has been.

(Pixel circuit)
FIG. 2 is a circuit diagram illustrating an example of a circuit configuration of the pixel (pixel circuit) 20. As apparent from FIG. 2, the pixel 20 includes a pixel transistor, for example, a TFT (Thin Film Transistor) 21, a liquid crystal cell 22 in which the pixel electrode is connected to the drain electrode of the TFT 21, and one of the drain electrode of the TFT 21. And a storage capacitor 23 to which the electrodes are connected. Here, the liquid crystal cell 22 means a liquid crystal capacitance generated between the pixel electrode and a counter electrode formed opposite to the pixel electrode.

  The TFT 21 has a gate electrode connected to the scanning line 25 (25-1 to 25-m) and a source electrode connected to the signal line 26 (26-1 to 26-n). Further, for example, the counter electrode of the liquid crystal cell 22 and the other electrode of the storage capacitor 23 are connected to the common line 24 in common for each pixel. A common voltage (counter electrode voltage) VCOM is applied to the common electrode of the liquid crystal cell 22 via the common line 24.

  FIG. 3 shows an example of the layout of the TFT 21 and the storage capacitor 23 in the pixel 20 having the above configuration. 3, in the TFT 21, the gate electrode 31 is connected to the scanning line 25 (25-1 to 25-m) as described above, and the source electrode 32 is connected to the signal line 26 (26-1 to 26- at the contact portion 33. n) is in contact.

  The drain electrode 34 of the TFT 21 is formed of a first layer of polysilicon, and is shared with one electrode of the storage capacitor 23 as a pixel electrode. Then, the second-layer polysilicon is arranged as the other electrode 35 of the storage capacitor 23 through the gate insulating film (dielectric) of the TFT 21 so as to face the first-layer polysilicon. A storage capacitor 23 is formed between regions facing the pixel electrode 35. The first layer of polysilicon (pixel electrode) is in contact with a transparent conductive film (not shown) such as ITO at a contact portion 36.

  Returning to FIG. The vertical drive circuit 12 is disposed, for example, on the left side of the pixel array unit 11. Here, the configuration in which the vertical drive circuit 12 is disposed on the left side of the pixel array unit 11 is described as an example, but the vertical drive circuit is provided on the right side of the pixel array unit 11 or on both the left and right sides of the pixel array unit 11. It is also possible to adopt a configuration in which 12 is arranged. The vertical drive circuit 12 is configured by a shift register, a buffer circuit, and the like, and sequentially outputs vertical scanning pulses in synchronization with a control pulse (not shown) supplied from the control circuit unit 18, and the scanning lines of the pixel array unit 11. The pixels 20 are sequentially selected in units of rows by giving to 25-1 to 25-m.

  Here, in the active matrix liquid crystal display device 10 according to the present embodiment, the signal lines 26-1 to 26 are used as the driving method of the horizontal driving circuit 13 that drives the signal lines 26-1 to 26 -n on the liquid crystal panel 15. -N is assigned to the output of one system of the analog buffer unit 16 by, for example, x adjacent to each other (x is an integer of 2 or more) as a set (unit), and the x signal lines are divided into x time divisions. A so-called selector that drives each signal line by time-sharing and supplying video signals output in time series for each output of the analog buffer 16 to the selected signal line. The drive method (time division drive method) is adopted. Here, as an example, x = 4, that is, four time-division driving.

  In the horizontal drive circuit 13 that performs four time division driving, N (= n / 4) from the analog buffer unit 16 provided outside the liquid crystal panel 15 to n signal lines 26-1 to 26-n. System video signals SIG # 1 to SIG # N are input. The N systems of video signals SIG # 1 to SIG # N are input as time series signals in which signals of four signal lines forming a set are arranged in time series every 1H (H is a horizontal scanning period).

  The horizontal drive circuit 13 includes N signal transmission lines 131-1 to 131-N and N switch circuits 132-1 to 132- provided corresponding to N video signals SIG # 1 to SIG # N. N, and four switch control lines 133-1 to 133-4 and four buffers 134-1 to 134-4 provided corresponding to four time division driving.

  In the horizontal drive circuit 13, N signal transmission lines 131-1 to 131-N transmit N video signals SIG # 1 to SIG # N to N switch circuits 132-1 to 132-N, respectively. To do. Further, four switch drive pulses HSW1 to HSW4 are input to the horizontal drive circuit 13 from a control circuit unit 18 provided outside the liquid crystal panel 15. The four switch drive pulses HSW1 to HSW4 are applied to the four switch control lines 133-1 to 133-4 through the four buffers 134-1 to 134-4, respectively.

  The switch circuit 132-1 includes four horizontal switches HS1, HS2, HS3, HS4 corresponding to four time divisions, and one end of each of the horizontal switches HS1, HS2, HS3, HS4 is common to the signal transmission line 131-1. The other end is connected to the signal lines 26-1, 26-2, 26-3, 26-4, respectively. The switch circuits 132-2 to 132-N have the same configuration as the switch circuit 132-1.

  The horizontal switches of the N switch circuits 132-1 to 132-N include an NMOS switch made up of an N channel MOS transistor, a PMOS switch made up of a P channel MOS transistor, or an N channel MOS transistor and a P channel MOS transistor. A switching element such as a transfer switch connected in parallel can be used.

  The N switch circuits 132-1 to 132-N are input from the outside of the liquid crystal panel 16, and are supplied to the switch control lines 133-1 to 133-4 via the buffers 134-1 to 134-4. In synchronization with HSW1, HSW2, HSW3, and HSW4, four signal lines to be paired are sequentially selected in a time-division manner, and each of the video signals SIG # 1 to SIG # N is timed with respect to the selected signal line. Divide and supply by division.

  The precharge circuit 14 receives a precharge signal PSIG from a precharge buffer 17 provided outside the liquid crystal panel 15 and a switch drive pulse PSW from a control circuit 18. The precharge signal PSIG corresponds to the two-step precharge method, and the signal level is the maximum amplitude level of the video signal, for example, black level for normally white (white level for normally black), and halftone level, for example gray. Have a level.

  The precharge circuit 14 includes a precharge line 141, a buffer 142, a switch control line 143, and a switch circuit 144. The precharge signal PSIG input into the liquid crystal panel 15 is transmitted to the precharge circuit 14 through the precharge line 141. The switch drive pulse PSW is given to the switch control line 143 through the buffer 142.

  The switch circuit 144 includes n precharge switches PS1 to PSn connected between each of the signal lines 26-1 to 26-n and the precharge line 141. These precharge switches PS1 to PSn include switches such as an NMOS switch composed of an N channel MOS transistor, a PMOS switch composed of a P channel MOS transistor, or a transfer switch in which an N channel MOS transistor and a P channel MOS transistor are connected in parallel. An element can be used.

  The precharge switches PS1 to PSn are switch-controlled via the buffer 142 every 1H from the control circuit unit 18 before the video signal is written to each of the signal lines 26-1 to 26-n by the horizontal drive circuit 13. In response to the switch drive pulse PSW applied to the line 143, the precharge signal PSIG transmitted from the precharge buffer unit 17 through the precharge line 141 is collectively turned on in response to the switch drive pulse PSW applied to the line 143. Write to each of 26-n.

  Here, the case of normally white will be described as an example. As described above, the precharge signal PSIG has a black level that is the maximum amplitude level of the video signal and a halftone level (for example, a gray level). Yes. That is, as the precharge method, a two-step precharge method is employed in which the black level and the halftone level are precharged to the signal line lines 26-1 to 26-n in the horizontal blanking period. In practice, the black level is set slightly higher than the maximum amplitude level of the video signal.

  In the active matrix liquid crystal display device, by adopting a two-step precharge method, as described above, vertical stripes can be reduced by precharging at a halftone level, and image quality can be improved by improving uniformity. Black level precharge can reduce vertical crosstalk and improve image quality.

  By the way, in an active matrix type liquid crystal display device using the TFT 21 as a pixel transistor, the TFT 21 tends to be made thinner in order to reduce the photosensitivity. As described in the explanation of FIG. 3, the drain electrode 34 of the TFT 21 is formed of the first layer of polysilicon, and is shared with one electrode of the storage capacitor 23 as a pixel electrode. As shown in the figure, one electrode of the storage capacitor 23 is also thinned, and the resistance of the electrode increases, so that the time constant of the charge / discharge path for the storage capacitor 23 increases.

  As described above, the time constant increases, but as the time constant increases, it takes time for the charge held in the storage capacitor 23 to be discharged due to light leakage. This means that when the black level is precharged, the charge corresponding to the black level can be held in the holding capacitor 23 for a period determined by the time constant. Focusing on this point, this embodiment is characterized in that the black level precharge is not performed every time over the entire horizontal scanning period, but is performed by thinning out every predetermined horizontal scanning period.

  FIG. 4 is a timing chart showing signal waveforms of respective parts of the active matrix liquid crystal display device according to the present embodiment. Here, for simplification of the drawing, an example is shown in which the black level precharge is thinned out in the 2H period of 2H and 3H in units of 4H. In FIG. 4, sig # 1 to sig # 4 indicate signal waveforms written in the signal lines 26-1 to 26-4.

  As is apparent from FIG. 4, in this example, the 1H inversion driving method is employed in which the polarities of the video signals SIG # 1,... Written to the pixel 20 are inverted every one horizontal scanning period (1H). In addition, the black level precharge and the halftone level precharge are performed at the 1H and 4H stages, while the black level precharge is thinned out at the 2H and 3H stages. A one-step precharge is performed in which only precharge is performed. Correspondingly, the precharge signal PSIG has a black level and a halftone level at the 1H and 4H, and only a halftone level at the 2H and 3H.

  By thinning out the black level precharge at the 2H and 3H eyes, the horizontal scanning period of the 2H and 3H periods is shortened by the black level precharge time. The amount by which the horizontal scanning period of 2H and 3H can be shortened is distributed to the 1H and 4H horizontal scanning periods, and the horizontal scanning period is set longer than that of 2H and 3H. And 4H, it is possible to secure a time for performing the two-step precharge.

  Specifically, in the example of QXGA, the normal horizontal scanning period is 10 μs, but the horizontal scanning period in which the black level precharge is thinned out is 9.5 μs, the horizontal scanning period in which the black level is not thinned is 10.5 μs, and the black level is By setting the precharge time of 1.0 μs and the sum of the precharge time of the halftone level and the fall + rise time of the scanning lines 25-1 to 25 -m to 1.5 μs, all of 1H to 4H In FIG. 5, 2.5 μs can be secured as the two-step precharge time of the 1H and 4H while the effective video signal period is 8.0 μs.

  In this way, the black level precharge is not performed every time over the entire horizontal scanning period, but is performed by thinning out every predetermined horizontal scanning period, so that the horizontal scanning period to be thinned out can be shortened. Therefore, the horizontal scanning period for performing the two-step precharge can be lengthened by the shortened amount. As a result, even if the capacity of the signal lines 26-1 to 26-m is increased as the number of pixels is increased and the frame rate is increased, and the horizontal scanning period is shortened, the precharge is surely performed within the horizontal blanking period. Since the signal PSIG can be written, image quality failure due to insufficient writing of the precharge signal PSIG does not occur.

  In the example of QXGA, since the effective video signal period can be set to 8.0 μs, when time-division driving is performed in units of four signal lines, the video signal writing time per signal line becomes 2.0 μs. Since a sufficient video signal writing time can be secured over the entire horizontal scanning period, a good display image can be obtained.

  In addition, as described above, the black level written in a certain horizontal scanning period can be held for a period determined by the time constant of the holding capacitor 23 without writing the black level every time over the entire horizontal scanning period. By precharging the black level at a constant period within the period, the effect of reducing vertical crosstalk is not impaired.

  Incidentally, considering that the black level precharge thinning is not performed and the two-step precharge is performed every time over the entire horizontal scanning period, the effective video signal period becomes 7.5 μs, and four signal lines are used as a unit. When time-division driving is performed, the writing time per signal line is 1.875 μs, which may cause image quality failure due to insufficient writing of the precharge signal PSIG.

  In this example, the black level precharge is thinned out once in two horizontal scanning periods (thinning rate is 50%), but this is only an example, and the present invention is not limited to this. This thinning rate is determined according to the time constant of the storage capacitor 23.

[Second Embodiment]
FIG. 5 is a system configuration diagram showing an outline of the overall configuration of the active matrix liquid crystal display device according to the second embodiment of the present invention. In FIG. 5, the same parts as those in FIG. Yes.

  In the active matrix liquid crystal display device according to the first embodiment, the black level precharge is thinned out every certain horizontal scanning period, whereas the active matrix liquid crystal display device according to the present embodiment. Is characterized in that the black level precharge is not performed for all the signal lines 26-1 to 26 -m, but is performed for each predetermined signal line. As an example, every other signal line for precharging the black level is thinned out.

  Specifically, in a certain horizontal scanning period, the odd-numbered signal lines 26-1, 26-3,... Are subjected to two-step precharge of the black level and the halftone level, and the even-numbered signal lines 26-2. 26-4,... Are thinned out with black level precharge, and one-step precharge of only the halftone level is performed. In the next horizontal scanning period, signal lines 26-1, 26-3,. Black-level precharge is thinned out, one-step precharge of only the halftone level is performed, and two-step precharge of the black level and the halftone level is performed on the signal lines 26-2.26-4,. In other words, the black level precharge is thinned out for the even / odd column signal lines every horizontal scanning period.

  In order to realize this, in the active matrix liquid crystal display device according to the present embodiment, two systems of switch drive pulses PSW1 and PSW2 are supplied from the control circuit 18 to the precharge circuit 14 ′.

  The switch drive pulse PSW1 corresponds to a two-step precharge of a black level and a halftone level in a certain horizontal scanning period, corresponds to a one-step precharge of only a halftone level in the next horizontal scanning period, and is repeated thereafter. It is a pulse signal. The switch drive pulse PSW2 is a pulse signal that is opposite to the switch drive pulse PSW1, that is, corresponds to one-step precharge in a certain horizontal scanning period, corresponds to two-step precharge in the next horizontal scanning period, and repeats thereafter. .

  The precharge circuit 14 'includes two buffers 142-1 and 142-2 corresponding to the two switch drive pulses PSW1 and PSW2 in addition to the switch circuit 144 including n precharge switches PS1 to PSn. And two switch control lines 143-1 and 143-2.

  In this precharge circuit 14 ', the switch drive pulse PSW1 that has passed through the buffer 142-1 is given to the odd-numbered precharge switches PS1, PS3,... Via the switch control line 143-1 and passed through the buffer 142-2. The switch drive pulse PSW2 is applied to the precharge switches PS2, PS4,... In the even columns through the switch control line 143-2.

  As a result, as shown in the timing chart of FIG. 6, first, the switch drive pulse PSW1 goes high in a certain horizontal scanning period (1H), and the odd-numbered columns of precharge switches PS1, PS3,. A black level precharge is performed on the signal lines 26-1, 26-3,... In the columns, and then a halftone level (for example, gray level) precharge is performed.

  The switch drive pulse PSW2 becomes a high level at the same timing as the half-tone level precharge for the odd-numbered signal lines 26-1, 26-3,..., And the even-numbered column precharge switches PS2, PS4,. Are precharged at halftone levels for the signal lines 26-2, 26-4,.

  In the next horizontal scanning period, first, the switch drive pulse PSW2 becomes high level, and the even-numbered column precharge switches PS2, PS4,... Are turned on, so that the even-numbered signal lines 26-2, 26-4,. On the other hand, a black level precharge is performed, followed by a halftone level precharge.

  Then, the switch drive pulse PSW1 becomes high level at the same timing as the precharge of the halftone level to the signal lines 26-2, 26-4,... In the even columns, and the precharge switches PS1, PS3,. As a result, half-tone level precharge is performed on the odd-numbered signal lines 26-1, 26-3,. Thereafter, the above-described precharge operation is repeated.

  In this way, the black level precharge is not performed on all the signal lines 26-1 to 26 -m, but is performed by thinning out every predetermined signal line, for example, one signal line for performing the black level precharge. By thinning out every other line, the number of signal lines that perform black level precharge is halved, so that the capacity of the signal lines, that is, the load capacity of the precharge buffer unit 17 is also halved.

  When the load capacity of the precharge buffer unit 17 is halved, the time required to write the black level to the signal line, that is, the black level precharge time can be shortened by half. The scanning period can be lengthened. As a result, even if the capacity of the signal lines 26-1 to 26-m is increased as the number of pixels is increased and the frame rate is increased, and the horizontal scanning period is shortened, the precharge is surely performed within the horizontal blanking period. The signal PSIG can be written, and image quality failure due to insufficient writing of the precharge signal PSIG does not occur.

  In the halftone level precharge performed after the black level precharge, the effect of charge redistribution can be expected by precharging all the signal lines 26-1 to 26-n. The time required to write the gray level to the signal line, that is, the precharge time of the halftone level does not increase.

  Further, the technique of thinning out the black level precharge of the first embodiment every certain horizontal scanning period and the technique of thinning out the black level precharge of the second embodiment for each signal line are used in combination. With this combination, even if the capacity of the signal lines 26-1 to 26 -m is increased with the increase in the number of pixels and the horizontal scanning period is shortened, it is more reliable within the horizontal blanking period. The precharge signal PSIG can be written.

  Since the active matrix liquid crystal display device adopting the two-step precharge method according to the first and second embodiments described above can exert its effect strongly against the light leakage of the pixel transistor, strong light is incident thereon. Therefore, it is suitable for use as a liquid crystal light valve for projection, which is said to have a relatively large light leak amount.

  In each of the above embodiments, the case where the precharge is applied to the batch precharge method in which the precharge is collectively performed in line units (row units) has been described as an example. However, the present invention is not limited to this application example, and is selected. The present invention can be similarly applied to a dot-sequential precharge method in which each pixel in a row is sequentially performed in synchronization with horizontal scanning. The dot-sequential precharge method has an advantage that it is easier to handle than the batch precharge method even if the sampling rate is increased and the horizontal blanking period is shortened as the number of pixels is increased.

  In each of the above embodiments, the case where the 1H inversion driving method in which the polarity of the video signal written to the pixel is inverted every horizontal scanning period is described as an example, but the present invention is not necessarily limited to the 1H inversion driving method. Instead, the present invention can be similarly applied to the case of adopting the 1F inversion driving method in which the polarity of the video signal is inverted every one vertical scanning period (one field).

  In each of the above embodiments, the positive polarity and the negative polarity are alternately inverted for the black level precharge. However, the present invention is not necessarily limited to this, regardless of the polarity of the video signal. This is also applicable to the case where a black level precharge is inserted only in one polarity.

  Further, in each of the above embodiments, the case where the selector driving (time division driving) method is adopted as the driving method of the horizontal driving circuit 13 has been described as an example. A block sequential driving method in which video signals are sequentially written for each block as a plurality of signal lines as a block (unit), a line sequential driving method in which video signals are written in batches in units of rows, or a video signal is sequentially applied to each pixel in a selected row. The present invention can be similarly applied to various driving methods such as a dot sequential driving method for writing.

  In each of the above embodiments, the precharge switch circuit 144 is arranged on the side opposite to the horizontal drive circuit 13 with respect to the pixel array unit 11 and precharge is performed from the opposite side. It is also possible to adopt a configuration in which precharging is also performed using 132-1 to 132-N, and black level precharging is performed by the switch circuit 144, and halftone level precharging is performed by the switch circuit 132-1. It is also possible to carry out by 132-N.

  In each of the above embodiments, the case where the present invention is applied to a liquid crystal display device using a liquid crystal cell as an electro-optical element of the pixel has been described as an example. However, the present invention is not limited to this application example, and the pixel For example, an EL display device using an EL element as an electro-optical element, the pixels including the electro-optical element are two-dimensionally arranged in a matrix and can be applied to all flat display devices adopting a two-step precharge method.

1 is a system configuration diagram illustrating an outline of an overall configuration of an active matrix liquid crystal display device according to a first embodiment of the present invention. It is a circuit diagram which shows an example of the circuit structure of a pixel. It is a plane pattern figure which shows an example of the layout of TFT and storage capacitor in a pixel. 4 is a timing chart showing signal waveforms of respective parts in the active matrix liquid crystal display device according to the first embodiment. It is a system configuration | structure figure which shows the outline of the whole structure of the active matrix type liquid crystal display device which concerns on 2nd Embodiment of this invention. 6 is a timing chart showing signal waveforms of respective parts in an active matrix liquid crystal display device according to a second embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Active matrix type liquid crystal display device, 11 ... Pixel array part, 12 ... Vertical drive circuit, 13 ... Horizontal drive circuit, 14, 14 '... Precharge circuit, 15 ... Liquid crystal panel, 16 ... Video signal analog buffer part, 17 DESCRIPTION OF SYMBOLS ... Precharge buffer part, 18 ... Control circuit part, 20 ... Pixel, 21 ... TFT (thin film transistor), 22 ... Liquid crystal cell, 23 ... Retention capacity, 25 (25-1 to 25-m) ... Scan line, 26 (26 -1 to 26-n) Signal line

Claims (6)

A pixel array unit in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and signal lines are wired for each pixel column with respect to the matrix arrangement;
Vertical driving means for sequentially selecting each pixel of the pixel array section in units of rows;
Horizontal driving means for writing a video signal through the signal line to each pixel in a pixel row selected by vertical scanning by the vertical driving means;
Prior to writing of the video signal by the horizontal driving means, precharge means for writing the maximum charge level and halftone level precharge signal of the video signal to the signal line in two steps,
The display device according to claim 1, wherein the precharge means performs the halftone level writing every time over the entire horizontal scanning period while thinning out the writing of the maximum amplitude level every predetermined horizontal scanning period. The display device according to claim 1, wherein the precharge unit thins out writing of the maximum amplitude level at a constant period. In a display device including a pixel array unit in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and signal lines are wired for each pixel column with respect to the matrix arrangement,
While sequentially selecting each pixel of the pixel array unit in units of rows, prior to writing a video signal through the signal line to each pixel in the selected pixel row, the maximum amplitude level of the video signal is A precharge method for writing a precharge signal of a gray level to the signal line in two steps,
A precharging method for a display device, wherein writing of the halftone level is performed every time over the entire horizontal scanning period while thinning out the writing of the maximum amplitude level every predetermined horizontal scanning period. A pixel array unit in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and signal lines are wired for each pixel column with respect to the matrix arrangement;
Vertical driving means for sequentially selecting each pixel of the pixel array section in units of rows;
Horizontal driving means for writing a video signal through the signal line to each pixel in a pixel row selected by vertical scanning by the vertical driving means;
Prior to writing of the video signal by the horizontal driving means, precharge means for writing the maximum charge level and halftone level precharge signal of the video signal to the signal line in two steps,
The display device according to claim 1, wherein the precharge means performs writing of the halftone level on all signal lines while thinning out writing of the maximum amplitude level for each predetermined signal line. The precharge means writes the maximum amplitude level and the halftone level to the odd-numbered signal lines in a certain horizontal scanning period, and writes only the halftone level to the even-numbered signal lines. In the next horizontal scanning period, only the halftone level is written to the odd-numbered signal lines, and the maximum amplitude level and the halftone level are written to the even-numbered signal lines. The display device according to claim 4. In a display device including a pixel array unit in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and signal lines are wired for each pixel column with respect to the matrix arrangement,
While sequentially selecting each pixel of the pixel array unit in units of rows, prior to writing a video signal through the signal line to each pixel in the selected pixel row, the maximum amplitude level of the video signal is A precharge method for writing a precharge signal of a gray level to the signal line in two steps,
A precharge method for a display device, wherein writing of the halftone level is performed on all signal lines while thinning out writing of the maximum amplitude level for each predetermined signal line.

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