JP2006304092A - Bpsk signal demodulator and demodulation method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a BPSK signal demodulator which is suitable for carrying a system LSI and performing DSP signal processing, and a demodulation method. <P>SOLUTION: Phase transition point detectors 13a, 13b of the BPSK signal demodulator 7 acquire phase transition points from complex base band signals obtained by a local oscillator 10, mixers 11a, 11b, and lowpass filters 12a, 12b, and signal level detectors 14a, 14b acquire signal levels of the complex base band signals. A switchover part 15 switches and outputs it in response to the signal level so that a data demodulator 16 demodulates the data, and a clock reproducer 17 reproduces a clock. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention demodulates a BPSK (Binary Phase Shift Keying) modulation signal that transmits biphase-modulated digital data such as an RDS (Radio Data System) signal multiplexed in FM radio broadcasting. The present invention relates to a demodulating apparatus and demodulating method for a BPSK signal.

  The RDS method, which is a data multiplexing method in FM radio broadcasting, is widely used in Europe and the United States, and is characterized by multiplexing and transmitting biphase-modulated digital data as a BPSK signal into a signal called a composite signal. is there.

  Various BPSK signal demodulating apparatuses and demodulation methods whose main purpose is to demodulate this RDS multiplexed signal (hereinafter abbreviated as RDS signal) have been proposed.

  For example, in Patent Document 1, an RDS signal is filtered and extracted by a bandpass filter (hereinafter abbreviated as BPF) having a center frequency of 57 kHz, which is the carrier frequency of the RDS signal, and the extracted RDS signal is compared with a comparator (comparison). In other words, a configuration is disclosed in which binarization is performed by a device, and then a 57 kHz carrier is regenerated and supplied to subsequent demodulation processing.

  Further, in Patent Document 2, an RDS signal centered at 57 kHz is extracted using a bandpass filter, that is, BPF, and then binarized by a comparator and input to a 57 kHz carrier reproducing and demodulating means comprising a Costas loop. It is shown.

The configurations disclosed in the above two documents, that is, extraction of the RDS signal by the BPF, binarization processing by the comparator provided immediately after the BPF, PLL or Costas loop from the binarized RDS signal, etc. The configuration provided with means for reproducing the 57 kHz carrier signal using the feedback control is widely used as a general configuration, particularly as a configuration suitable for realizing an RDS demodulation dedicated LSI.
JP-A-9-289504 (FIGS. 1 and 2) Japanese Unexamined Patent Publication No. 63-303546 (FIG. 4)

  However, although the conventional configuration described above is a very effective configuration when the demodulation processing of the RDS signal is implemented by a dedicated IC, only the RDS signal is reliably extracted from the BPF without impairing the RDS signal itself. Therefore, it is important to use a filter with no phase rotation in the passband and having a steep cutoff characteristic, and a special circuit component such as a switched capacitor filter (hereinafter referred to as SCF) is required for the configuration. Further, in order to perform the subsequent processing after the binarization processing, high time resolution is required, and a fast clock frequency is required. Further, there are constraints such as the necessity of components including feedback processing such as PLL or Costas loop.

  For this reason, when performing BPSK signal demodulation by software processing using a digital signal processor (hereinafter referred to as DSP) that has become the mainstream particularly in radio receivers for in-vehicle use, an SCF is installed on a system LSI including the DSP. It becomes necessary to install special cells such as this, which is a great restriction on the manufacturing process. In addition, it is necessary to increase the DSP processing clock due to the requirement of time resolution by binarization processing, which increases power consumption and the like. Furthermore, many DSP processing steps are required to realize processing including feedback processing such as PLL and Costas loop. Therefore, there are many problems in mounting the system LSI because of these things.

  The present invention solves the above-described conventional problems, and can be realized even at a low clock frequency by multi-value processing suitable for DSP processing without using components including feedback processing such as dedicated BPF and PLL and Costas loop. Accordingly, it is an object of the present invention to provide a BPSK signal demodulating device and a demodulating method that can be easily mounted on a system LSI.

  In order to achieve the above object, a BPSK signal demodulating device according to the present invention comprises a local oscillation means for generating two systems of 57 kHz signals having a phase difference of 90 degrees, and a composite signal including an input RDS signal. , Two mixers for mixing the two 57 kHz signals generated by the local oscillation means, and two low-pass filters for extracting RDS signals converted into complex baseband signals from the output signals of the two mixers And two phase transition point detecting means for detecting phase transition points included in the complex baseband RDS signal output from the two low-pass filter means, and the two phase transition point detecting means. Signal level detecting means for detecting the signal level of the signal, the two phase transition point detecting means and the two signal level detecting means Switching combining means for generating a phase transition point signal by selecting or synthesizing one of the outputs of the two phase transition point detection means based on the outputs of the two signal level detection means. It is characterized by providing.

  Note that the present invention can be realized not only as such a BPSK signal demodulator, but also as a BPSK signal demodulator method using characteristic means of such a BPSK signal demodulator as a step.

  With this configuration, demodulation of a BPSK signal can be realized by multi-value processing suitable for DSP processing at a low clock frequency without using components including feedback processing such as dedicated BPF and PLL or Costas loop.

  According to the BPSK signal demodulating apparatus and the demodulating method of the present invention, processing at a special cell such as SCF or clock frequency is not required, and software processing by a DSP or the like can be performed, so that it can be easily mounted on a system LSI or the like.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 is a block diagram showing an example of the overall configuration of a radio receiver system using the BPSK signal demodulating apparatus according to Embodiment 1 of the present invention.

  As shown in FIG. 1, the radio receiver system 300 performs frequency conversion of an antenna 1 and a high-frequency signal received by the antenna 1 to perform intermediate frequency (hereinafter abbreviated as IF) signal processing. IF processor 2, AD converter 3 that converts an analog IF signal into a digital signal, FM demodulator 4, stereo demodulator 5, and DA that converts a digital audio signal obtained by demodulation processing into an analog audio signal The conversion part 6 and the BPSK signal demodulation apparatus 7 which concerns on Embodiment 1 of this invention are provided.

  The high frequency signal received by the antenna 1 is converted into an IF signal by the frequency conversion / IF processing unit 2 and converted into a digital signal by the AD conversion unit 3. The IF signal converted into a digital signal is detected and demodulated by the FM demodulator 4 to extract a composite signal which is a multiplexed signal. The composite signal is a multiplexed signal including a main and sub signal of stereo sound, a pilot signal for stereo demodulation, and an RDS signal. The composite signal is demodulated into a stereo audio signal by the stereo demodulator 5, analog-converted by the DA converter, and output. On the other hand, the composite signal output from the FM demodulator 4 is input to the BPSK signal demodulator 7 according to the first embodiment of the present invention via the path 100 and subjected to demodulation processing, and then the RDS data is input to the path 105. The RDS clock signal is output to the path 106. In the radio receiver system 300 shown in FIG. 1, it is becoming mainstream in recent years to mount a block 200 surrounded by a broken line as a system LSI.

FIG. 2 is a block diagram showing a detailed configuration of the BPSK signal demodulator 7 shown in FIG.
As shown in FIG. 2, the BPSK signal demodulator 7 includes a local oscillator 10 that self-runs two 57 kHz signals whose phases are different by 90 degrees, a composite signal including an input RDS signal, Two mixers 11a and 11b for mixing the two 57 kHz signals generated by the local oscillator 10, two low-pass filters 12a and 12b connected to the outputs of the mixers 11a and 11b, and a low-pass filter 12a , 12b, two phase transition point detectors 13a, 13b connected to the outputs, signal level detectors 14a, 14b connected to the phase transition point detectors 13a, 13b, and phase transition point detectors 13a, 13b, Based on the switching unit 15 connected to the signal level detection units 14a and 14b and the phase transition point signal output from the switching unit 15, the RDS data A data demodulation unit 16 for demodulating a is connected to the switching unit 15, and a clock reproducing unit 17 for reproducing the RDS clock.

Next, the operation of the BPSK signal demodulator 7 will be described.
As described above, the composite signal including the RDS signal is input to the path 100.

  The local oscillating unit 10 self-runs two systems of 57 kHz signals that are 90 degrees out of phase and supplies them to the mixers 11a and 11b.

  The mixers 11a and 11b respectively mix the composite signal input from the path 100 and the 57 kHz signal supplied from the local oscillator 10 and output the mixed signal to the low-pass filters 12a and 12b.

  The low-pass filters 12a and 12b extract the RDS signal converted into the baseband signal by the mixer process.

  A baseband RDS signal having a waveform as shown in FIGS. 3A and 3B is transmitted to the path 101 and the path 102 which are the outputs of the low-pass filters 12a and 12b.

  It should be noted here that the phase and frequency of the 57 kHz signal, which is the carrier frequency of the RDS signal generated and transmitted by the transmission equipment of the broadcasting station, and the 57 kHz signal generated by the local oscillator 10 do not match. It is. As a result, the polarities and amplitudes of the RDS baseband signals transmitted to the path 101 and the path 102 vary from moment to moment.

  In the conventional BPSK signal demodulator, in order to stop this fluctuation, a PLL or Costas loop is formed and feedback control is performed to synchronize the 57 kHz signal output from the local oscillation means with the 57 kHz signal on the broadcasting station side. It was common sense to perform this process.

  However, since the digital data constituting the RDS signal is bi-phase modulated, even if the absolute value of the phase of the RDS signal is unknown, it can be demodulated if a point at which the phase transitions greatly can be detected. is doing. In the signals output to the path 101 and the path 102 described above, the amount of phase transition of the RDS signal corresponds to the amount of change in the signal value. In the example of b), since the zero cross point corresponds to the phase transition point, even if the polarity of the signal fluctuates, the demodulation result is not affected. Further, the fluctuation of the amplitude is characterized in that when the amplitude of one of the signals on the path 101 and the signal of the path 102 is minimized, the amplitude of the other is always maximized. Therefore, if one of the signals is selected and used while considering both signal amplitudes, demodulation can be performed even if there is an amplitude variation.

  The phase transition point detectors 13a and 13b shown in FIG. 2 detect the phase transition point of the RDS baseband signal output to the path 101 and the path 102 described above. As the detection of the phase transition point, it is possible to use a technique such as detection of a zero cross point of an RDS baseband signal, detection of a signal value difference between upper and lower peaks, or detection of a peak after differentiation processing as described above. it can. The phase transition point detection signal is supplied to the switching unit 15 via the path 103 and the path 104. FIGS. 3C and 3D show examples of signal waveforms in the path 103 and the path 104, respectively.

  In the signal level detection units 14a and 14b shown in FIG. 2, the signal level of the RDS baseband signal processed in the phase transition point detection units 13a and 13b is detected. The switching unit 15 appropriately switches and outputs the signal from the path 103 and the signal from the path 104 based on the signal level signals given from the signal level detection units 14a and 14b. The data demodulating unit 16 demodulates the RDS data by biphase decoding based on the phase transition point signal output from the switching unit 15. Similarly, the clock recovery unit 17 recovers the RDS clock based on the phase transition point signal output from the switching unit 15. The RDS data and the RDS clock are output to the outside via the path 105 and the path 106, respectively.

  As described above, according to the BPSK signal demodulating apparatus 7 according to Embodiment 1 of the present invention, the BPF process can be replaced with a low-pass filter unit having a simple configuration, and a synchronous reproduction process of a 57 kHz signal is not required. In addition, since multi-level processing does not require time resolution, it is suitable for system LSI mounting, and demodulation processing can be realized with fewer processing steps when performing DSP processing.

  In the above description, a configuration in which the signals of the path 103 and the path 104 are switched by the switching unit 15 is shown. However, a configuration in which both signals are combined according to each signal level may be employed. In this case, the processing is slightly complicated, but the accuracy of demodulation can be improved.

  In the above description, digital signal processing is taken into account, but similar processing can be realized by analog signal processing.

  Further, as already suggested in the description, it goes without saying that each means constituting the BPSK signal demodulating device 7 described above can be replaced with a processing step and realized by DSP software processing. .

(Embodiment 2)
FIG. 4 is a block diagram showing a configuration of a BPSK signal demodulating apparatus according to Embodiment 2 of the present invention. In FIG. 4, the same components as those in FIG.

  As shown in FIG. 4, the BPSK signal demodulator 8 includes a local oscillator 10, mixers 11 a and 11 b, low-pass filters 12 a and 12 b, phase transition point detectors 13 a and 13 b, and signal levels that constitute the BPSK signal demodulator 7. In addition to the detection units 14a and 14b, the switching unit 15, the data demodulation unit 16, and the clock recovery unit 17, a reliability determination unit 20a connected to the outputs of the signal level detection units 14a and 14b is further provided.

  As described above, since the signals input to the phase transition point detectors 13a and 13b have a complementary relationship that when one is minimum, the other is maximum, the signals are output from the signal level detectors 14a and 14b. When both level detection output signals are large or small, it can be determined that a normal RDS signal has not been received. By performing the determination process by the reliability determination unit 20a and outputting the determination result together with the RDS data and the RDS clock, the reliability information of the output data can be obtained with a simple configuration.

  Needless to say, in the second embodiment, as in the first embodiment, each means constituting the BPSK signal demodulating device 8 can be replaced with a processing step and realized by DSP software processing. .

(Embodiment 3)
FIG. 5 is a block diagram showing a configuration of a BPSK signal demodulating apparatus according to Embodiment 3 of the present invention. In FIG. 5, the same components as those in FIGS. 2 and 4 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIG. 5, the BPSK signal demodulator 9 includes a local oscillator 10, mixers 11 a and 11 b, low-pass filters 12 a and 12 b, phase transition point detectors 13 a and 13 b, and signal levels that constitute the BPSK signal demodulator 7. In addition to the detectors 14a and 14b, the switching unit 15, the data demodulator 16 and the clock recovery unit 17, the period detectors 21a and 21b connected to the outputs of the phase transition point detectors 13a and 13b, respectively, and the period detector And a reliability determination unit 20b connected to 21a and 21b.

  The signals of the path 103 and the path 104, which are the outputs of the phase transition point detectors 13a and 13b, have a characteristic that they are output at intervals of 1 or 2 times a predetermined period when receiving normally. For this reason, the period of the signal of the said path | route is detected by the period detection parts 21a and 21b, and when the period becomes abnormal, the reliability determination part 20b determines what is not normally received. By outputting the determination result together with the RDS data and the RDS clock, output data reliability information can be obtained with a relatively simple configuration.

  Also in the third embodiment, as in the first and second embodiments, each means constituting the BPSK signal demodulating device 8 can be replaced with a processing step and realized by DSP software processing. Needless to say.

  Note that the above-described BPSK signal demodulating devices 7 to 9 themselves and the block 200 including the BPSK signal demodulating devices 7 to 9 may be mounted as a system LSI.

  The BPSK signal demodulating apparatus and demodulating method according to the present invention can be realized with a configuration suitable for DSP processing that does not require BPF processing by a special cell or carrier synchronization processing by feedback processing, and is a system LSI integrated with a radio receiving system. Very useful in mounting

It is a block diagram which shows an example of a structure of the radio reception system using the BPSK signal demodulation apparatus which concerns on Embodiment 1 of this invention. It is a block diagram which shows the detailed structure of the BPSK signal demodulation apparatus 7 shown by FIG. It is a schematic diagram which shows an example of the signal waveform transmitted to each path | route in FIG. It is a block diagram which shows the structure of the BPSK signal demodulation apparatus which concerns on Embodiment 2 of this invention. It is a block diagram which shows the structure of the BPSK signal demodulation apparatus which concerns on Embodiment 3 of this invention.

Explanation of symbols

7, 8, 9 BPSK signal demodulator 10 Local oscillator 11a, 11b Mixer 12a, 12b Low pass filter 13a, 13b Phase transition point detector 14a, 14b Signal level detector 15 Switching unit 16 Data demodulator 17 Clock recovery unit 20a, 20b Reliability determination unit 21a, 21b Period detection unit

Claims (6)

Local oscillating means for autonomously generating two systems of predetermined frequency signals whose phases differ by 90 degrees;
Each of the two predetermined frequency signals generated by the local oscillating means and two mixers for mixing the input signal;
Two low pass filter means respectively connected to the outputs of the two mixers;
Two phase transition point detection means respectively connected to the outputs of the two low-pass filter means;
Two signal level detection means for detecting a signal level of a signal processed in each of the two phase transition point detection means;
Connected to the outputs of the two phase transition point detection means and the two signal level detection means, and selectively outputs one of the outputs of the two phase transition point detection means according to the outputs of the two signal level detection means Switching means to
Data demodulating means for outputting biphase decoded data based on the phase transition point signal output from the switching means;
A BPSK signal demodulating device comprising: a clock recovery means for reproducing and outputting a clock signal of a biphase signal based on the phase transition point signal output from the switching means. The BPSK signal demodulating device is further connected to outputs of the two signal level detecting means, and based on outputs of the two signal level detecting means, reliability data of demodulated output data output from the data demodulating means The BPSK signal demodulator according to claim 1, further comprising: a reliability determination unit that outputs a signal. The BPSK signal demodulator is further connected to outputs of the two phase transition point detecting means, and two period detecting means for detecting each signal period;
A reliability determination unit that is connected to the two cycle detection units and outputs reliability data of the demodulated output data output from the data demodulation unit based on the cycle data of each of the two cycle detection units. The BPSK signal demodulator according to claim 1. A local oscillation processing step for autonomously generating two systems of predetermined frequency signal data having a phase difference of 90 degrees;
Two mixer processing steps for mixing each of the two systems of predetermined frequency data generated by the local oscillation processing step and input signal data;
Two low-pass filter processing steps for filtering each of the output data of the two mixer processing steps;
Two phase transition point detection processing steps for processing each output data of the two low-pass filter processing steps to detect a phase transition point;
Two signal level detection processing steps for detecting the signal level of the signal processed in each of the two phase transition point detection processing steps;
A switching processing step for selectively outputting one of the outputs of the two phase transition point detection processing steps according to the output data of the two signal level detection processing steps;
A data demodulation processing step for outputting biphase decoded data based on the phase transition point signal data output from the switching processing step;
And a clock recovery processing step of recovering and outputting the clock signal data of the biphase signal based on the phase transition point signal data output from the switching processing step. The BPSK signal demodulation method further includes a reliability determination processing step of outputting reliability data of the demodulated output data output from the data demodulation processing step, with the output data of the two signal level detection processing steps as input. The BPSK signal demodulation method according to claim 4. The BPSK signal demodulation method further includes two period detection processing steps for detecting each signal period based on output data of each of the two phase transition point detection processing steps;
5. A reliability determination processing step of outputting reliability data of demodulated output data output from the data demodulation processing step based on each cycle data of the two cycle detection processing steps. The BPSK signal demodulation method described.

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