JP2006295551A - High-output amplifier and multistage high-output amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a high-output amplifier being miniaturized and having small loss for the output power. <P>SOLUTION: The high-output amplifier has a main amplifier 2 amplifying a high-frequency signal input, in response to the base current, the base bias circuit 5 for controlling the base current of the main amplifier 2, in response to a differential current Iset-Ifb and a reference circuit 6 for generating a reference current Iset corresponding to the reference voltage Vset of a reference power supply 7. The high-output amplifier further has a detector 8 detecting the base current of the base bias circuit 5 and generating a feedback current Ifb, where the detecting current is level-adjusted by the reference current of the reference circuit 6 and a current comparison circuit 9 feeds back the differential current Iset-Ifb, level-adjusted by the reference current Iset of the reference circuit 6 and the detector 8, to the base bias circuit 5. Since the base current of the base bias circuit 5, controlling the base current of the main amplifier 2, is detected, the high-output amplifier can be miniaturized, and loss of the output power is reduced without having to use a distributor. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a high-power amplifier and a multistage high-power amplifier used for satellite communication, terrestrial microwave communication, mobile communication, or the like.

In a high frequency amplifier for a mobile phone terminal, it is necessary to control output power according to the distance to the base station and environmental conditions. In that case, a feedback control circuit configuration is generally used to improve the accuracy of output power control and shorten the time required for adjustment.
A high-frequency amplifier module using a conventional feedback control circuit configuration includes a main amplifier that amplifies a high-frequency signal input from a high-frequency input terminal, an output matching circuit that performs output matching at a high-frequency output terminal, an output matching circuit, and a high-frequency output Distributor for distributing a part of the amplified high-frequency signal provided between the terminals, a log amplifier for detecting the distributed high-frequency signal and converting it to a voltage signal, and the voltage signal and the voltage supplied to the control terminal And a control circuit that controls the output power of the main amplifier by changing the bias voltage supplied to the main amplifier according to the above. (For example, refer nonpatent literature 1).

2003 IEEE Radio Frequency Integrated Circuits Symposium p. 129-132

  Since the conventional high-frequency amplifier is configured as described above, a distributor is used as a means for detecting the output power of the main amplifier. Therefore, the use of this distributor increases the overall module size. Further, since the distributor is provided on the high frequency output terminal side, there is a problem that a loss due to the branch of the distributor leads to a decrease in output power as it is.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a high-output amplifier and a multi-stage high-output amplifier that are small and have a small output power loss.

  A high-power amplifier according to the present invention is configured with a bipolar transistor as an amplifying element, and controls a high-frequency amplifier circuit that amplifies a high-frequency signal input according to a base current and a base current of the high-frequency amplifier circuit according to a differential current A base bias circuit, a reference circuit that generates a reference current according to a reference power supply voltage, a detection circuit that detects the base current of the base bias circuit and adjusts the level of the detected current to the reference current of the reference circuit, and And a current comparison circuit that feeds back a differential current between the reference current and the detection current whose level is adjusted by the detection circuit to the base bias circuit.

  According to the present invention, since the base current of the base bias circuit that controls the base current of the high-frequency amplifier circuit is detected, there is an effect that it is possible to reduce the loss of output power in a small size without using a distributor.

Embodiment 1 FIG.
FIG. 1 is a block diagram showing a high-power amplifier according to Embodiment 1 of the present invention. In the figure, a main amplifier (high frequency amplifier circuit) 2 is configured with a bipolar transistor as an amplifier element, and is based on a base bias circuit 5 described later. The high frequency signal inputted from the high frequency input terminal 1 is amplified according to the supplied base current. The output matching circuit 3 is connected to the main amplifier 2 and performs output matching at the high frequency output terminal 4.
The base bias circuit 5 controls the base current of the main amplifier 2 in accordance with a differential current from a current comparison circuit 9 described later. The reference circuit 6 generates a reference current Iset corresponding to the reference voltage Vset of the reference power supply 7. The detection circuit 8 detects the base current of the base bias circuit 5 and converts the detected current into a feedback current Ifb whose level is adjusted to the reference current Iset of the reference circuit 6. The current comparison circuit 9 feeds back a differential current between the reference current Iset of the reference circuit 6 and the level-adjusted feedback current Ifb of the detection circuit 8 to the base bias circuit 5.

Next, the operation will be described.
In FIG. 1, a high frequency signal is input to a main amplifier 2 from a high frequency input terminal 1 and amplified, and then output from a high frequency output terminal 4. Here, the base electrode of the main amplifier 2 is connected to the base bias circuit 5 and supplied with a base current. The reference circuit 6 generates a reference current Iset according to the reference voltage Vset of the reference power supply 7. The base current of the base bias circuit 5 is input to the detection circuit 8, and after being matched in level with the reference current Iset, is output as a feedback current Ifb.
In the current comparison circuit 9, a difference current Iset−Ifb between the reference current Iset of the reference circuit 6 and the feedback current Ifb of the detection circuit 8 is fed back to the base bias circuit 5. The current comparison circuit 9 and the base bias circuit 5 continue the feedback control so that the differential current Iset−Ifb becomes zero, and converge when it becomes zero.

FIG. 2 is a characteristic diagram showing the relationship between the output power Pout of the main amplifier and the logarithm of the feedback current Ifb. In FIG. 2, the feedback current Ifb from the detection circuit 8 is proportional to the base current of the main amplifier 2, and therefore increases as the output power Pout of the main amplifier 2 increases. Therefore, the output power Pout of the main amplifier 2 and the logarithm (log value) of the feedback current Ifb have a linear function relationship.
FIG. 3 is a characteristic diagram showing the relationship between the reference voltage Vset of the reference power supply and the logarithm of the reference current Iset. In FIG. 3, the reference voltage Vset of the reference power supply 7 is proportional to the logarithm (log value) of the reference current Iset by the reference circuit 6, and the slope of the characteristic shown in FIG. 2 and the slope of the characteristic shown in FIG. The high power amplifier is configured to be equal.
FIG. 4 is a characteristic diagram showing the relationship between the reference voltage Vset of the reference power supply and the output power Pout of the main amplifier. 4, the logarithm of the output power Pout and the feedback current Ifb is equal to that of FIGS. 2 and 3, the logarithm of the reference voltage Vset and the reference current Iset is equal, and the current comparison circuit 9 makes the reference current Iset and the feedback current Ifb. As shown in FIG. 4, the relationship between the reference voltage Vset and the output power Pout is also a linear function. That is, the output power Pout of the main amplifier 2 can be controlled by the reference voltage Vset of the reference power supply 7.

  FIG. 5 is a circuit diagram showing details of the base bias circuit. In the figure, a terminal A is connected to a terminal A of the detection circuit of FIG. 6 described later, and a feedback current Ifb is output. The terminal B is connected to a terminal B of a reference circuit shown in FIG. 7 described later, and receives a reference current Iset. The resistor 12 is connected to the intersection of the bias power supply 11 and the terminals A and B. The npn current mirror circuit 13 includes two npn transistors 13 a and 13 b, and the collector of the npn transistor 13 a is connected to the resistor 12. The pnp current mirror circuit 14 includes two pnp transistors 14a and 14b and two resistors 14c and 14d. The pnp current mirror circuit 14 is connected to the bias power supply 11, and the collector of the pnp transistor 14a is connected to the collector of the npn transistor 13b. The bias transistor 15 has a collector connected to the collector of the pnp transistor 14b. The terminal C is connected to the terminal C of the detection circuit of FIG. 6 to be described later, and receives the detection current Ikenpa. The base current compensation transistor 16 has a collector connected to the terminal C and a base connected between the pnp transistor 14 b and the bias transistor 15. The bias applying inductor 17 is connected to the base of the bias transistor 15 and the emitter of the base current compensation transistor 16, and is further connected to the base of the bipolar transistor constituting the main amplifier 2 to supply the base current Ib. The bias transistor 15 and the bipolar transistor constituting the main amplifier 2 constitute a current mirror circuit.

  FIG. 6 is a circuit diagram showing details of the detection circuit. In the figure, the pnp current mirror circuit 21 is composed of two pnp transistors 21a and 21b and two resistors 21c and 21d, and is connected to the bias power supply 11. is there. The terminal C is connected to the collector of the pnp transistor 21a. The npn current mirror circuit 22 includes two npn transistors 22a and 22b and two resistors 22c and 22d. The collector of the npn transistor 22a is connected to the collector of the pnp transistor 21b. Terminal A is connected to the collector of npn transistor 22b.

  FIG. 7 is a circuit diagram showing details of the reference circuit. In the figure, resistors 31 a to 31 f are connected to the reference power supply 7 and the bias power supply 11. The transistors 32a to 32c are connected in series to the resistor 31a. The pnp current mirror circuit 33 includes two pnp transistors 33 a and 33 b and two resistors 33 c and 33 d and is connected to the bias power supply 11. The npn transistor 34 has a base connected to the resistor 31f and a collector connected to the collector of the pnp transistor 33a. The npn current mirror circuit 35 includes two npn transistors 35a and 35b and two resistors 35c and 35d, and the collector of the npn transistor 35a is connected to the collector of the pnp transistor 33b. The pnp current mirror circuit 36 includes two pnp transistors 36a and 36b and two resistors 36c and 36d, and is connected to the bias power supply 11. The collector of the pnp transistor 36a is connected to the collector of the npn transistor 35b. The terminal B is connected to the collector of the pnp transistor 36b.

In the base bias circuit 5 of FIG. 5, the feedback current Ifb is output from the terminal A to the terminal A of the detection circuit 8 of FIG. 6, and the reference current Iset is input from the terminal B of the reference circuit 6 of FIG. The Therefore, a differential current between the reference current Iset of the reference circuit 6 and the feedback current Ifb of the detection circuit 8 is fed back to the base bias circuit 5. This is a circuit corresponding to the current comparison circuit 9.
The differential current Iset-Ifb is changed to a current mirror ratio times by the npn current mirror circuit 13, and the current is further changed to a current mirror ratio times by the pnp current mirror circuit 14 and becomes the collector current of the bias transistor 15. Since the bias transistor 15 and the bipolar transistor constituting the main amplifier 2 constitute a current mirror circuit, the base current Ib corresponding to the current mirror ratio is supplied to the base of the main amplifier 2 through the bias applying inductor 17. Further, the detection current Ikenpa flowing through the base current compensation transistor 16 increases and decreases according to the increase and decrease of the base current Ib, and this detection current Ikenpa is used in the detection circuit 8 of FIG.
Here, the detection current Ikenpa is increased by using the npn current mirror circuit 13 and the pnp current mirror circuit 14 so that the processing in the detection circuit 8 is easy, but depending on the case, the npn current mirror circuit 13 and The pnp current mirror circuit 14 may not be used. Similarly, the current mirror ratio may be adjusted to facilitate the processing.

In the detection circuit 8 of FIG. 6, the detection current Ikenpa of the base bias circuit 5 is changed to a current mirror ratio times by the pnp current mirror circuit 21, and the current is further changed to a current mirror ratio times by the npn current mirror circuit 22. The feedback current Ifb is fed back to the base bias circuit 5.
Therefore, in the base bias circuit 5 of FIG. 5, when the differential current Iset-Ifb is generated, the feedback current Ifb is increased by increasing the detection current Ikenpa, and the differential current Iset-Ifb is controlled to be zero. Is done.
Note that the current mirror ratio may be adjusted to facilitate processing.

In the reference circuit 6 of FIG. 7, the current determined by the reference voltage Vset of the reference power supply 7 and the resistors 31 a to 31 f is supplied to the npn transistor 34. The collector current of the npn transistor 34 is changed according to the current mirror ratios of the pnp current mirror circuits 33 and 36 and the npn current mirror circuit 35 and then output to the base bias circuit 5 as the reference current Iset.
Therefore, if the reference voltage Vset of the reference power supply 7 is increased to increase the reference current Iset, the differential current Iset-Ifb is generated, the base current Ib is increased, and the output power Pout of the main amplifier 2 is increased. Further, the detection current Ikenpa is increased by increasing the base current Ib, and the differential current Iset−Ifb is controlled to be 0 by increasing the feedback current Ifb.
Here, the pnp current mirror circuits 33 and 36 and the npn current mirror circuit 35 are increased to facilitate the processing of the differential current Iset. However, depending on the case, the pnp current mirror circuits 33 and 36 and npn are used. The current mirror circuit 35 may not be used. Similarly, the current mirror ratio may be adjusted to facilitate the processing.

As described above, according to the first embodiment, since the base current of the base bias circuit 5 that controls the base current of the main amplifier 2 is detected, the output power loss can be reduced without using a distributor. can do.
Further, as shown in FIG. 2, the base bias circuit 5 and the detection circuit 8 shown in FIGS. 5 and 6 make the primary output power Pout of the main amplifier 2 and the logarithm (log value) of the feedback current Ifb. As shown in FIG. 3, the reference circuit 6 shown in FIG. 7 is proportional to the reference voltage Vset of the reference power supply 7 and the logarithm (log value) of the reference current Iset by the reference circuit 6. In addition, since this high-power amplifier is configured so that the slope of the characteristic shown in FIG. 2 is equal to the slope of the characteristic shown in FIG. 3, the reference current Iset of the reference circuit 6 and the level-adjusted feedback of the detection circuit 8 The output current Pout of the main amplifier 2 can be obtained with high accuracy according to the reference voltage Vset of the reference power supply 7 simply by feeding back the difference current Iset-Ifb from the current Ifb to the base bias circuit 5. Gosuru can.
Further, since the base bias circuit 5, the reference circuit 6 and the detection circuit 8 are mainly composed of transistors as shown in FIGS. 5 to 7, the circuit scale can be reduced by integrating the main amplifier with one chip. it can.
Further, as shown in FIGS. 5 to 7, the base bias circuit 5, the reference circuit 6, and the detection circuit 8 have a large number of adjustment points, and therefore can correspond to any main amplifier 2.
In the first embodiment, as shown in FIGS. 2 and 3, the comparison is performed using the logarithm of the current (log value). However, the comparison using the logarithm is not necessarily required.

Embodiment 2. FIG.
FIG. 8 is a block diagram showing a high output amplifier according to the second embodiment of the present invention. In the figure, a collector bias circuit comprising a collector power supply 41, a bias applying inductor 42 and a minute resistor 43 supplies a collector current to the main amplifier 2. To supply.
The base bias circuit 5a controls the base current of the main amplifier 2 in accordance with the differential current from the current comparison circuit 9, but the point different from FIG. The power supply 11 is connected.
The detection circuit 8 a detects the collector current supplied to the main amplifier 2 by the collector bias circuit, and converts the detected current into a feedback current Icc whose level is adjusted to the reference current Iset of the reference circuit 6. The difference from FIG. 6 showing the details is that the collector current detected from the minute resistor 43 in FIG. 8 flows in the pnp transistor 21 a of the pnp current mirror circuit 21. The rest is the same as in FIG. 1 except that the feedback current Icc is fed back to the base bias circuit 5a.

Next, the operation will be described.
In FIG. 8, the high frequency signal is input to the main amplifier 2 from the high frequency input terminal 1 and amplified, and then output from the high frequency output terminal 4. Here, the base electrode of the main amplifier 2 is connected to the base bias circuit 5a and supplied with a base current. A collector current is supplied to the collector of the main amplifier 2 from a collector bias circuit including a collector power supply 41, a bias applying inductor 42 and a minute resistor 43. A current proportional to the collector current is detected by the detection circuit 8a from the voltage drop caused by the minute resistor 43, and after matching the level with the reference current Iset, it is output as a feedback current Icc.
In the current comparison circuit 9, a differential current between the reference current Iset of the reference circuit 6 and the feedback current Icc of the detection circuit 8a is fed back to the base bias circuit 5a. The current comparison circuit 9 and the base bias circuit 5a continue the feedback control so that the difference current becomes zero, and converge when the difference current becomes zero.

FIG. 9 is a characteristic diagram showing the relationship between the output power Pout of the main amplifier and the logarithm of the feedback current Icc. In FIG. 9, since the feedback current Icc by the detection circuit 8a is proportional to the collector current of the main amplifier 2, the output power Pout of the main amplifier 2 increases as the output power Pout increases. Therefore, the output power Pout of the main amplifier 2 and the logarithm (log value) of the feedback current Icc have a linear function relationship.
FIG. 10 is a characteristic diagram showing the relationship between the reference voltage Vset of the reference power supply and the logarithm of the reference current Iset. In FIG. 10, the reference voltage Vset of the reference power supply 7 and the logarithm (log value) of the reference current Iset by the reference circuit 6 are proportional to each other, and the slope of the characteristic shown in FIG. 9 and the slope of the characteristic shown in FIG. This high power amplifier is configured to be equal.
FIG. 11 is a characteristic diagram showing the relationship between the reference voltage Vset of the reference power supply and the output power Pout of the main amplifier. In FIG. 11, the logarithm of the output power Pout and the feedback current Icc is equal to that of FIGS. 9 and 10, the logarithm of the reference voltage Vset and the reference current Iset is equal, and the current comparison circuit 9 makes the reference current Iset and the feedback current Icc. As shown in FIG. 11, the relationship between the reference voltage Vset and the output power Pout is also a linear function. That is, the output power Pout of the main amplifier 2 can be controlled by the reference voltage Vset of the reference power supply 7.

As described above, according to the second embodiment, the collector current supplied to the main amplifier 2 by the collector bias circuit is detected by the microcircuit 43 and the detection circuit 8a, so that it is small without using a distributor. Loss of output power can be reduced.
Further, the base bias circuit 5a and the detection circuit 8a shown in FIGS. 5 and 6 use the primary power to output the output power Pout of the main amplifier 2 and the logarithm (log value) of the feedback current Icc as shown in FIG. As shown in FIG. 10, the reference circuit 6 shown in FIG. 7 is proportional to the reference voltage Vset of the reference power supply 7 and the logarithm (log value) of the reference current Iset by the reference circuit 6. Further, since this high-power amplifier is configured so as to be equal to the slope of the characteristic shown in FIG. 9 and the slope of the characteristic shown in FIG. 10, the reference current Iset of the reference circuit 6 and the level-adjusted feedback of the detection circuit 8 By simply feeding back the difference current Iset-Icc from the current Icc to the base bias circuit 5a, the output power Pout of the main amplifier 2 according to the reference voltage Vset of the reference power supply 7 is obtained. It can be controlled with high accuracy.
Further, since the base bias circuit 5a, the reference circuit 6 and the detection circuit 8a are mainly composed of transistors as shown in FIGS. 5 to 7, the circuit scale can be reduced by integrating the main amplifier with one chip. it can.
Further, as shown in FIGS. 5 to 7, the base bias circuit 5a, the reference circuit 6 and the detection circuit 8a can be applied to all the main amplifiers 2 because there are many adjustment points.
In the second embodiment, as shown in FIGS. 9 and 10, the comparison is performed using the logarithm of the current (log value). However, the comparison using the logarithm is not necessarily required.

Embodiment 3 FIG.
FIG. 12 is a block diagram showing a multi-stage high-output amplifier according to Embodiment 3 of the present invention. In the figure, the pre-stage amplifiers 52 and 53 sequentially amplify high-frequency signals inputted from the high-frequency input terminal 1. The final stage amplifier 54 corresponds to the high output amplifier shown in the first embodiment or the second embodiment, and is connected to the final stage of the previous stage amplifiers 52 and 53, amplifies a high frequency signal, and outputs a high frequency signal. The signal is output from the terminal 55.

Next, the operation will be described.
In FIG. 12, the high frequency signal is input to the preamplifier 52 from the high frequency input terminal 51, amplified, amplified by the preamplifier 53, further amplified by the final amplifier 54, and then output from the high frequency output terminal 55. The
Here, the final stage amplifier 54 is an amplifier capable of controlling the output power by the reference voltage Vset of the reference power supply 7 as shown in the first embodiment or the second embodiment.

As described above, according to the third embodiment, the high output amplifier shown in the first embodiment or the second embodiment can be applied to the multistage high output amplifier, and the output power can be controlled. .
Further, when it is desired to increase the output power control range, the high output amplifier shown in the first embodiment or the second embodiment may be applied to the multistage amplifier including the final stage.

1 is a block diagram showing a high-power amplifier according to Embodiment 1 of the present invention. FIG. It is a characteristic view which shows the relationship between the output electric power Pout of a main amplifier, and the logarithm of the feedback current Ifb. It is a characteristic view showing the relationship between the reference voltage Vset of the reference power supply and the logarithm of the reference current Iset. It is a characteristic view showing the relationship between the reference voltage Vset of the reference power supply and the output power Pout of the main amplifier. It is a circuit diagram which shows the detail of a base bias circuit. It is a circuit diagram which shows the detail of a detection circuit. It is a circuit diagram which shows the detail of a reference circuit. It is a block diagram which shows the high output amplifier by Embodiment 2 of this invention. It is a characteristic view which shows the relationship between the output electric power Pout of a main amplifier, and the logarithm of the feedback current Icc. It is a characteristic view showing the relationship between the reference voltage Vset of the reference power supply and the logarithm of the reference current Iset. It is a characteristic view showing the relationship between the reference voltage Vset of the reference power supply and the output power Pout of the main amplifier. It is a block diagram which shows the multistage high output amplifier by Embodiment 3 of this invention.

Explanation of symbols

  1, 51 high frequency input terminal, 2 main amplifier (high frequency amplification circuit), 3 output matching circuit, 4,55 high frequency output terminal, 5, 5a base bias circuit, 6 reference circuit, 7 reference power supply, 8, 8a detection circuit, 9 Current comparator circuit, 11 bias power source, 12, 14c, 14d, 22c, 22d, 31a to 31f, 33c, 33d, 35c, 35d, 36c, 36d resistor, 13, 22, 35 npn current mirror circuit, 13a, 13b, 22a , 22b, 34, 35a, 35b npn transistor, 14, 21, 33, 36 pnp current mirror circuit, 14a, 14b, 21a, 21b, 33a, 33b, 36a, 36b pnp transistor, 15 bias transistor, 16 base current compensation transistor , 17 Bias application inductor, 32a ~ 2c transistor, 41 collector power, 42 bias inductor, 43 minute resistance, 52 and 53 pre-amplifier, 54 final-stage amplifier.

Claims (5)

A high frequency amplifier circuit configured to amplify a high frequency signal input according to a base current, the bipolar transistor being configured as an amplifying element;
A base bias circuit that controls the base current of the high-frequency amplifier circuit according to the differential current;
A reference circuit for generating a reference current according to the reference power supply voltage;
A detection circuit that detects the base current of the base bias circuit and adjusts the level of the detection current to the reference current of the reference circuit;
A high-power amplifier comprising: a current comparison circuit that feeds back a differential current between a reference current of the reference circuit and a detection current whose level is adjusted by the detection circuit to the base bias circuit.   2. The high-power amplifier according to claim 1, wherein a change amount of the base current with respect to the output power of the high-frequency amplifier circuit is equal to a change amount of the reference current with respect to the reference power supply voltage. A high frequency amplifier circuit configured to amplify a high frequency signal input according to a base current, the bipolar transistor being configured as an amplifying element;
A collector bias circuit for supplying a collector current to the high-frequency amplifier circuit;
A base bias circuit that controls the base current of the high-frequency amplifier circuit according to the differential current;
A reference circuit for generating a reference current according to the reference power supply voltage;
A detection circuit that detects a collector current supplied to the high-frequency amplifier circuit by the collector bias circuit, and adjusts the level of the detection current to a reference current of the reference circuit;
A high-power amplifier comprising: a current comparison circuit that feeds back a differential current between a reference current of the reference circuit and a detection current whose level is adjusted by the detection circuit to the base bias circuit.   4. The high output amplifier according to claim 3, wherein a change amount of the collector current with respect to the output power of the high frequency amplifier circuit is made equal to a change amount of the reference current with respect to the reference power supply voltage.   A multi-stage high-power amplifier, wherein the high-power amplifier according to any one of claims 1 to 4 is applied to a final-stage amplifier.

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