JP2006295323A - Imaging apparatus and method of driving solid state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of driving an imaging apparatus which can miniaturize a complete circuit while the amount of deteriorations of a voltage is held down by a load effect to a predetermined allowing range and to provide a method of driving a solid state imaging device. <P>SOLUTION: A digital camera 10 includes a CCD 22 having a light receiving element which accumulates a potential according to a light volume which carried out euphotic, and a perpendicular transfer electrode constellation which reads and transmits cumulated potential to the above light receiving element to timing to which the predetermined voltage is applied. A series regulator 80 supplies a predetermined voltage, and suppresses the reduction in the voltage by the load change with a cumulated electric energy generated when the predetermined voltage is applied by using a bypass condenser 86 for connecting the voltage supplied by the series regulator 80 to the perpendicular transfer electrodes. A timing generator 48 controls so that the origination timing which applies the above predetermined voltage supplied to a perpendicular transfer electrode constellation may be shifted. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention provides an imaging apparatus that receives light corresponding to a subject image with a solid-state imaging device, and reads out charges accumulated in the solid-state imaging device according to the received light amount at a timing when a predetermined voltage is applied. And a driving method of the solid-state imaging device.

  In recent years, imaging devices such as digital cameras that take still images or moving images using a solid-state imaging device such as a CCD (Charge Coupled Device) sensor have become widespread.

  In a CCD sensor used in this type of imaging device, for example, a light-receiving element unit that is squarely arranged for each pixel and photoelectrically converts received light into an electric signal for each pixel, and charges accumulated in each light-receiving element unit. Some include a plurality of vertical transfer paths for reading and transferring, and a horizontal transfer path for transferring charges transferred from each vertical transfer path. Each of the vertical transfer path and the horizontal transfer path is divided into a plurality of regions, and electrodes are provided for each region, and charges can be transferred by sequentially applying a voltage to each region.

  In this type of CCD sensor, when an image of a subject is picked up and a charge corresponding to the amount of light received by the light receiving element portion is accumulated, the charge is transferred to a vertical transfer path region in contact with the light receiving element portion. A predetermined voltage higher than that is applied to read out the charge to the vertical transfer path, and the charge is moved by sequentially applying a voltage to each area of the vertical transfer path and the horizontal transfer path. Patent Document 1 discloses a technique for controlling the timing of applying a voltage to each of the vertical transfer path and each area of the vertical transfer path. The vertical transfer path for reading out charges from the light receiving element portion is divided into a plurality of groups. In other words, the timing at which a predetermined voltage is applied (turned on) to each group coincides with the timing at which a predetermined voltage falls (off) at the other group, and charge is reversely injected into the light receiving element portion during charge reading. It is prevented from occurring.

  By the way, in this type of CCD sensor, if a predetermined voltage is applied to each light receiving element portion, a voltage drop (voltage drop) occurs due to load fluctuation, and the amount of voltage drop exceeds a predetermined allowable range. In some cases, charges could not be read stably.

For this reason, a capacitor is provided in the drive circuit to which the voltage is applied to store electric energy, and when a voltage drop occurs, the voltage is supplemented by the electric energy stored in the capacitor, thereby reducing the voltage drop.
JP 2000-23045 A

  However, in order to reduce the amount of voltage drop due to load fluctuation that occurs when a predetermined voltage is applied to the light receiving element, it is necessary to provide a capacitor with a large capacity, and increasing the capacity of the capacitor reduces the overall circuit size. There was a problem that it was difficult to do.

  In Patent Document 1, the timing at which a predetermined voltage is applied when reading out the electric charge accumulated in the light receiving element portion is controlled so that rising (on) and falling (off) coincide with each other for each group. Although the reverse injection of the charge into the portion is prevented, the voltage drop due to the load fluctuation is not particularly taken into consideration. Further, in order to match the rising (ON) timing and the falling (OFF) timing of a predetermined voltage, the reading period when reading the charges accumulated in the light receiving element portion as a whole is long.

  The present invention has been made in order to solve the above-described problems. An imaging device and a solid-state imaging device capable of downsizing the entire circuit while suppressing an amount of voltage decrease due to load fluctuation within a predetermined range. An object is to provide a driving method.

  In order to achieve the above object, an imaging apparatus according to claim 1 receives light corresponding to a subject image and accumulates electric charge according to the received light amount, and at a timing when a predetermined voltage is applied. A transfer unit that reads and transfers charges accumulated in the light receiving element, a voltage supply unit that supplies the predetermined voltage, and a voltage supplied from the voltage supply unit to the transfer unit. A capacitor connected to a wiring to be applied and suppressing a voltage drop due to load fluctuation caused when a voltage is applied by accumulated electric energy, and the predetermined voltage supplied from the voltage supply means is applied to the transfer unit Control means for controlling the start timing to be shifted.

  According to the first aspect of the present invention, a light receiving element that receives light corresponding to a subject image and accumulates charges according to the received light quantity, and charges accumulated in the light receiving element at a timing when a predetermined voltage is applied. A solid-state image sensor having a transfer unit that reads and transfers the image, and the predetermined voltage is supplied by a voltage supply unit.

  In the present invention, a capacitor is connected to a wiring that applies a voltage supplied from the voltage supply means to the transfer unit, and the capacitor accumulates a decrease in voltage due to a load variation that occurs when a voltage is applied. Suppressed by the electric energy, the control unit controls the start timing to apply the predetermined voltage supplied from the voltage supply unit to the transfer unit.

  As described above, according to the first aspect of the present invention, the stored electric energy stores the voltage drop caused by the load fluctuation that occurs when a predetermined voltage for reading out the electric charge accumulated in the light receiving element is applied by the capacitor. Since the start timing of applying the predetermined voltage to the transfer unit is shifted, the amount of voltage decrease due to load variation can be reduced. Therefore, the entire circuit can be reduced in size while suppressing the amount of voltage drop due to load fluctuation within a predetermined range.

  On the other hand, in order to achieve the above object, the invention described in claim 2 is a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light amount, and a timing at which a predetermined voltage is applied. And a transfer unit that reads and transfers the charge accumulated in the light receiving element, a first voltage that reads the charge accumulated in the light receiving element to the transfer unit, and a predetermined voltage A voltage supply unit that supplies a second voltage that is higher than the first voltage within an allowable range in which fluctuations in the voltage are allowed, and a voltage that is supplied from the voltage supply unit is connected to a wiring that applies the transfer unit And a capacitor that suppresses the voltage drop due to the load fluctuation by the accumulated electrical energy, and the voltage supply so as to supply the second voltage at a timing of reading the charge accumulated in the light receiving element. It comprises a control means for controlling the stage, the.

  According to a second aspect of the present invention, a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light quantity, and electric charge accumulated in the light receiving element at a timing when a predetermined voltage is applied. A solid-state image sensor having a transfer unit that reads and transfers the first charge voltage, and a voltage supply unit that allows the charge accumulated in the light receiving element to be read to the transfer unit, and a change in the voltage is allowed. And a second voltage higher than the first voltage within a predetermined tolerance.

  In the present invention, a capacitor is connected to the wiring that applies the voltage supplied from the voltage supply means to the transfer unit, and the capacitor uses the electrical energy in which the voltage drop due to the load fluctuation is accumulated. The voltage supply unit is controlled by the control unit so as to supply the second voltage at the timing of reading out the electric charge accumulated in the light receiving element.

  As described above, according to the second aspect of the present invention, the capacitor suppresses the voltage drop due to the load variation by the accumulated electric energy, and the control unit reads the charge accumulated in the light receiving element. Since the voltage supply means is controlled so as to supply the second voltage higher than the first voltage within a predetermined allowable range, the amount of decrease in the voltage generated when reading the charge accumulated in the light receiving element Can be kept within a predetermined range. Therefore, the entire circuit can be reduced in size while suppressing the amount of voltage drop due to load fluctuation within a predetermined range.

  According to a second aspect of the present invention, as in the third aspect of the present invention, the control means includes a still image shooting mode for capturing a still image of the subject image and a moving image for capturing a moving image of the subject image. The voltage supply unit may be controlled to change the voltage level of the second voltage in the image capturing mode.

  On the other hand, in order to achieve the above object, the invention described in claim 4 is a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light amount, and a timing at which a predetermined voltage is applied. A transfer unit that reads and transfers the charge accumulated in the light receiving element, a voltage supply unit that supplies the predetermined voltage, and a voltage supplied from the voltage supply unit Connected to the wiring to be applied to the capacitor, the capacitor for suppressing the voltage drop due to the load fluctuation caused when the predetermined voltage is applied by the accumulated electric energy, and the supply power for changing the power supply amount by the voltage supply means The supply power increasing means is controlled so that the supply amount of power increases at the timing of applying the predetermined voltage supplied from the voltage supply means to the transfer unit. It comprises a control means.

  According to a fourth aspect of the present invention, there is provided a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light quantity, and electric charge accumulated in the light receiving element at a timing when a predetermined voltage is applied. A solid-state imaging device having a transfer unit that reads and transfers the voltage, the predetermined voltage is supplied by the voltage supply unit, and the amount of power supplied by the voltage supply unit is supplied by the supply power change unit. Be changed.

  According to the present invention, a capacitor is connected to a wiring that applies a voltage supplied from the voltage supply means to the transfer unit, and a voltage caused by a load variation that occurs when the predetermined voltage is applied by the capacitor. The supply power increasing means is controlled by the control means so that the supply amount of power increases at the timing when the predetermined voltage supplied from the voltage supply means is applied to the transfer unit. Is controlled.

  Thus, according to the invention of claim 4, the capacitor suppresses a decrease in voltage due to load fluctuation that occurs when the predetermined voltage is applied by the accumulated electrical energy, and the control means Since the supply power increasing means is controlled so that the supply amount of power increases at the timing when the predetermined voltage supplied from the voltage supply means is applied to the transfer unit, the amount of decrease in voltage is reduced by the supplied current. can do. Therefore, the entire circuit can be reduced in size while suppressing the amount of voltage drop due to load fluctuation within a predetermined range.

  On the other hand, in order to achieve the above object, the invention described in claim 5 is a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light amount, and electric charge accumulated in the light receiving element. A solid-state imaging device having a transfer unit that reads and transfers the charge, and a storage unit that temporarily accumulates the charge transferred by the transfer unit, and for reading the charge accumulated in the light receiving element in the transfer unit A first voltage supply means for supplying a predetermined read voltage; a second voltage supply means for supplying a predetermined storage voltage for storing the transferred charge in the storage section; and the first voltage supply. The voltage supplied from the means is connected to the wiring for applying the voltage to the transfer unit via the first switch, and the voltage supplied from the second voltage supply means is connected to the wiring for applying the voltage to the storage unit. Connected through a switch A capacitor that suppresses a decrease in voltage due to load fluctuation caused when a voltage is applied by accumulated electric energy, and when reading out the electric charge accumulated in the light receiving element, the capacitor is electrically connected only to the transfer unit side. Control means for controlling the first switch and the second switch so as to electrically connect the capacitor only to the storage unit side when connecting and storing the transferred charge in the storage unit And.

  According to a fifth aspect of the present invention, a light receiving element that receives light corresponding to a subject image, accumulates electric charge according to the received light amount, a transfer unit that reads and transfers the electric charge accumulated in the light receiving element, A solid-state imaging device having a storage unit for temporarily storing the charge transferred by the transfer unit, and the first voltage supply means reads out the charge stored in the light receiving device in the transfer unit. A predetermined read voltage is supplied, and the second voltage supply means supplies a predetermined accumulated voltage for accumulating the transferred charge in the accumulator.

  In the present invention, the capacitor is connected to the wiring for applying the voltage supplied from the first voltage supply means to the transfer unit via the first switch and supplied from the second voltage supply means. Is connected to a wiring for applying a voltage to the storage unit via a second switch, and the capacitor suppresses a decrease in voltage due to a load variation that occurs when the voltage is applied, and is controlled by the stored electrical energy. Means for reading out the electric charge accumulated in the light receiving element, and the capacitor is electrically connected only to the transfer unit side, and when accumulating the transferred electric charge in the accumulation unit, the capacitor is The first switch and the second switch are controlled so as to be electrically connected only to the side.

  Thus, according to the fifth aspect of the present invention, the capacitor that suppresses the voltage drop due to the load fluctuation caused when the voltage is applied by the accumulated electric energy is supplied from the first voltage supply means. Connected to the wiring for applying a voltage to the transfer unit via a first switch and connected to the wiring for applying the voltage supplied from the second voltage supply means to the storage unit via a second switch When the charge accumulated in the light receiving element is read out, the capacitor is electrically connected only to the transfer unit side, and when the charge transferred to the accumulation unit is accumulated, the capacitor is electrically connected only to the accumulation unit side. Since the first switch and the second switch are controlled so as to be connected, the number of capacitors can be reduced while keeping the voltage drop amount within a predetermined range, and the entire circuit can be reduced. It can be of.

  On the other hand, in order to achieve the above object, the invention described in claim 6 is a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light amount, and a timing at which a predetermined voltage is applied. And a transfer unit that reads and transfers the charge accumulated in the light receiving element, and a method for driving the solid-state imaging device, wherein the predetermined voltage supplied from a voltage supply unit is applied to the wiring that applies the transfer unit A capacitor that suppresses a decrease in voltage due to a load variation that occurs when a voltage is applied is connected to the stored electrical energy, and starts applying the predetermined voltage supplied from the voltage supply unit to the transfer unit Control is performed to shift the timing.

  Therefore, since the invention described in claim 6 operates in the same manner as the invention described in claim 1, similarly to the invention described in claim 1, the amount of decrease in voltage due to load fluctuations can be reduced. Therefore, the entire circuit can be reduced in size while suppressing the amount of voltage drop due to load fluctuation within a predetermined range.

  On the other hand, in order to achieve the above object, the invention described in claim 7 is a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light amount, and a timing at which a predetermined voltage is applied. And a transfer unit that reads and transfers the charge accumulated in the light receiving element, wherein the charge accumulated in the light receiving element supplied from the voltage supply means is transferred to the transfer unit. A voltage drop due to the load fluctuation is applied to a wiring that applies a first voltage to be read and a second voltage that is higher than the first voltage within a predetermined allowable range that allows a change in voltage to the transfer unit. Is connected to a capacitor that suppresses the accumulated electric energy, and the voltage supply means is controlled so as to supply the second voltage at the timing of reading the charge accumulated in the light receiving element.

  Therefore, since the invention described in claim 7 operates in the same manner as the invention described in claim 2, a decrease in voltage generated when reading out the electric charge accumulated in the light receiving element is performed as in the invention described in claim 2. The amount can be kept within a predetermined range. Therefore, the entire circuit can be reduced in size while suppressing the amount of voltage drop due to load fluctuation within a predetermined range.

  The invention according to claim 7 is the same as the invention according to claim 8, wherein the still image shooting mode for capturing a still image of the subject image and the moving image shooting mode for capturing a moving image of the subject image are used. The voltage supply unit may be controlled to change the voltage level of the second voltage.

  On the other hand, in order to achieve the above object, the invention according to claim 9 is characterized in that a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light amount, and a timing at which a predetermined voltage is applied. And a transfer unit that reads and transfers the electric charge accumulated in the light receiving element, and is supplied from a supply power increasing unit including a supply power changing unit that changes a supply amount of power. A capacitor that suppresses a decrease in voltage due to load fluctuation that occurs when the predetermined voltage is applied to the wiring that applies the predetermined voltage to the transfer unit; The supply power increasing means is controlled so that the amount of power supply increases at the timing when the predetermined voltage supplied from the supply means is applied to the transfer section.

  Therefore, since the invention described in claim 9 operates in the same manner as the invention described in claim 4, similarly to the invention described in claim 4, the amount of voltage decrease can be reduced by the supplied current. Therefore, the entire circuit can be reduced in size while suppressing the amount of voltage drop due to load fluctuation within a predetermined range.

  On the other hand, in order to achieve the above object, a tenth aspect of the present invention is a light receiving element that receives light corresponding to a subject image and accumulates charges according to the received light quantity, and charges accumulated in the light receiving elements. A solid-state imaging device driving method comprising: a transfer unit that reads and transfers the data; and a storage unit that temporarily accumulates the charges transferred by the transfer unit, wherein the voltage due to load variation that occurs when a voltage is applied A capacitor that suppresses a decrease in the electric energy by the accumulated electric energy is applied to a wiring that applies a predetermined read voltage for reading the electric charge accumulated in the light receiving element supplied from the first voltage supply means to the transfer unit. The second wiring is connected to the storage unit through the first switch and applies a predetermined storage voltage for storing the transferred charge supplied from the second voltage supply means to the storage unit. In the case where the capacitor is electrically connected only to the transfer unit side when the charge accumulated in the light receiving element is read out by connecting through a switch, and the transferred charge is accumulated in the accumulation unit The first switch and the second switch are controlled so that the capacitor is electrically connected only to the storage unit side.

  Therefore, since the invention according to claim 10 operates in the same manner as the invention according to claim 5, as in the invention according to claim 5, the number of capacitors is suppressed while keeping the voltage decrease amount within a predetermined range. And the entire circuit can be reduced in size.

  As described above, according to the present invention, the entire circuit is reduced in size by reducing the capacitance of the capacitor or reducing the number of capacitors while keeping the amount of voltage drop due to load fluctuation within a predetermined range. The effect that it can be obtained.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[First Embodiment]
As shown in FIG. 1, a schematic configuration of a digital camera 10 according to the present embodiment is shown. The digital camera 10 includes an optical unit 20 including a lens for forming a subject image, a CCD 22 disposed behind the optical axis of the lens, and a subject image based on an output signal from the CCD 22. A signal processing unit 40 that generates digital image data and a timing signal for driving each unit of the optical unit 20, the CCD 22, the main control unit 60 that controls the overall operation of the digital camera 10, and the CCD 22. A vertical / horizontal driver 24 for driving, a shutter / iris motor driver 26 for driving a shutter and an aperture mechanism included in the optical unit 20, a focus motor driver 28 for driving a focus adjustment motor included in the optical unit 20, and an optical unit Zoom motor driver 30 for driving a zoom motor included in 20 , It is configured to include a.

  Note that the signal processing unit 40 and the main control unit 60 are configured as a one-chip LSI (Large Scale Integrated circuit), thereby reducing the size, high reliability, and cost of the digital camera 10. .

  The digital camera 10 includes a liquid crystal display (LCD) 72 that displays a subject image and various information obtained by imaging with the CCD 22, and an SDRAM (Synchronous Dynamic RAM) that mainly stores digital image data obtained by imaging with the CCD 22. 74 and a flash ROM 76 that stores various parameters, programs, and the like.

  The main control unit 60 includes a CPU (Central Processing Unit) 61 that controls the operation of the entire main control unit 60, and a line buffer having a predetermined capacity, and also adjusts a white balance fluctuation (WB) 62A. And an imaging control unit 62 including a Y / C conversion circuit (Y / C) 62B that converts RGB data into YC signals, and compresses the captured digital image data in a predetermined compression format. In addition, a compression / decompression unit 63 that performs decompression processing on the compressed digital image data, a media control unit 64, and an LCD control unit 65 are connected to each other via a bus BUS. .

  The digital camera 10 can switch between a still image shooting mode and a moving image shooting mode by switching a mode changeover switch (not shown), and the compression / decompression unit 63 performs digital image shooting in the still image shooting mode. The data is subjected to compression processing and decompression processing in a predetermined still image compression method (in this embodiment, JPEG (Joint Photographic Coding Expert Group) method), while digital image data captured in the still image shooting mode is processed. On the other hand, compression processing and decompression processing are performed in a predetermined moving image compression method (in this embodiment, MPEG (Moving Picture Expert Group) -2 method).

  The media control unit 64 is connected to the portable storage medium 70, and the media control unit 64 controls the writing of various information to the storage medium 70 and the reading of the various information written on the storage medium 70. In the digital camera 10 according to the present embodiment, SmartMedia (registered trademark) is applied as the storage medium 70.

  The LCD control unit 65 is connected to the LCD 72, and various information is displayed on the LCD 72 under the control of the LCD control unit 65. The LCD 72 can display a moving image (through image) obtained by continuous imaging by the CCD 22 and can be used as a viewfinder.

  The SDRAM 74 and the flash ROM 76 are connected to the bus BUS of the main control unit 60. Therefore, the CPU 61 can access various data stored in the SDRAM 74 and the flash ROM 76 at any time.

  On the other hand, the signal processor 40 includes a correlated double sampling circuit (CDS) 42, a gain control amplifier (GCA) 44, an A / D converter 46, and a timing generator 48. ing.

  The output terminal of the CCD 22 is connected to the imaging control unit 62 through the CDS 42, the GCA 44, and the A / D converter 46 in this order. The signal output from the CCD 22 is subjected to correlated double sampling processing by the CDS 42, and subjected to predetermined sensitivity adjustment processing for each of R (red), G (green), and B (blue) in the CCD 22 by the GCA 44. The R, G, and B signals for each pixel are output to the A / D converter 46. The A / D converter 46 converts the R, G, and B signals sequentially output from the GCA 44 into digital signals each having a predetermined number of bits (hereinafter referred to as “digital image data”) and outputs the digital signals to the imaging control unit 62 described above. To do.

  The imaging control unit 62 accumulates digital image data sequentially input from the A / D converter 46 in a built-in line buffer and temporarily stores the digital image data in the SDRAM 74.

  The digital image data stored in the SDRAM 74 is read out to the WB 62A under the control of the CPU 61, and a white balance is adjusted by applying a digital gain corresponding to the light source type to the WB 62A, and a gamma process and a sharpness process are performed. Digital image data is generated, and further, Y / C signal processing is performed by the Y / C 62B to generate a luminance signal Y and chroma signals Cr and Cb (hereinafter referred to as “YC signal”), and the YC signal is stored in the SDRAM 74 again. To do.

  When the LCD 72 is used as a viewfinder, the generated YC signal is sequentially output to the LCD control unit 65, and a through image is displayed on the LCD 72.

  When the still image shooting mode is selected by the photographer and the shutter button (not shown) is pressed, the digital camera 10 uses the compression / decompression unit 63 to convert the YC signal stored in the SDRAM 74 into a predetermined still image compression method. After compression, the data is stored in the storage medium 70 via the media control unit 64. On the other hand, when a moving image shooting mode is selected by the photographer and a shutter button (not shown) is pressed, the YC signal stored in the SDRAM 74 is compressed by the compression / decompression unit 63 at any time using a predetermined moving image compression method. Then, the moving image is recorded in the storage medium 70, and when the shutter button is pressed again, the YC signal compression process is stopped and the moving image recording is stopped.

  On the other hand, the timing generator 48 is connected to a vertical / horizontal driver 24, a shutter / iris motor driver 26, and an imaging control unit 62.

  The timing generator 48 is controlled by the imaging control unit 62, outputs a timing signal for driving the CCD 22 to the vertical / horizontal driver 24, and a mechanism provided in the optical unit 20 to the shutter / iris motor driver 26. A timing signal for driving the shutter and the aperture mechanism is output.

  The focus motor driver 28 and the zoom motor driver 30 are connected to the main control unit 60 (more specifically, the CPU 61), and the focus motor driver 28 is connected to the focus adjustment motor provided in the optical unit 20 to the zoom motor driver. Reference numerals 30 are respectively connected to zoom motors provided in the optical unit 20.

  The lens included in the optical unit 20 according to the present embodiment includes a plurality of lenses, is configured as a zoom lens that can change (magnify) the focal length, and includes a lens driving mechanism (not shown). This lens drive mechanism includes the zoom motor and the focus adjustment motor described above, and is driven by drive signals supplied from the zoom motor driver 30 and the focus motor driver 28 under the control of the CPU 61, respectively.

  When changing the optical zoom magnification, the CPU 61 drives and controls the zoom motor via the zoom motor driver 30 to change the focal length of the lens included in the optical unit 20.

  Further, the CPU 61 performs focus control by driving and controlling the focus adjustment motor via the focus motor driver 28 so that the contrast of the image obtained by imaging by the CCD 22 is maximized. That is, the digital camera 10 according to the present embodiment employs a so-called TTL (Through The Lens) method in which the lens position is set so that the contrast of the read image is maximized as the focus control. When the subject is positioned at a predetermined position in the frame displayed on the LCD 72, the photographer performs half-pressing of a shutter button (not shown) to automatically perform focusing control.

  FIG. 2 shows a detailed configuration of the CCD 22 according to the present embodiment. Note that a honeycomb CCD proposed by the applicant of the present invention is adopted as the CCD 22 according to the present embodiment.

  The CCD 22 is assigned one by one for each color of one pixel, and has a predetermined arrangement pitch (horizontal arrangement pitch = Ph (μm), vertical arrangement pitch = Pv (μm)), and adjacent light receiving elements PD are arranged in the vertical direction and A plurality of light receiving elements PD shifted in the horizontal direction and arranged two-dimensionally, and arranged so as to bypass the opening AP formed in the front surface of the light receiving element PD, and a signal (charge) from the light receiving element PD A vertical transfer electrode VEL that is taken out and transferred in the vertical direction, and a horizontal transfer that is arranged on the lower side in the vertical direction of the vertical transfer electrode VEL located at the bottom in the vertical direction and that transfers the signal transferred from the vertical transfer electrode VEL to the outside An electrode HEL. In the example shown in the figure, the opening AP is formed in an octagonal honeycomb shape.

  Here, each of the vertical transfer electrode groups constituted by a plurality of vertical transfer electrodes VEL arranged in a straight line in the horizontal direction has one of the vertical transfer drive signals V1, V2,. Can be applied simultaneously. In the example shown in the figure, the vertical transfer drive signal V3 is applied to the first-stage vertical transfer electrode group, and the vertical transfer drive signal V4 is applied to the second-stage vertical transfer electrode group. The vertical transfer drive signal V5 for the transfer electrode group, the vertical transfer drive signal V6 for the fourth vertical transfer electrode group, and the vertical transfer drive signal V7 for the fifth vertical transfer electrode group are 6 The vertical transfer drive signal V8 for the vertical transfer electrode group at the stage, the vertical transfer drive signal V1 for the vertical transfer electrode group at the seventh stage, and the vertical transfer drive signal for the vertical transfer electrode group at the eighth stage. V2 can be applied to each.

  On the other hand, each light receiving element PD is configured to be electrically connected to one adjacent vertical transfer electrode VEL via a transfer gate TG. In the example shown in the figure, each light receiving element PD is configured to be connected to a vertical transfer electrode VEL adjacent to the lower right via a transfer gate TG.

  Further, as shown in the figure, the image pickup section of the CCD 22 has a four-electrode structure in the vertical adjacent region of one light receiving element region and a two-electrode structure in the horizontal adjacent region.

  In the figure, the opening AP formed in the front surface of the light receiving element PD in which “R” is written is covered with a color separation filter that transmits red light, and the light receiving element PD in which “G” is written. The opening AP formed on the front surface of the light-receiving element is covered with a color separation filter that transmits green light, and the opening AP formed on the front surface of the light receiving element PD on which 'B' is written transmits blue light. Covered with color separation filter. That is, the light receiving element PD in which “R” is written receives red light, the light receiving element PD in which “G” is written receives green light, and the light receiving element PD in which “B” is written receives blue light. It is supposed to be.

  FIG. 3 shows a circuit diagram of a vertical / horizontal driver 24 portion for applying a voltage as a vertical transfer drive signal to the vertical transfer electrode group of each stage of the CCD 22. In FIG. 3, the CCD 22 is regarded as an equivalent circuit including a capacitor 22A having a capacitance C2.

  The vertical / horizontal driver 24 supplies a predetermined high voltage (15 V in this embodiment) when reading out the electric charge accumulated in the light receiving element PD of the CCD 22 to the vertical transfer electrode group of each stage of the CCD 22. Series regulator 80, a power supply line 82 for supplying a predetermined low voltage (−8 V in the present embodiment) lower than the high voltage when moving the read charge, and a timing generator 48 (see FIG. 1) And the voltage applied to the vertical transfer electrode group at each stage of the CCD 22 is controlled.

  FIG. 4 shows the configuration of the vertical / horizontal driver 24 and the CCD 22. The vertical / horizontal driver 24 is provided with a plurality of switches for switching the voltage applied to each vertical transfer electrode group, but FIG. 4 shows only one switch 24A. Is regarded as an equivalent circuit composed of the switch 24A and the internal resistor 24B.

  The vertical / horizontal driver 24 switches the switch 24 </ b> A according to the timing signal S <b> 1 output from the timing generator 48, and can apply the high voltage and the low voltage to each vertical transfer electrode group of the CCD 22. Further, by turning off the switch 24A that is not in contact with each other, the potential of each vertical transfer electrode group of the CCD 22 is set to a medium voltage (0 volts in this embodiment) that is lower than the high voltage and higher than the low voltage. Can do.

  On the other hand, as shown in FIG. 3, a branch point 84 is provided in the connection line between the vertical / horizontal driver 24 and the series regulator 80, and one end of the bypass capacitor 86 of the capacitor C1 is connected to the branch line from the branch point 84. The other end of the bypass capacitor 86 is grounded. Therefore, when a voltage is applied to the connection line between the vertical / horizontal driver 24 and the series regulator 80, electric charge is accumulated in the bypass capacitor 86 and electric energy is charged.

  The series regulator 80 includes a PNP transistor 90, a comparator 92, a reference voltage power supply 94, and resistors 96A and 96B.

  The emitter terminal of the transistor 90 is connected to the power supply line 98, and the collector terminal of the transistor 90 is connected to the vertical / horizontal driver 24. A branch point 100 is provided on a connection line between the collector terminal of the transistor 90 and the vertical / horizontal driver 24, and the branch line branched from the branch point 100 is grounded via resistors 96A and 96B. Further, a branch point 102 is further provided between the resistors 96A and 96B of the branch line, and the branch line from the branch point 102 is connected to the plus side terminal of the comparator 92. The negative terminal of the comparator 92 is connected to the reference voltage power supply 94, and compares the voltage at the branch point 102 with the reference voltage (1.25 V in the present embodiment). The resistors 96A and 96B have sufficiently large resistance values at an appropriate ratio so that the voltage at the branch point 100 becomes the reference voltage when a voltage is applied from the power supply line and the voltage at the branch point 100 becomes the high voltage. Is used.

  In the series regulator 80, the branch point 100 becomes the high voltage due to the voltage applied from the power supply line via the transistor 90, and when the voltage at the branch point 102 becomes the reference voltage, a high level signal is output from the comparator 92 to the base terminal of the transistor 90. Is output. Thereby, the transistor 90 is turned off and the application of the voltage to the collector terminal is stopped.

  In the series regulator 80, when the switch 24A is switched and the voltage from the series regulator 80 is applied to the CCD 22 and the voltage at the branch point 100 decreases, the voltage at the branch point 102 also decreases and becomes less than the reference voltage. A low level signal is output from the comparator 92 to the base terminal of the transistor 90, the transistor 90 is turned on, and the application of voltage to the collector terminal is resumed.

By the way, when the switch 24A is switched and a high voltage (V _H ) is simultaneously applied to each vertical transfer electrode group of the CCD 22, a voltage drop occurs due to load fluctuations as shown in FIG. That is, when the CCD 22 is regarded as a capacitor 22A having a capacitance C2, the voltage V _h on the wiring between the vertical / horizontal driver 24 and the CCD 22 when the switch 24A is switched can be obtained by the following equation (1). it can.
V _h = C1 / (C1 + C2) × V _H (1)
Since the difference between the high voltage V _H and the voltage V _h is the voltage drop amount ΔV _H due to the voltage drop, the voltage drop amount ΔV _H can be obtained by the following equation (2).
ΔV _H = V _H −V _h = C2 / (C1 + C2) × V _H (2)
Here, in order to reduce the voltage drop amount ΔV _H , it is necessary to make the capacitance C1 of the bypass capacitor 86 sufficiently larger than the capacitance C2 of the capacitor 22A as shown by the equation (2). If the capacity of the capacitor is increased, the size of the bypass capacitor 86 also increases, and it becomes difficult to reduce the size of the circuit.

  For this reason, in this embodiment, the timing at which a high voltage is applied to each vertical transfer electrode group of the CCD 22 is controlled, and the timing for starting the voltage application is shifted for each vertical transfer electrode group.

  Next, the operation at the time of imaging of the digital camera 10 according to the present embodiment will be described.

  When the digital camera 10 is in a shooting standby state and receives light on the light receiving surface of the CCD 22 via the optical unit 20, photoelectric conversion is performed in the light receiving element PD of the CCD 22, and the received light is changed according to the amount of light. Charges are accumulated in the light receiving element PD.

  When the timing generator 48 enters a photographing standby state, the timing generator 48 outputs a timing signal S1 for controlling the timing for reading out the charges accumulated in the respective light receiving elements PD of the CCD 22 to the vertical / horizontal driver 24.

  The vertical / horizontal driver 24 switches the switch 24A according to the input timing signal S1 and applies a voltage to each vertical transfer electrode VEL and horizontal transfer electrode HEL of the CCD 22 to read out the accumulated charges. Do.

  FIG. 6 shows a time chart showing the voltages applied to each vertical transfer electrode group of the CCD 22.

  Here, in the present embodiment, a vertical transfer electrode group (vertical transfer electrodes VEL hatched in FIG. 2) including the vertical transfer electrodes VEL connected to the light receiving element PD via the transfer gate TG of the CCD 22 is used. Divided into three groups, groups GA, GB, and GC. That is, in the CCD 22 shown in FIG. 2, the second and eighth vertical transfer electrode groups belong to the group GA, the fourth vertical transfer electrode group belongs to the group GB, and the sixth vertical transfer electrode group It belongs to group GC.

The timing generator 48 shifts the timing for starting the application of the high voltage for each group. Thereby, in the CCD 22, the number of vertical transfer electrodes for which application of a high voltage is started at the same time decreases, so that the voltage drop amount ΔV _H due to load fluctuation is reduced as shown in FIG. Therefore, even if the capacitance C1 of the bypass capacitor 86 is reduced, the voltage drop amount ΔV _H of the voltage drop can be suppressed within an allowable range, so that the size of the bypass capacitor 86 can be reduced and the entire circuit can be downsized. You can also

  In the digital camera 10 according to the present embodiment, when the photographing standby state is set, the switches of the vertical / horizontal driver 24 are controlled by the timing signal S1 from the timing generator 48, and the groups GA, GB, GC as described above. A predetermined high voltage is applied to each of the vertical transfer electrodes, and the high voltage is applied to the vertical transfer electrode group (the white vertical transfer electrode VEL in FIG. 2) sandwiched between these vertical transfer electrode groups. A low predetermined low voltage is applied. That is, the vertical transfer drive signals V2, V4, V6, and V8 are set to the high voltage, and the vertical transfer drive signals V1, V3, V5, and V7 are set to the low voltage. Then, a potential well is formed below the vertical transfer electrode VEL connected to the light receiving element PD via the transfer gate TG, and the charges accumulated in the light receiving element PD connected to the vertical transfer electrode VEL are all at once. Flows in.

  In the digital camera 10, the vertical transfer electrode VEL including the vertical transfer electrode VEL connected to the light receiving element PD via the transfer gate TG is controlled by controlling the switch of the vertical / horizontal driver 24 by the timing signal S 1 from the timing generator 48. The middle voltage is set to the vertical transfer electrode group adjacent to the lower side in the vertical direction of the electrode group. That is, the vertical transfer drive signals V1, V3, V5, and V7 are set to the intermediate voltage. Then, a potential well is also formed below the vertical transfer electrode VEL to which the intermediate voltage is applied, and charges are transferred from the potential well below the vertical transfer electrode VEL connected to the light receiving element PD via the transfer gate TG. It flows in.

  In the digital camera 10, the vertical transfer electrode VEL including the vertical transfer electrode VEL connected to the light receiving element PD via the transfer gate TG is controlled by controlling the switch of the vertical / horizontal driver 24 by the timing signal S 1 from the timing generator 48. The applied voltage to the electrode group is the low voltage. That is, the vertical transfer drive signals V2, V4, V6, and V8 are set to the low voltage. As a result, all the charges accumulated in the lower part of the vertical transfer electrode VEL connected to the light receiving element PD via the transfer gate TG are placed in the lower part of the vertical transfer electrode VEL adjacent to the vertical lower side of the vertical transfer electrode VEL. Move to the formed potential well.

  Thereafter, by repeating the above operation, the charge accumulated in each light receiving element PD is sequentially transferred to the vertical transfer electrode VEL adjacent to the lower side in the vertical direction via a so-called bucket relay type, thereby passing through the horizontal transfer electrode HEL. The stored charge is read out, and a signal corresponding to the charge amount is output to the CDS 42.

  As described above in detail, according to the digital camera 10 of the first embodiment, a light receiving element that receives light corresponding to a subject image and accumulates charges according to the received light amount, and a predetermined voltage ( Here, a solid-state imaging device (here, CCD 22) having a transfer unit (here, vertical transfer electrode group) that reads and transfers the charge accumulated in the light receiving element at the timing when a high voltage is applied. The voltage supply means (series regulator 80) supplies the predetermined voltage. In the digital camera 10, a capacitor (here, bypass capacitor 86) is connected to a wiring that applies the voltage supplied from the voltage supply means to the transfer unit, and a load generated when a voltage is applied by the capacitor. The voltage drop due to the fluctuation is suppressed by the accumulated electric energy, and the control means (timing generator 48) shifts the start timing of applying the predetermined voltage supplied from the voltage supply means to the transfer unit. Therefore, it is possible to reduce the amount of voltage decrease due to load fluctuation that occurs when a predetermined voltage is applied. Therefore, the entire circuit can be reduced in size while suppressing the amount of voltage drop due to load fluctuation within a predetermined range.

  Note that the timing generator 48 according to the first embodiment controls the timing of applying a voltage by the timing signal S1 and applies a voltage as shown in FIG. 6 to each vertical transfer electrode group of the CCD 22. However, the present invention is not limited to this, and may be any as long as the start timing of voltage application is deviated. For example, the timing generator 48 may apply a voltage as shown in FIG. 7 to each vertical transfer electrode group of the CCD 22 by controlling the timing of applying a voltage according to the timing signal S1. Also in this case, the same effects as in the present embodiment can be obtained.

[Second Embodiment]
In the second embodiment, a description will be given of an example in which the voltage at the time of reading charges from the light receiving element PD of the CCD 22 is changed from a voltage higher than the high voltage to the high voltage.

  FIG. 8 shows a circuit diagram of a series regulator 80 according to the second embodiment. In addition, about the same component as FIG. 3 of the same figure, the same code | symbol location as FIG. 3 is attached | subjected, and the description is abbreviate | omitted.

  The series regulator 80 according to the second embodiment is provided with a reference voltage power supply 110 having a second reference voltage higher than a reference voltage (hereinafter referred to as a first reference voltage) by the reference voltage power supply 94. Yes.

  The negative terminal of the comparator 92 is connected to the switch 112, and the switch 112 uses the timing signal S 2 from the timing generator 48 as a reference voltage applied to the negative terminal of the comparator 92 as the first reference voltage or The second reference voltage can be switched. When the switch 112 is switched and the reference voltage is the second reference voltage, the series regulator 80 outputs a high level signal from the comparator 92 when the voltage at the branch point 102 is the second reference voltage. The voltage at the point 100 is kept higher than a predetermined high voltage when the reference voltage is the first reference voltage. In the series regulator 80, an allowable range in which a change in the voltage supplied in the vertical / horizontal driver 24 is allowed is determined in advance, and the second reference voltage is set so that the voltage at the branch point 100 is within the allowable range. Is appropriately determined.

  The timing generator 48 outputs a timing signal S2 to the switch 112 so that the reference voltage becomes the second reference voltage when reading the electric charge accumulated in the light receiving element PD of the CCD 22.

That is, as shown in FIG. 9A, when the voltage supplied from the series regulator 80 is a predetermined high voltage (V _H ), the voltage drops below the allowable range due to the voltage drop, but the light receiving element PD of the CCD 22 When the charge accumulated in the memory cell is read out, the reference voltage is set to the second reference voltage, so that the voltage supplied from the series regulator 80 is higher than a predetermined high voltage (V _H ) as shown in FIG. 9B. Therefore, the reduced voltage due to the voltage drop can be suppressed within the allowable range with the bypass capacitor 86 having a smaller capacity than that of the predetermined high voltage.

  As described above in detail, according to the digital camera 10 of the second embodiment, a light receiving element that receives light corresponding to a subject image and accumulates electric charge according to the received light amount, and a predetermined voltage are provided. And a transfer unit that reads and transfers the charge accumulated in the light receiving element at the applied timing, and the voltage supply means supplies the charge accumulated in the light receiving element to the transfer unit. A first voltage to be read and a second voltage higher than the first voltage are supplied within a predetermined allowable range that allows a change in voltage. In the digital camera 10, a capacitor is connected to the wiring that applies the voltage supplied from the voltage supply means to the transfer unit, and the capacitor suppresses the voltage drop due to the load variation by the accumulated electrical energy. And the control means controls the voltage supply means so as to supply the second voltage at the timing of reading out the charge accumulated in the light receiving element, so that when the charge accumulated in the light receiving element is read out. The capacitance of the capacitor can be reduced while suppressing the amount of voltage drop generated in the circuit within a predetermined range, and the entire circuit can be reduced in size.

  In the second embodiment, the case where the applied voltage is changed by switching the reference voltage of the series regulator 80 has been described. However, the present invention is not limited to this, and the two voltages are switched. Any configuration is possible as long as it is possible. For example, a power supply device or the like that can supply two different voltages in advance may be used, and the applied voltage may be changed by switching the different voltages supplied by the two power supply devices with a switch or the like. Also in this case, the same effects as in the present embodiment can be obtained.

[Third Embodiment]
In the third embodiment, an example of changing the voltage level of a voltage applied in a still image shooting mode for capturing a still image of the subject image and a moving image shooting mode for capturing a moving image of the subject image is described. explain.

  FIG. 10 shows a circuit diagram of a series regulator 80 according to the third embodiment. In addition, about the same component as FIG. 8 of the same figure, the same code | symbol location as FIG. 8 is attached | subjected, and the description is abbreviate | omitted.

The series regulator 80 according to the third embodiment is provided with a still image shooting reference voltage power source 110A used in the still image shooting mode and a moving image shooting reference voltage power source 110B used in the moving image shooting mode. ing.
In addition, a switch 120 is provided at the other end of the wiring that is first connected when the switch 112 reads out the electric charge accumulated in the light receiving element PD of the CCD 22, and the switch 120 has a timing according to the photographing mode. Switching can be performed in accordance with the timing signal S3 from the generator 48.

  That is, the series regulator 80 according to the third embodiment can switch the reference voltage according to the shooting mode.

  Here, the digital camera 10 according to the present embodiment has different timings for reading out charges accumulated in the respective light receiving elements PD of the CCD 22 between the still image shooting mode and the moving image shooting mode. That is, in the still image shooting mode, charges are read from all the light receiving elements PD of the CCD 22 at a timing when a shutter button (not shown) is pressed. In the moving image shooting mode, each light receiving element PD of the CCD 22 is set to an even-numbered stage. And an odd-numbered stage, and an interlace scan is performed to read out the alternately accumulated charges.

For this reason, when the charge is read from each light receiving element PD of the CCD 22, the number of the light receiving elements PD to which a voltage is applied simultaneously is different between the still image capturing mode and the moving image capturing mode. The voltage drop amount ΔV _H due to the load variation is different, and the voltage drop amount ΔV _H is larger in the still image shooting mode in which the number of the light receiving elements PD for reading the charges is large.

  Therefore, in the series regulator 80 according to the third embodiment, the still image shooting reference voltage power source 110A is used as a reference power source in the still image shooting mode, and the moving image shooting reference voltage power source 110B is used in the moving image shooting mode. Used as a reference power source. As a result, an appropriate voltage is applied in each of the still image capturing mode and the moving image capturing mode, so that the amount of decrease in the voltage applied to the light receiving element PD of the CCD 22 can be suppressed within a predetermined range. The size of 86 can be reduced, and the entire circuit can be reduced in size.

  As described above in detail, according to the digital camera 10 of the third embodiment, the control means captures a still image shooting mode for capturing a still image of the subject image and a moving image of the subject image. Since the voltage supply unit is controlled so as to change the voltage level of the second voltage in the moving image shooting mode, the voltage drop amount can be suppressed within a predetermined range according to the shooting mode.

  In the second and third embodiments, the case where the present invention is applied to the case where a high voltage is applied when reading out charges from each light receiving element PD of the CCD 22 has been described. However, the present invention is not limited to this. For example, a reference voltage in a power supply device (for example, a regulator) for applying a predetermined low voltage to each vertical transfer electrode VEL in order to move charges read from each light receiving element PD. It is good also as a structure which switches. Also in this case, the same effects as in the present embodiment can be obtained.

[Fourth Embodiment]
In the fourth embodiment, an example in which the power supply capacity is variable and the power supply amount is increased when the charge accumulated in the light receiving element PD is read will be described.

  FIG. 11 shows a circuit diagram of a series regulator 80 according to the fourth embodiment. In addition, about the same component as FIG. 3 of the same figure, the same code | symbol location as FIG. 3 is attached | subjected, and the description is abbreviate | omitted.

  A series regulator 80 according to the fourth embodiment includes a constant voltage circuit 130B having the same configuration as the constant voltage circuit 130A configured by the PNP transistor 92, the comparator 92, and the resistors 96A and 96B. The reference voltage power supply 94 and the vertical / horizontal driver 24 are provided in parallel, and on the wiring between the constant voltage circuit 130B and the reference voltage power supply 94 and between the constant voltage circuit 130B and the vertical / horizontal driver 24. Switches 134 and 136 are respectively provided on the top.

  The switches 134 and 136 are switched by timing signals S4 and S5 from the timing generator 48, and are controlled to be turned on when reading out the electric charge accumulated in the light receiving element PD of the CCD 22.

When the switches 134 and 136 are turned on, power is supplied in parallel from the constant voltage circuit 130A and the constant voltage circuit 130B, so that it is possible to increase the power supply capability when reading the charge from the light receiving element PD of the CCD 22. Therefore, when reading out the electric charge accumulated in the light receiving element PD of the CCD 22, current is supplied from both the constant voltage circuit 130A and the constant voltage circuit 130B even if a voltage drop occurs, thereby reducing the voltage drop amount ΔV _H. can do. Therefore, even if the capacitance C1 of the bypass capacitor 86 is reduced, the voltage drop amount ΔV _H of the voltage drop can be suppressed within an allowable range, so that the size of the bypass capacitor 86 can be reduced and the entire circuit can be downsized. You can also

  As described above in detail, according to the digital camera 10 of the fourth embodiment, a light receiving element that receives light corresponding to a subject image and accumulates electric charges according to the received light amount, and a predetermined voltage are provided. And a transfer unit that reads and transfers the electric charge accumulated in the light receiving element at the applied timing, and supplies the predetermined voltage by the voltage supply means, and supplies power change means ( Here, the amount of power supplied by the voltage supply means is changed by the constant voltage circuit 130B). In the digital camera 10, a capacitor is connected to the wiring that applies the voltage supplied from the voltage supply unit to the transfer unit, and the capacitor reduces the voltage due to load fluctuation that occurs when the predetermined voltage is applied. The supplied power increasing means is controlled so that the supply amount of power increases at the timing when the predetermined voltage supplied from the voltage supplying means is applied to the transfer unit by the control means. Therefore, when the charge accumulated in each light receiving element PD is read, the amount of power supply increases, and the amount of voltage decrease can be suppressed within a predetermined range. In addition, since the power supply amount is increased only when the charge accumulated in each light receiving element PD is read, the increase amount of power consumption can be reduced.

  In the series regulator 80 according to the fourth embodiment, the case where the power supply amount is improved by configuring the constant voltage circuit 130 in parallel inside is described, but the present invention is limited to this. Any configuration is possible as long as the power supply amount can be improved.

[Fifth Embodiment]
In the fifth embodiment, a line memory region for temporarily accumulating the charges transferred by the vertical transfer electrodes VEL is provided, a circuit for applying a voltage for reading the charges accumulated in the light receiving element PD, and the line memory A description will be given of a configuration example in which a single capacitor is shared with a circuit for applying a voltage when transferring charges accumulated in a region.

  FIG. 12 shows a detailed configuration of the CCD 22 according to the fifth embodiment. 2 that are the same as those in FIG. 2 are assigned the same reference numerals as in FIG. 2, and descriptions thereof are omitted.

  In the CCD 22 according to the fifth embodiment, a line memory region is provided between the vertical transfer electrode VEL and the horizontal transfer electrode HEL arranged below the vertical transfer electrode VEL in the vertical direction. The charges transferred from the transfer electrode VEL are transferred to the line memory area.

  In the line memory area, a line transfer electrode MEL is provided in the same manner as the horizontal transfer electrode HEL, and a voltage is applied to the line transfer electrode MEL to move the charge and transfer the charge to the horizontal transfer electrode HEL. In addition, if necessary, adjacent charges in the horizontal direction can be combined and added.

  FIG. 13 shows a circuit diagram of a vertical / horizontal driver 24 that applies a voltage as a vertical transfer drive signal to the vertical transfer electrode group and the line transfer electrode MEL of each stage of the CCD 22. 2 that are the same as those in FIG. 2 are assigned the same reference numerals as in FIG. 2, and descriptions thereof are omitted.

  The vertical / horizontal driver 24 includes a vertical transfer electrode switch unit 25A including a switch for controlling the voltage application of each electrode of the vertical transfer electrode group, and a line transfer electrode switch unit for controlling the voltage application of the line transfer electrode MEL. The switch included in the vertical transfer electrode switch unit 25A is switched according to the timing signal S1 output from the timing generator 48, and the switch included in the line transfer electrode switch unit 25B is switched according to the timing signal S6. Switching.

  The vertical transfer electrode switch unit 25A is supplied with power from the series regulator 80A, and the line transfer electrode switch unit 25B is supplied with power from the series regulator 80B. The series regulator 80A applies a predetermined high voltage (15V in the present embodiment) necessary for reading out the electric charge accumulated in the light receiving element PD of the CCD 22, and the series regulator 80B is a line memory area of the CCD 22. A predetermined transfer voltage (5 V in this embodiment) necessary for transferring the electric charge is applied.

  The connection lines of the vertical / horizontal driver 24 and the series regulators 80A and 80B are provided with branch points 140A and 140B. The branch lines from the branch points 140A and 140B are connected via the switch 142 and the switch 144. Has been.

  A branch point 146 is further provided between the switch 142 and the switch 144, and a branch line from the branch point 146 is connected to one end of the bypass capacitor 86 of the capacitor C1, and the other end of the bypass capacitor 86 is grounded. Has been.

  The switch 142 is ON / OFF controlled by a timing signal S7 from the timing generator 48, and the switch 144 is ON / OFF controlled by a timing signal S8 from the timing generator 48. The switch 142 is turned on and the switch 144 is turned on. When the switch is turned off, the bypass capacitor 86 can be connected to the vertical transfer electrode switch unit 25A, and when the switch 142 is turned off and the switch 144 is turned on, the bypass capacitor 86 can be connected to the line transfer electrode switch unit 25B. .

  FIG. 14 is a time chart showing timing signals S1, S6, S7, S8 output from the timing generator 48 and voltages applied to the vertical transfer electrode groups and the line transfer electrodes MEL of the CCD 22. .

  When the charge accumulated in the light receiving element PD of the CCD 22 is read to the vertical transfer electrode VEL, the timing signal S7 is turned on, the switch 142 is turned on, the timing signal S8 is turned off, the switch 144 is turned off, and the bypass capacitor 86 is turned on. In a state of being connected to the unit 25A side, the timing signal S1 is turned on, and a high voltage is applied to each vertical transfer electrode group of the CCD 22. Accordingly, the electric charge accumulated in the light receiving element PD of the CCD 22 is read out.

  On the other hand, when the charge read to the vertical transfer electrode VEL is transferred to the horizontal transfer electrode HEL, the timing signal S7 is turned off, the switch 142 is turned off, the timing signal S8 is turned on, the switch 144 is turned on, and the bypass capacitor 86 is turned on. In a state of being connected to the unit 25B side, the timing signal S6 is turned on, and a voltage is applied to each line transfer electrode MEL of the CCD 22. Thus, the charges transferred to the line memory area of the CCD 22 are transferred to the horizontal transfer electrode HEL.

  Thereby, it is not necessary to provide the bypass capacitor 86 individually for each series regulator, the manufacturing cost can be reduced, and the entire circuit can be miniaturized.

  As described above in detail, according to the digital camera 10 of the fifth embodiment, the light receiving element that receives the light corresponding to the subject image and accumulates the electric charge according to the received light quantity, and the light receiving element A transfer unit (in this case, a vertical transfer electrode group) for reading out and transferring the accumulated charge, and a storage unit (here, a line memory region) for temporarily accumulating the charge transferred by the transfer unit. A solid-state imaging device (here, CCD 22) is provided, and the first voltage supply means (here, series regulator 80A) has a predetermined readout voltage for reading out the electric charge accumulated in the light receiving element in the transfer unit. The second voltage supply means (here, the series regulator 80B) supplies a predetermined storage voltage for storing the transferred charge in the storage unit.

  According to the digital camera 10 of the fifth embodiment, the capacitor (here, the bypass capacitor 86) is connected to the wiring that applies the voltage supplied from the first voltage supply means to the transfer unit. Connected to the wiring for applying the voltage supplied from the second voltage supply means to the storage unit via the second switch, and when the voltage is applied by the capacitor. The voltage drop due to the generated load fluctuation is suppressed by the accumulated electric energy, and the control means (timing generator 48) electrically connects the capacitor only to the transfer section side when reading the electric charge accumulated in the light receiving element. So that the capacitor is electrically connected only to the storage unit side when storing the transferred charge in the storage unit, Since the first switch and the second switch are controlled, the entire circuit is reduced in size by reducing the number of capacitors while keeping the amount of voltage drop when a voltage is applied within a predetermined range. Can be

  In the digital camera 10 according to the fifth embodiment, a case where a switch is provided in a circuit for applying a voltage to the vertical transfer electrode group of the CCD 22 and the line transfer electrode MEL to share the bypass capacitor 86 will be described. However, the present invention is not limited to this, and a configuration may be adopted in which the bypass capacitor 86 is shared by circuits that apply two or more voltages as long as the timing of applying the voltages does not overlap.

  Further, the configuration of the digital camera 10 described in the first to fifth embodiments (see FIGS. 1 to 4, 8, and 10 to 13) is an example, and the present invention is not limited thereto. Needless to say, changes can be made as appropriate without departing from the spirit of the invention.

It is a block diagram which shows the main structures of the digital camera which concerns on 1st Embodiment. It is a top view which shows the detailed structure of CCD which concerns on 1st Embodiment. 1 is a circuit diagram of a series regulator and vertical / horizontal drivers according to a first embodiment. FIG. It is a figure which shows the detailed structure of the vertical / horizontal driver which concerns on 1st Embodiment. It is a graph which shows the change of the voltage of the vertical transfer electrode group which concerns on 1st Embodiment. It is a time chart which shows the voltage applied with respect to the vertical transfer electrode group which concerns on 1st Embodiment. It is a time chart which shows another example of the voltage applied with respect to the vertical transfer electrode group which concerns on 1st Embodiment. FIG. 5 is a circuit diagram of a series regulator and vertical / horizontal drivers according to a second embodiment. It is a graph which shows the change of the voltage of the vertical transfer electrode group which concerns on 2nd Embodiment. It is a circuit diagram of a series regulator and a vertical / horizontal driver according to a third embodiment. FIG. 9 is a circuit diagram of a series regulator and vertical / horizontal drivers according to a fourth embodiment. It is a top view which shows the detailed structure of CCD which concerns on 5th Embodiment. FIG. 10 is a circuit diagram of a series regulator and vertical / horizontal drivers according to a fifth embodiment. It is a time chart which shows the voltage applied with respect to each timing signal which concerns on 5th Embodiment, and a vertical transfer electrode group and a line transfer electrode.

Explanation of symbols

10 Digital camera 48 Timing generator 22 CCD
80, 80A, 80B Series regulator 86 Bypass capacitor 86

Claims (10)

A light receiving element that receives light corresponding to the subject image and accumulates electric charge according to the received light quantity; a transfer unit that reads and transfers the electric charge accumulated in the light receiving element at a timing when a predetermined voltage is applied; A solid-state imaging device having
Voltage supply means for supplying the predetermined voltage;
A capacitor connected to a wiring for applying a voltage supplied from the voltage supply means to the transfer unit, and suppressing a decrease in voltage due to a load variation that occurs when a voltage is applied, by accumulated electrical energy;
Control means for controlling the start timing to apply the predetermined voltage supplied from the voltage supply means to the transfer unit; and
An imaging apparatus comprising: A light receiving element that receives light corresponding to the subject image and accumulates electric charge according to the received light quantity; a transfer unit that reads and transfers the electric charge accumulated in the light receiving element at a timing when a predetermined voltage is applied; A solid-state imaging device having
A voltage for supplying a first voltage for reading out the electric charge accumulated in the light receiving element to the transfer unit and a second voltage higher than the first voltage within a predetermined allowable range for allowing a change in the voltage. Supply means;
A capacitor connected to a wiring for applying a voltage supplied from the voltage supply means to the transfer unit, and suppressing a decrease in voltage due to the load variation by accumulated electrical energy;
Control means for controlling the voltage supply means so as to supply the second voltage at a timing of reading out the electric charge accumulated in the light receiving element;
An imaging apparatus comprising: The control means is configured to change the voltage level of the second voltage in a still image capturing mode for capturing a still image of the subject image and a moving image capturing mode for capturing a moving image of the subject image. The imaging device according to claim 2. A light receiving element that receives light corresponding to the subject image and accumulates electric charge according to the received light quantity; a transfer unit that reads and transfers the electric charge accumulated in the light receiving element at a timing when a predetermined voltage is applied; A solid-state imaging device having
Voltage supply means for supplying the predetermined voltage;
A capacitor connected to the wiring for applying a voltage supplied from the voltage supply means to the transfer unit, and suppressing a decrease in voltage due to a load variation that occurs when the predetermined voltage is applied;
Supply power changing means for changing the amount of power supplied by the voltage supply means;
Control means for controlling the supply power increasing means so as to increase the supply amount of power at the timing of applying the predetermined voltage supplied from the voltage supply means to the transfer unit;
An imaging apparatus comprising: A light receiving element that receives light corresponding to the subject image and accumulates electric charge according to the received light quantity, a transfer unit that reads and transfers the electric charge accumulated in the light receiving element, and the electric charge transferred by the transfer unit A solid-state imaging device having a storage unit for temporarily storing;
First voltage supply means for supplying a predetermined read voltage for reading the charge accumulated in the light receiving element to the transfer unit;
Second voltage supply means for supplying a predetermined storage voltage for storing the transferred electric charge in the storage unit;
A voltage supplied from the first voltage supply means is connected to a wiring for applying the voltage to the transfer section via a first switch, and a voltage supplied from the second voltage supply means is applied to the storage section. A capacitor that is connected to the wiring to be connected via the second switch and suppresses a decrease in voltage due to load fluctuation caused when a voltage is applied, by accumulated electrical energy;
When reading out the electric charge accumulated in the light receiving element, the capacitor is electrically connected only to the transfer unit side, and when accumulating the transferred electric charge in the accumulation unit, the capacitor is only connected to the accumulation unit side. Control means for controlling the first switch and the second switch so as to be electrically connected;
An imaging apparatus comprising: A light receiving element that receives light corresponding to the subject image and accumulates electric charge according to the received light quantity; a transfer unit that reads and transfers the electric charge accumulated in the light receiving element at a timing when a predetermined voltage is applied; A method for driving a solid-state imaging device having:
A capacitor that suppresses a decrease in voltage due to load fluctuation that occurs when a voltage is applied to the wiring that applies the predetermined voltage supplied from the voltage supply means to the transfer unit is stored in advance,
A method for driving a solid-state imaging device, wherein control is performed so as to shift a start timing of applying the predetermined voltage supplied from the voltage supply means to the transfer unit. A light receiving element that receives light corresponding to the subject image and accumulates electric charge according to the received light quantity; a transfer unit that reads and transfers the electric charge accumulated in the light receiving element at a timing when a predetermined voltage is applied; A method for driving a solid-state imaging device having:
A first voltage for reading out the electric charge accumulated in the light receiving element supplied from the voltage supply means to the transfer unit, and a second voltage higher than the first voltage within a predetermined allowable range for allowing a change in voltage. A capacitor that suppresses a decrease in voltage due to the load variation by accumulated electrical energy is connected to the wiring that applies the voltage to the transfer unit,
Controlling the voltage supply means to supply the second voltage at a timing of reading out the electric charge accumulated in the light receiving element;
A method for driving a solid-state imaging device. The voltage supply unit is controlled to change the voltage level of the second voltage in a still image shooting mode for capturing a still image of the subject image and a moving image shooting mode for capturing a moving image of the subject image. 8. A method for driving a solid-state imaging device according to 7. A light receiving element that receives light corresponding to the subject image and accumulates electric charge according to the received light quantity; a transfer unit that reads and transfers the electric charge accumulated in the light receiving element at a timing when a predetermined voltage is applied; A method for driving a solid-state imaging device having:
Voltage due to load fluctuation that occurs when the predetermined voltage is applied to the wiring that applies the predetermined voltage supplied from the power supply increasing means having the power supply changing means for changing the power supply amount to the transfer unit Connect a capacitor that suppresses the decrease in electrical energy by accumulated electrical energy,
Controlling the supply power increasing means so that the supply amount of power increases at the timing of applying the predetermined voltage supplied from the voltage supply means to the transfer unit;
A method for driving a solid-state imaging device. A light receiving element that receives light corresponding to the subject image and accumulates electric charge according to the received light quantity, a transfer unit that reads and transfers the electric charge accumulated in the light receiving element, and the electric charge transferred by the transfer unit A solid-state imaging device having a storage unit that temporarily stores the storage unit,
A capacitor that suppresses a decrease in voltage due to load fluctuation caused when a voltage is applied by accumulated electric energy, and is used for reading out the electric charge accumulated in the light receiving element supplied from the first voltage supply means. A read voltage is connected to a wiring for applying to the transfer section via a first switch, and a predetermined storage voltage for storing the transferred charge supplied from the second voltage supply means is stored in the storage. Connected to the wiring to be applied to the part via the second switch,
When reading out the electric charge accumulated in the light receiving element, the capacitor is electrically connected only to the transfer unit side, and when accumulating the transferred electric charge in the accumulation unit, the capacitor is only connected to the accumulation unit side. Controlling the first switch and the second switch to be electrically connected;
A method for driving a solid-state imaging device.

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