JP2006293690A - Integrated circuit and radio ic tag - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an integrated circuit and a radio IC tag that allow additional data writing. <P>SOLUTION: The integrated circuit 2 has a memory 72 for storing data, a rectification circuit 61 for rectifying an alternating signal based on an electromagnetic wave received from an external device to generate a direct current voltage and generate operating voltages, a logic circuit 66 for reading out the data stored on the memory 72, a modulation circuit 62 for modulating a reflected wave with the data read out by the logic circuit 66, terminals connectable with antenna circuits 51 and 52, a phototransistor 74 for inputting an electrical signal depending on a radiated optical signal into the logic circuit, and a fuse ROM 73 to which data included in the electrical signal is written. The radio IC tag 1 uses the integrated circuit. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an integrated circuit and a wireless IC tag, and more particularly to a technique for providing a wireless IC tag capable of writing data later.

2. Description of the Related Art Sheet type and card type wireless IC tags used for RFID are known. The wireless IC tag receives an electromagnetic wave transmitted from an external device such as a reader device by an antenna circuit, rectifies an alternating current output from the antenna circuit, generates a direct current voltage, and uses the direct current voltage. By operating the circuit, it operates without contact and without power. The wireless IC tag responds to the external device with data stored in the memory by modulating the reflected wave with respect to the electromagnetic wave.
JP 2000-105809 A

  A ROM (Read Only Memory) is used as a memory mounted on a wireless IC tag that is currently distributed. Therefore, data can be written in the memory only at the time of shipment. For this reason, the user needs to tell the contents to be written in the ROM in advance to the manufacturer of the wireless IC tag such as a maker at the time of ordering the manufacture of the wireless IC tag. In addition, there is a need to write back data such as confidential information and fluid data, for example, but current wireless IC tags cannot meet such needs.

  The present invention has been made in view of such circumstances, and an object thereof is to provide an integrated circuit and a wireless IC tag capable of writing data later.

  The main invention of the present invention for achieving the above object is used in a wireless IC tag that receives an interrogation radio wave transmitted from an external device such as a reader apparatus and transmits a reflected wave of the interrogation radio wave as a response radio wave. A memory for storing data, and a rectifier circuit for generating a DC voltage by rectifying an AC current based on an electromagnetic wave received from the external device and generating a voltage for operating the integrated circuit And a logic circuit that reads data stored in the memory, a modulation circuit that modulates the reflected wave according to the data read by the logic circuit, a terminal to which an antenna circuit is connected, and an optical signal to be irradiated A phototransistor for inputting an electrical signal to the logic circuit, and a fuse ROM in which data included in the electrical signal is written , And that it has a.

  The integrated circuit of the present invention includes a phototransistor and a fuse ROM into which data included in an electrical signal photoelectrically converted by the phototransistor is written. The fuse ROM is irradiated with an optical signal by irradiating the phototransistor. It is possible to write data to For this reason, for example, it is possible to respond to the need to write confidential information, fluid data, etc. later.

  In addition, since the phototransistor is an element that operates with no power supply, data can be written to the fuse ROM using a voltage obtained by boosting a voltage generated by the rectifier circuit. That is, it is possible to provide a wireless IC tag in which data can be written later by simply adding a simple element with low power consumption such as a phototransistor and a fuse ROM to an existing wireless IC tag.

  ADVANTAGE OF THE INVENTION According to this invention, the radio | wireless IC tag which can write in data by attachment can be provided.

  Hereinafter, one embodiment of the present invention will be described in detail. FIG. 1 is a plan view of a sheet type (card type) wireless IC tag 1 (RFID tag) used for RFID (Radio Frequency Identification) according to an embodiment of the present invention, and FIG. FIG. The wireless IC tag 1 according to this embodiment includes an integrated circuit 2 that is bonded to a planar rectangular integrated circuit 2 provided with elements and circuits, and an upper surface of the integrated circuit 2 via an adhesive layer 3 made of epoxy resin or the like. The main body portion is composed of the antenna sheet 4 having the same shape and size, and the transparent resin film layers 5 and 6 covering both surfaces of the main body portion.

  FIG. 3 is a plan view of the antenna sheet 4 alone. In the antenna sheet 4, a wiring pattern 42 made of a conductive material such as copper (Cu) or aluminum (Al) functioning as an inductor is formed on an insulating film 41 such as PEN (polyethylene naphthalate) or PET (polyethylene terephthalate). It consists of a structure. The wiring pattern 42 starts from the vicinity of the corner corner A of the insulating film 41, and is wound around the insulating film 41 in a single stroke along the four sides of the insulating film 41 a predetermined number of times, and is adjacent to the corner A. It is formed so that the vicinity of corner B is the end point. At the starting point, a rectangular starting terminal 44 is formed, which is a joint portion of a columnar pad (hereinafter referred to as “starting pad 21”) provided in the integrated circuit 2. On the other hand, the end point portion has a rectangular shape serving as a joint portion of a columnar pad (hereinafter referred to as “end point pad 22”) having a rectangular cross section made of copper (Cu), aluminum (Al), or the like provided in the integrated circuit 2. An end terminal 45 is formed.

  A portion of the wiring pattern 42 passing through the vicinity of the end point pad 22 is formed so as to pass through the edge side of the insulating film 41 when viewed from the end point pad 22 (end point terminal 45). In this way, the wiring pattern 42 is formed so as to pass through the edge side of the insulating film 41 when viewed from the end point pad 22 (end point terminal 45), so that it has a crank shape that tends to cause current loss and noise mixing. Wiring pattern portions can be reduced.

  The wiring pattern 42 is connected in parallel with the capacitive element 512 provided in the integrated circuit 2 and constitutes the internal antenna circuit 51 of the wireless IC tag 1. Note that as the capacitor 512, an element having a practically sufficient withstand voltage (for example, an MIM (Metal Insulator Metal) capacitor) is preferably used.

  The integrated circuit 2 can be used by connecting an external antenna circuit 52 instead of the internal antenna circuit 51. The external antenna circuit 52 is a resonance circuit including a circuit in which an inductor and a capacitive element are connected in parallel, and has a resonance frequency different from that of the internal antenna circuit 51. That is, the integrated circuit 2 of the present embodiment can be used universally as a wireless IC tag of a different frequency band of RFID by connecting the external antenna circuit 52 instead of the internal antenna circuit 51.

  The external antenna circuit 52 is connected to the above-described two terminals (the start terminal 44 and the end terminal 45) to which the internal antenna circuit 51 is connected. That is, the start terminal 44 and the end terminal 45 function as terminals for connecting the internal antenna circuit 51 and also function as terminals for connecting the external antenna circuit 52. By sharing the terminals in this way, the number of terminals can be minimized, and a small integrated circuit 2 can be provided.

  Depending on the frequency band used for the wireless IC tag 1 (for example, 2.45 GHz band), the capacitive elements for configuring the internal antenna circuit 51 and the external antenna circuit 52 are connected between the start pad 21 and the end pad 22. Can be substituted by the parasitic capacitance present in When the capacitor element is substituted with a parasitic capacitor, the antenna circuit and the integrated circuit 2 can be reduced in size because it is not necessary to provide the capacitor element. The magnitude of the parasitic capacitance can be adjusted, for example, by changing the distance between the start point pad 21 and the end point pad 22 and the area of the start point pad 21 and the end point pad 22.

  FIG. 4 shows the structure of elements and wiring patterns around the start pad 21 and the end pad 22. Near the end point pad 22, a diode 55 which is a constituent element of the rectifier circuit 61 described later is disposed adjacent to the end point pad 22. As described above, the diode 55 constituting the rectifier circuit 61 is disposed adjacent to the end point pad 22 so that the AC signal output from the antenna circuit (the internal antenna circuit 51 or the external antenna circuit 52) can be efficiently used. It can be well taken into the rectifier circuit 61. In particular, when the frequency received by the antenna circuit is high, current loss from the wiring portion can be effectively prevented. In addition, by arranging the diode 55 adjacent to the end point pad 22 in this manner, the AC signal output from the antenna circuit is immediately converted to a DC voltage. For this reason, the part where the AC signal flows on the integrated circuit 2 is localized in a part of the area on the integrated circuit 2, and the AC signal hardly flows to the elements and circuits on the integrated circuit 2. As a result, it is possible to reduce noise in an element or circuit caused by the flow of an AC signal.

  On the other hand, the diode 55 is configured so that the circuit pattern constituting the diode 55 does not become a bottleneck and the current required by the elements and circuits provided in the integrated circuit 2 is not insufficiently supplied. The line width of the circuit pattern is set to a width (for example, about 35 μm) that allows a current required in the element or circuit to flow.

  FIG. 5 is a process flow illustrating a method for manufacturing the antenna sheet 4. When manufacturing the antenna sheet 4, first, a sheet material formed by applying a conductive material made of copper (Cu), aluminum (Al), or the like to the surface of a resin insulating film, on the side where the conductive material is applied. A photoresist is applied to the surface (hereinafter referred to as “surface”) (S511). Next, after a photomask having a pattern corresponding to the wiring pattern is applied to the photoresist, exposure and development are performed to form a resist pattern (S512). Next, the sheet material is immersed in an etching solution to perform etching, thereby dissolving and removing the conductive material in a portion other than the portion where the photomask is applied (S513). Thereafter, the remaining resist pattern is removed without being removed, and the conductive material is exposed (S514). The antenna sheet 4 can be obtained through the above process.

  FIG. 6 is a block diagram illustrating functions of the integrated circuit 2. The integrated circuit 2 is based on a silicon wafer and is subjected to processes such as a cleaning process, a film forming process such as sputtering, CVD, and thermal oxidation, lithography, an impurity diffusion process, bonding, molding, a multilayer wiring process, and the like. It is manufactured by a normal semiconductor process. The elements and circuits provided in the integrated circuit 2 are driven by the power of electromagnetic waves (interrogation radio waves) transmitted from an external device such as a reader device. An AC signal generated when the antenna circuit receives an electromagnetic wave (interrogation radio wave) is input to the rectifier circuit 61 where it is converted into a DC voltage. The DC voltage output from the rectifier circuit 61 is supplied as a voltage (Vcc3) to the modem circuit 62 and the regulator 63 (regulator). The limiter circuit 64 acts to restrict the upper limit so that the voltage (Vcc3) output from the rectifier circuit 61 does not become excessive.

  The modem circuit 62 demodulates the DC voltage (DC signal) supplied from the rectifier circuit 61. The demodulated signal generated by the modem circuit 62 is input to the logic circuit 66. Note that the wireless IC tag 1 of the present embodiment is configured to have both a demodulation function and a modulation function as described above. However, the present invention is also applicable to a wireless IC tag having only a modulation circuit without having a demodulation function. Can be applied.

  The regulator 63 generates a voltage (Vcc0), a voltage (Vcc1), and a voltage (Vcc2) based on the voltage (Vcc3) supplied from the rectifier circuit 61. Among these, the voltage (Vcc0) is a drive voltage for the modem circuit 62 and the amplifier circuit 75. The voltage (Vcc1) is a drive voltage for the reset circuit 67 and the oscillation circuit 68. The voltage (Vcc2) is a drive voltage for the input / output circuit 71.

  The constant voltage circuit 631 supplies a constant voltage (for example, 1.2 V) to the regulator 63 based on the voltage (Vcc3).

  The reset circuit 67 operates to release the reset signal input to the logic circuit 66 when the voltage (Vcc1) output from the regulator 63 becomes equal to or higher than a predetermined threshold value. When the reset signal is released, the logic circuit 66 changes from the initialized state to the operating state. The oscillation circuit 68 is, for example, an RC oscillation circuit. The oscillation circuit 68 generates a clock signal of 100 kHz to 200 kHz that is necessary for operating the logic circuit 66 and the reset circuit 67.

  Here, in the integrated circuit 2 used for manufacturing the conventional wireless IC tag, the clock signal is generated by dividing the frequency of the electromagnetic wave (interrogation radio wave) received by the antenna circuit, so the antenna circuit receives it. If the frequency of the electromagnetic wave (interrogation radio wave) changes, the frequency of the clock signal also changes, and the integrated circuit 2 cannot be used for a wireless IC tag of a different frequency band by only replacing the antenna circuit. On the other hand, since the integrated circuit 2 of this embodiment includes the oscillation circuit 68, the frequency of the clock signal is independent of the frequency of the electromagnetic wave (interrogation radio wave) received by the antenna circuit, and an antenna circuit having a resonance frequency is selected. Therefore, it can be used for wireless IC tags of various frequency bands. That is, according to the integrated circuit 2 of this embodiment, the manufacturing process of the wireless IC tag 1 corresponding to each frequency band permitted for the RFID can be simplified, and the manufacturing cost can be suppressed.

  When a demodulated signal is input from the modulation / demodulation circuit 62, the logic circuit 66 controls the input / output circuit 70 and the input / output circuit 71 to read out data stored in the memory 72 and fuse ROM 73 (Fuse ROM, Fuse Prom ) And reading data from the fuse ROM 73. Here, the memory 72 is an EEPROM (Electrically Erasable Programmable Read Only Memory), an FRAM (Ferromagnetic Random Access Memory), or the like, and is used for, for example, writing fixed data. On the other hand, the fuse ROM 73 is a memory that stores data by a write-at-once method by burning out a fuse element provided therein with current. In the fuse ROM 73, data having higher fluidity than the data written in the memory 72, such as confidential information and data having fluidity, is written. For example, data such as a company name is written in the memory 72 at the time of shipment of the wireless IC tag 1, and data such as an employee number or name is written in the fuse ROM 73 by the user after the wireless IC tag 1 is purchased. Minutes are made.

  As described above, since the wireless IC tag 1 of the present embodiment allows the user to write data in addition to the fixed information stored in the memory 72, it was necessary to write all the data at the time of shipment. Compared to conventional wireless IC tags, it can flexibly meet various user needs.

  The logic circuit 66 outputs data read from the memory 72 and the fuse ROM 73 (hereinafter referred to as “read data”) to the modulation / demodulation circuit 62. The modem circuit 62 changes the impedance of the integrated circuit 2 as viewed from the antenna circuit side (external device side such as a reader device) in accordance with the read data input from the logic circuit 66. The modulation / demodulation circuit 62 includes a switching transistor in which a resistor coupled to the antenna circuit is connected in series. The modulation / demodulation circuit 62 turns on / off the switching transistor in accordance with read data, and changes the impedance of the semiconductor circuit 2 viewed from the antenna circuit side. Let An external device such as a reader device reads the data stored in the memory 72 of the wireless IC tag 1 by receiving and demodulating the reflected wave (response radio wave) that is modulated and returned by this change in impedance.

  The phototransistor 74 shown in FIG. 6 is used when writing data into the fuse ROM 73. An electric signal output from the phototransistor 74 in response to the incident optical signal is amplified by the amplifier circuit 75 and input to the logic circuit 66.

  FIG. 7 shows the operation of the wireless IC tag 1 when an electromagnetic wave (interrogation radio wave) for reading data stored in the memory 72 or the fuse ROM 73 is input to the antenna circuits 51 and 52 from an external device such as a reader device. It is a timing chart explaining these. In the figure, an “AC signal” is an output voltage (hereinafter referred to as “input voltage”) of the antenna circuit 51 or the antenna circuit 52 when an electromagnetic wave (question radio wave) is input. “Vcc3” is the output voltage of the rectifier circuit 61. “Vcc0”, “Vcc1”, and “Vcc2” are values of voltages output from the regulator 63. “Reset” is a waveform of a reset signal output from the reset circuit 67. “OSC” is a waveform of a clock signal output from the oscillation circuit 68. “Memory” is a waveform of a signal (read busy signal) indicating whether data is being read from the memory 72 or the fuse ROM 73. “Modulation / demodulation circuit input” is a waveform of read data read by the logic circuit 66 and input to the modulation / demodulation circuit 62.

  The operation of the wireless IC tag 1 will be described with reference to FIG. When an external device such as a reader device that transmits electromagnetic waves (question radio waves) approaches the wireless IC tag 1, the amplitude of the AC signal supplied from the antenna circuit to the rectifier circuit 61 gradually increases (T1). Here, the voltage (Vcc0), the voltage (Vcc1), the voltage (Vcc2), and the voltage (Vcc3) all increase as the amplitude of the input voltage increases (T1 to T3). These voltages are kept constant (Vcc0 = 3.3V, Vcc1 = 3.3V, Vcc2 = 3.3V, Vcc3 = 14.4V) by the action of the limiter circuit 65 after the amplitude of the AC voltage exceeds the threshold value. Be drunk.

  Next, when the voltage (Vcc1) becomes equal to or higher than a predetermined operating voltage (for example, 2.0 V), the oscillation circuit 68 starts to operate, whereby the clock signal is input from the oscillation circuit 68 to the logic circuit 66 and the reset circuit 67. Started (T2). When the voltage (Vcc1) becomes a predetermined threshold value (for example, 3.0 V) or more, the reset circuit 67 input to the logic circuit 66 is released, and the logic circuit 66 is stored in the memory (and / or) fuse ROM. Data reading is started (T4). The data read by the logic circuit 66 is input to the modem circuit 62 (T5). The modem circuit 62 performs on / off control of the switching transistor in accordance with the waveform of the read data input from the logic circuit 66, and changes the impedance of the integrated circuit 2 viewed from the antenna circuit side (external device side). Data is read from the wireless IC tag 1 as described above.

  Here, the principle of writing data to the fuse ROM 73 will be described with reference to FIG. 8A. FIG. 8A shows a fuse element corresponding to 2 bits. Among these, the first transistor Tr1 (N-type MOSFET) is connected in series to the fuse element H1. On the other hand, a second transistor Tr2 (N-type MOSFET) is connected in series to the fuse element H2. The third transistor Tr3 (P-type MOSFET) and the fourth transistor Tr4 (N-type MOSFET) are used for on / off control of application of the voltage (Vcc2) supplied from the regulator 63 to the fuse element H1 and the fuse element H2. It is an element.

  Data is written into the fuse ROM 73 by burning out (short-circuiting) the fuse element H1 and the fuse element H2. That is, when data is written in the fuse ROM 73, the “Low” level control voltage A is applied to the gate electrodes of the third transistor Tr3 and the fourth transistor Tr4 to turn on the third transistor Tr3. The fourth transistor Tr4 is turned off, the voltage (Vcc2) is applied to the fuse element H1 and the fuse element H2, the control voltage B and the control voltage C are controlled, and the first transistor Tr1 or the second transistor Tr2 is turned on. To do. As a result, a voltage (Vcc2) is applied to either the fuse element H1 or the fuse element H2, a current flows into the fuse element to which the voltage (Vcc2) is applied, and the fuse element is short-circuited. In this way, data is written to the fuse ROM 73.

  When writing data to the fuse ROM 73, it is necessary to apply a higher voltage to the input / output circuit 71 than when reading data from the fuse ROM 73. FIGS. 8B and 8C are circuits built in the regulator 63. When the electrical signal is input from the phototransistor 74, the circuit is input according to the Vcc2 control that is a control signal sent from the logic circuit 66. FIG. This is a circuit for switching the voltage (Vcc2) supplied to the output circuit 71.

  First, the circuit shown in FIG. 8B is configured to include first to third amplifiers OP1, OP2, and OP3 and four resistance elements R1, R2, R3, and R4. The constant voltage (Vref = 1.2 V) output from the constant voltage circuit 631 is input to the inverting input (−) of the first amplifier OP1. The output voltage of the first amplifier OP1 is fed back to the non-inverting input (+) of the first amplifier OP1 through the resistance element R1. The output terminal of the first amplifier OP1 is grounded via resistance elements R1 and R2 connected in series. The resistance values of the resistance elements R1 and R2 are set so that the output voltage of the first amplifier OP1 is 3.3V. On the other hand, the output voltage of the first amplifier OP1 is input to the inverting input (−) of the second amplifier OP2. The output voltage of the third amplifier OP3 is fed back to the non-inverting input (+) of the second amplifier OP2. The output of the second amplifier OP2 becomes the output voltage (Vcc2) of the regulator 63.

  The output voltage of the first amplifier OP1 is input to the inverting input (−) of the third amplifier OP3. The output voltage of the third amplifier OP3 is fed back to the non-inverting input (+) of the third amplifier OP3 via the resistance element R3. The output terminal of the third amplifier OP3 is grounded via resistance elements R3 and R4 connected in series. The resistance values of the resistance elements R3 and R4 are set so that the output voltage of the third amplifier OP3 is 12.0V.

  In FIG. 8B, a circuit including the first amplifier OP1 and the two resistance elements R1 and R2 (hereinafter referred to as the operational amplifier circuit 811) is 3 with respect to the second and third amplifiers OP2 and OP3. .3V reference voltage is applied. The operational amplifier circuit 811 converts the constant voltage (Vref = 1.2V) supplied from the constant voltage circuit 631 into a 3.3V reference voltage, which is input to the inverting inputs of the second and third amplifiers OP2 and OP3. (-).

  Each of the second and third amplifiers OP2 and OP3 has bias input terminals BIAS1 and BIAS2, and their operating states are controlled by bias voltages externally supplied to the bias input terminals BIAS1 and BIAS2, respectively. A circuit including the second and third amplifiers OP2 and OP3 and the resistance elements R3 and R4 in FIG. 8B (hereinafter referred to as a voltage switching circuit 812) responds to the Vcc2 control sent from the logic circuit 66. Two types of voltages (Vcc2 = 3.3V or 12.0V) are generated.

  FIG. 8C is a circuit for generating a bias voltage to be input to the bias input terminals BIAS1 and BIAS2 of the second and third amplifiers OP2 and OP3 in accordance with the Vcc2 control sent from the logic circuit 66. This circuit includes fifth to ninth transistors Tr5, Tr6, Tr7, Tr8, TR9. The transistors Tr5, Tr6, Tr7, Tr8, and TR9 are all MOSFETs (field effect MOS transistors), the fifth and sixth transistors are P-type MOSFETs, and the seventh to ninth transistors are N-type MOSFETs.

  A voltage (Vcc3) is supplied to the sources of the fifth and sixth transistors Tr5 and Tr6. The gate of the fifth transistor Tr5 is connected to the bias input terminal BIAS1 of the second amplifier OP2. The gate and drain of the fifth transistor Tr5 are short-circuited. The gate of the sixth transistor Tr6 is connected to the bias input terminal BIAS2 of the third amplifier OP3. The gate and drain of the sixth transistor Tr6 are short-circuited. The drain of the fifth transistor Tr5 is connected to the drain of the seventh transistor Tr7. The drain of the sixth transistor Tr6 is connected to the drain of the eighth transistor Tr8.

  A constant voltage (for example, 1.2 V) supplied from the constant voltage circuit 631 is applied to the gate of the seventh transistor Tr7. The source of the seventh transistor Tr7 is connected to the drain of the ninth transistor Tr5. The source of the eighth transistor Tr8 is connected to the drain of the ninth transistor Tr9.

  The Vcc2 control sent from the logic circuit 66 is input to the gate of the eighth transistor Tr8. The Vcc2 control sent from the logic circuit 66 is “Low” with respect to the constant voltage (Vref = 1.2 V) supplied from the constant voltage circuit 631 when the input / output circuit 71 reads from the fuse ROM 73. The signal becomes “High” when writing to the fuse ROM 73 is performed. A predetermined bias voltage supplied from the constant voltage circuit 631 is applied to the gate of the ninth transistor Tr9. The source of the ninth transistor Tr9 is grounded.

  FIG. 9 shows a timing chart for explaining an operation of writing data to the fuse ROM 73. In FIG. 9, “Vcc1” and “Vcc2” are values of voltages output from the regulator 63. “Vcc2 control” is Vcc2 control sent from the logic circuit 66 to the regulator 63. The “optical signal” is a waveform of an optical signal irradiated to the phototransistor 74. “Fuse ROM” is a waveform of a signal (write busy signal) indicating that data is being written to the fuse ROM 73.

  The data writing process to the fuse ROM 73 shown in FIG. 9 is to start writing data to the fuse ROM 73 after operating the logic circuit 66 according to the timing chart of FIG. 7 by inputting electromagnetic waves to the antenna circuit. This is started by irradiating the phototransistor 74 with an optical signal including a command (hereinafter referred to as a “write start command”).

  First, an electrical signal corresponding to the optical signal irradiated to the phototransistor 74 is output from the phototransistor 74. The amplifier circuit 75 amplifies the electrical signal output from the phototransistor 74 and outputs the amplified signal to the logic circuit 66 (T6 to T7). Note that data is written into the fuse ROM 73 while supplying an electromagnetic wave having necessary power to the antenna circuit.

  When the electric signal is input from the phototransistor 74, the logic circuit 66 switches the Vcc2 control supplied to the regulator 63 from “Low” to “High” (T8).

  Here, in the regulator 63, the Vcc2 control sent from the logic circuit 66 is inputted to the gate of the eighth transistor Tr8 of the circuit shown in FIG. 8C, and the Vcc2 control is changed from “Low” to “High”. The eighth transistor Tr8 is turned on. Therefore, the current supply to the ninth transistor Tr9 is stopped through the path constituted by the fifth transistor Tr5 and the seventh transistor Tr7, and the current supply to the ninth transistor Tr9 is exclusively the sixth transistor. This is performed only through a path constituted by the transistor Tr6 and the eighth transistor Tr8. As a result, a potential difference is generated between the source and the gate of the sixth transistor Tr6. On the other hand, no potential difference is generated between the source and gate of the fifth transistor Tr5.

  Here, the potential difference generated between the source and gate of the sixth transistor Tr6 is applied to the bias input terminal BIAS2 of the third amplifier OP3 constituting the voltage switching circuit 812 of FIG. 8B through the gate of the sixth transistor Tr6. Supplied. As a result, the third amplifier OP3 operates. On the other hand, since no potential difference is generated between the source and gate of the fifth transistor Tr5 in FIG. 8C, no bias voltage is supplied to the bias input terminal BIAS1 of the second amplifier OP2, and the second amplifier OP2 operates. To stop. As described above, after all, only the third amplifier OP3 is turned on, and the output voltage of the third amplifier OP3 determined by the resistance elements R3 and R4 constituting the voltage switching circuit 812 is 12.0V. Is output from the regulator 63 as a voltage (Vcc2).

  When reading data from the memory 72 or the fuse ROM 73, “Low” is sent from the logic circuit 66 to the regulator 63 as Vcc2 control. For this reason, the gate voltage of the eighth transistor Tr8 in the circuit shown in FIG. 8C becomes “Low”, whereby the eighth transistor Tr8 stops operating. Accordingly, the current supply to the ninth transistor Tr9 is stopped through the path constituted by the sixth transistor Tr6 and the eighth transistor Tr8, and the current supply to the ninth transistor Tr9 is exclusively the fifth transistor Tr5. And the seventh transistor Tr7, the potential difference is generated between the source and gate of the fifth transistor Tr5, but the source and gate of the sixth transistor Tr6 There is no potential difference between them. As a result, the second amplifier OP2 operates, but the third amplifier OP3 stops operating, and the output voltage of the second amplifier OP2 constituting the voltage switching circuit 812 is 3.3V (Vcc2). Is output from the regulator 63. As described above, supply of voltage (Vcc = 12.0 V) is started (T8).

  Next, an optical signal including address data indicating the data writing position on the fuse ROM 73 and the write data is applied to the phototransistor 74 (T9 to T10), and an electric signal corresponding to the optical signal is input to the logic circuit 66. Entered. The logic circuit 66 controls the input / output circuit 71 to write the write data included in the electrical signal to a predetermined storage location of the fuse ROM 73 specified by the address data included in the input electrical signal (T11 to T11). T12).

  When the writing of data to the fuse ROM 73 is completed, the logic circuit 66 turns on a bit (hereinafter referred to as “written flag”) at a predetermined position of the fuse ROM 73 (T13 to T14). After the above processing is completed, the supply of electromagnetic waves from the antenna circuit is stopped and the writing processing is completed (T15). The bit is referred to by the logic circuit 66 when determining whether or not data has been written to the fuse ROM 73 (whether or not data has been written). That is, if the “written flag” is on, the logic circuit 66 determines that data has already been written in the fuse ROM 73. In this case, an optical signal including a write command is sent to the phototransistor 74. Even if it is irradiated, the data writing operation to the fuse ROM 73 is not started.

  Note that in the processing described above, the frequency of the clock signal of the logic circuit 66 is higher than the frequency of the optical signal applied to the phototransistor 74 so that the phototransistor 74 can reliably receive the optical signal. Set to a high value. In addition, there may be a case where an optical signal cannot be read with a single irradiation due to a timing shift or noise. In such a case, the light is repeatedly applied to the phototransistor 74 until the logic circuit 66 receives an input based on the optical signal. Input a signal.

  By the way, the optical signal irradiated to the phototransistor 74 becomes a factor that causes the amplifier circuit 75 and the logic circuit 66 to malfunction. Therefore, the phototransistor 74 is preferably provided at a position as far as possible from the amplifier circuit 75 and the logic circuit 66. On the other hand, in order to efficiently transmit the electric signal amplified in the amplifier circuit 75 to the logic circuit 66, the amplifier circuit 75 is preferably disposed adjacent to the logic circuit 66. Here, the positional relationship between the phototransistor 74 and the amplifier circuit 75 or the logic circuit 66 is obtained from the relationship shown in FIG. 10, for example. That is, the range in which the light from the light source (optical fiber) 81 is directly irradiated is obtained from the distance Z between the phototransistor 74 and the light source and the spread angle θ of the light irradiated from the light source. Since it is in the range of the circle of tan θ, it is preferable that the phototransistor 74, the amplifier circuit 75, and the logic circuit 66 are arranged in a region outside the range of the circle in the surface region on the integrated circuit 2. . In this case, the logic circuit 66 and the amplifier circuit 75 are preferably disposed adjacent to each other in order to efficiently transmit the electric signal amplified by the amplifier circuit 75 to the logic circuit 66.

  When writing data to the fuse ROM 73, it is necessary to perform a series of processes such as supplying a write command to the phototransistor 74 and inputting write data while supplying a strong electromagnetic wave to the antenna circuit compared to normal reading. There is. Here, the complexity of such a process contributes to the improvement of the security strength of the wireless IC tag 1. In addition, the fact that data is written by a physical means of burning out the fuse also contributes to improving the security strength.

  Although the embodiments of the present invention have been described in detail above, the above description of the embodiments is for facilitating the understanding of the present invention and does not limit the present invention. It goes without saying that the present invention can be changed and improved without departing from the gist thereof, and that the present invention includes equivalents thereof.

It is a top view of the radio | wireless IC tag 1 demonstrated as one Embodiment of this invention. It is sectional drawing of the radio | wireless IC tag 1 demonstrated as one Embodiment of this invention. It is a top view of the antenna sheet 4 single-piece | unit demonstrated as one Embodiment of this invention. It is a figure which shows the structure of the element around the starting point pad 21 and end point pad 22, and wiring pattern demonstrated as one Embodiment of this invention. It is a process flow explaining the manufacturing method of the antenna sheet | seat 4 demonstrated as one Embodiment of this invention. It is a block diagram explaining the function of the integrated circuit 2 demonstrated as one Embodiment of this invention. It is a timing chart explaining operation | movement of the radio | wireless IC tag 1 at the time of reading the data demonstrated as one Embodiment of this invention. It is a figure explaining the principle of writing of the data to fuse ROM73 demonstrated as one Embodiment of this invention. This is a circuit for switching the voltage (Vcc2) supplied to the input / output circuit 71 in accordance with the Vcc control described as an embodiment of the present invention. This is a circuit for switching the voltage (Vcc2) supplied to the input / output circuit 71 in accordance with the Vcc control described as an embodiment of the present invention. It is a timing chart explaining the write-in operation | movement of the data to fuse ROM73 demonstrated as one Embodiment of this invention. It is a figure explaining the positional relationship of the phototransistor 74 demonstrated as one Embodiment of this invention, the amplifier circuit 75, or the logic circuit 66. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wireless IC tag 2 Integrated circuit 21 Starting point pad 22 Ending point pad 51 Internal antenna circuit 52 External antenna circuit 55 Diode 61 Rectification circuit 62 Modulation / demodulation circuit 63 Regulator 65 Limiter circuit 66 Logic circuit 67 Reset circuit 68 Oscillation circuit 71 I / O circuit 72 Memory 73 Fuse ROM
74 Phototransistor

Claims (12)

An integrated circuit used in a wireless IC tag that receives an interrogation radio wave transmitted from an external device such as a reader device and transmits a reflected wave of the interrogation radio wave as a response radio wave,
A memory for storing data;
A rectifier circuit that rectifies an alternating current based on an electromagnetic wave received from the external device to generate a DC voltage, and generates a voltage for operating the integrated circuit;
A logic circuit for reading data stored in the memory;
A modulation circuit that modulates the reflected wave according to data read by the logic circuit;
A terminal to which the antenna circuit is connected;
A phototransistor that inputs an electrical signal corresponding to the irradiated optical signal to the logic circuit;
A fuse ROM in which data included in the electrical signal is written;
An integrated circuit characterized by comprising: An integrated circuit according to claim 1, wherein
An integrated circuit comprising a demodulation circuit for demodulating the DC voltage. An integrated circuit according to claim 1 or 2,
The integrated circuit according to claim 1, wherein the logic circuit includes a circuit for writing data included in the electrical signal into the fuse ROM. An integrated circuit according to claim 1 or 2,
An integrated circuit, wherein a frequency of a clock of the logic circuit is higher than a frequency of the optical signal. An integrated circuit according to claim 1 or 2,
An input / output circuit for reading and writing data to the fuse ROM;
A regulator that supplies the input / output circuit with a voltage required when reading and writing the data of the input / output circuit using the voltage generated by the rectifier circuit,
When the electrical signal is input from the phototransistor, the logic circuit controls the regulator so that the regulator supplies a voltage necessary for writing data to the fuse ROM to the input / output circuit. An integrated circuit characterized by: An integrated circuit according to claim 1 or 2,
An integrated circuit comprising an amplifier circuit that operates by a voltage generated by the rectifier circuit and amplifies the electrical signal. An integrated circuit according to claim 1 or 2,
When the distance between the phototransistor and the light source that emits light to the phototransistor is Z and the spread angle of the light emitted from the light source is θ, the logic circuit An integrated circuit characterized by being arranged in a region outside a circle having a radius x determined from the equation x = Z · tan θ. An integrated circuit according to claim 6, comprising:
When the distance between the phototransistor and the light source that emits light to the phototransistor is Z and the spread angle of the light emitted from the light source is θ, An integrated circuit characterized by being arranged in a region outside a circle having a radius x determined from the equation x = Z · tan θ. An integrated circuit according to claim 8,
The integrated circuit is characterized in that the amplifier circuit is disposed adjacent to the logic circuit. A wireless IC tag that receives an interrogation radio wave transmitted from an external device such as a reader apparatus and transmits a reflected wave of the interrogation radio wave as a response radio wave,
A memory for storing data;
A rectifier circuit that rectifies an alternating current based on an electromagnetic wave received from the external device to generate a DC voltage, and generates a voltage for operating the integrated circuit;
A logic circuit for reading data stored in the memory;
A modulation circuit that modulates the reflected wave according to data read by the logic circuit;
An oscillation circuit that operates by the voltage generated by the rectifier circuit and generates a clock signal for operating the logic circuit;
A terminal to which the antenna circuit is connected;
A phototransistor that inputs an electrical signal corresponding to the irradiated optical signal to the logic circuit;
A fuse ROM in which data contained in the electrical signal is written;
An integrated circuit comprising:
A planar inductor that forms the internal antenna circuit in a spiral shape with a wiring pattern made of a conductive material on an insulating film;
A wireless IC tag comprising: The wireless IC tag according to claim 10, wherein
A wireless IC tag comprising a demodulation circuit for demodulating the DC voltage. The wireless IC tag according to claim 10 or 11,
The wireless IC tag, wherein the integrated circuit is provided with a booster circuit that boosts the voltage generated by the rectifier circuit to a voltage necessary for writing data in the fuse ROM.