JP2006288056A - Driving circuit for stepping motor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the amount of forward and reverse rotations generated in switching an exciting mode in a driving circuit for a stepping motor. <P>SOLUTION: This driving circuit for the stepping motor includes: a positional control circuit for updating a positional signal which indicates a step position of the stepping motor and outputting the updated positional signal according to an exciting mode signal and a clock; and a drive control circuit for controlling the drive of the stepping motor on the basis of the positional signal output from the positional control circuit. If the positional control circuit detects that the exciting mode signal switches from a first exciting mode to a second exciting mode whose step angle is rougher than that the first exciting mode, it updates the positional signal to the step position of the second exciting mode in the same phase as the detected step position and outputs the updated positional signal, after that, it updates the positional signal in accordance with the second exciting mode in response to the clock, and outputs the updated positional signal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a drive circuit for a stepping motor.

  Stepping motors are used in various electronic devices such as printers, scanners, and digital cameras. FIG. 8 is a diagram showing the transition of the step position of the two-phase stepping motor. In the two-phase excitation mode shown on the innermost side of the concentric circle in FIG. 8, the motor rotates in four steps. Further, in the 1-2 phase excitation mode shown on the outer side, the motor rotates in 8 steps that is twice as large. In the 4W1-2 phase excitation mode shown on the outermost side as an example of microstep driving, the motor rotates in 64 steps. In an actual stepping motor, one rotation of FIG. 8 is repeated several times, so that the motor rotates 360 °.

  As described above, the stepping motor has a plurality of excitation modes. However, as the excitation mode is changed to the outer excitation mode in FIG. 8, the number of steps at the time of rotation increases, and the driving is slow but smooth and has little vibration. Can do. On the other hand, as the inner excitation mode in FIG. 8 is reached, the number of steps during rotation decreases, and high-speed driving can be performed although there is some vibration. Therefore, in driving the stepping motor, it is generally performed to switch the excitation mode according to the application and situation.

  FIG. 9 is a diagram showing a conventional stepping motor drive circuit. The stepping motor drive circuit includes a step position control circuit 201 and a drive control circuit 202 (for example, Patent Document 1). The step position control circuit 201 is supplied with an excitation mode signal indicating an excitation mode, an FR signal indicating forward / reverse rotation of the motor, and a clock (CLK) indicating a step. Then, the step position control circuit 201 updates and outputs the phase signal (A phase, B phase) and the counter value indicating the step position in the phase according to the clock according to the excitation mode.

  For example, when the excitation mode is 4W1-2 phase in FIG. 8, the initial position is that the phase signal indicates the first phase (positive, positive) and the counter value is “16” (decimal). In the case of forward rotation (clockwise), the step position control circuit 201 decreases and updates the counter value by 1 according to the clock and outputs it. When the counter value becomes “0” (decimal), the second phase (Negative, Positive) indicating that the phase signal is updated and output. After that, the step position control circuit 201 increments and updates the counter value by 1 according to the clock and outputs it. When the counter value reaches “16” (decimal), the step position control circuit 201 shows the third phase (negative, negative). Update the signal and output it. As described above, the step position control circuit 201 updates and outputs the phase signal and the counter value for indicating the step position according to the excitation mode signal and the clock.

The drive control circuit 202 controls the current supplied to the A-phase coil 203 and the B-phase coil 204 on the basis of the phase signal and counter value output from the step position control circuit 201, so that a desired motor is obtained. It is rotated to the step position.
JP-A-8-149890

  By the way, when the step position control circuit 201 detects that the excitation mode is switched by the excitation mode signal, the step position control circuit 201 resets the phase signal and the counter value to the initial position, and then the phase based on the switched excitation mode according to the clock. The signal and counter value are updated and output. Therefore, if the step position before switching is in the third phase or the fourth phase during forward rotation, the motor rotates in the forward direction and proceeds to the initial position, and the step position before switching is in the first phase. Or, in the case of the second phase, it rotates in the reverse direction and proceeds to the initial position. Therefore, depending on the step position at the time of switching, the step position may rotate forward or backward about half a circle, and the change amount of the step position when switching the excitation mode is large, and the excitation mode can be switched smoothly. I could not.

  The present invention has been made in view of the above problems, and an object of the present invention is to reduce the amount of change in the step position when switching the excitation mode in the drive circuit of the stepping motor and smoothly switch the excitation mode.

  In order to achieve the above object, a stepping motor drive circuit according to the present invention includes a position control circuit that updates and outputs a position signal indicating a step position of a stepping motor in accordance with an excitation mode signal and a clock, and the position control A drive control circuit for controlling the drive of the stepping motor based on the position signal output from the circuit, wherein the position control circuit has a first excitation mode signal as the first excitation mode signal. When it is detected that the excitation mode is switched to the second excitation mode having a coarser step angle than the first excitation mode, the position signal is converted into the step of the second excitation mode in the same phase as the step position at the time of detection. The position signal is updated and output, and then the position signal is updated according to the second excitation mode according to the clock. And that to output.

  In addition, when the step position at the time of detection is the step position of the second excitation mode, the position control circuit outputs the position signal from the step position at the time of detection according to the clock. It is good also as updating and outputting according to a mode.

  Further, when the position control circuit detects that the excitation mode signal is switched from the second excitation mode to the first excitation mode, the position control circuit changes the position signal according to the clock from the step position at the time of the detection. Then, it may be updated and output in accordance with the first excitation mode.

  The position signal includes a phase signal indicating the phase of the step position and an in-phase position signal indicating the step position within the phase. The position control circuit includes the excitation mode signal as the first signal. When it is detected that the first excitation mode is switched to the second excitation mode, the phase signal at the time of detection is updated to the step position of the second excitation mode in the same phase as the step position at the time of detection. The in-phase position signal may be output, and then the position signal and the in-phase position signal may be updated and output according to the second excitation mode in accordance with the clock.

  Further, when the position control circuit detects that the in-phase position signal has been updated to the first value by decreasing, the position signal is updated to the next phase and output, and then the excitation mode signal In response to the clock, the in-phase position signal is updated and output, and when it is detected that the in-phase position signal has been updated to the second value, the phase signal is updated to the next phase. Then, the in-phase position signal may be reduced and updated according to the excitation mode signal and the clock, and then output.

  Further, the position control circuit includes a phase signal output circuit that outputs the phase signal, and an in-phase position signal output circuit that outputs the in-phase position signal, and the phase signal output circuit includes the phase signal output circuit, When it is detected that the in-phase position signal output from the in-phase position signal output circuit has reached the first value, the phase signal is updated to the next phase and output, and the in-phase position signal When an increase signal instructing an increase is output, and it is detected that the in-phase position signal output from the in-phase position signal output circuit has reached the second value, the phase signal is updated to the next phase. And outputting a decrease signal instructing a decrease in the in-phase position signal, wherein the in-phase position signal output circuit is based on the increase signal or the decrease signal output from the phase signal output circuit. The phase in the position signal, may output the excitation mode and increased update or decrease Update according to the clock.

  In the stepping motor drive circuit, the change amount of the step position when the excitation mode is switched can be reduced, and the excitation mode can be switched smoothly.

== Configuration of drive circuit ==
FIG. 1 is a block diagram showing a configuration of a stepping motor drive circuit according to an embodiment of the present invention. The drive circuit includes a position control circuit 1 and a drive control circuit 2. The position control circuit 1 is a circuit that outputs a position signal that indicates the step position of the stepping motor, and includes a phase signal output circuit 11, a counter 12, and a counter control circuit 13. The drive control circuit 2 is a circuit that controls the driving of the two-phase stepping motor based on the position signal output from the position control circuit 1, and includes conversion circuits 21A and 21B, comparators 22A and 22B, and a current control circuit. 23A and 23B, H bridge circuits 24A and 24B, and resistors 25A and 25B. An excitation mode signal indicating an excitation mode, an FR signal indicating forward / reverse rotation of the motor, and a clock (CLK) indicating a step are input to the drive circuit from outside the microcomputer or the like. It is possible to integrate the position control circuit 1 and the drive control circuit 2 constituting the drive circuit.

  The drive circuit of the present embodiment can drive the stepping motor in the two-phase excitation mode, the 1-2 phase excitation mode, and the 4W1-2 phase excitation mode. FIG. 2 is a diagram showing the transition of the step position in each excitation mode. In this embodiment, the A phase and the B phase constituting the two phases are both positive in the first phase, the A phase is negative, the B phase is in the positive phase, the second phase, and both the A phase and the B phase are negative. These phases are referred to as the third phase, the A phase is positive, and the B phase is negative as the fourth phase.

  First, the configuration of the position control circuit 1 will be described. The phase signal output circuit 11 is a circuit that outputs a phase signal that is one of position signals. The phase signal includes an A phase signal and a B phase signal. In the following description, the phase signal (X, Y) indicates that the A-phase phase signal is X and the B-phase phase signal is Y. For example, when the forward rotation operation is performed in the 4W1-2 phase excitation mode, the phase signal output circuit 11 outputs the counter value output from the counter 12 when the current phase signal is the first phase (positive, positive). Becomes “0” (decimal), the phase signal is updated to the second phase (negative, positive) and output. Subsequently, when the counter value output from the counter 12 in the second phase becomes “16” (decimal), the phase signal output circuit 11 updates and outputs the phase signal to the third phase (negative, negative). Next, when the counter value becomes “0”, the phase signal is updated to the fourth phase (positive, negative) and outputted, and when the counter value becomes “16” next, the phase signal is changed to the first phase (positive, negative). Update to (Positive) and output.

  That is, the phase signal output circuit 11 inverts the A-phase phase signal when the counter value becomes “0”, and inverts the B-phase phase signal when the counter value becomes “16”. When the FR signal is a signal indicating reverse rotation, the phase transition is reversed in the order of the fourth phase, the third phase, the second phase, and the first phase, contrary to the forward rotation.

  The counter 12 is a circuit that holds a counter value (in-phase position signal) indicating a step position within a phase, which is one of position signals. The counter control circuit 13 is a circuit that updates the counter value held in the counter 12 according to the excitation mode. The counter value of the counter 12 is updated at the clock timing under the control of the counter control circuit 13. That is, the counter control circuit 13 updates the counter value according to the excitation mode as shown in FIG. For example, when the forward rotation operation is performed in the 4W1-2 phase excitation mode, the counter control circuit 13 decreases and updates the counter value by 1 in the first phase and the third phase, and in the second phase and the fourth phase. The counter value is incremented and updated by one. Further, when the forward rotation operation is performed in the 1-2 phase excitation mode, the counter control circuit 13 decreases and updates the counter value by 8 in the first phase and the third phase, and in the second phase and the fourth phase. The counter value is incremented and updated by 8. Note that when the forward rotation operation is performed in the two-phase excitation mode, the counter value is fixed at “8” (decimal).

  When the counter control circuit 13 detects that the excitation mode with a small step angle, such as microstep driving, has been changed to an excitation mode with a coarse step angle, the excitation mode after the change in the same phase as the step position at the time of detection is detected. The counter value is updated at the step position. For example, the excitation mode before the change is the 4W1-2 phase excitation mode, the excitation mode after the change is the 1-2 phase excitation mode, and the step position in the 4W1-2 phase excitation mode when the change of the excitation mode is detected is the first. When the counter value of the phase is “3” (decimal), the counter control circuit 13 sets the counter value to “8” (decimal) indicating the step position of the first-phase 1-2 phase excitation mode. Update to Thereafter, the counter control circuit 13 updates the counter value according to the changed excitation mode.

  In addition, when the step position at the time of detection is the step position of the excitation mode after the change, the counter control circuit 13 updates the counter value from the step position according to the excitation mode after the change. For example, when the excitation mode is changed from the 4W1-2 phase excitation mode to the 1-2 phase excitation mode, the step position when the change is detected is that the counter value of the first phase is “8” (decimal). If it is a step position, or if the counter value that is the boundary between the first phase and the second phase is a step position of “0” (decimal), the counter control circuit 13 changes the counter value after the change. Update by the excitation mode is started.

  FIG. 3 is a diagram showing the transition of the step position when changing the excitation mode in the first phase. As described above, for example, when the 4W1-2 phase excitation mode is changed to the 1-2 phase excitation mode, the counter value indicating the step position is changed from “15” (decimal) to “9” (decimal). In the case of), the counter value is updated to “8” (decimal), so that the rotation proceeds in the positive direction to the step position of the counter value “8” of the first phase. Further, when the counter value is “7” (decimal) to “1” (decimal), the counter value is updated to “8” (decimal), so that the first-phase counter value “8” is updated. Rotate in the reverse direction to the step position “”. Similarly, in other phases, the counter value is updated to the step position of the excitation mode after the change in the same phase as the step position when the change of the excitation mode is detected.

  In addition, when the counter control circuit 13 detects that the excitation mode with the coarse step angle is changed to the excitation mode with the fine step angle, the counter control circuit 13 updates the counter value according to the excitation mode after detection from the step position at the time of detection. Do. For example, the excitation mode before the change is the 1-2 phase excitation mode, the excitation mode after the change is the 4W1-2 phase excitation mode, and the step position in the 1-2 phase excitation mode when the change of the excitation mode is detected is the first. When the counter value of the phase is “8” (decimal) step position, the counter control circuit 13 starts updating the counter value from the counter value according to the 1-2 phase excitation mode. That is, the counter value is updated to “0” (decimal) by the next clock input.

  The counter 12 and the counter control circuit 13 constitute an in-phase position signal output circuit of the present invention.

  Next, the configuration of the drive control circuit 2 will be described. The conversion circuit 21A is a circuit that converts the counter value output from the counter value 12 into a voltage value and outputs the voltage value. The amount of current of the A-phase coil 30A is controlled by this voltage value, and the step position of the motor is controlled. The comparator 22A outputs a comparison result between the voltage value output from the conversion circuit 21A and the voltage value indicating the current amount of the A-phase coil 30A.

  The current control circuit 23A controls the direction of the current flowing through the A-phase coil 30A based on the A-phase phase signal output from the phase signal output circuit 11. Further, the current control circuit 23A, based on the comparison result output from the comparator 22A, causes the voltage value indicating the current amount of the A-phase coil 30A to be the voltage value output from the conversion circuit 21A. To control the operation. FIG. 4 is a diagram showing the configuration of the H-bridge circuit 24A. The H bridge circuit 24 </ b> A is a full bridge circuit configured by N-type MOSFETs 41 to 44. The power source voltage Vdd is applied to the drains of the N-type MOSFETs 41 and 42, the source of the N-type MOSFET 41 and the drain of the N-type MOSFET 43 are connected, and the source of the N-type MOSFET 42 and the drain of the N-type MOSFET 44 are connected. . The sources of the N-type MOSFETs 43 and 44 are grounded via the resistor 25A. Both ends of the A-phase coil 30 </ b> A are connected between the sources of the N-type MOSFETs 41 and 42.

  In such an H-bridge circuit 24A, when the N-type MOSFETs 41 and 44 are turned on and the N-type MOSFETs 42 and 43 are turned off, a current in one direction (direction 1) flows through the A-phase coil 30A. When the N-type MOSFETs 42 and 43 are turned on and the N-type MOSFETs 41 and 44 are turned off, a current in the other direction (direction 2) flows through the A-phase coil 30A. Thus, the current control circuit 23A controls the on / off of the N-type MOSFETs 41 to 44, thereby controlling the current direction and the current amount of the A-phase coil 30A. The current amount of the A-phase coil 30A is detected by the voltage value detected by the resistor 25A.

  Similarly, the direction and amount of current flowing through the B-phase coil 30B are controlled by the conversion circuit 21B, the comparator 22B, the current control circuit 23A, the H bridge circuit 24B, and the resistor 25B.

== Phase signal output circuit ==
Next, details of the phase signal output circuit 11 will be described. FIG. 5 is a circuit diagram showing an example of the configuration of the phase signal output circuit 11. The phase signal output circuit 11 includes D-type flip-flops (hereinafter referred to as “D-FF”) 51 and 52, a zero detection circuit 55, a FULL detection circuit 56, NAND circuits 61 to 72, XOR circuits 73 and 74, OR The circuit 75 and NOT circuits 76 to 78 are configured.

  The D-FF 51 is a circuit that holds an A phase signal, and the D-FF 52 is a circuit that holds a B phase signal. In the present embodiment, the positive phase signal is represented by “0” and the negative phase signal is represented by “1”, and is represented as (A phase signal B phase signal). For example, the phase signal indicating the first phase is expressed as (00), and the phase signal indicating the second phase is expressed as (10).

  The zero detection circuit 55 outputs “0” only when the counter value output from the counter 12 is zero, and outputs “1” otherwise. Here, the case where the counter value is zero is a case where the counter value is “0” (decimal) of the step position shown in FIG. In the present embodiment, the counter 12 is composed of 5 bits, and “0” (decimal) of the step position is represented by 5 bits (00000).

  The FULL detection circuit 56 outputs “0” only when the counter value output from the counter 12 is FULL, and outputs “1” otherwise. Here, the case where the counter value is FULL is a case where the counter value is “16” (decimal) of the step position shown in FIG. 2. In this embodiment, “16” (decimal) of the step position is expressed as (10000) with 5 bits.

  The FR signal input to the XOR circuit 74 is a signal indicating the rotation direction of the motor. For example, “0” indicates normal rotation and “1” indicates reverse rotation. In addition, for example, a 2-bit excitation mode signal input to the OR circuit 75 is (00) being a two-phase excitation mode, (10) being a 1-2 phase excitation mode, and (11) being a 4W1-2 phase excitation mode. I will do it. Therefore, the output of the OR circuit 75 is “0” only in the two-phase excitation mode. The U / D signal output from the NAND circuit 62 is a signal indicating the count-up or count-down of the counter value of the counter 12. For example, “0” indicates a count-down and “1” indicates a count-up. .

  The operation of the phase signal output circuit 11 having such a configuration will be described. First, the case where the excitation mode is other than the two-phase excitation mode will be described. In this case, the output of the OR circuit 75 is “1”.

  For example, it is assumed that the FR signal is “0” (forward rotation), the phase signal is (00), and the counter value is “1” (decimal). At this time, “0” output from the output terminal Q of the D-FF 51 and “0” output from the output terminal Q of the D-FF 52 are input to the XOR circuit 73, and the output is “0”. It becomes. The XOR circuit 74 receives “0” output from the XOR circuit 73 and the FR signal “0”, and outputs “0”.

  At this time, the outputs of the zero detection circuit 55 and the FULL detection circuit 56 are both “1”. Therefore, “0” output from the XOR circuit 74 and “1” output from the FULL detection circuit 56 are input to the NAND circuit 61, and the output thereof is “1”. Then, “1” output from the NAND circuit 61 and “1” output from the zero detection circuit 55 are input to the NAND circuit 62, and the output becomes “0”. That is, “0” indicating the countdown is output as the U / D signal.

  When the next clock (CLK) is input, since the U / D signal is “0”, the counter value output from the counter 12 is “0” (decimal), and the output of the zero detection circuit 55 is output. Becomes “0”. Then, the U / D signal that is the output of the NAND circuit 62 becomes “1” indicating the count-up.

  At this time, “0” output from the zero detection circuit 55 is input to the NAND circuit 63, and the output is “1”. Then, “1” output from the NAND circuit 63 and “1” obtained by inverting the “0” output from the XOR circuit 74 by the NOT circuit 76 are input to the NAND circuit 65, and the output is “0”. " Further, “1” obtained by inverting “0” output from the NAND circuit 65 by the NOT circuit 77 and “1” output from the inverting output terminal / Q of the D-FF 51 are input to the NAND circuit 67. The output becomes “0”. Then, “0” output from the NAND circuit 67 is input to the NAND circuit 69, the output is “1”, and “1” is input to the input terminal D of the D-FF 51.

  Further, “0” output from the XOR circuit 74 is input to the NAND circuit 66, and the output is “1”. Then, “0” obtained by inverting “1” output from the NAND circuit 66 by the NOT circuit 78 is input to the NAND circuit 70, and the output becomes “1”. Further, “0” output from the output terminal Q of the D-FF 52 is input to the NAND circuit 71, and the output thereof is “1”. Then, “1” output from the NAND circuit 70 and “1” output from the NAND circuit 71 are input to the NAND circuit 72, and the output becomes “0”, and the input terminal D of the D-FF 52 “0” is input to.

  Therefore, when the next clock is input to the D-FFs 51 and 52, the phase signal is updated from (00) to (10). When the counter value output from the counter 12 is counted up to “1” (decimal), the output of the zero detection circuit 55 becomes “1” again. Then, the output of the NAND circuit 63 becomes “0”, and the output of the NAND circuit 65 becomes “1”. Then, “1” output from the NAND circuit 65 and “1” output from the output terminal Q of the D-FF 51 are input to the NAND circuit 68, and the output becomes “0”. Therefore, the output of the NAND circuit 69 is “1”, and the value input to the input terminal D of the D-FF 51 remains “1”.

  At this time, the output of the XOR circuit 73 becomes “1”, and the output of the XOR circuit 74 becomes “1”. Therefore, the output of the NAND circuit 61 becomes “0”, and the U / D signal that is the output of the NAND circuit 62 remains “1”.

  That is, when detecting that the counter value is zero (first value), the phase signal output circuit 11 updates and outputs the phase signal to the next phase according to the FR signal, and instructs to increase the counter value. An increase signal (U / D signal = “1”) is output.

  Thereafter, when the count-up proceeds and the counter value reaches “16” (decimal), the output of the FULL detection circuit 56 becomes “0”. Then, the output of the NAND circuit 61 becomes “1”, and the U / D signal that is the output of the NAND circuit 62 becomes “0” indicating a countdown.

  Then, “0” output from the FULL detection circuit 56 is input to the NAND circuit 64, and the output becomes “1”. Then, “1” output from the NAND circuit 64 and “1” output from the XOR circuit 74 are input to the NAND circuit 66, and the output becomes “0”. Furthermore, “1” obtained by inverting “0” output from the NAND circuit 66 by the NOT circuit 78 and “1” output from the inverting output terminal / Q of the D-FF 52 are input to the NAND circuit 70. The output becomes “0”. Then, “0” output from the NAND circuit 70 is input to the NAND circuit 72, the output is “1”, and “1” is input to the input terminal D of the D-FF 52.

  Therefore, when the next clock is input to the D-FFs 51 and 52, the phase signal is updated from (10) to (11). When the counter value output from the counter 12 is counted down to “15” (decimal), the output of the FULL detection circuit 56 becomes “1” again. Then, the output of the NAND circuit 64 becomes “0”, and the output of the NAND circuit 66 becomes “1”. Then, “1” output from the NAND circuit 66 and “1” output from the output terminal Q of the D-FF 52 are input to the NAND circuit 71, and the output becomes “0”. Therefore, the output of the NAND circuit 72 is “1”, and the value input to the input terminal D of the D-FF 52 remains “1”.

  At this time, the output of the XOR circuit 73 becomes “0”, and the output of the XOR circuit 74 becomes “0”. Therefore, the output of the NAND circuit 61 becomes “1”, and the U / D signal that is the output of the NAND circuit 62 remains “0”.

  That is, when the phase signal output circuit 11 detects that the counter value is FULL (second value), it updates the phase signal to the next phase according to the FR signal and outputs it, and also instructs to decrease the counter value. A decrease signal (U / D signal = "0") is output.

  Next, the case where the excitation mode is the two-phase excitation mode will be described. In this case, the output of the OR circuit 75 is “0”. Therefore, the outputs of the NAND circuits 63 and 64 to which “0” output from the OR circuit 75 is input are “1”.

  For example, assume that the FR signal is “0” (forward rotation) and the phase signal is (00). At this time, “0” output from the output terminal Q of the D-FF 51 and “0” output from the output terminal Q of the D-FF 52 are input to the XOR circuit 73, and the output is “0”. It becomes. The XOR circuit 74 receives “0” output from the XOR circuit 73 and the FR signal “0”, and outputs “0”.

  Then, “1” output from the NAND circuit 63 and “1” obtained by inverting the “0” output from the XOR circuit 74 by the NOT circuit 76 are input to the NAND circuit 65, and the output is “0”. " Further, “1” obtained by inverting “0” output from the NAND circuit 65 by the NOT circuit 77 and “1” output from the inverting output terminal / Q of the D-FF 51 are input to the NAND circuit 67. The output becomes “0”. Then, “0” output from the NAND circuit 67 is input to the NAND circuit 69, the output is “1”, and “1” is input to the input terminal D of the D-FF 51.

  Further, “0” output from the XOR circuit 74 is input to the NAND circuit 66, and the output is “1”. Then, “0” obtained by inverting “1” output from the NAND circuit 66 by the NOT circuit 78 is input to the NAND circuit 70, and the output becomes “1”. Further, “0” output from the output terminal D of the D-FF 52 is input to the NAND circuit 71, and the output thereof is “1”. Furthermore, “1” output from the NAND circuit 70 and “1” output from the NAND circuit 71 are input to the NAND circuit 72, and the output becomes “0”, and the input terminal D of the D-FF 52 “0” is input to.

  Therefore, when the next clock is input to the D-FFs 51 and 52, the phase signal is updated from (00) to (10). When the phase signal becomes (10), the output of the XOR circuit 73 becomes “1”, and the output of the XOR circuit 74 becomes “1”. Therefore, the output of the NAND circuit 65 is “1”, and the output of the NAND circuit 66 is “0”.

  Then, “1” output from the NAND circuit 65 and “1” output from the output terminal Q of the D-FF 51 are input to the NAND circuit 68, and the output becomes “0”. Further, “0” output from the NAND circuit 68 is input to the NAND circuit 69, the output thereof is “1”, and “1” is input to the input terminal D of the D-FF 51.

  Further, “1” obtained by inverting “0” output from the NAND circuit 66 by the NOT circuit 78 and “1” output from the inverting output terminal / Q of the D-FF 52 are input to the NAND circuit 70. The output becomes “0”. Further, “0” output from the NAND circuit 70 is input to the NAND circuit 72, the output thereof is “1”, and “1” is input to the input terminal D of the D-FF 52.

  Therefore, when the next clock is input to the D-FFs 51 and 52, the phase signal is updated from (10) to (11). As described above, in the two-phase excitation mode, the phase signal output circuit 11 updates the phase signal to the next phase according to the FR signal and outputs it every time the clock is input.

== Counter and counter control circuit ==
Next, details of the counter 12 and the counter control circuit 13 will be described. FIG. 6 is a circuit diagram showing an example of the configuration of the counter 12 and the counter control circuit 13. The counter 12 is composed of, for example, five D-FFs 81 to 85 that hold a 5-bit counter value. D-FF81 is the first bit (the least significant bit), D-FF82 is the second bit, D-FF83 is the third bit, D-FF84 is the fourth bit, and D-FF85 is the fifth bit (the most significant bit) ) Value. That is, (BIT4 BIT3 BIT2 BIT1 BIT0) output from the output terminal Q of the D-FFs 81 to 85 is a counter value output from the counter 12. Note that the initial value of the counter 12 is (01000) (= “8” (decimal)) in the two-phase excitation mode, and (10000) (= “16” (10 in other than the two-phase excitation mode). Hex)).

  The counter control circuit 13 includes OR circuits 91 to 95, NAND circuits 96 to 101, NOT circuits 102 and 103, AND circuits 104 to 107, XOR circuits 108 to 112, and XNOR circuits 113 to 115. Here, as described above, the excitation mode signals input to the OR circuit 91 and the NAND circuit 96 are (00) for the 2-phase excitation mode, (10) for the 1-2 phase excitation mode, and (11) for the 4W1-2 phase. Excitation mode. Therefore, the output of the OR circuit 91 is “0” only in the two-phase excitation mode. The output of the NAND circuit 96 is “0” only in the 4W1-2 phase excitation mode.

  Further, the lower 3 bits of the counter 12 are input to the OR circuit 95, and only when the counter value is “0”, “8”, “16” in decimal, that is, in the 1-2 phase excitation mode. Only when the position is the step position, the output is “0”. Further, the XOR circuits 109 to 112 are input with a signal output from the inverting output terminals / Q of the D-FFs 81 to 84 and a U / D signal output from the phase signal output circuit 11.

  Operations of the counter 12 and the counter control circuit 13 will be described.

(1) 4W1-2 phase excitation mode First, the case of 4W1-2 phase excitation mode will be described. In the 4W1-2 phase excitation mode, when the U / D signal is “0”, the counter of the counter 12 counts down one by one from “16” to “0” in decimal, and the U / D signal is “1”. In this case, the number is incremented by one from “0” to “16” in decimal.

  For example, when the counter value of the counter 12 is (00011) and the U / D signal is “0”, the operation when the next clock (CLK) is input is confirmed. Since the excitation mode is the 4W1-2 phase excitation mode, the output of the OR circuit 91 is “1”, the output of the NAND circuit 96 is “0”, and the output of the NAND circuit 97 is “1”.

  At this time, “0” is input to the AND circuit 104 from the inverting output terminal / Q of the D-FF 81, the output is “0”, and “0” is input to the input terminal D of the D-FF 81.

  The XOR circuit 109 receives “0” output from the inverting output terminal / Q of the D-FF 81 and the U / D signal “0”, and outputs “0”. Therefore, the output of the OR circuit 92 is also “0”. The XNOR circuit 113 receives “1” obtained by inverting the output of the OR circuit 92 by the NOT circuit 103 and “1” output from the output terminal Q of the D-FF 82, and the output is “1”. It becomes. Then, “1” output from the NAND circuit 97, “1” output from the NOT circuit 102, and “1” output from the XNOR circuit 113 are input to the AND circuit 105. “1”, and “1” is input to the input terminal D of the D-FF 82.

  Further, “0” output from the inverting output terminal / Q of the D-FF 82 and the U / D signal “0” are input to the XOR circuit 110, and the output thereof is “0”. Therefore, the output of the OR circuit 93 is also “0”. Then, the output of the NAND circuit 98 to which the output “0” from the OR circuit 93 is input becomes “1”, and the XNOR circuit 114 has “1” output from the NAND circuit 98 and the output terminal of the D-FF 83. “0” output from Q is input, and the output is “0”. Then, “0” output from the XNOR circuit 114 is input to the AND circuit 106, the output becomes “0”, and “0” is input to the input terminal D of the D-FF 83.

  Further, the output “0” of the OR circuit 92 is input to the NAND circuit 99, and the output becomes “1”. Then, “1” output from the NAND circuit 99 and “0” output from the output terminal Q of the D-FF 84 are input to the XOR circuit 108, and the output becomes “1”. The NAND circuit 101 receives “1” output from the NAND circuit 97, “1” output from the OR circuit 91, and “1” output from the XOR circuit 108. “0”, and “0” is input to the input terminal D of the D-FF 84.

  Further, the output “0” of the OR circuit 92 is input to the NAND circuit 100, and the output becomes “1”. The XNOR circuit 115 receives “1” output from the NAND circuit 100 and “0” output from the output terminal Q of the D-FF 85, and outputs “0”. Then, “0” output from the XNOR circuit 115 is input to the AND circuit 107, the output becomes “0”, and “0” is input to the input terminal D of the D-FF 85.

  Therefore, when the next clock is input to the D-FFs 81 to 85, the counter value of the counter 12 becomes (00010), and is counted down by 1 from (00011).

  By such an operation, in the 4W1-2 phase excitation mode, the counter value of the counter 12 is counted down or counted up by 1 each time a clock is input.

  The operation when the excitation mode is switched to the 1-2 phase excitation mode while operating in the 4W1-2 phase excitation mode will be described. First, the case where the counter value of the counter 12 before switching is other than “0”, “8”, and “16” in decimal will be described. Here, a case where the counter value before switching is (00010) and the U / D signal is “0” will be described.

  In the 1-2 phase excitation mode, the output of the NAND circuit 96 becomes “1”, and the output of the NOT circuit 102 obtained by inverting this becomes “0”. Therefore, the outputs of the AND circuits 104 to 106 to which the output “0” of the NOT circuit 102 is input are “0”, and “0” is input to the input terminals D of the D-FFs 81 to 83. The output of the OR circuit 95 is “1”, and the output of the NAND circuit 97 to which “1” and “1” output from the NAND circuit 96 are input is “0”. Then, “0” output from the NAND circuit 97 is input to the NAND circuit 101, and the output is “1”. Further, “0” output from the NAND circuit 97 is input to the AND circuit 107, and the output is “0”. That is, “1” is input to the input terminal of the D-FF 84, and “0” is input to the input terminal of the D-FF 85.

  Therefore, when the next clock is input to the D-FFs 81 to 85, the counter value of the counter 12 becomes (01000). That is, when the counter control circuit 13 detects switching from the 4W1-2 phase excitation mode to the 1-2 phase excitation mode, the counter value is set at the step position in the 1-2 phase excitation mode after switching at the timing of the next clock. Update. Thereafter, updating of the counter value is started according to the 1-2 phase excitation mode.

  Next, a case where the counter value of the counter 12 before switching from the 4W1-2 phase excitation mode to the 1-2 phase excitation mode is “0”, “8”, “16” in decimal will be described. Here, a case where the counter value before switching is (01000) and the U / D signal is “0” will be described.

  As described above, since the output of the NOT circuit 102 is “0”, the outputs of the AND circuits 104 to 106 are “0”, and “0” is input to the input terminals D of the D-FFs 81 to 83. . Further, the output of the OR circuit 95 becomes “0”, and the output of the NAND circuit 97 to which this “0” is inputted becomes “1”. Further, “1” output from the NAND circuit 96 is input to the OR circuits 92 to 94, and the output thereof is “1”. Therefore, the output of the NAND circuit 99 to which “1” output from the OR circuits 92 to 94 is input is “0”. Then, “0” output from the NAND circuit 99 and “1” output from the output terminal Q of the D-FF 84 are input to the XOR circuit 108, and the output becomes “1”. The NAND circuit 101 receives “1” output from the OR circuit 91, “1” output from the NAND circuit 97, and “1” output from the XOR circuit 108. It becomes “0”.

  Further, “0” output from the inverting output terminal / Q of the D-FF 84 and the U / D signal “0” are input to the XOR circuit 112, and the output becomes “0”. The output is “1”. The XNOR circuit 115 receives “1” output from the NAND circuit 100 and “0” output from the output terminal Q of the D-FF 85, and outputs “0”. Then, “0” output from the XNOR circuit 115 is input to the AND circuit 107, and the output becomes “0”. That is, “0” is input to the input terminals D of the D-FFs 84 and 85.

  Therefore, when the next clock is input to the D-FFs 81 to 85, the counter value of the counter 12 becomes (00000). That is, when the counter control circuit 13 detects the switching from the 4W1-2 phase excitation mode to the 1-2 phase excitation mode and the step position before the switching is the step position of the 1-2 phase excitation mode, At the next clock timing, the counter value is updated from the step position according to the 1-2 phase excitation mode.

  Next, a case where the 4W1-2 phase excitation mode is switched to the two phase excitation mode will be described. When the mode is switched to the two-phase excitation mode, the output of the NAND circuit 96 becomes “1”, and “0” is input to the input terminals D of the D-FFs 81 to 83 as in the case of the 1-2 phase excitation mode. Since the output of the OR circuit 91 is “0”, the output of the NAND circuit 101 is “1” and the output of the AND circuit 107 is “0”. That is, “1” is input to the input terminal D of the D-FF 84 and “0” is input to the input terminal D of the D-FF 85. Therefore, when the next clock is input to the D-FFs 81 to 85, the counter value of the counter 12 becomes (01000). After that, the counter value remains (01000). That is, when detecting the switching from the 4W1-2 phase excitation mode to the two phase excitation mode, the counter control circuit 13 updates the counter value to the step position in the two phase excitation mode after switching at the timing of the next clock.

(2) 1-2 Phase Excitation Mode Next, the case of the 1-2 phase excitation mode will be described. For example, when the counter value of the counter 12 is (10000) and the U / D signal is “0”, the operation when the next clock is input is confirmed. In the 1-2 phase excitation mode, as described above, the outputs of the AND circuits 104 to 106 are always “0”, and the lower 3 bits of the counter 12 are “0”. Therefore, only the upper 2 bits of the counter 12 change.

  In the case of the 1-2 phase excitation mode, as described above, the output of the NAND circuit 99 is “0”. Then, “0” output from the NAND circuit 99 and “0” output from the output terminal Q of the D-FF 84 are input to the XOR circuit 108, and the output becomes “0”. Then, “0” output from the XOR circuit 108 is input to the NAND circuit 101, and the output becomes “1”.

  The XOR circuit 112 receives “1” output from the inverting output terminal / Q of the D-FF 84 and the U / D signal “0”, and outputs “1”. Therefore, the output of the NAND circuit 100 is “0”. Then, “0” output from the NAND circuit 100 and “1” output from the output terminal Q of the D-FF 85 are input to the XNOR circuit 115, and the output becomes “0”. Is also “0”. That is, “1” is input to the input terminal D of the D-FF 84 and “0” is input to the input terminal D of the D-FF 85.

  Therefore, when the next clock is input to the D-FFs 81 to 85, the counter value of the counter 12 becomes (01000), and is counted down by 8 from (10000).

  By such an operation, in the 1-2 phase excitation mode, the counter value of the counter 12 is counted down or counted up by 8 every time a clock is input.

  When the excitation mode is switched to the 4W1-2 phase excitation mode while operating in the 1-2 phase excitation mode as described above, the counter control circuit 13 determines the 4W1-2 described above from the counter value before switching. The operation in the phase excitation mode is performed. That is, when the counter control circuit 13 detects the switching from the 1-2 phase excitation mode to the 4W1-2 phase excitation mode, the counter value is determined according to the 4W1-2 phase excitation mode from the step position before switching at the timing of the next clock. Start updating.

  When the excitation mode is switched to the two-phase excitation mode while operating in the 1-2 phase excitation mode, the counter control circuit 13 switches the 4W1-2 phase excitation mode to the two-phase excitation mode. The same control as in the case is performed. That is, when detecting the switching from the 1-2 phase excitation mode to the two phase excitation mode, the counter control circuit 13 updates the counter value to the step position in the switched two phase excitation mode at the timing of the next clock.

(3) Two-phase excitation mode Next, the case of the two-phase excitation mode will be described. In the two-phase excitation mode, as described above, the counter control circuit 13 fixes the counter value of the counter 12 to (01000). When the excitation mode is switched to the 1-2 phase excitation mode or the 4W1-2 phase excitation mode while operating in the two phase excitation mode, the counter control circuit 13 causes the above-described 1-2 phase excitation mode or 4W1. -Starts the operation in -2 phase excitation mode. That is, when the counter control circuit 13 detects switching from the 2-phase excitation mode to the 1-2 phase excitation mode or the 4W1-2 phase excitation mode, the excitation after switching from the counter value (01000) at the next clock timing. Start updating the counter value according to the mode.

== Operation of position control circuit ==
FIG. 7 is a flowchart for explaining the operation of the position control circuit 1 including the phase signal output circuit 11, the counter 12, and the counter control circuit 13 described so far. This flowchart shows processing when the step position is controlled according to the excitation mode of the 1-2 phase excitation mode or the 4W1-2 phase excitation mode.

  When the clock is input (S701), the position control circuit 1 confirms whether or not the excitation mode is switched (S702). If the excitation mode has not been switched (S702: none), the position control circuit 1 indicates that the counter value of the counter 12 is zero (“0” (decimal)) or FULL (“16” (decimal)). (S703).

  When the counter value is neither zero nor FULL (S703: Other), the position control circuit 1 checks whether the FR signal indicates normal rotation or reverse rotation (S704). In the case of forward rotation (S704: forward rotation), the position control circuit 1 checks whether the phase signal is (positive, positive) or (negative, negative) (S705). When the phase signal is (positive, positive) or (negative, negative) (S705: YES), the position control circuit 1 counts down the counter value of the counter 12 (S706) and outputs the counter value (S707). If the phase signal is neither (positive, positive) nor (negative, negative) (S705: NO), the position control circuit 1 counts up the counter value of the counter 12 (S708) and outputs the counter value ( S707).

  When the FR signal indicates reverse rotation (S704: reverse rotation), the position control circuit 1 checks whether the phase signal is (positive, positive) or (negative, negative) (S709). When the phase signal is (positive, positive) or (negative, negative) (S709: YES), the position control circuit 1 counts up the counter value of the counter 12 (S708) and outputs the counter value (S707). . If the phase signal is neither (positive, positive) nor (negative, negative) (S709: NO), the position control circuit 1 counts down the counter value of the counter 12 (S706) and outputs the counter value (S707). ).

  If the counter value is neither zero nor FULL (S703: other), the position control circuit 1 outputs the phase signal while holding the A-phase phase signal and the B-phase phase signal (S710, S711) ( S712, S713).

  When the counter value is zero (S703: zero), the position control circuit 1 inverts the phase signal of the A phase (S714), holds the phase signal of the B phase (S711), and outputs the phase signal (S712). , S713). In this case, the position control circuit 1 counts up the count value of the counter 12 (S708) and outputs the counter value (S707). When the counter value is FULL (S703: FULL), the position control circuit 1 inverts the B-phase position signal (S715) and outputs the phase signal while holding the A-phase phase signal (S710). (S713). In this case, the position control circuit 1 counts down the counter value of the counter 12 (S706), and outputs the counter value (S707).

  When the excitation mode is switched (S702: present), the position control circuit 1 determines whether the excitation mode has been switched from the 1-2 phase excitation mode to the 4W1-2 phase excitation mode that is microstep driving. It is confirmed whether the excitation mode is switched to the 1-2 phase excitation mode (S716). When switching from the 1-2 phase excitation mode to the 4W1-2 phase excitation mode, the position control circuit 1 performs processing in the 4W1-2 phase excitation mode from the state of the phase signal and the counter value before switching (S703 to S715). To start.

  When the 4W1-2 phase excitation mode is switched to the 1-2 phase excitation mode, the position control circuit 1 checks whether the counter value before switching indicates the step position in the 1-2 phase excitation mode (S717). ). When the counter value before switching indicates the step position in the 1-2 phase excitation mode (S717: 1-2 phase position), the position control circuit 1 determines that 4W1 from the state of the phase signal and counter value before switching. The process (S703 to S715) in the -2-phase excitation mode is started.

  If the counter value before switching does not indicate the step position in the 1-2 phase excitation mode (S717: other), the position control circuit 1 updates the counter value to a value (01000) indicating the step position in the two phase excitation mode. The counter value is output (S707). In addition, the position control circuit 1 outputs the phase signals (S712, S713) while maintaining the state before the switching of the phase signals of the A phase and the phase signals of the B phase (S710, S711).

  That is, when the position control circuit 1 detects that the excitation mode has been switched from the 4W1-2 phase excitation mode to the 1-2 phase excitation mode, the position control circuit 1 has a phase signal of 1-2 at the same phase as the step position at the time of detection. Update to the step position in phase excitation mode and output.

  The stepping motor driving circuit including the position control circuit 1 has been described above. As described above, in the stepping motor drive circuit of the present embodiment, the first excitation mode with a small step angle (for example, 4W1-2 phase excitation mode) to the second excitation mode with a large step angle (for example, 1). -2 phase excitation mode) is detected, the motor can be moved to the step position of the second excitation mode in the same phase as the step position at the time of detection. Therefore, as shown in FIG. 3, the amount of forward rotation and reverse rotation generated when the excitation mode is switched can be reduced as compared with the conventional case.

  In addition, when the stepping motor drive circuit according to the present embodiment detects the switching from the first excitation mode to the second excitation mode, the step position at the time of detection is the step position of the second excitation mode. First, the motor is rotated from that position according to the second excitation mode. Therefore, in such a case, normal rotation and reverse rotation accompanying switching of the excitation mode do not occur at all.

  Further, when detecting the switching from the second excitation mode to the first excitation mode, the driving circuit for the stepping motor of the present embodiment rotates the motor from the position at the time of detection according to the first excitation mode. Therefore, in such a case, normal rotation and reverse rotation accompanying switching of the excitation mode do not occur at all.

  As shown in this embodiment, when the position signal for controlling the step position of the motor is composed of a phase signal and a counter value (in-phase position signal), the position control circuit 1 When switching from the first excitation mode to the second excitation mode is detected, the phase signal remains at the time of detection, and the counter value is a value indicating the step position of the second excitation mode at the same phase as the phase at the time of detection. Update. Thereby, the amount of forward rotation and reverse rotation generated when the excitation mode is switched can be reduced as compared with the conventional case.

  In addition, when using the phase signal and the counter value, the position control circuit 1 updates the phase signal to the next phase when detecting that the counter value is decreased and updated to zero (first value). And then increment and update the counter value. Further, when the position control circuit 1 detects that the counter value is increased and updated to become FULL (second value), the position control circuit 1 updates and outputs the phase signal to the next phase, and then decreases and updates the counter value. To do. That is, the stepping motor drive circuit of the present embodiment can rotate the motor in accordance with the excitation mode.

  When the phase signal and the counter value are used, as shown in the present embodiment, the position control circuit 1 is replaced with the phase signal output circuit 11, the counter 12, and the counter control circuit 13 (in-phase position signal output circuit). ).

  As mentioned above, although embodiment of this invention was described, the said embodiment is for making an understanding of this invention easy, and is not for limiting and interpreting this invention. The present invention can be changed and improved without departing from the gist thereof, and the present invention includes equivalents thereof.

  For example, in the present embodiment, only three excitation modes, ie, a two-phase excitation mode, a 1-2 phase excitation mode, and a 4W1-2 phase excitation mode have been described. The mode can be similarly controlled.

It is a block diagram which shows the structure of the drive circuit of the stepping motor which is one Embodiment of this invention. It is a figure which shows the transition of the step position in each excitation mode. It is a figure which shows the transition of the step position at the time of the excitation mode change in the 1st phase. It is a figure which shows the structure of an H bridge circuit. It is a circuit diagram which shows an example of a structure of a phase signal output circuit. It is a circuit diagram which shows an example of a structure of a counter and a counter control circuit. It is a flowchart for demonstrating operation | movement of a position control circuit. It is a figure which shows the transition of the step position in the drive circuit of the conventional stepping motor. It is a figure which shows the drive circuit of the conventional stepping motor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Position control circuit 2 Drive control circuit 11 Phase signal output circuit 12 Counter 13 Counter control circuit 21A, 21B Conversion circuit 22A, 22B Comparator 23A, 23B Current control circuit 24A, 24B H bridge circuit 25A, 25B Resistance 30A, 30B Coil 41- 44 N-type MOSFET
51, 52 D-type flip-flop 55 Zero detection circuit 56 FULL detection circuit 61-72 NAND circuit 73, 74 XOR circuit 75 OR circuit 76-78 NOT circuit 81-85 D-type flip-flop 91-95 OR circuit 96-101 NAND circuit 102, 103 NOT circuit 104-107 AND circuit 108-112 XOR circuit 113-115 XNOR circuit

Claims (6)

A position control circuit that updates and outputs a position signal indicating the step position of the stepping motor according to the excitation mode signal and the clock;
A drive control circuit for controlling the driving of the stepping motor based on the position signal output from the position control circuit;
A stepping motor drive circuit comprising:
The position control circuit includes:
When it is detected that the excitation mode signal has switched from the first excitation mode to the second excitation mode having a step angle coarser than that of the first excitation mode, the position signal is in the same phase as the step position at the time of detection. Updating and outputting the step position of the second excitation mode, and then updating and outputting the position signal according to the second excitation mode according to the clock;
Stepping motor drive circuit characterized by the above. A stepping motor drive circuit according to claim 1,
The position control circuit includes:
If the step position at the time of detection is the step position of the second excitation mode, the position signal is updated from the step position at the time of detection according to the clock and output according to the second excitation mode. ,
Stepping motor drive circuit characterized by the above. A stepping motor drive circuit according to claim 1,
The position control circuit includes:
When it is detected that the excitation mode signal has switched from the second excitation mode to the first excitation mode, the position signal is changed from the step position at the time of detection according to the clock according to the first excitation mode. Update and output,
Stepping motor drive circuit characterized by the above. A stepping motor drive circuit according to claim 1,
The position signal includes a phase signal indicating the phase of the step position and an in-phase position signal indicating the step position within the phase,
The position control circuit includes:
When it is detected that the excitation mode signal is switched from the first excitation mode to the second excitation mode, the phase signal at the time of detection and the second excitation at the same phase as the step position at the time of detection. Output the position signal in phase updated to the step position of the mode, and then update and output the position signal and position signal in phase according to the second excitation mode according to the clock,
Stepping motor drive circuit characterized by the above. A stepping motor drive circuit according to claim 4,
The position control circuit includes:
When it is detected that the in-phase position signal is reduced and updated to the first value, the phase signal is updated to the next phase and output, and then the phase is changed according to the excitation mode signal and the clock. Increase and output the internal position signal,
When it is detected that the in-phase position signal is updated to become the second value, the phase signal is updated to the next phase and output, and then the phase is changed according to the excitation mode signal and the clock. Reducing and updating the internal position signal,
Stepping motor drive circuit characterized by the above. A stepping motor drive circuit according to claim 5,
The position control circuit includes:
A phase signal output circuit for outputting the phase signal;
An in-phase position signal output circuit for outputting the in-phase position signal,
The phase signal output circuit is
When it is detected that the in-phase position signal output from the in-phase position signal output circuit has reached the first value, the phase signal is updated to the next phase and output, and the in-phase position signal Output an increase signal instructing the increase in
When it is detected that the in-phase position signal output from the in-phase position signal output circuit has reached the second value, the phase signal is updated to the next phase and output, and the in-phase position signal Output a decrease signal to indicate
The in-phase position signal output circuit is
Based on the increase signal or the decrease signal output from the phase signal output circuit, the in-phase position signal is output with an increase update or decrease update according to the excitation mode and the clock,
Stepping motor drive circuit characterized by the above.

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