JP2006278996A - Wiring board, laminated circuit board and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To supply a construction method in which laminating-bonding is easily performed even a circuit board having a high-density and fine wiring pattern, and a build-up circuit board, by resolving connection failure caused by dimensional position accuracy generated by connection between circuit boards in the case of building up, even when a wiring width is narrow and wiring density increases on a substrate. <P>SOLUTION: A wiring board for building up comprises a wiring layer which is formed on the surface of the substrate and buried in a groove acting as the wiring pattern so that not protruded from the substrate surface, a conductive protrusion which is formed on a part of the wiring layer and so protruded from the substrate surface as to be electrically connected to another substrate, and a positioning protrusion for laminating substrates formed on one surface of the substrate and/or a positioning recess for laminating substrates formed on the rear surface of the one surface of the substrate. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to a build-up circuit board that does not require a bonding machine having a precise alignment accuracy and a method for manufacturing the same.

  The conventional lamination method constructs a circuit board in which a fine pattern is formed on a core substrate. Originally, existing fine pattern methods such as additive and sub-trailer cannot provide a large current because the aspect (wiring thickness / wiring width) cannot be made large. For this reason, a circuit board having a small wiring width called a fine pattern is laminated on a substrate having a large wiring width through which a large current can flow.

  As shown in FIG. 5, the method is prepared by preparing a core material 2 on which a rough pattern 1 of a conductive layer is formed (FIG. 5a), and a prepreg (insulating material) with a copper foil 3 as a substrate material thereon. ) 4 is bonded by hot pressing (FIG. 5 (b)), the copper foil 3 is patterned by laser or etching (FIG. 5 (c)), and then a connection hole 5 to the lower substrate such as a via or a through hole is formed. Is formed by machining with a drill or a laser (FIG. 5 (d)), and the resulting holes are plated with copper to establish conduction between the substrates (FIG. 5 (e)).

  Once again, a pre-bleb (insulating material) 6 with copper foil 7 was attached (FIG. 5 (f)), and the copper foil was finely patterned by laser or etching (FIG. 5 (g)), then via 8a and through hole 8b. The connection hole with the lower substrate is processed with a drill or a laser (FIG. 5 (h)), and the resulting hole is plated with copper (FIG. 5 (i)). This process is repeated and laminated, and wirings with fine line widths are gradually laminated. For example, if it is desired to make a fine pattern from a wiring width of 200 μm to a 1/10 wiring width of 20 μm, a 200 μm wiring board, then a 100 μm wiring board, then a 50 μm wiring board, and then about 25 μm (20 μm) Since it is laminated with the wiring board, the number of boards to be laminated also increases. For example, a stack of 4 motherboards is required for mobile phone motherboards and 6 for digital camera motherboards.

  In recent years, the number of laminated substrates has increased, but there is a coreless substrate build-up method in which a core substrate is manufactured and laminated in a fine pattern, and this is used as a core material to further laminate a fine pattern on the fine pattern. In both methods, crimping is performed with a press and positioning is performed in order to make each layer conductive, then fine patterning is performed by photoetching, laser processing, etc., and drilling is performed on the substrate by laser processing. Copper plating is applied to the side surface, and electrical connection with the lower substrate is taken to build up (build up) the substrate.

  In the case of such a wiring connection that conducts on the upper and lower substrates, the connection bonding is not strict if the wiring width and the conductive hole to be connected are as large as about 100 μm, but when the wiring width is 40 μm or less, the wiring width is 10 μm or less. Connection bonding becomes severe as soon as possible.

  This is because there is a problem in the process of bonding itself, because of the cost, the board itself prepared a large area of a meter unit, and mass produced what copied the same circuit board in this area, This is because a method is adopted in which these are pasted and stacked in a large area, and then diced to obtain one build-up substrate. The general tolerance of a general laminating machine is 10 μm or more, and when laminating, there will be a gap between the wiring to be connected between the board and the board, 1 mm between both ends when using a 1 meter square board. As a result, the connection is shifted and disconnection occurs.

Conversely, if the tolerance of the laminating machine is increased, there is only a 1 cm square laminating machine such as a chip bonder for mounting an LSI on a package, and bonding with a large area cannot be performed. Then, even if an attempt is made to form a high-density and fine circuit on a circuit board having a large area, it is difficult unless there is an infrastructure such as a manufacturing facility. (Patent Documents 1 and 2 Non-Patent Documents 1 and 2)
JP-A-6-21649 JP 2001-102749 A Japan Institute of Electronics Packaging Education Course “Introduction to PWB Manufacturing: From the Basics of Printed Wiring Board to Technology for Mobile Devices” 2004 Independent Administrative Institution Industrial Property Information and Training Center Distribution Department “Patent Distribution Support Chart Electric 4 Build-up Multilayer Wiring Board” 2001

  The present invention eliminates the above-mentioned connection failure caused by the dimensional position accuracy that always occurs in connection between circuit boards even when the wiring width on the board is increased and the wiring density on the board is increased. The present invention also provides a construction method and a build-up circuit board that can be easily laminated and laminated even on a circuit board having a high-density fine wiring pattern.

The present invention relates to a circuit board for build-up, which is formed in a part of a wiring layer that is embedded in a groove that is formed on the surface of the board and forms a wiring pattern, and that does not protrude from the board surface. Wiring provided with conductive protrusions protruding from the substrate surface, alignment protrusions formed on one surface of the substrate when stacked, and / or concave portions for alignment when stacked on the back surface of the substrate It is a substrate.
The height of the alignment protrusion is preferably 30 μm or more and 70 μm or less from the substrate surface, and the height of the conductive protrusion is preferably 1 μm or more and 3 μm or less from the circuit board surface.

  Further, the present invention is a laminated circuit board in which a plurality of wiring boards are laminated, and the alignment unevenness of each wiring board is fitted between the upper and lower boards, and anisotropic conductive adhesion is provided between the boards. It is a laminated circuit board filled with an agent.

  Furthermore, the present invention is a method for manufacturing these wiring boards, wherein a resin having a metal mold provided with irregularities corresponding to the wiring pattern, the conductive protrusion, the alignment protrusion, and / or the alignment hole is used for the resin. It is a manufacturing method of a wiring board characterized by forming in a mold.

  According to the manufacturing method of the present invention, the unevenness of the surface of the circuit board is not post-processed as in the prior art, but the circuit board is manufactured by molding, and the uneven shape of the substrate surface is simultaneously formed at that time. The unevenness that caulks each other is determined in advance by the dimensional accuracy of the mold. In addition, it does not require a large metric unit for circuit board production, and the tact time at the time of molding can be shortened to support mass production. If the mold is scratched, if the mold is replaced, it can be copied by forming tens of thousands of the same thing, and the alignment irregularities are formed at the same position no matter how many substrates are stacked.

  Conventionally, when the thickness of the copper foil material is generally 12 μm, when the wirings are laminated facing each other, it is necessary to coat between the substrates on which the insulating material serving as an adhesive of 24 μm or more is laminated at least. On the other hand, in the wiring substrate of the present invention, since the wiring does not protrude from the substrate surface, the thickness of the adhesive layer formed from the thickness of each wiring when the substrates are laminated is eliminated, and the bonded substrate The total thickness can be reduced by subtracting the wiring thickness of each layer.

  Therefore, when using anisotropic conductive paste (ACP) as an adhesive and as a conductor in a local portion, the distance between the conductors in the local portion is the minimum particle size (for example, 4 μm) of metal particles contained in the ACP. However, if the height of the local protrusions sandwiching the conductor is 3 μm or less, the space between the two substrates can be reduced to 7 μm or less when the number of build-up substrates is increased. As the number increases, the increase in the thickness of the laminated substrate can be suppressed. For applications that are forced to be mounted in a limited space, for example, a mother board for a mobile phone, the substrate thickness is 100 μm, and a substrate that requires a minimum of 72 μm adhesive layer by simply laminating four substrates is a minimum 21 μm adhesive layer As a result, it is possible to reduce the thickness by 51 μm or more than before, and it is possible to add another functional substrate to the vacant space or mount chip parts to increase added value.

  Further, since the space between the substrates to be laminated becomes small in this way, it is not necessary to increase the height of the alignment protrusion, and it becomes extremely easy to form the protrusion integrated with the substrate. Moreover, it is preferable to make the height of the conductive projections for conducting between the substrates smaller than the thickness of the wiring layer. If it carries out like this, it can become smaller than the distance between board | substrates when the conventional board | substrate which a wiring layer protrudes from a board | substrate surface is laminated | stacked. This is because the required thickness of the wiring layer is not different from the conventional one.

  And since the wiring board to be laminated has a protrusion for alignment and / or a recess on its back surface, it can be easily aligned, and in particular, there is no lateral shift at the time of alignment. It is possible to prevent the protrusion from being damaged due to the lateral displacement. The uppermost wiring board to be laminated may not have an alignment protrusion, and the lowermost wiring board may not have an alignment recess.

  Conventionally, the most serious problem with a high-density fine wiring board having a wiring width and interval of L / S = 10 μm / 10 μm class is a short circuit between wirings as well as a lamination method. For example, even if polyimide film with copper foil is processed with an excimer laser at L / S = 10μm / 10μm, and the signal lines processed on the spot are measured to make the resistance infinite, handling, etc. When the substrate is moved and measured again, the resistance value may be as low as 100Ω to 0Ω. This is because some kind of dust adheres to the portion of the interval S = 10 μm removed by laser irradiation or the like and is energized (short-circuited). Therefore, in order to stack a high-density fine circuit board of L = 10 μm class, a facility equivalent to a clean room for manufacturing a semiconductor of class 10 to 100 is required.

  On the other hand, the circuit board of the present invention has no flash board, i.e., a wiring layer protruding from the surface of the board, and is flat without being recessed between wiring patterns. Therefore, there is no need for huge capital investment as in a clean room where a semiconductor is purposely manufactured for build-up.

  In the circuit board according to the present invention, the alignment protrusions and holes are provided integrally with the board, so that the circuit boards can be laminated with high density and fine circuit boards without a precise bonding machine. Further, since the wiring layer does not protrude from the substrate surface, the height of the alignment protrusion and the depth of the alignment hole can be reduced, which facilitates manufacture. In addition, in the multilayer substrate in which this circuit board is laminated, the thickness of the adhesive layer can be reduced because the wiring layer does not protrude from the surface of each substrate even when an anisotropic conductive agent is used as the adhesive. Can be thinned. This effect is achieved by making the height of the conductive protrusions that conduct electricity between the substrates smaller than the thickness of the wiring layer, so that it becomes smaller than the distance between the substrates when a conventional substrate in which the wiring layer protrudes from the substrate surface is laminated. Becomes noticeable.

  Prepare two pre-formed substrates with a tolerance of 3 μm at any position on the surface of each substrate, and a recess with a tolerance of 3 μm at any position on the back surface of the substrate. The formed grooves are plated with copper, etched and finished to the shape of a flash board, and each substrate is overlapped with a hot press using ACP (anisotropic conductive paste) that also has an adhesive effect as a connection material. Get the build-up board.

The size of the circuit board used was 4 cm × 2 cm and the thickness was 0.1 mm, excluding the protrusions 11 provided at the corners of the a-plane of the circuit board.
Two types of substrates to be laminated were prepared. FIG. 1 shows an external perspective view of the substrate molded product A. FIG.
The wiring portion 10 of the test pattern formed in the circuit board has a minimum wiring width of 10 μm, a wiring height of 20 μm, a connection hole (not shown) of φ20 μm, and is provided on the substrate A at intervals of 1 cm. . The circuit pattern was formed only on one surface (a surface) of the substrate, and no pattern was provided on the back surface (b surface).

 The protrusions 11 provided at the corners of the a-plane of the circuit board were rectangular with a side of 3 mm + 0 / −0.01 mm and a height of 0.03 mm, and were installed at four locations.

  In addition, the concave surface formed on the b-surface, which is the back surface, was formed at four locations with a side of 3 mm + 0.01 mm / -0 mm and a depth of 0.03 mm.

The molding material used is an epoxy compound product containing 70% by mass or more of SiO ₂ spherical filler with an average particle size of 2 μm or less, and copper plating after molding has an average particle size of 1 micron or less in order to give an anchor effect. 3.5% by mass or more of calcium carbonate having was blended. The linear expansion coefficient of the molding material is 20 ppm, and the molding shrinkage ratio is 0.319%. A tablet was prepared using 20 g or more of the molding material, and the mold was heated at a temperature of 150 ° C. to 170 ° C. with a 10-ton transfer molding machine and molded at an injection pressure of 1 MPa or more to obtain a substrate A. A cross section at α-α ′ is shown in FIG.

  If a hole for electrically connecting the front and back of the substrate is shorted with a mold, the mold can be easily manufactured if the hole diameter is up to φ40 μm when the substrate thickness is 100 μm. This time, a hole diameter of 20 μm was formed with an excimer laser after forming the substrate. Therefore, vias or through holes having a diameter of 20 μm are opened on the b-plane side of the substrate.

After molding, the substrate molded product is baked in an oven at 180 ° C. for 1 hour, and then an electroless copper layer and an electrolytic copper layer are formed using a copper plating process. The a-side of the substrate is plated with copper of 30 μm or more, but the b-side of the substrate may be masked with a sealant or the like so that the thickness of electroless copper remains 3 μm, for example. Next, the unnecessary copper layer other than the wiring pattern on the side surface or the a surface of the circuit board was removed by chemical or physical polishing. FIG. 2 shows a substrate A that has been subjected to copper plating to become a wiring substrate. As a result, the conductor layer was embedded in the wiring pattern on the board surface, and a wiring board in which the wiring did not protrude from the board surface was obtained. Incidentally, the wiring 20 and the earthing part 21 are formed in FIG. 2 (conduction holes are not shown).
A tester was applied to the obtained test pattern, and it was confirmed that the resistance between the front and back of the substrate was 0Ω to 10Ω.

  Next, a protrusion (so-called standoff) for electrical connection with another substrate is formed on the b surface of the substrate A. In FIG. 3, a substrate A; 36 has a connecting hole 30 of φ20 μm formed from the a-plane to the b-plane, and a copper plating layer is embedded therein. After masking this part by spotting a masking agent on the hole for connection, the unnecessary part of the copper layer on the b surface is removed by chemical etching, and finally the masking agent is removed. As a result, a copper protrusion 32 (so-called standoff) having a height of 3 μm and formed of electroless copper was formed.

When the wiring board is completed in this way, the next build-up process is started.
As shown in FIG. 4 (a), ACP; 37 is applied to the a surface of the substrate B; In this ACP, Ni and Au particles having an average particle diameter of 4 μm are polymer coated. Next, the concave portion 38 of the substrate A in which the stand-off is formed on the b surface is fitted with the convex portion 39 of the substrate on which the ACP is placed. The bonded substrate was placed on a press machine and pressed at a pressure of 2 MPa at a temperature of 200 ° C. for 20 seconds or more, and then taken out (FIG. 4B).

  Since the portion where the standoff is made has a protrusion of 3 μm, the particle size of the ACP sandwiched between the substrates is crushed only by the portion of the standoff, and the metal is exposed from the polymer and becomes conductive. In the part where the standoff is not formed, a clearance of a maximum of 7 μm can be made from the sum of the particle diameter of Ni and Au particles of 4 μm and the height of the standoff of 3 μm. Serves as an adhesive.

  When the distance between the predetermined conductive portions of the two substrates pasted was measured with a tester, conduction was confirmed with a resistance of 0Ω to 10Ω. As described above, a laminated substrate having a small space between the laminated substrates, easy alignment, and high alignment accuracy was obtained.

The circuit board and the laminated board of the present invention can be used as circuit mounting boards for various electric and electronic devices that are remarkably miniaturized.

It is an image figure of (a) schematic and (b) sectional drawing in (b) (alpha)-(alpha) of the board | substrate molded product A of this invention. FIG. 4A is a schematic view of a substrate A that has become a flash board by copper plating and etching, and FIG. It is a flowchart figure at the time of building up the wiring board of this invention. It is sectional drawing of an example of the laminated circuit board of this invention. It is a flowchart figure of the conventional buildup construction method.

Explanation of symbols

1: Rough pattern 2: Core material 3: Copper foil
4: Pre-preg 5: Connection hole 6: Pre-preg 7: Copper foil 8a: Via 8b: Through hole
10: Wiring part 11: Protrusion 20: Wiring part
21: Earth part 30: Connection hole 32: Convex part
35: Substrate B 36: Substrate A 37: ACP (anisotropic conductive paste)

Claims (4)

    A wiring board for build-up, which is embedded in a groove which is formed on the surface of the board and forms a wiring pattern, and does not protrude from the board surface, and is formed on a part of the wiring layer to be electrically connected to another board surface. A conductive protrusion protruding from the substrate, an alignment protrusion formed on one surface of the substrate when stacked, and / or a positioning recess formed on the back surface of the substrate when stacked. Wiring board. 2. The wiring board according to claim 1, wherein the height of the alignment protrusion is from 30 μm to 50 μm from the surface of the circuit board, and the height of the conductive protrusion is from 1 μm to 3 μm from the substrate surface.     A laminated circuit board in which a plurality of wiring boards according to claim 1 or 2 are laminated, wherein the alignment protrusions and recesses of each wiring board are fitted between upper and lower boards, and between each board, A laminated circuit board, which is filled with an anisotropic conductive adhesive. 3. The method of manufacturing a wiring board according to claim 1 or 2, wherein a resin is used by using a mold having irregularities corresponding to the wiring pattern, the conductive protrusion, the alignment protrusion, and / or the alignment hole. A method of manufacturing a wiring board, characterized by molding in a mold.