JP2006268280A - Signal integrity confirming method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To carry out confirmation of impedance consistency of a signal pattern and a transmission line at high speed on the basis of a relational expression of output impedance and characteristic impedance. <P>SOLUTION: The signal integrity confirming method has an output impedance DB 2 storing, precedently calculated output impedance from a device model DB 1, per LSI, and a terminating resistor value DB 3. Characteristic impedance of a signal pattern connected to an output buffer is calculated from a layer structure including a pattern width and a thickness between layers of a printed circuit board. If it is connected to the signal pattern by only the output buffer, a value of output impedance extracted from the output impedance DB is compared with the calculated value of the characteristic impedance of the signal pattern. If a terminating resistor is connected, a value of adding its terminating resistor value and the output impedance of the output buffer is compared with a value of the characteristic value of the signal pattern, and it is confirmed whether it is within a conformable range. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a signal integrity confirmation method, and more particularly, to a technique for performing confirmation of impedance matching between a signal pattern and a transmission line at high speed.

  Conventionally, in the design of printed circuit boards for digital circuits, when checking the consistency between the LSI output buffer and the characteristic impedance of the signal pattern on the printed circuit board, a SPICE (Simulation Program for IC Emphasis) program is used. Consistency was confirmed by performing waveform analysis and judging the results visually.

  The function of checking the waveform by extracting the topology information of the signal pattern related to this waveform analysis from the printed circuit board CAD, setting the model of the LSI IO buffer that drives the waveform, and performing the waveform analysis has been heretofore, but directly There was no way to check consistency on the data.

  In the conventional method, it is necessary to set a device model for each net and signal pattern on the board and perform waveform analysis, and it is visual confirmation to determine the waveform analysis result, and all signal patterns on a large-scale board are determined. It took a very long time to check the consistency and to check the design data. In addition, when the layer specifications and layer configuration of the printed circuit board are changed, it is necessary to perform time-consuming and time-consuming waveform analysis for each change in order to confirm the consistency.

  The object of the present invention is to distinguish whether a relational expression between a simple output impedance and a transmission line characteristic impedance is satisfied or not, thereby confirming the impedance matching between the signal pattern and the transmission line at high speed and comprehensively. It is to provide a signal integrity check method that can be performed.

The signal integrity check method of the present invention has an output impedance database that holds output impedance calculated in advance from a device model for each LSI, and a termination resistance value database that holds resistance values of termination resistors,
The characteristic impedance of the signal pattern connected to the output buffer is calculated from the layer configuration including the pattern width and interlayer thickness of the printed circuit board, and the output extracted from the output impedance database when connected to the signal pattern only by the output buffer Compare the impedance value with the calculated characteristic impedance value of the signal pattern to confirm that it is within the matching range. If a termination resistor is connected, add the termination resistance value and the output impedance of the output buffer. By comparing the calculated value with the calculated characteristic impedance value of the signal pattern, it is confirmed that it is within a matching range.

  An effect of the present invention is that the signal pattern and the impedance matching of the transmission line, which have been time consuming and time-consuming, can be confirmed at high speed and comprehensively. The reason is simply to distinguish whether or not the relational expression between the simple output impedance and the transmission line characteristic impedance is satisfied. This function has an advantage that the waveform consistency can be easily confirmed even when the LSI is changed or the printed circuit board layer configuration is changed.

Next, the best mode for carrying out the present invention will be described in detail with reference to the drawings.
Referring to FIG. 1, the signal integrity checking method according to the present invention uses a simple numerical value called an output impedance Rout in advance from an IO buffer model of LSI mounted on a printed circuit board or an IO drive current value (catalog value). It has an output impedance DB2 that is calculated and stored as a separate database for each LSI, and a termination resistance value DB3 that is stored as a database of resistance values Rt used as terminations, and has a printed circuit board layer configuration (interlayer thickness, layer thickness, Pattern width), a function 4 for calculating the characteristic impedance Z0 of the corresponding signal pattern, and a function 5 for inputting an allowable resistance value range. An example of the IO buffer model is IBIS (IO Buffer Information Specification).

Furthermore, when the output impedance of the LSI output buffer connected to the pattern for confirming the matching and the series termination, Ra = Rout + Rt in the specified range ± X with the value Ra calculated by the following formula and the characteristic impedance Z0 (Formula 1)
Z0-X <Ra <Z0 + X (Formula 2)
A function 6 for comparing values regardless of waveform analysis, and a function 8 for displaying an error when the value is not within the specified ± X range.

  Next, the operation of the best mode for carrying out the present invention will be described with reference to the drawings. The output impedance database 2 is generated from the database 1 which is a database of IBIS which is a generally provided device model.

  The generated output impedance Ra forms the database 2 as a file for each LSI. Similarly, the resistance value Rt of the resistance component is filed as each individual resistance component to form the database 3. These electronic component resistance value files have a one-to-one relationship with names registered as a library of components on the printed circuit board CAD, and the resistance value file is based on the component name used on the printed circuit board CAD data. The value is uniquely determined. Then, it is referred to as a file of related parts (LSI, resistance) at the time of consistency check.

  On the other hand, the characteristic impedance Z0 of the signal pattern on the printed circuit board is calculated using each parameter of the board specifications (layer configuration, interlayer thickness, pattern width, conductivity, dielectric constant) included in the printed circuit board CAD data. Then, each signal pattern name (net name) and each characteristic impedance Z0 value are generated as a file 4 having a one-to-one relationship.

  Next, the allowable range input 5 is executed with the allowable range as X. If the output impedance Ra on the waveform drive side is larger than Z0, this X will cause a circuit malfunction without generating a waveform, and if it is smaller than Z0, it will not become a clean rectangular wave and will cause large overshoot and undershoot, resulting in large radiation noise. However, it is a value that specifies this allowable range.

  It is determined by function 6 whether Ra, Z0, and X, which are values obtained from the above functions, have a relationship of Formula 2 for each pattern name (net name) on the printed circuit board CAD data, and within that range If not, the fact that the consistency of the pattern is not taken is indicated by an error display of function 8.

  If an error is displayed by these, the signal on the printed circuit board can be changed by changing the type of LSI output buffer, attaching a termination resistor, or changing the resistance value if a termination resistor is already installed. Integrity can be easily confirmed as a whole, and fatal noise and circuit malfunction can be prevented on a board-by-board basis.

  In FIG. 1, the allowable range input is only one parameter, X, but the shift in the direction of increasing from the characteristic impedance of the pattern affects the circuit operation, and the shift in the decreasing direction increases noise. Affect. Therefore, since the allowable ranges are different, a function that can input individual values can be considered.

  According to the present invention, when designing a printed circuit board for waveform transmission, particularly for transmitting a high-speed digital waveform, the output impedance of the LSI output buffer matches the characteristic impedance of the pattern on the printed circuit board to which the output impedance is connected. Can be applied to the use of confirming on printed circuit board CAD data.

  Also, when there is a circuit that uses a termination resistor, it is necessary to check whether the termination resistor is capable of matching the characteristic impedance of the transmission line and whether the resistance value is such that the circuit malfunctions. Is also applicable.

It is the figure which showed the structure and operation | movement of this invention.

Explanation of symbols

2 Output impedance DB
3 Termination resistance value DB

Claims (1)

It has an output impedance database that holds the output impedance calculated in advance from the device model for each LSI, and a termination resistance value database that holds the resistance value of the termination resistance,
The characteristic impedance of the signal pattern connected to the output buffer is calculated from the layer configuration including the pattern width and interlayer thickness of the printed circuit board, and the output extracted from the output impedance database when connected to the signal pattern only by the output buffer Compare the impedance value with the calculated characteristic impedance value of the signal pattern to confirm that it is within the matching range. If a termination resistor is connected, add the termination resistance value and the output impedance of the output buffer. A signal integrity check method characterized by comparing the calculated value and the calculated characteristic impedance value of the signal pattern to check whether they are within a matching range.

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