JP2006254158A - Variable gain amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable gain amplifier with reduced power consumption, by reducing the current flowing between a power supply terminal and a ground terminal, by making at least a part of the drain current of a first transistor in common with at least a part of the drain current of a second transistor. <P>SOLUTION: A variable gain amplifier includes a first transistor M1 having an input terminal Vi as a gate with a grounded source, and a second transistor M2, having the gate connected to the drain and operating as the output load of the first transistor M1. In the above variable gain amplifier, having a gain to be varied by controlling drain currents I<SB>i</SB>, I<SB>j</SB>of the first transistor M1 and the second transistor M2, respectively, the first transistor M1 and the second transistor M2 are connected so as to share a portion or the entirety of the drain current of the first transistor M1 with a portion or the entire of the drain current of the second transistor M2. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a variable gain amplifier suitable for use in a semiconductor integrated circuit or a high frequency integrated circuit. More specifically, using a MOS transistor suitable for high integration, the current between the power supply terminal and the ground terminal is reduced by reducing the current between the power supply terminal and the ground terminal while the gain of the decibel display changes linearly with respect to the gain control signal. The present invention relates to a variable gain amplifier that can be reduced.

  In recent years, development of system-on-chip LSIs has been promoted for downsizing and cost reduction of wireless terminals such as mobile phones and portable information terminals. One method for realizing both the miniaturization and cost reduction of wireless terminals is to configure the wireless analog circuit with a monolithic IC. In this case, in consideration of miniaturization and cost reduction, it is generally preferable to use a CMOS transistor more suitable for high integration rather than a bipolar transistor as an element constituting the IC.

  One of functional circuits used in a wireless analog circuit of a wireless terminal is a variable gain amplifier. The variable gain amplifier mainly adjusts the signal level so that the input level of the AD converter becomes constant at the final stage of the analog circuit in the receiver. In addition, it is desirable from the viewpoint of ease of control and the like that it is possible to perform so-called linear-in-dB gain control in which the decibel display gain changes linearly with respect to the gain control signal.

  However, although it is easy to realize an exponential amplifier having a linear-in-dB characteristic with a bipolar, it is necessary to devise in order to realize it with a CMOS. For example, a technique for realizing linear-in-dB characteristics using the square law of a MOS transistor is known.

FIG. 4 shows a configuration of a general variable gain amplifier using a CMOS transistor. The source terminal of the transistor M1 whose gate constitutes the input terminal Vi is connected to the first variable current source 1 and the grounding capacitor 2. On the other hand, the source terminal of the transistor M2 connected so that the gate terminal and the drain terminal have a MOS diode structure is connected to the second variable current source 3 and the grounding capacitor 4. Further, the drain terminal of the transistor M1 and the drain terminal of the transistor M2 are connected, and the connection point is an output terminal Vo. A transistor M5 is connected between the power supply terminal Vdd and the output terminal Vo, and an appropriate constant voltage Vb is applied to the gate terminal. At this time, the impedance of the transistor M5 viewed from the output terminal Vo is ideally infinite. This type of variable gain amplifier is described in Non-Patent Document 1, for example.
PC. Huang, LY. Chiou, CK. Wang, “A 3.3-V Wideband Exponential Control Variable-Gain-Amplifier”, IEEE International Symposium on Circuits and Systems 1, 1998, p285-288

  The variable gain amplifier having the above-described structure has a problem that a large amount of current flows between the power supply terminal and the ground terminal because the transistor M1 and the transistor M2 are connected in parallel, resulting in an increase in power consumption. .

  The present invention has been made to solve such a problem. By sharing at least a part of the drain currents of the first transistor and the second transistor, the power supply terminal and the ground terminal are provided. An object of the present invention is to provide a variable gain amplifier in which a flowing current is reduced and power consumption is reduced.

  A variable gain amplifier according to the present invention includes a first source-grounded transistor having a gate as an input terminal, and a second transistor having a gate and a drain connected and operating as an output load of the first transistor. In the variable gain amplifier that changes the gain by controlling the drain currents of the first and second transistors, a part or all of the drain current of the first transistor and the drain current of the second transistor The first and second transistors are connected such that part or all of the first and second transistors are shared.

  According to the variable gain amplifier of the present invention, since at least part of the drain current of the first transistor and the drain current of the second transistor are shared, the current flowing between the power supply terminal and the ground terminal is shared. The current can be reduced. On the other hand, the voltage between the power supply terminal and the ground does not change because the power supply voltage is the same. As a result, power consumption can be reduced by the amount that the total current is reduced. This reduction in power consumption is particularly effective in portable devices such as mobile phones.

Next, the variable gain amplifier of the present invention will be described with reference to the drawings. The variable gain amplifier according to the present invention includes a first transistor M1 whose source is grounded and having a gate as an input terminal Vi, a gate and a drain connected to each other, as shown in FIG. Gain that changes the gain by controlling the drain currents I _i and I _j of the first transistor M1 and the second transistor M2. In the variable amplifier, the first and second transistors M1 and M2 are connected so that part or all of the drain current of the first transistor M1 and part or all of the drain current of the second transistor M2 are shared. It is characterized by being.

  In the example shown in FIG. 1, like the circuit shown in FIG. 4, the first transistor M1 for voltage-current conversion and the second transistor for output load of the first transistor M1 are used. An example of a single-ended amplifier composed of M2 is shown. However, in the example shown in FIG. 4, the first transistor M1 and the second transistor M2 are both composed of NMOS, and both the transistors M1 and M2 are connected in parallel. The first transistor M1 is composed of NMOS and the second transistor M2 is composed of PMOS, and both are connected in series.

  The input terminal Vi is provided at the gate terminal of the first transistor M1, and the source terminal is connected to the first variable current source 1 and the grounding capacitor 2. On the other hand, the source terminal of the second transistor M2 whose gate terminal and drain terminal are connected so as to have a MOS diode structure is connected to the second variable current source 3 and the grounding capacitor 4, and its drain terminal is the first one. It is connected to the drain terminal of one transistor M1, and this connection is the output terminal Vo. Further, a third transistor M3 (NMOS) and a fourth transistor M4 (PMOS) sharing the drain terminal are inserted in series between the power supply terminal Vdd and the ground terminal GND, and the drain sharing terminal and the output terminal Vo are connected. And are connected.

Predetermined voltages Vbd and Vbu are applied to the gates of the third and fourth transistors M3 and M4, respectively. The third and fourth transistors M3 and M4 include a current flowing through the first transistor M1 (current flowing through the first variable current source 1) I _i and a current flowing through the second transistor M2 (second variable current). intended for flowing differential current between the current) I _j flowing through the source 3, for example, when I _i> I _j, the third transistor M3 are turned off by lowering the potential of Vbd terminals, suitable potentials Vbu , A current I _i −I _j flows through the fourth transistor M4. When i _i < _j , the reverse operation is performed. When the magnitudes of I _i and I _j are not reversed, only one of the third and fourth transistors M3 and M4 is sufficient. The grounding capacitors 2 and 4 respectively ground the sources of the first and second transistors M1 and M2 in a high frequency manner.

In this circuit, by changing the current I _i flowing through the first variable current source 1 and the current I _j flowing through the second variable current source 3 while keeping I _i + I _j = constant, linear-in-dB An exponential amplifier having the following characteristics can be obtained. That is, at this time, the gain gain is expressed by the following equation (1).

Here, gm _input is the transconductance of the first transistor M1, gm _load is the transconductance of the second transistor M2, μCox is a process-dependent value, and W / L is the ratio of the gate length to the gate width. is there. I _i is a current flowing through the first variable current source 1, I _j is a current flowing through the second variable current source 3, and I _i + I _j = 2I _bias = constant. I _bias is a DC bias current. At this time,
I _i = I _bias + I _control
I _j = I _bias −I _control
The gain is controlled by changing the control current I _control . Further, when x = I _control / I _bias is established, Expression (1) becomes Expression (2) below, and an exponential amplifier having a linear-in-dB characteristic can be realized.

Here, K is Equation (3).

When the power supply voltage is Vdd, the power consumption of the circuit at this time is Vdd · I _i when I _i > I _j , and Vdd · I _j when I _i <I _j . It becomes smaller than the conventional Vdd (I _i + I _j ). That is, power consumption is greatly reduced.

  As described above, according to the present invention, in the variable gain amplifier, since the first transistor and the second transistor are connected in series instead of in parallel, at least a part of the collector current of both transistors is shared. Thus, the current between the power supply terminal and the ground terminal is greatly reduced. As a result, power consumption can be greatly reduced, and even when used in a wireless terminal used in a mobile device such as a mobile phone, battery consumption can be reduced, and the usability is very good.

  In the above example, the example is a single-ended amplifier, but the power consumption can be similarly reduced by using a differential amplifier. An example is shown in FIG. In FIG. 2, since it is configured by a differential circuit, the first to fourth transistors M1 to M4 described above are all shown as differential pairs, and the first transistor is the first differential pair transistor M1. , M1 ′, and the second transistor is composed of a second differential pair transistor M2, M2 ′. The gate terminals of the first differential transistor M1 and M1 'are provided with input terminals Vi + and Vi-, respectively, and the drain terminals are provided with output terminals Vo + and Vo-, respectively. Similarly, the transistors M3 ′ and M4 ′ corresponding to the third and fourth transistors M3 and M4 through which the difference current between the first and second variable current sources 1 and 3 flows are similarly connected to the power supply terminal Vdd and the ground terminal GND. Are provided with the same connection. The first and second variable current sources 1 and 3 are connected to the sources to which the differential pair transistors M1 and M1 ′ and M2 and M2 ′ are connected, respectively, and the source ends thereof are virtual grounds. Therefore, no grounding capacitor is required. The operation and the operation current are the same as those in the example shown in FIG. 1, and the description thereof is omitted.

Furthermore, in each of the above-described examples, the first and second variable current sources 1 and 3 are both provided at the source ends of the first and second transistors. As long as the drain currents of the second transistors M1 and M2 can be adjusted to desired values, the arrangement location is not limited. For example, as shown in FIG. 3, the third variable current source 5 may be provided so as to be drawn from the drain side of the second transistor M2. In this case, the current flowing through the third variable current source 5, a current I _j flowing through the second transistor M2 is greater than current I _i flowing through the first transistor M1 (I _i <I _j) time, I _j -I _i is adjusted. In this case, since the difference current between the first and second transistors M1 and M2 can be drawn by the third variable current source 5, the third and fourth transistors are unnecessary, and the second transistor M2 Since the source is grounded by the power supply, the grounding capacitor 4 on the second transistor M2 side is also unnecessary. Other than that, it is the same as the example shown in FIG.

It is a figure which shows the structure of one Embodiment of the variable gain amplifier by this invention. It is a figure which shows the structure of other embodiment of the variable gain amplifier by this invention. It is a figure which shows the structure of other embodiment of the variable gain amplifier by this invention. It is a figure which shows an example of the conventional variable gain amplifier.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st variable current source 2 Grounding capacitor 3 2nd variable current source 4 Grounding capacitor 5 3rd variable current source

Claims (1)

  A first-source-grounded transistor having a gate as an input terminal; and a second transistor having a gate and a drain connected to each other and operating as an output load of the first transistor. In a variable gain amplifier that changes the gain by controlling the drain current of the transistor, part or all of the drain current of the first transistor and part or all of the drain current of the second transistor are shared. The variable gain amplifier characterized in that the first and second transistors are connected as described above.

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