JP2006253763A - Comparator circuit, capacitance voltage conversion circuit utilizing the same, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce current consumption of a comparator circuit usable for a capacitance voltage conversion circuit. <P>SOLUTION: The comparator circuit 10 compares an analog detection voltage Vdet to be input with a predetermined threshold voltage Vth. The comparator circuit 10 is provided with a first inverter circuit 20, and a second inverter circuit 22. The detection voltage Vdet is input into the circuit 20. The circuit 20 is provided with a first resistor R1 connected in series between a power supply voltage Vdd and a grounding voltage GND, a first transistor M1 of a P channel MOS transistor, a second transistor M2 of an N channel MOS transistor, and a second resistor R2. The circuit 22 is connected to an output of the circuit 20, and the transistor size of the circuit 22 is set smaller than the transistor size of the circuit 20. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a capacitor voltage conversion circuit and a comparator circuit used therefor, and more particularly to a reduction in current consumption thereof.

  2. Description of the Related Art In recent years, electronic devices such as computers, mobile phone terminals, and PDAs (Personal Digital Assistants) are mainly provided with an input device for operating electronic devices by applying pressure with a finger. As such an input device, a joystick, a touch pad, and the like are known.

  Such an input device detects and analyzes input from the user by utilizing the fact that the distance between the electrodes changes when the two electrodes provided facing each other are pressed and the capacitance changes. . For example, Patent Document 1 discloses an input device using such a change in capacitance.

JP 2001-325858 A

The input device using the above-described change in capacitance includes a capacitance-voltage conversion circuit for converting the capacitance into voltage and detecting it. Since an input device is often mounted on a portable electronic device that is driven by a battery in particular, reduction of current consumption is an important issue.
The present invention has been made in view of these problems, and an object thereof is to reduce current consumption of the capacitor-voltage conversion circuit.

  In order to solve the above-described problem, a comparator circuit according to an aspect of the present invention is a comparator circuit that compares an input analog voltage with a predetermined threshold voltage, and includes a first inverter circuit to which the analog voltage is input. And a second inverter circuit connected to the output of the first inverter circuit. The first inverter circuit includes a first resistor, a P channel MOS transistor, an N channel MOS transistor, and a second resistor connected in series between the power supply voltage and the ground voltage.

  According to this aspect, when an analog voltage higher than the threshold voltage of the first and second inverter circuits is input, a high level is output. By providing a resistor on the current path of the first inverter circuit provided in the first stage, current consumption in the first inverter circuit can be reduced.

  The transistor size of the second inverter circuit may be smaller than the transistor size of the first inverter circuit. By adjusting the transistor size of the second inverter circuit, current consumption can be suitably reduced.

  Another embodiment of the present invention is a capacitive voltage conversion circuit. The capacitance-voltage conversion circuit is a capacitance-voltage conversion circuit that converts a capacitance value of a variable capacitance element into a voltage, and a drive circuit that applies a periodic voltage to the other end of the variable capacitance element having one end connected to a fixed potential; The comparator circuit that compares a voltage appearing at the other end of the variable capacitance element with a predetermined threshold value, and a low-pass filter that integrates the output voltage of the comparator circuit.

  According to this aspect, the periodic voltage output from the drive circuit is distorted by the variable capacitance element, and the rise of the voltage appearing at the other end of the variable capacitance element is delayed as the capacitance value increases. As a result, the time until the voltage input to the comparator circuit reaches the threshold voltage changes in the comparator circuit, and the capacitance output from the comparator circuit is integrated to detect the capacitance of the variable capacitance element. be able to. In such a capacitor voltage conversion circuit, the consumption current can be reduced by using the above-described comparator circuit.

  The periodic voltage applied by the driving circuit is a pulse signal that repeats a high level and a low level, and the driving circuit may adjust the duty ratio of the pulse signal in accordance with the fluctuation of the threshold voltage of the comparator circuit. Good.

  The capacitor voltage conversion circuit may be integrated in one semiconductor integrated circuit.

  The capacitance voltage conversion circuit may further include a buffer circuit connected between the comparator circuit and the low pass filter. By providing the buffer circuit, the charge / discharge capability of the capacitor in the low-pass filter can be improved.

  Yet another embodiment of the present invention is an electronic device. This electronic device includes two electrodes provided to face each other, and the capacitance between the variable capacitor and the capacitance between the two electrodes changes when the distance between the two electrodes changes due to external pressure. And the above-described capacitance-voltage conversion circuit that converts a value into a voltage.

  According to this aspect, the current consumption of the electronic device can be reduced.

  A plurality of variable capacitance elements may be provided. By arranging a plurality of variable capacitance elements, it can be used as a pointing device or the like by analyzing which variable capacitance element has changed in capacitance.

  It should be noted that any combination of the above-described constituent elements and a conversion of the expression of the present invention between a method, an apparatus, and the like are also effective as an aspect of the present invention.

  According to the comparator circuit and the capacitance-voltage conversion circuit according to the present invention, current consumption can be reduced.

FIG. 1 is a diagram illustrating a mobile phone terminal in which the capacitance-voltage conversion circuit according to the embodiment is mounted. The mobile phone terminal 200 includes a display 210, a joystick 220, and operation buttons 230.
The display 210 displays various information necessary for the user. The joystick 220 is an input device that is operated by a user with a finger, and selects items and objects displayed on the display 210 or inputs characters by applying pressure in the upper, left, lower, and right directions. It is provided to assist.
The operation button 230 is an input device provided for inputting a telephone number or inputting text during a call.

FIG. 2 is a cross-sectional view taken along line AA ′ of the joystick 220 in FIG. The joystick 220 includes four variable capacitance elements 30 a to 30 d collectively referred to as the variable capacitance element 30, and the capacitance-voltage conversion circuit 100.
The variable capacitance elements 30a to 30d are provided at four locations corresponding to the left, right, upper, and lower portions of the joystick 220, respectively. FIG. 2 shows two variable capacitance elements 30a and 30b corresponding to the left and right. An insulating cover 50 such as rubber or plastic is provided on the upper surface of the variable capacitor 30 so as to cover the variable capacitor 30. When the user presses the cover 50 with a finger, pressure is applied to the variable capacitance element 30 installed under the pressed portion of the cover 50.

  The variable capacitance element 30 includes two electrodes provided to face each other, and the two electrodes have a capacitor structure. When the variable capacitance element 30 is pressed from above, the gap between the two electrodes changes, and the capacitance value changes.

  The capacitance-voltage conversion circuit 100 determines which variable capacitance element 30 is pressed by detecting the capacitance of the four variable capacitance elements 30. The capacitance / voltage conversion circuit 100 converts each capacitance of the variable capacitance element 30 into a digital value and outputs the digital value to a DSP 110 (Digital Signal Processor). The DSP 110 is a digital circuit that comprehensively controls the entire mobile phone terminal 200.

  FIG. 3 is a circuit diagram showing a configuration of the capacitance-voltage conversion circuit 100 according to the present embodiment. The capacitance-voltage conversion circuit 100 includes a drive terminal 102, a detection terminal 104, and an output terminal 106 as input / output terminals. The capacitance-voltage conversion circuit 100 is connected to the variable capacitance element 30 via the drive terminal 102 and the detection terminal 104, and outputs the detected capacitance of the variable capacitance element 30 from the output terminal 106 to the DSP 110 as a digital value. To do. In FIG. 3, only one variable capacitance element 30 is shown, but actually, four variable capacitance elements 30a to 30d are provided in parallel, and the capacitance of each variable capacitance element 30 can be detected. It is configured.

The capacitance-voltage conversion circuit 100 includes a comparator circuit 10, a drive circuit 12, a buffer circuit 14, a low-pass filter 16, and an A / D converter 18, and is integrated in one semiconductor integrated circuit.
As shown in FIG. 3, the variable capacitance element 30 has one end connected to a ground potential that is a fixed potential. The drive circuit 12 applies a periodic drive voltage Vdrv to the other end of the variable capacitor 30 having one end connected to the ground potential. The drive voltage Vdrv is a pulse signal having a predetermined duty ratio, and is applied to the variable capacitance element 30 via the drive terminal 102.

As a result of the drive voltage Vdrv being applied by the drive circuit 12, the detection voltage Vdet that has become distorted due to its own capacitance appears in the variable capacitance element 30. This detection voltage Vdet is input to the comparator circuit 10 via the detection terminal 104.
The comparator circuit 10 compares the detection voltage Vdet appearing at the other end of the variable capacitance element 30 with a predetermined threshold value Vth, and outputs a high level when Vdet> Vth and a low level when Vdet <Vth.

The buffer circuit 14 includes two inverter circuits connected in series, and is provided to improve the charge / discharge capability of the capacitor in the subsequent low-pass filter.
The low-pass filter 16 includes a third resistor R3 and a first capacitor C1, and outputs a voltage Vx2 obtained by removing and integrating the high-frequency component of the output voltage Vx1 of the comparator circuit 10 input via the buffer circuit 14. The voltage Vx2 output from the low pass filter 16 is input to the A / D converter 18.
The A / D converter 18 analog-digital converts the analog voltage Vx2 into a digital value Dx2. The digital value Dx2 is output from the output terminal 106 to the DSP 110.

FIG. 4 is a circuit diagram showing a configuration of the comparator circuit 10 according to the present embodiment. The comparator circuit 10 compares the analog detection voltage Vdet appearing at the variable capacitance element 30 with a predetermined threshold voltage Vth. The comparator circuit 10 includes a first inverter circuit 20 to which the detection voltage Vdet is input, and a second inverter circuit 22 connected to the output of the first inverter circuit 20.
The first inverter circuit 20 includes a first resistor R1, a first transistor M1, which is a P-channel MOS transistor, and a second transistor M2, which is an N-channel MOS transistor, connected in series between the power supply voltage Vdd and the ground voltage GND. And a second resistor R2.
In the present embodiment, the resistance values of the first resistor R1 and the second resistor R2 are both about 30 kΩ.

The second inverter circuit 22 includes a third transistor M3, which is a P-channel MOS transistor, and a fourth transistor M4, which is an N-channel MOS transistor, connected in series between the power supply voltage Vdd and the ground voltage GND.
In the present embodiment, the transistor sizes of the third transistor M3 and the fourth transistor M4 of the second inverter circuit 22 are set smaller than the transistor sizes of the first transistor M1 and the second transistor M2 of the first inverter circuit 20.

The first inverter circuit 20 and the second inverter circuit 22 are not as normal inverter circuits that invert a digital signal having a binary value of high level or low level, but whether the input analog voltage is higher than the threshold voltage. It functions as a comparator circuit that determines whether it is low.
When the analog detection voltage Vdet input to the first inverter circuit 20 is higher than the threshold voltage Vth of the first inverter circuit 20, the output voltage of the first inverter circuit 20 is at a low level. Conversely, when the detection voltage Vdet is lower than the threshold voltage Vth of the first inverter circuit 20, the output voltage of the first inverter circuit 20 is at a high level. The output voltage of the first inverter circuit 20 is output by inverting the high level and the low level by the second inverter circuit 22.

  The comparator circuit 10 configured in this manner outputs a signal that maintains a high level when Vdet> Vth, and outputs a signal that maintains a low level when Vdet <Vth.

The operation of the capacitor voltage conversion circuit 100 configured as described above will be described. FIG. 5 is an operation waveform diagram of the capacitance-voltage conversion circuit 100. The drive circuit 12 outputs a drive voltage Vdrv of a pulse signal that repeatedly turns on and off at a predetermined cycle.
The drive voltage Vdrv output from the drive circuit 12 is input to the variable capacitance element 30. The drive voltage Vdrv has a waveform rounding due to the capacitance of the variable capacitance element 30. As a result, the detection voltage Vdet rises with a time constant corresponding to the capacitance with a delay from the rise of the drive voltage Vdrv.

  The detection voltage Vdet is input to the comparator circuit 10 and compared with the threshold voltage Vth. Since the comparator circuit 10 outputs a high level when Vdet> Vth and a low level when Vdet <Vth, the voltage Vx1 output from the comparator circuit 10 rises with a delay of time ΔT from the rise of the drive voltage Vdrv. This delay time ΔT changes according to the time until the detection voltage Vdet reaches the threshold voltage Vth. The rise time constant of the detection voltage Vdet changes according to the capacitance of the variable capacitance element 30, and the larger the capacitance value, the larger the time constant and the longer the delay time ΔT. Conversely, when the capacitance value of the variable capacitor 30 is small, the time constant is small and the delay time ΔT is short.

Thereafter, when the drive voltage Vdrv falls, the detection voltage Vdet also falls according to a time constant corresponding to the capacitance of the variable capacitance element 30. When the detection voltage Vdet becomes lower than the threshold voltage Vth again, the output voltage Vx1 of the comparator circuit 10 becomes low level.
Therefore, the time Th when the output voltage Vx1 of the comparator circuit 10 becomes high level changes according to the capacitance value of the variable capacitance element 30, and when the capacitance value is large, the time Th is short and the capacitance value When is small, the time Th is long.

The output voltage Vx1 of the comparator circuit 10 is input to the low pass filter 16 via the buffer circuit 14. The low-pass filter 16 outputs a voltage Vx2 obtained by integrating the output voltage Vx1 of the comparator circuit 10. The output voltage Vx2 of the low-pass filter 16 becomes higher as the time Th when the output voltage Vx1 of the comparator circuit 10 is at a high level is longer, and is lower as the output voltage Vx1 is shorter. That is, the output voltage Vx2 of the low-pass filter 16 changes according to the capacitance value of the variable capacitance element 30.
In this manner, the capacitance / voltage conversion circuit 100 converts the capacitance value of the variable capacitance element 30 into a voltage.

  The A / D converter 18 converts the output voltage Vx2 of the low-pass filter 16 into a digital value Dx2. The digital value Dx2 obtained in this way represents the capacitance value of the variable capacitance element 30 as a digital value.

  FIG. 6 is a time waveform diagram showing a voltage / current waveform inside the comparator circuit 10. FIG. 6 shows, in order from the top, the detection voltage Vdet input to the comparator circuit 10, the output voltage Vm1 of the first inverter circuit 20, the output voltage Vx1 of the comparator circuit 10, and the current Ic flowing through the comparator circuit 10.

  As shown in FIG. 4, in the first inverter circuit 20 provided in the first stage of the comparator circuit 10, the first resistor R1 and the second resistor R2 are connected to the source terminals of the first transistor M1 and the second transistor M2, respectively. The Therefore, the voltage Vm1 output from the first inverter circuit 20 has a waveform that gradually changes with time.

  On the other hand, since the second inverter circuit 22 is configured in a normal inverter circuit format that does not include a resistor, the voltage Vx1 output from the second inverter circuit 22 has a voltage waveform that rapidly rises in the vicinity of the threshold voltage Vth. Become.

The current Ic flowing through the comparator circuit 10 is the sum of the currents flowing through the first inverter circuit 20 and the second inverter circuit 22. In the comparator circuit 10 according to the present embodiment, the first inverter circuit 20 in the first stage keeps the current consumption low by providing the first resistor R1 and the second resistor R2.
Since the detection voltage Vdet input to the comparator circuit 10 is an analog voltage, when it takes a value near the threshold voltage of the inverter circuit, the first transistor M1 to the first transistor M1 of the first inverter circuit 20 and the second inverter circuit 22 are used. The operation is performed with the four transistors M4 turned on. As a result, if the first resistor R1 and the second resistor R2 are not provided, a current of several mA at the peak value flows through the first inverter circuit 20. As described above, when a resistance of 30 kΩ is provided as the first resistor R1 and the second resistor R2, only a current of several tens of μA or less flows through the first inverter circuit 20, so that the current consumption is greatly reduced. Can do.

  The current flowing through the second inverter circuit 22 can also be suppressed by reducing the transistor sizes of the third transistor M3 and the fourth transistor M4 of the second inverter circuit 22. Furthermore, the waveform rounding of the voltage Vm1 caused by providing a resistor in the first inverter circuit 20 can be shaped by the second inverter circuit 22.

  As described above, according to the comparator circuit 10 according to the present embodiment, it is possible to realize a comparator circuit in which a high level and a low level are rapidly switched in the vicinity of a threshold value while suppressing current consumption. Furthermore, the current consumption can also be reduced in the capacitive voltage conversion circuit 100 using the comparator circuit 10.

  Further, according to the comparator circuit 10 according to the present embodiment, the current consumption can be reduced by adjusting the resistance values of the first resistor R1, the second resistor R2, and the transistor sizes of the first transistor M1 to the fourth transistor M4. The output voltage waveform can be controlled with a high degree of freedom.

  Note that the comparator circuit 10 according to the present embodiment has a problem that the threshold voltage Vth varies due to variations in the power supply voltage Vdd and the ambient temperature. Due to such fluctuations, the high-level period Th of the output voltage Vx1 in the state where the analog detection voltage Vdet of the same level is input changes, so the detection value of the capacitance of the variable capacitance element 30 changes. May end up.

  Therefore, when the threshold voltage Vth of the comparator circuit 10 fluctuates due to fluctuations in the power supply voltage Vdd or ambient temperature, the driving circuit 12 adjusts the duty ratio of the driving voltage Vdrv accordingly. For example, when the threshold voltage Vth of the comparator circuit 10 increases, the duty ratio of the drive voltage Vdrv is set large, and conversely, when the threshold voltage Vth decreases, the duty ratio of the drive voltage Vdrv is set small. Thus, by adjusting the duty ratio of the drive voltage Vdrv, accurate capacitance detection can be performed even when the power supply voltage Vdd and temperature fluctuate.

  This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

In the embodiment, the input device using four variable capacitance elements 30 has been described, but the present invention is not limited to this. For example, the variable capacitance elements 30 may be arranged in a matrix to form a touch pad type input device.
As the number of variable capacitance elements 30 increases, the number of capacitance / voltage conversion circuits 100 also increases accordingly, and the effect of reducing the current consumption of the comparator circuit 10 according to the present invention becomes more remarkable.

  In the embodiment, the example in which the buffer circuit 14 is provided between the comparator circuit 10 and the low-pass filter 16 has been described. However, when the current supply capability of the comparator circuit 10 is sufficiently high, the buffer circuit 14 may be omitted. Good.

  In the embodiment, the case where the capacitor voltage conversion circuit 100 is integrated on one semiconductor integrated circuit has been described. However, the present invention is not limited to this, and each circuit block is configured by using chip components or discrete elements. May be. Which block is to be integrated may be determined according to the semiconductor manufacturing process to be employed, required cost, characteristics, and the like.

  As electronic devices on which the capacitive voltage conversion circuit 100 according to the embodiment is mounted, in addition to the mobile phone terminal described in the embodiment, a personal computer, a PDA (Personal Digital Assistance), a remote controller such as a CD player, a digital still camera, etc. For example, it can be used for electronic devices including various input devices.

It is a figure which shows the mobile telephone terminal by which the capacity voltage converter circuit which concerns on embodiment is mounted. It is a figure which shows the A-A 'line sectional drawing of the joystick of FIG. It is a circuit diagram which shows the structure of the capacity voltage converter circuit which concerns on this Embodiment. It is a circuit diagram which shows the structure of the comparator circuit which concerns on this Embodiment. FIG. 4 is an operation waveform diagram of the capacitance-voltage conversion circuit of FIG. 3. FIG. 5 is a time waveform diagram showing a voltage-current waveform inside the comparator circuit of FIG. 4.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 Comparator circuit, 12 Drive circuit, 14 Buffer circuit, 16 Low pass filter, 18 A / D converter, R3 3rd resistance, C1 1st capacitor, 20 1st inverter circuit, 22 2nd inverter circuit, 30 Variable capacitance element, 100 capacitance voltage conversion circuit, 102 drive terminal, 104 detection terminal, 106 output terminal, 110 DSP, 200 mobile phone terminal, 210 display, 220 joystick, 230 operation button, M1 first transistor, M2 second transistor, M3 third transistor M4 fourth transistor, R1 first resistor, R2 second resistor.

Claims (8)

A comparator circuit that compares an input analog voltage with a predetermined threshold voltage,
A first inverter circuit to which the analog voltage is input;
A second inverter circuit connected to the output of the first inverter circuit,
The first inverter circuit includes:
A first resistor, a P-channel MOS transistor, an N-channel MOS transistor, and a second resistor connected in series between the power supply voltage and the ground voltage;
A comparator circuit comprising:   The comparator circuit according to claim 1, wherein a transistor size of the second inverter circuit is smaller than a transistor size of the first inverter circuit. A capacitance-voltage conversion circuit that converts a capacitance value of a variable capacitance element into a voltage,
A drive circuit for applying a periodic voltage to the other end of the variable capacitance element having one end connected to a fixed potential;
The comparator circuit according to claim 1 or 2, which compares a voltage appearing at the other end of the variable capacitance element with a predetermined threshold value.
A low-pass filter for integrating the output voltage of the comparator circuit;
A capacitance-voltage conversion circuit comprising:   The periodic voltage applied by the driving circuit is a pulse signal that repeats a high level and a low level, and the driving circuit sets a duty ratio of the pulse signal according to a variation in a threshold voltage of the comparator circuit. 4. The capacitance-voltage conversion circuit according to claim 3, wherein the capacitance-voltage conversion circuit is adjusted.   4. The capacitance / voltage conversion circuit according to claim 3, wherein the capacitance / voltage conversion circuit is integrated in one semiconductor integrated circuit.   The capacitance-voltage conversion circuit according to claim 3, further comprising a buffer circuit connected between the comparator circuit and the low-pass filter. A variable capacitance element that includes two electrodes provided opposite to each other, and a capacitance value is changed by changing a distance between the two electrodes by external pressurization;
The capacitance-voltage conversion circuit according to any one of claims 3 to 6, which converts a capacitance value between the two electrodes into a voltage.
An electronic device comprising:   The electronic apparatus according to claim 7, wherein a plurality of the variable capacitance elements are provided.

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