JP2006245133A - Substrate for semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the variation in grain size of silicon nano clusters in the shape of a dot by a simple method by a dry process which does not use gas irradiation, and to further reduce the grain size and increase the number density of the silicon nano clusters. <P>SOLUTION: A silicon oxide film 2 is formed in a surface layer of a silicon-contained substrate 1, and an amorphous silicon layer (a-Si layer) is formed on the silicon oxide film 2. Under a high vacuum environment, the a-Si layer is heat-treated at a temperature which is 400°C or above and less than the melting point of silicon to form a plurality of silicon nano clusters 4 in the shape of a dot on the silicon oxide film 2. By this method, the silicon nano clusters 4 can be obtained which have an average grain size of 5.5 nm or less, a number density of 2.7×10<SP>12</SP>/cm<SP>2</SP>or above, and the variation in grain size of 15% or less. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor element substrate and a method for producing the same. The base material for a semiconductor element according to the present invention can be suitably used in the production of a semiconductor dot memory such as a nanodot memory, for example.

  Semiconductor dot memory is expected as a next-generation nonvolatile memory. Nonvolatile memories using semiconductor dot memories include, for example, a silicon oxide film as a tunnel oxide film formed on a P-type silicon substrate, and silicon nanocrystals as dot-like silicon nanoclusters on the silicon oxide film In addition, an upper silicon oxide film as a control oxide film is formed on the silicon oxide film so that the dot-shaped silicon nanocrystals are embedded, and an electrode is formed on the back surface of the Si substrate and on the upper silicon oxide film. A nanodot memory having a configuration in which is provided is known. In this nanodot memory, device characteristics such as long-time charge retention, operation with low voltage and low power consumption, high speed of writing and erasing, improvement of the number of rewrites, multi-value operation, etc. are obtained by injecting charges into the dots. I can expect. In order to realize such device characteristics, the following structure is required for the nanodot memory.

That is, in order to ensure the charge retention time, it is necessary to reduce the particle size of the silicon nanocrystals (average particle size: 10 nm or less), and to ensure the threshold shift amount, the number density of the silicon nanocrystals is increased (1 × 10 ¹² / cm or more), and it is necessary to equalize the grain size of silicon nanocrystals in order to control the variation in device operating characteristics. It is necessary to reduce the thickness of the oxide film.

Therefore, in order to realize a semiconductor dot memory, a technique for manufacturing a dot-like silicon nanocrystal having a high density and a uniform size, specifically, a number density of 1 × 10 ¹² / cm ² or more and a crystal grain size of 10 nm or less. The probability of is important.

  In order to manufacture such dot-shaped silicon nanocrystals, many methods including a CVD method (chemical vapor deposition method) have been studied. However, conventional film formation techniques such as CVD methods not only make the process complicated by a wet process, such as the need for chemical treatment such as HF treatment on the film surface in order to increase the density of the formed film. There is a problem that device characteristics are deteriorated due to chemical treatment (fluorine or the like deteriorates the silicon oxide film).

  Therefore, a method of manufacturing dot-like silicon nanocrystals by a simple dry process using silicon-containing gas irradiation in a previously formed amorphous layer is known (for example, Non-Patent Document 1, Japanese Patent Application 2003-2003). 36311).

This gas irradiation method uses an electron gun vapor deposition method in a molecular beam vapor deposition apparatus to form an amorphous silicon layer (a) having a thickness of 0.1 to 3.4 nm on a SiO ₂ / Si substrate (substrate temperature: room temperature). -Si layer) is formed, and then a silicon nanocrystal in the form of dots is manufactured by irradiating Si ₂ H ₆ gas at a substrate temperature of 610 ° C. and a growth pressure of 4.2 × 10 ⁻⁴ Torr. According to this method, high-density silicon nanocrystals having a number density of 1 × 10 ¹² / cm ² and an average particle diameter of 10 nm can be produced by a simple dry process.

On the other hand, in the dot-like silicon nanocrystals thus obtained, an upper a-Si layer is further formed on the SiO ₂ film so that the silicon nanocrystals are embedded, and this upper a-Si layer is formed by thermal oxidation. By using a SiO ₂ film (control oxide film), it is used for a nanodot memory. However, since the surface of the silicon nanocrystal is also oxidized at the same time when the upper a-Si layer is thermally oxidized, the silicon nanocrystal is reduced in size or disappears due to the oxidation after the formation of the upper SiO ₂ film. There is a problem that it falls. Note that changes in thermal oxidation conditions such as temperature reduction, gas concentration reduction, and reduction of oxidation time during thermal oxidation can prevent the size reduction or disappearance of silicon nanocrystals due to oxidation. There is a problem that the range of oxidation conditions is narrow and the process is difficult to control.

  Therefore, in order to prevent oxidation of the silicon nanocrystal, the silicon nanocrystal is embedded in the antioxidant layer (for example, refer to Non-Patent Document 2), or an antioxidant film is formed on the surface layer portion of the silicon nanocrystal. A technique is known (see, for example, Patent Document 1).

In this technology, a silicon nitride layer as an antioxidant layer is formed so as to embed silicon nanocrystals by thermal nitridation using nitrogen molecular gas, or silicon as an antioxidant film is formed on the surface layer of silicon nanocrystals. A nitride film is formed. When the silicon nanocrystals are embedded in the antioxidant layer as described above, or an antioxidant film is formed on the surface portion of the silicon nanocrystal, the upper a-Si layer formed on the antioxidant layer is heated. When oxidizing, or when thermally oxidizing an upper a-Si layer formed so as to bury a silicon nanocrystal having an anti-oxidation film formed on the surface layer, the silicon nanocrystal may be reduced in size or disappear due to oxidation. It can be prevented by an antioxidant layer or an antioxidant film.
US Pat. No. 6,297,095 Proceedings of the 64th Annual Meeting of the Japan Society of Applied Physics, Fall 2003, 2nd volume, 767, Japan Society of Applied Physics, published on August 30, 2003 Hybrid Silicon Nanocrystal Silicon Nitride Memory, Extended Abstracts of the 2003 International Conference on Solid State Devices and Materials, Tokyo, 2003, pp. 848-849, RFSteimle, RARao, B. Hradsky, R. Muralidhar, M. Sadd, M. Ramon , S. Straub, S. Bagchi, XDWang, J. Hooker, and BEWhite Jr.

However, in the above conventional method of manufacturing dot-like silicon nanocrystals using gas irradiation, adjacent dot-like silicon nanocrystals overlap and fuse with the nucleus growth by supplying Si ₂ H ₆ gas. However, there is a problem that the variation in the particle size of the obtained silicon nanocrystal tends to increase, and as a result, the memory characteristics tend to vary.

  Further, in order to further improve the memory characteristics in the future, it is desired to further increase the density and reduce the particle size of silicon nanocrystals.

  On the other hand, in the above conventional technique for preventing oxidation of silicon nanocrystals by embedding silicon nanocrystals in a silicon nitride layer as an anti-oxidation layer, the device is made thicker by the amount of the silicon nitride layer to be formed extra. There was a problem of increasing the size.

  On the other hand, according to the above-described conventional technique for preventing oxidation of silicon nanocrystals by forming a silicon nitride film as an antioxidant film on the surface layer portion of silicon nanocrystals, there is no problem of increasing the size of the device.

  Here, when a silicon nitride film is formed on the surface layer of a silicon nanocrystal having an average particle diameter of, for example, about 5 to 6 nm by surface nitriding, silicon in the silicon nanocrystal is consumed along with nitridation. If a silicon nitride film having a film thickness of 2 to 3 nm is formed, the silicon nanocrystal itself is almost lost. Therefore, it is necessary to reduce the thickness of the silicon nitride film to about 1 nm or less.

  However, in the thermal nitriding treatment using nitrogen molecular gas, nitriding is generally difficult to occur compared to oxidation, and a high temperature process exceeding about 1000 ° C. is required. In nitriding at high temperature, nitrogen easily diffuses into the silicon nanocrystals as the temperature rises, so that the thickness of the formed silicon nitride film increases and the consumption of silicon in the silicon nitride film increases. The size of silicon nanocrystals is excessively reduced. Further, if the silicon nitride film thickness is reduced to 1 nm or less by changing the thermal nitriding conditions such as nitriding temperature reduction and nitriding time shortening, the nitrogen concentration in the silicon nitride film decreases with the diffusion of nitrogen. The formed silicon nitride film becomes a silicon-rich film lacking nitrogen. A silicon-rich silicon nitride film lacking nitrogen is easily oxidized and oxygen diffusion cannot be sufficiently prevented, so that it is difficult to exhibit sufficient antioxidant performance.

  Therefore, in the above prior art in which a silicon nitride film is formed by thermal nitridation using a nitrogen molecular gas, silicon that has a very thin film thickness of 1 nm or less and can exhibit a complete antioxidant performance for thermal oxidation. There is a problem that it is difficult to form a nitride film.

  Therefore, even if a silicon nitride layer is formed by the above-described conventional technique in which a silicon nitride crystal having an average particle size of about 5 to 6 nm is thermally nitrided using a nitrogen molecular gas, the size of the silicon nanocrystal is reduced during thermal oxidation. There is also a problem that it cannot be completely prevented from disappearing.

  The present invention has been made in view of the above circumstances, and by a simple method using a dry process that does not use gas irradiation, while suppressing particle size variation in dot-like silicon nanoclusters, further reducing the particle size and increasing the number of particles. The first problem is to increase the density.

  Further, the present invention provides a silicon nanocluster having an average particle size of about 5 to 6 nm, without greatly reducing the size of the silicon portion in the silicon nanocluster from the size of the original silicon nanocluster. A second problem is to make it possible to embed a cluster in a silicon oxide film.

  (1) The method for manufacturing a base material for a semiconductor device according to claim 1, which solves the first problem, includes a silicon oxide film forming step of forming a silicon oxide film on a surface layer portion of a silicon-containing base material, and the silicon oxide An a-Si layer forming step of forming an amorphous silicon layer on the film; and heating the amorphous silicon layer at a temperature of 400 ° C. or higher and lower than the melting point of silicon under an ultrahigh vacuum on the silicon oxide film And a Si nanocluster forming step of forming a plurality of dot-like silicon nanoclusters.

  Here, the silicon content in the silicon-containing base material means that it may be a pure silicon base material or may contain other elements other than silicon as necessary or unavoidably.

  In addition, the nanocluster in the silicon nanocluster refers to a granular lump having a predetermined size (average particle size of about 10 nm or less), and the internal structure is not limited, and includes a crystalline structure or an amorphous structure. .

  In this semiconductor element substrate manufacturing method, a silicon oxide film is first formed on the surface layer portion of a silicon-containing substrate, and then an amorphous silicon layer is formed on the silicon oxide film. Then, the amorphous silicon layer is heat-treated at a temperature of 400 ° C. or higher and lower than the melting point of silicon under ultra-high vacuum to form a plurality of dot-like silicon nanoclusters on the silicon oxide film. When the amorphous silicon layer thus formed on the silicon oxide film is heat-treated under an ultrahigh vacuum, silicon atoms in the amorphous silicon layer are aggregated by surface migration to form dot-like silicon nanoclusters. If the heat treatment condition is not ultra-high vacuum, the surface of the amorphous silicon layer is oxidized and a silicon oxide film is formed on the surface layer of the amorphous silicon layer. This silicon oxide film inhibits surface migration of silicon atoms. Therefore, aggregation of silicon atoms in the amorphous silicon layer is prevented, and silicon nanoclusters are not formed. In this respect, in the manufacturing method according to claim 1, since the heat treatment is performed in an ultra-high vacuum atmosphere, the surface of the amorphous silicon layer is not oxidized, and the agglomeration of the silicon atoms by surface migration is favorably performed. It is possible to reduce the average particle size and particle size variation of the silicon nanoclusters and to effectively increase the density of the silicon nanoclusters. Note that when a polycrystalline silicon layer, not an amorphous silicon layer, is heat-treated under an ultrahigh vacuum, the presence of crystal grain boundaries inhibits the diffusion of silicon atoms, resulting in a variation in the particle size of the formed dot-like silicon nanoclusters. It is considered that the density variation due to and part is likely to occur, and as a result, it is difficult to increase the density.

  Therefore, according to the manufacturing method of claim 1, the simple dry process of heat-treating the amorphous silicon layer under an ultra-high vacuum suppresses the particle size variation in the dot-like silicon nanoclusters, and further increases the particle size. It is possible to reduce the size and increase the number density.

  Further, the semiconductor element substrate according to claim 1 thus obtained can be suitably used for, for example, a semiconductor dot memory, and a significant improvement in memory characteristics can be expected.

In a preferred aspect, in the a-Si layer forming step, the film thickness of the amorphous silicon layer is made less than 1.0 nm. By reducing the film thickness of the amorphous silicon layer formed on the silicon oxide film to less than 1.0 nm, it is possible to reduce the average particle size, narrow the particle size variation, and increase the number density in the formed silicon nanoclusters. Therefore, if an amorphous silicon layer having a film thickness of less than 1.0 nm is heat-treated at a predetermined vacuum state and a predetermined temperature, the average particle diameter is less than 7 nm and the number density is 2.0 × 10 ¹² / Silicon nanoclusters having a size of cm ² or more and a particle size variation of 20% or less can be obtained.

The base material for a semiconductor device according to claim 3, wherein the base material includes a silicon-containing base material having a silicon oxide film on a surface portion, and a plurality of dot-like silicon nanoclusters formed on the silicon oxide film. The substrate is characterized in that the silicon nanocluster has an average particle size of 5.5 nm or less, a number density of 2.7 × 10 ¹² / cm ² or more, and a particle size variation of 15% or less. It is.

In this substrate for a semiconductor element, the average particle size is 5.5 nm or less, the number density is 2.7 × 10 ¹² / cm ² or more, and the particle size variation is 15% or less. Reduction of the average particle size, narrowing of the particle size variation, and high number density are effectively achieved. For this reason, this base material for a semiconductor element can be suitably used for, for example, a semiconductor dot memory, and a significant improvement in memory characteristics can be expected.

  (2) The method for manufacturing a semiconductor element substrate according to claim 4 for solving the second problem includes a silicon oxide film forming step of forming a silicon oxide film on a surface layer portion of a silicon-containing substrate, and the silicon oxide A-Si layer forming step of forming an amorphous silicon layer on the film, and Si nanocluster forming step of forming a plurality of dot-shaped silicon nanoclusters on the silicon oxide film by at least heat-treating the amorphous silicon layer And a surface of the silicon nanocluster excluding the interface with the silicon oxide film is subjected to plasma nitriding in a temperature range of room temperature to 1000 ° C., thereby forming a plasma silicon nitride thin film on a surface layer portion of the surface And a forming step.

  Here, the silicon content in the silicon-containing base material means that it may be a pure silicon base material or may contain other elements other than silicon as necessary or unavoidably.

  In addition, the nanocluster in the silicon nanocluster refers to a granular lump having a predetermined size (average particle size of about 10 nm or less), and the internal structure is not limited, and includes a crystalline structure or an amorphous structure. .

  In this method of manufacturing a substrate for a semiconductor element, at least an amorphous silicon layer formed on a silicon oxide film is heated to form a plurality of dot-shaped silicon nanoclusters on the silicon oxide film, and then silicon nanoclusters are formed. A plasma silicon nitride thin film is formed on the surface layer of the surface by subjecting the surface excluding the interface with the silicon oxide film to plasma nitriding treatment in the temperature range of room temperature to 1000 ° C.

  By utilizing the plasma nitriding treatment in this manner, nitrogen radicals having high internal energy and energetically active can be used for nitriding silicon nanoclusters. Therefore, in a wide temperature range including a low temperature of room temperature to 1000 ° C., it is short. An extremely thin nitride film can be formed in time. According to such low-temperature nitridation, since nitrogen hardly diffuses into the silicon nanocluster, only the surface portion of the silicon nanocluster is nitrided. For this reason, an ultrathin (thickness of several atomic layers) plasma silicon nitride thin film of, for example, 1 nm or less can be formed on the surface portion of the silicon nanocluster. Moreover, in the plasma silicon nitride thin film formed in this way, the nitrogen concentration in the film is increased by the thickness of the thin film, so that the stoichiometric composition (Si: N = 3: 4) can be obtained. . For this reason, in this plasma silicon nitride thin film, the antioxidant performance is not deteriorated due to nitrogen deficiency, and sufficient antioxidant performance can be exhibited.

  Therefore, according to the method of the present invention using the plasma nitriding treatment, it is possible to exhibit complete antioxidation performance even during thermal oxidation performed at a high temperature of about 1000 ° C., for example, while having an extremely thin film thickness of 1 nm or less. A plasma silicon nitride thin film can be formed. Moreover, in the silicon nanocluster in which the plasma silicon nitride thin film is formed on the surface layer portion, since the film thickness of the plasma silicon nitride thin film is 1 nm or less, the size of the silicon portion is greatly reduced from the size of the original silicon nanocluster. Not done.

  Therefore, even if the silicon nanocluster has an average particle size of about 5 to 6 nm, the silicon nanocluster is oxidized by silicon without greatly reducing the size of the silicon portion in the silicon nanocluster from the size of the original silicon nanocluster. It becomes possible to embed in the film.

  That is, in this method of manufacturing a substrate for a semiconductor device, after the SiN thin film formation step, an upper amorphous silicon layer is formed on the silicon oxide film so as to bury the silicon nanoclusters on which the plasma silicon nitride thin film is formed. An upper a-Si layer forming step to be formed, and an upper silicon oxide film on the silicon oxide film so as to bury the silicon nanocluster in which the plasma silicon nitride thin film is formed by oxidizing the upper amorphous silicon layer By sequentially performing the upper Si oxide film forming step of forming the upper silicon oxide film, even if the upper Si oxide film forming step is thermally oxidized at a high temperature of about 1000 ° C., for example, the average particle size is about 5 to 6 nm or less. Size of silicon part in silicon nanoclusters from the size of original silicon nanoclusters It can be embedded in the listening reduced upper silicon oxide film without causing become.

As described above, according to the manufacturing method of claim 4 or 5, the silicon nanoclusters are placed in the upper silicon oxide film without greatly reducing the size of the silicon portion in the silicon nanoclusters from the size of the original silicon nanoclusters. Can be embedded. For this reason, at the stage of forming dot-shaped silicon nanoclusters from the amorphous silicon layer, by forming silicon nanoclusters of a desired size, silicon nanoclusters having a silicon portion of a size not greatly reduced from the size are formed. Since a semiconductor element substrate embedded in the upper silicon oxide film can be obtained, if this is applied to, for example, a semiconductor dot memory, a semiconductor dot memory having desired memory characteristics can be obtained. Further, if the semiconductor element substrate according to claims 1 to 3 is applied to this manufacturing method, the average particle size is 5.5 nm or less, the number density is 2.7 × 10 ¹² / cm ² or more, and the particle size variation. It is possible to obtain a substrate for a semiconductor element having a silicon nanoclass of 15% or less embedded in the upper oxide film, and if this is applied to, for example, a semiconductor dot memory, a significant improvement in memory characteristics can be expected.

  Further, when silicon nanoclusters are embedded in the antioxidant film in order to prevent oxidation of the silicon nanoclusters during thermal oxidation, there is a problem of increasing the size of the device by increasing the thickness as described above. In this respect, in the manufacturing method according to claim 4 or 5, since only a plasma silicon nitride thin film as an antioxidant film is formed on the surface layer portion of the silicon nanocluster, there is no such problem.

  The base material for a semiconductor device according to claim 6, wherein the base material includes a silicon-containing base material having a silicon oxide film on a surface layer portion, and a plurality of dot-like silicon nanoclusters formed on the silicon oxide film. The silicon nanocluster has a plasma silicon nitride thin film having a thickness of 1 nm or less formed by plasma nitriding treatment on a surface layer portion excluding an interface with the silicon oxide film. It is a feature.

  In a preferred embodiment, the substrate for a semiconductor element further includes an upper silicon oxide film formed on the silicon oxide film so as to bury the silicon nanoclusters.

  In the substrate for a semiconductor element according to claim 6 or 7, since the plasma silicon nitride thin film is formed on the surface layer portion excluding the interface with the silicon oxide film of the silicon nanocluster, the silicon portion in the silicon nanocluster The silicon nanoclusters can be embedded in the upper silicon oxide film without greatly reducing the size of the original silicon nanoclusters. For this reason, by forming dot-shaped silicon nanoclusters with a desired size, a silicon nanocluster having a silicon portion whose size is not greatly reduced from the size is embedded in the upper silicon oxide film. Therefore, if this is applied to, for example, a semiconductor dot memory, a semiconductor dot memory having desired memory characteristics can be obtained.

  (1) The method for producing a semiconductor element substrate according to claim 1 or 2 comprises a Si oxide film forming step, an a-Si layer forming step, and a Si nanocluster forming step.

  In the Si oxide film forming step, a silicon oxide film is formed on the surface layer portion of the silicon-containing base material. The method for forming the silicon oxide film is not particularly limited. For example, by performing a known thermal oxidation process in which the silicon-containing substrate is heated to a predetermined temperature in an oxygen-containing atmosphere having a predetermined oxygen concentration, A silicon oxide film having a predetermined thickness can be formed on the surface layer portion. The conditions during the thermal oxidation treatment are not particularly limited, and can be appropriately set according to the thickness of the silicon oxide film to be formed and the relationship with the peripheral process. For example, when the film thickness of the silicon oxide film is about 1 to 5 nm, the oxygen concentration in the oxygen-containing atmosphere is about 15 to 25%, and the temperature and time during the thermal oxidation treatment are about 900 to 1100 ° C. and 10 to 30 seconds. Can be about.

  As described above, the silicon-containing base material may be a pure silicon base material, or may contain other elements other than silicon as necessary or inevitably. For example, a p-type silicon substrate or n A type silicon substrate can be used.

In the a-Si layer forming step, an amorphous silicon layer is formed on the silicon oxide film. The method for forming the amorphous silicon layer is not particularly limited, and for example, an electron gun vapor deposition method using a known molecular beam vapor deposition apparatus can be used. The conditions of the electron gun vapor deposition method are not particularly limited, and can be set as appropriate according to the thickness of the amorphous silicon layer to be formed and the peripheral process. For example, when the film thickness of the amorphous silicon layer is about 0.1 to 1.0 nm, the base vacuum degree of the deposition chamber is about 1 × 10 ⁻⁶ to 1 × 10 ⁻¹¹ Torr, and the temperature is about 10 to 40 ° C. It can be.

Here, the film thickness of the amorphous silicon layer affects the average particle diameter, the particle diameter variation, the number density, and the density variation due to the site in dot-like silicon nanoclusters formed from the amorphous silicon layer. In other words, if the amorphous silicon layer is too thick, the silicon nanoclusters initially formed by the aggregation of silicon atoms in the Si nanocluster formation process will increase, so that adjacent silicon nanoclusters will overlap and eventually form The particle size, particle size variation, and density variation of the silicon nanoclusters to be produced increase, and the number density also decreases. Therefore, the thickness of the amorphous silicon layer is preferably less than 1.0 nm, more preferably less than 0.7 nm, and particularly preferably less than 0.3 nm. When the film thickness of the amorphous silicon layer is less than 1.0 nm, silicon nanoclusters having an average particle size of 9 nm or less, a number density of 1 × 10 ¹² / cm ² or more, and a particle size variation of 30% or less can be formed. When it is less than 7 nm, silicon nanoclusters having an average particle size of 6 nm or less, a number density of 2 × 10 ¹² / cm ² or more, and a particle size variation of 20% or less can be formed, and the film thickness of the amorphous silicon layer is less than 0.3 nm In this case, silicon nanoclusters having an average particle size of 5 nm or less, a number density of 3 × 10 ¹² / cm ² or more, and a particle size variation of 15% or less can be formed. On the other hand, if the film thickness of the amorphous silicon layer is too thin, it is difficult to form silicon nanoclusters from the amorphous silicon layer. Therefore, the film thickness of the amorphous silicon layer is preferably 0.05 nm or more.

In the Si nanocluster formation step, the amorphous silicon layer is formed at 400 ° C. under an ultrahigh vacuum, preferably 10 ⁻⁶ to 10 ⁻¹¹ Torr, more preferably 10 ⁻⁸ to 10 ⁻¹¹ Torr. A plurality of dot-shaped silicon nanoclusters are formed on the silicon oxide film by heat treatment at a temperature lower than the melting point of silicon.

If the degree of vacuum is lower than 10 ⁻⁶ Torr, the surface of the amorphous silicon layer is oxidized during the heat treatment, and the surface migration of silicon atoms is hindered by the oxide film, which may prevent the aggregation of silicon atoms in the amorphous silicon layer. Then, it becomes difficult to form silicon nanoclusters. On the other hand, when the degree of vacuum is higher than 10 ⁻¹¹ Torr, it is difficult to stably control the degree of vacuum.

  When the heating temperature during the heat treatment is lower than 400 ° C., surface migration of silicon atoms is hindered, and silicon atoms are less likely to aggregate, making it difficult to increase the number density of silicon nanoclusters. On the other hand, when the melting point of silicon (1415 ° C.) or higher, since silicon is liquefied, granular formation due to aggregation does not occur. If the heating temperature is in the range of 400 ° C. or higher and lower than the melting point of silicon, the particle size, particle size variation, and number density of silicon nanoclusters hardly depend on the heating temperature. The heating time during the heat treatment has some influence on the particle size, particle size variation, number density, and shape of the silicon nanoclusters, and is preferably about 1 to 5 minutes. When the heating time is shorter than 1 minute, the surface migration of silicon atoms does not occur sufficiently, the silicon atoms are difficult to aggregate, and it is difficult to make the shape of the silicon nanoclusters uniform. On the other hand, even when the heating time is longer than 5 minutes, the particle size, particle size variation, number density, and shape of the silicon nanoclusters no longer change.

  In this way, it is possible to reduce the particle size variation in the dot-like silicon nanoclusters and to further reduce the particle size and increase the number density by a simple dry process in which heat treatment is performed under an ultrahigh vacuum.

Accordingly, a silicon element substrate comprising a silicon-containing substrate having a silicon oxide film on a surface portion and a plurality of dot-shaped silicon nanoclusters formed on the silicon oxide film, wherein the silicon nanocluster A substrate for a semiconductor element having an average particle size of 5.5 nm or less, a number density of 2.7 × 10 ¹² / cm ² or more, and a particle size variation of 15% or less can be produced.

  In addition, the substrate for a semiconductor element thus obtained is suitable for a semiconductor dot memory, for example, by forming an upper silicon oxide film (control oxide film) on the silicon oxide film so as to bury the silicon nanoclusters. The memory characteristics can be greatly improved.

  The method of forming the upper silicon oxide film at this time is not particularly limited. For example, an upper amorphous silicon layer is formed by a known electron gun vapor deposition method, and the upper amorphous silicon layer is oxidized by thermal oxidation or the like to be oxidized. A film may be used. The thickness of the upper amorphous silicon layer can be about 1 to 30 nm, and the thickness of the upper silicon oxide film can be about 2 to 60 nm. Then, by forming a gate electrode on the upper silicon oxide film as the control oxide film, a floating gate type nanodot memory can be obtained.

  6. The semiconductor device according to claim 5, wherein when the upper silicon oxide film is formed, the silicon nanoclusters are effectively prevented from being reduced in size or lost due to oxidation during the thermal oxidation treatment of the upper amorphous silicon layer. By applying a substrate manufacturing method and performing plasma nitriding treatment on the surface of the silicon nanocluster excluding the interface with the silicon oxide film, a plasma silicon nitride thin film as an anti-oxidation thin film is formed on the surface layer of the surface. It is preferable to form the upper amorphous silicon layer and to thermally oxidize the upper amorphous silicon layer after the formation. When the upper amorphous silicon layer is formed and the upper amorphous silicon layer is thermally oxidized without forming the silicon nitride thin film as the oxidation-preventing thin film, the silicon nanoclusters at the time of the thermal oxidation process are In order to prevent size reduction or disappearance due to oxidation, it is necessary to strictly control the thermal oxidation treatment conditions.

  This base material for a semiconductor element can be expected to be applied to a device such as a visible light emitting element in addition to a semiconductor dot memory.

  (2) A method for producing a semiconductor element substrate according to claim 4 comprises a Si oxide film forming step, an a-Si layer forming step, a Si nanocluster forming step, and a SiN thin film forming step.

  In the Si oxide film forming step, a silicon oxide film is formed on the surface layer portion of the silicon-containing base material. The method for forming the silicon oxide film is not particularly limited. For example, by performing a known thermal oxidation process in which the silicon-containing substrate is heated to a predetermined temperature in an oxygen-containing atmosphere having a predetermined oxygen concentration, A silicon oxide film having a predetermined thickness can be formed on the surface layer portion. The conditions during the thermal oxidation treatment are not particularly limited, and can be set as appropriate according to the thickness of the silicon oxide film to be formed and the peripheral process. For example, when the thickness of the silicon oxide film is about 1 to 20 nm, the oxygen concentration in the oxygen-containing atmosphere is about 1 to 100%, the temperature and time during the thermal oxidation process are about 700 to 1100 ° C., and 1 second to 180. It can be about minutes.

  As described above, the silicon-containing base material may be a pure silicon base material, or may contain other elements other than silicon as necessary or inevitably. For example, a p-type silicon substrate or n A type silicon substrate can be used.

In the a-Si layer forming step, an amorphous silicon layer is formed on the silicon oxide film. The method for forming the amorphous silicon layer is not particularly limited, and for example, an electron gun vapor deposition method using a known molecular beam vapor deposition apparatus can be used. The conditions of the electron gun vapor deposition method are not particularly limited, and can be set as appropriate according to the thickness of the amorphous silicon layer to be formed and the peripheral process. For example, when the film thickness of the amorphous silicon layer is about 0.1 to 1.0 nm, the base vacuum degree of the deposition chamber is about 1 × 10 ⁻⁶ to 1 × 10 ⁻¹¹ Torr, and the temperature is about 10 to 40 ° C. It can be.

  Here, the film thickness of the amorphous silicon layer affects the average particle diameter, the particle diameter variation, the number density, and the density variation due to the site in dot-like silicon nanoclusters formed from the amorphous silicon layer. In other words, if the amorphous silicon layer is too thick, the silicon nanoclusters initially formed by the aggregation of silicon atoms in the Si nanocluster formation process will increase, so that adjacent silicon nanoclusters will overlap and eventually form The particle size, particle size variation, and density variation of the silicon nanoclusters to be produced increase, and the number density also decreases.

  Therefore, the thickness of the amorphous silicon layer is preferably less than 1.0 nm, more preferably less than 0.7 nm, and particularly preferably less than 0.3 nm. On the other hand, if the film thickness of the amorphous silicon layer is too thin, it is difficult to form silicon nanoclusters from the amorphous silicon layer. Therefore, the film thickness of the amorphous silicon layer is preferably 0.05 nm or more.

  In the Si nanocluster formation step, the amorphous silicon layer is at least heat-treated to form a plurality of dot-like silicon nanoclusters on the silicon oxide film. There is no particular limitation on the method for forming the dot-shaped silicon nanocluster by at least heat-treating the amorphous silicon layer. However, when this substrate for a semiconductor element is applied to, for example, a semiconductor dot memory, the average particle size of silicon nanoclusters is preferably 10 nm or less, more preferably 7 nm or less, from the viewpoint of improving memory characteristics. It is particularly preferable that the thickness be 5 nm or less.

For example, in a state where the silicon-containing substrate is heated to a temperature of about 300 to 800 ° C. under a pressure of about 1 × 10 ⁻⁴ to 1 × 10 ⁻³ Torr, a raw material gas (disilane gas or Dot-like silicon nanoclusters can be formed by irradiating a silane-based gas such as trisilane gas) at a flow rate of about 0.5 to 10 ml / min for a time of about 1 second to 30 minutes. When forming dot-like silicon nanoclusters using this gas irradiation, when the film thickness of the amorphous silicon layer is 0.3 nm or less, the average particle size is 8.9 nm or less, and the number density is 1.4 × 10 ¹² / cm ² or more, it is possible to form the following silicon nanoclusters particle size variation ± 1.5 nm, the average particle size 5.6nm or less when a thickness of the amorphous silicon layer is 0.1nm or less, the number density 2.6 Silicon nanoclusters with × 10 ¹² / cm ² or more and particle size variations of ± 0.9 nm or less can be formed.

In addition, by using the manufacturing method according to claim 1, the amorphous silicon layer is heated at a temperature of 400 ° C. or higher and lower than the melting point of silicon for about 1 to 5 minutes under ultrahigh vacuum, thereby forming a dot-like shape. Silicon nanoclusters can also be formed. In the case of forming dot-like silicon nanoclusters by using the heat treatment under ultra-vacuum, when the film thickness of the amorphous silicon layer is less than 1.0 nm, the average particle diameter is 9 nm or less and the number density is 1 × 10 ^12. / Cm ² or more and silicon nanoclusters having a particle size variation of 30% or less can be formed. When the size is less than 0.7 nm, the average particle size is 6 nm or less, the number density is 2 × 10 ¹² / cm ² or more, and the particle size variation is 20 % Of silicon nanoclusters can be formed. When the film thickness of the amorphous silicon layer is less than 0.3 nm, the average particle size is 5 nm or less, the number density is 3 × 10 ¹² / cm ² or more, and the particle size variation is 15% or less. Of silicon nanoclusters can be formed.

  In the SiN thin film forming step, plasma is applied to the surface of the silicon nanoclusters excluding the interface with the silicon oxide film in a temperature range of room temperature to 1000 ° C. (where room temperature is usually 10 to 40 ° C.). By performing nitriding treatment, a plasma silicon nitride thin film is formed on the surface layer portion of the surface. In the plasma nitriding process, nitriding is performed using energetically active nitrogen radicals, so that a nitride film can be formed at a lower temperature than in the thermal nitriding process. According to low temperature nitridation using plasma nitriding treatment, it is possible to reduce the thickness of the plasma silicon nitride thin film, and it is possible to form an extremely thin plasma silicon nitride thin film of, for example, 1 nm or less. Moreover, the plasma silicon nitride thin film thus formed has a stoichiometric composition (Si: N = 3: 4) or a composition close thereto, and as a result, the antioxidant performance does not deteriorate due to nitrogen deficiency, It is possible to exhibit sufficient antioxidant performance.

  Accordingly, a silicon element substrate comprising a silicon-containing substrate having a silicon oxide film on a surface portion and a plurality of dot-shaped silicon nanoclusters formed on the silicon oxide film, wherein the silicon nanocluster Manufacturing a substrate for a semiconductor device having a plasma silicon nitride thin film having a thickness of 1 nm or less formed by plasma nitriding treatment on a surface layer portion of a surface excluding an interface with the silicon oxide film it can.

  Then, an upper a-Si layer forming step of forming an upper amorphous silicon layer on the silicon oxide film so as to embed the silicon nanoclusters on which the plasma silicon nitride thin film is formed with respect to the semiconductor element substrate. And an upper Si oxide film forming step of forming an upper silicon oxide film on the silicon oxide film so as to bury the silicon nanoclusters on which the plasma silicon nitride thin film is formed by oxidizing the upper amorphous silicon layer By sequentially performing the above, it is possible to manufacture a substrate for a semiconductor device further including an upper silicon oxide film formed on the silicon oxide film so as to bury the silicon nanoclusters. And the base material for semiconductor elements obtained in this way can be utilized suitably, for example for a semiconductor dot memory, and the memory characteristic can be improved significantly.

  This base material for a semiconductor element can be expected to be applied to a device such as a visible light emitting element in addition to a semiconductor dot memory.

  Here, if the temperature at the time of plasma nitriding is lower than room temperature, nitriding becomes insufficient. On the other hand, when the temperature is higher than 1000 ° C., the diffusion of nitrogen into the silicon nanocluster is promoted. The size of the silicon part in the cluster is greatly reduced.

Other conditions of this plasma nitriding treatment can be, for example, nitrogen gas partial pressure: 1 × 10 ⁻⁶ Torr to about atmospheric pressure, RF power supply power: 50 to 1000 w, and processing time: about 1 second to 20 minutes.

  Here, if the thickness of the plasma silicon nitride thin film is too thick, the size of the silicon portion in the silicon nanocluster is greatly reduced from the size of the original silicon nanocluster due to the consumption of silicon accompanying nitriding. Therefore, the thickness of the silicon nitride thin film is preferably 1 nm or less. On the other hand, if the silicon nitride thin film is too thin, it cannot function as an antioxidant layer, so the lower limit is preferably about 0.05 nm. The film thickness of the plasma silicon nitride thin film can be adjusted by the temperature at the time of the plasma nitriding process, the nitrogen gas partial pressure, the RF power supply power, and the processing time.

  Further, in this SiN thin film forming step, plasma is applied to a portion other than the surface of the silicon nanocluster except the interface with the silicon oxide film, that is, the surface of the silicon oxide film exposed without forming the silicon nanocluster. Nitriding treatment may be performed. By doing so, it is possible to reliably prevent the silicon substrate from being thermally oxidized in the upper silicon oxide film forming step.

  Thus, by utilizing the plasma nitriding treatment, the thickness of the silicon portion in the silicon nanocluster is not greatly reduced from the size of the original silicon nanocluster, and the film thickness is extremely thin, but there is no nitrogen deficiency and sufficient oxidation. A plasma silicon nitride thin film capable of exhibiting the prevention performance can be formed. For this reason, even if it is a silicon nanocluster with an average particle diameter of about 5-6 nm or less, the silicon nanocluster is reduced without greatly reducing the size of the silicon portion in the silicon nanocluster from the size of the original silicon nanocluster. It can be embedded in the silicon oxide film.

In the upper a-Si layer forming step, an upper amorphous silicon layer is formed on the silicon oxide film so as to bury the silicon nanoclusters. The method for forming the upper amorphous silicon layer is not particularly limited, and for example, an electron gun vapor deposition method using a known molecular beam vapor deposition apparatus can be used. The conditions of the electron gun vapor deposition method are not particularly limited, and can be set as appropriate according to the film thickness of the upper amorphous silicon layer to be formed and the peripheral process. For example, when the thickness of the upper amorphous silicon layer is about 1 to 30 nm, the base vacuum degree of the deposition chamber can be about 10 ⁻⁶ to 10 ⁻¹¹ Torr and the temperature can be about 10 to 40 ° C.

  In the upper Si oxide film forming step, the upper amorphous silicon layer is oxidized to form an upper silicon oxide film on the silicon oxide film so as to bury the silicon nanoclusters. The method for forming the upper silicon oxide film is not particularly limited. For example, a known thermal oxidation process is performed by heating to a predetermined temperature in an oxygen-containing atmosphere having a predetermined oxygen concentration, whereby an upper silicon oxide film having a predetermined thickness is formed. Can be formed. The conditions during the thermal oxidation treatment are not particularly limited, and can be set as appropriate according to the thickness of the upper amorphous silicon layer and the peripheral process. For example, when an upper silicon oxide film with a film thickness of about 2 to 60 nm is formed from an upper amorphous silicon layer with a film thickness of about 1 to 30 nm, the oxygen concentration in the oxygen-containing atmosphere is about 1 to 100%, and the temperature during the thermal oxidation process And time can be made into about 700-1100 degreeC and about 1 second-180 minutes.

  Examples of the present invention will be specifically described below.

Example 1
This embodiment embodies the invention according to claim 1, 2 or 3. The base material for a semiconductor element according to the present embodiment can be suitably used for, for example, a nanodot memory as a semiconductor dot memory.

As shown in FIG. 3, the semiconductor element substrate has a silicon-containing substrate 1 having a silicon oxide film (SiO ₂ film) 2 on the surface layer, and the silicon oxide film 2. And a plurality of dot-like silicon nanoclusters 4 formed on the substrate. The silicon nanocluster 4 has an average particle size of 5.5 nm, a number density of 3.2 × 10 ¹² / cm ² , and a particle size variation of ± 0.8 nm (15% or less).

  This base material for a semiconductor element was manufactured as follows.

<Si oxide film formation process>
First, a p-type silicon substrate was prepared as the silicon-containing base material 1.

  Then, a silicon oxide film 2 having a film thickness of 2.0 nm was formed on the surface layer portion of the silicon-containing substrate 1 by subjecting the silicon-containing substrate 1 to thermal oxidation treatment under the following conditions (FIG. 1). reference).

Atmosphere: Oxygen concentration 20% (diluted with N ₂ )
Heating temperature: 1000 ° C
Heating time: 15 seconds <a-Si layer forming step>
Next, by using a molecular beam deposition apparatus (trade name “MiniBe”, manufactured by Epiquest Co., Ltd.) (not shown), electron gun deposition is performed on the silicon oxide film 2 of the silicon-containing substrate 1 under the following conditions. Then, an amorphous silicon layer (a-Si layer) 3 having a thickness of 0.3 nm was formed on the silicon oxide film 2 (see FIG. 2).

Base vacuum degree: 2.0 × 10 ⁻⁹ Torr or less Substrate temperature: Room temperature (25 ° C.)
<Si nanocluster formation process>
Finally, a plurality of dot-like silicon nanoclusters 4 are formed on the silicon oxide film 2 by subjecting the amorphous silicon layer 3 to a heat treatment under ultrahigh vacuum under the following conditions (see FIG. 3). .

Heat treatment pressure: 2.0 × 10 ⁻⁸ Torr
Heat treatment temperature: 400 ° C
Heat treatment time: 2 minutes FIG. 4 shows an SEM (scanning electron microscope) photograph of the silicon nanocluster 4 of the base material for a semiconductor element thus obtained. According to the observation result of this SEM photograph, the obtained silicon nanocluster 4 has an average particle size of 4.6 nm, a number density of 3.1 × 10 ¹² / cm ² , and a particle size variation of ± 0.4 nm (9%). In addition, it was confirmed that the silicon nanoclusters 4 having a substantially uniform size were uniformly distributed.

  Moreover, as a result of observing the silicon nanocluster 4 with a transmission electron microscope, the crystal lattice of the silicon nanocluster 4 was observed, and it was confirmed to be a crystal.

(Relationship between heat treatment temperature and average particle size and number density)
A substrate for a semiconductor element was manufactured in the same manner as in Example 1 except that the heat treatment temperature in the Si nanocluster formation step was changed to 520 ° C., 570 ° C., and 630 ° C.

  About the silicon nanocluster 4 of the obtained base material for semiconductor elements, SEM photograph observation was carried out similarly to the said Example 1, and the average particle diameter and number density were calculated | required. The results are shown in FIGS. 5 and 6 together with the results of Example 1.

5 and 6, when the heat treatment temperature in the Si nanocluster formation step is 520 ° C., the average particle size is 5.3 nm, the number density is 2.8 × 10 ¹² / cm ² , and almost uniform. It was confirmed that the silicon nanoclusters 4 having a size were uniformly distributed. The particle size variation of the silicon nanoclusters 4 was ± 0.5 nm (9% or less).

Further, when the heat treatment temperature in the Si nanocluster formation step is 570 ° C., the average particle size is 4.9 nm, the number density is 3.1 × 10 ¹² / cm ² , and the silicon nanoparticle having a substantially uniform size. It was confirmed that the clusters 4 were uniformly distributed. In addition, the particle size variation of the silicon nanocluster 4 was ± 0.6 nm (14% or less).

Further, when the heat treatment temperature in the Si nanocluster formation step is 630 ° C., the average particle size is 4.4 nm, the number density is 3.6 × 10 ¹² / cm ² , and the silicon nanoparticle having a substantially uniform size is used. It was confirmed that the clusters 4 were uniformly distributed. In addition, the particle size variation of the silicon nanocluster 4 was ± 0.3 nm (7% or less).

From these results, if the heat treatment temperature in the Si nanocluster formation step is 400 ° C. or higher, the average particle size of the silicon nanoclusters 4 is 5.3 nm or less, and the number density is 2.8 × 10 ¹² / cm ² or more. I understand that

  It can also be seen that the average particle diameter and number density of the silicon nanoclusters 4 hardly depend on the heat treatment temperature if the heat treatment temperature in the Si nanocluster formation step is 400 ° C. or higher.

(Relationship between film thickness of a-Si layer and average particle size, number density and particle size variation)
The same Si oxide film forming step as in Example 1 was performed, and five silicon-containing base materials 2 similar to those in Example 1 were prepared. Each silicon-containing substrate 2 is subjected to the same a-Si layer forming step as in Example 1 except that the film thickness of the amorphous silicon layer is variously changed. On the silicon oxide film 1, amorphous silicon layers 3 having various thicknesses of 0.1 nm, 0.3 nm, 0.5 nm, 0.7 nm, and 1.0 nm were formed. Finally, in the Si nanocluster formation step, each amorphous silicon layer 3 is subjected to a heat treatment under ultrahigh vacuum under the following conditions to thereby form a plurality of dot-like silicon on each silicon oxide film 1. Each of the nanoclusters 4 was formed, and the sample no. 1-5.

Heat treatment pressure: 2.0 × 10 ^-9 Torr
Heat treatment temperature: 570 ° C
Heat treatment time: 2 minutes For comparison, in the Si nanocluster formation process, instead of performing heat treatment under ultra-high vacuum, the above sample was subjected to silane gas (Si ₂ H ₆ ) irradiation under the following conditions: No. 1 to 4, silicon nanoclusters were formed, 6-9.

Si ₂ H ₆ flow rate: 21 ml / min
Growth pressure: 4 × 10 ⁻⁴ Torr
Growth temperature: 570 ° C
Growth time: 2 minutes Sample No. The silicon nanoclusters 1 to 9 were observed with an SEM photograph in the same manner as in Example 1 to determine the average particle size, number density, and particle size variation, and the particle size histogram. These results are shown in FIGS. 16 and 17 show the relationship between the film thickness of the amorphous silicon layer, the average particle diameter, and the number density, which summarizes the results.

As can be seen from FIGS. 7 to 17 and Table 1, when silicon nanoclusters are formed by heat treatment under ultra-high vacuum, the average particle size and particle size variation of silicon nanoclusters can be effectively reduced. And the number density can be effectively improved. If the film thickness of the amorphous silicon layer is 0.5 nm or less, the average particle size of the silicon nanoclusters is 5.5 nm or less, the number density is 2.9 × 10 ¹² / cm ² or more, and the particle size variation is 0. The average particle size and the particle size variation of the silicon nanoclusters are further decreased and the number density tends to be further improved as the thickness of the amorphous silicon layer is reduced to 8 nm or less (15% or less). Recognize.

In contrast, when silicon nanoclusters are formed by silane gas irradiation, the average particle diameter of silicon nanoclusters is 5.6 nm or more and the number density is even when the amorphous silicon layer is as thin as 0.1 nm. The particle size variation was 0.9 nm or more (16% or more) and 2.6 × 10 ¹² / cm ² or less.

(Example 2)
This embodiment embodies the invention according to claim 4, 5, 6, 7 or 8. The base material for a semiconductor element according to the present embodiment can be suitably used for, for example, a nanodot memory as a semiconductor dot memory.

As shown in FIG. 23, the semiconductor element substrate has a silicon-containing substrate 11 having a silicon oxide film (SiO ₂ film) 12 in the surface layer portion, and the silicon oxide film 12 on the surface. A plurality of dot-like silicon nanoclusters (silicon nanocrystals) 14 formed on the silicon oxide film 12 and an upper silicon oxide film 17 formed on the silicon oxide film 12 so as to bury the silicon nanoclusters 14 are provided.

The silicon nanoclusters 14 have an average particle size of 6.0 nm and a number density of 1.2 × 10 ¹² / cm ² . In addition, the silicon nanocluster 14 has a plasma silicon nitride thin film (plasma SiN thin film) 15 having a thickness of 1 nm or less formed by plasma nitriding on the surface layer portion excluding the interface with the silicon oxide film 12. Note that a plasma silicon nitride thin film 15 a is formed integrally with the plasma silicon nitride thin film 15 on the surface of the upper silicon oxide film 12 except for the interface with the silicon nanoclusters 14.

  This base material for a semiconductor element was manufactured as follows.

<Si oxide film formation process>
First, a p-type silicon substrate was prepared as the silicon-containing base material 11.

  Then, a silicon oxide film 12 having a film thickness of 1.7 nm was formed on the surface layer portion of the silicon-containing base material 11 by subjecting the silicon-containing base material 11 to thermal oxidation treatment under the following conditions (FIG. 18). reference).

Atmosphere: Oxygen concentration 20% (diluted with N ₂ )
Heating temperature: 1000 ° C
Heating time: 15 seconds <a-Si layer forming step>
Next, by using the molecular beam deposition apparatus, electron gun deposition is performed on the silicon oxide film 12 of the silicon-containing base material 11 under the conditions shown below, whereby a film thickness of 0.3 nm is formed on the silicon oxide film 12. An amorphous silicon layer (a-Si layer) 13 was formed (see FIG. 19).

Base vacuum degree: 2.0 × 10 ⁻⁹ Torr or less Substrate temperature: Room temperature (25 ° C.)
<Si nanocluster formation process>
Next, by irradiating the amorphous silicon layer 13 with Si ₂ H ₆ gas under the following conditions, the average particle diameter is 6.0 nm and the number density is 1.2 on the silicon oxide film 12. Dotted silicon nanoclusters (silicon nanocrystals) 14 of × 10 ¹² / cm ² were formed (see FIG. 20).

Si ₂ H ₆ flow rate: 2.1 ml / min
Growth pressure: 4.0 × 10 ⁻⁴ Torr
Growth temperature: 570 ° C
Growth time: 2 minutes <SiN thin film formation process>
Next, plasma nitridation treatment is performed on the surface of the silicon nanocluster 14 excluding the interface with the silicon oxide film 12 and the surface of the silicon oxide film 12 excluding the interface under the conditions shown below. A plasma silicon nitride thin film 15 having a thickness of 1 nm or less was formed on the surface layer portion of the surface of the nanocluster 14, and a plasma silicon nitride thin film 15a was formed on the surface layer portion of the surface of the silicon oxide film 12 (see FIG. 21).

Processing pressure: 1 × 10 ^-3 Torr
Processing time: 30 seconds <Upper a-Si layer forming step>
Next, by using the molecular beam deposition apparatus, electron gun deposition is performed under the following conditions, so that the silicon nanoclusters 14 are embedded on the silicon oxide films 12 (the silicon oxide films 12 and the silicon nanoclusters 14). An upper amorphous silicon layer (upper a-Si layer) 16 having a film thickness of 5 nm was formed on the plasma silicon nitride thin films 15 and 15a formed on the surface layer (see FIG. 22).

Base vacuum degree: 2.0 × 10 ⁻⁹ Torr or less Substrate temperature: Room temperature (25 ° C.)
<Upper Si oxide film formation process>
Finally, the upper amorphous silicon layer 16 is thermally oxidized under the following conditions, and the silicon nanoclusters 14 are embedded on the silicon oxide film 12 (surface layer portions of the silicon oxide film 12 and the silicon nanoclusters 14). An upper silicon oxide film 17 having a film thickness of 12 nm was formed on the plasma silicon nitride thin film 15 formed on (see FIG. 23).

Atmosphere: Oxygen concentration 20% (diluted with N ₂ )
Heating temperature: 1000 ° C
Heating time: 15 seconds (Evaluation)
The silicon nanoclusters 14 after performing the SiN thin film forming step were observed with an SEM (scanning electron microscope) photograph. As a result, the average particle size was 6.0 nm and the number density was 1.2 × 10 ¹² / cm ² . there were.

  Moreover, TEM (transmission electron microscope) photograph observation was performed about the silicon nanocluster 14 after implementing the said SiN thin film formation process, and the silicon nanocluster 14 after implementing the upper Si oxide film formation process. 24, a TEM photograph of the silicon nanocluster 14 after the Si nanocluster formation process and a TEM photograph of the silicon nanocluster 14 after the Si oxide film formation process are embedded in the upper silicon oxide film 17, respectively. Before and after, the average particle diameter and number density of the silicon nanoclusters 14 did not change. Therefore, oxidation of the silicon nanoclusters 14 could be prevented by the plasma silicon nitride thin film 15.

  In addition, as a result of observing this silicon nanocluster 14 with a transmission electron microscope, the crystal lattice of the silicon nanocluster 14 was observed, and it was confirmed that it was a crystal.

It is sectional drawing which shows typically the silicon containing base material which concerns on 1st Example of this invention and has a silicon oxide film in a surface layer part. FIG. 4 is a cross-sectional view schematically showing a state where an amorphous silicon layer is formed on a silicon oxide film according to the first embodiment of the present invention. FIG. 4 is a cross-sectional view schematically showing a state in which dot-like silicon nanoclusters are formed on a silicon oxide film according to the first embodiment of the present invention. It is a SEM (scanning electron microscope) photograph of a silicon nanocluster according to the first embodiment of the present invention. It is a figure which concerns on 1st Example of this invention and shows the relationship between the heat processing temperature in a Si nanocluster formation process, and the average particle diameter of a silicon nanocluster. It is a figure which concerns on 1st Example of this invention and shows the relationship between the heat processing temperature in a Si nanocluster formation process, and the number density of a silicon nanocluster. Sample No. 1 in which the thickness of the amorphous silicon layer was 0.1 nm and the ultra-vacuum heat treatment was performed in the Si nanocluster formation process. It is a figure which shows the histogram of the particle size of 1 silicon nanocluster. Sample No. 1 in which the film thickness of the amorphous silicon layer was 0.3 nm and the ultra-vacuum heat treatment was performed in the Si nanocluster formation process. It is a figure which shows the histogram of the particle size of 2 silicon nanocluster. Sample No. No. 1 was obtained by setting the film thickness of the amorphous silicon layer to 0.5 nm and performing ultra-vacuum heat treatment in the Si nanocluster formation process. FIG. 3 is a diagram showing a histogram of particle diameters of 3 silicon nanoclusters. Sample No. 1 was prepared by setting the film thickness of the amorphous silicon layer to 0.7 nm and performing ultra-vacuum heat treatment in the Si nanocluster formation process. It is a figure which shows the histogram of the particle size of 4 silicon nanoclusters. Sample No. 1 in which the film thickness of the amorphous silicon layer was 1.0 nm and the ultra-vacuum heat treatment was performed in the Si nanocluster formation process. It is a figure which shows the histogram of the particle size of 5 silicon nanoclusters. Sample No. 1 in which the film thickness of the amorphous silicon layer was 0.1 nm and silane gas irradiation was performed in the Si nanocluster formation process. It is a figure which shows the histogram of the particle size of 6 silicon nanoclusters. Sample No. 1 was obtained by setting the film thickness of the amorphous silicon layer to 0.3 nm and performing silane gas irradiation in the Si nanocluster formation process. FIG. 7 is a diagram showing a histogram of particle diameters of 7 silicon nanoclusters. Sample No. 1 was obtained by setting the film thickness of the amorphous silicon layer to 0.5 nm and performing silane gas irradiation in the Si nanocluster formation process. It is a figure which shows the histogram of the particle size of 8 silicon nanoclusters. Sample No. 1 in which the film thickness of the amorphous silicon layer was 0.7 nm and silane gas irradiation was performed in the Si nanocluster formation process. It is a figure which shows the histogram of the particle size of 9 silicon nanoclusters. It is a figure which shows the relationship between the film thickness of an amorphous silicon layer, and the average particle diameter of a silicon nanocluster. It is a figure which shows the relationship between the film thickness of an amorphous silicon layer, and the number density of a silicon nanocluster. It is sectional drawing which concerns on 2nd Example of this invention, and shows typically the silicon containing base material which has a silicon oxide film in a surface layer part. FIG. 6 is a cross-sectional view schematically showing a state where an amorphous silicon layer is formed on a silicon oxide film according to a second embodiment of the present invention. FIG. 6 is a cross-sectional view schematically showing a state in which dot-like silicon nanoclusters are formed on a silicon oxide film according to a second embodiment of the present invention. FIG. 6 is a cross-sectional view schematically showing a state in which a plasma silicon nitride thin film is formed on the surface layer portions of silicon nanoclusters and an upper silicon oxide film according to a second embodiment of the present invention. FIG. 6 is a cross-sectional view schematically showing a state in which an upper amorphous silicon layer is formed on a silicon oxide film so as to embed silicon nanoclusters according to a second embodiment of the present invention. It is sectional drawing which concerns on 2nd Example of this invention, and shows the state which formed the upper silicon oxide film on the silicon oxide film so that a silicon nanocluster might be embedded. It is a TEM (transmission electron microscope) photograph of Si nanocluster after implementing a SiN thin film formation process. It is a TEM (transmission electron microscope) photograph of the silicon nanocluster after implementing an upper Si oxide film formation process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 11 ... Silicon-containing base material 2, 12 ... Silicon oxide film 3, 13 ... Amorphous silicon layer 4, 14 ... Silicon nanocluster 15 ... Plasma silicon nitride thin film 16 ... Upper amorphous silicon layer 17 ... Upper silicon oxide film

Claims (7)

A Si oxide film forming step of forming a silicon oxide film on the surface layer portion of the silicon-containing substrate;
An a-Si layer forming step of forming an amorphous silicon layer on the silicon oxide film;
Si nanocluster formation step of forming a plurality of dot-like silicon nanoclusters on the silicon oxide film by heat-treating the amorphous silicon layer at a temperature of 400 ° C. or higher and lower than the melting point of silicon under an ultrahigh vacuum. A method for producing a base material for a semiconductor element, comprising:   2. The method of manufacturing a substrate for a semiconductor element according to claim 1, wherein in the a-Si layer forming step, the film thickness of the amorphous silicon layer is less than 1.0 nm. A substrate for a semiconductor device comprising a silicon-containing substrate having a silicon oxide film on a surface layer portion, and a plurality of dot-shaped silicon nanoclusters formed on the silicon oxide film,
The silicon nanocluster has a mean particle size of 5.5 nm or less, a number density of 2.7 × 10 ¹² / cm ² or more, and a particle size variation of 15% or less. A Si oxide film forming step of forming a silicon oxide film on the surface layer portion of the silicon-containing substrate;
An a-Si layer forming step of forming an amorphous silicon layer on the silicon oxide film;
Si nanocluster formation step of forming a plurality of dot-like silicon nanoclusters on the silicon oxide film by at least heat-treating the amorphous silicon layer;
A SiN thin film forming step of forming a plasma silicon nitride thin film on a surface layer portion of the surface by subjecting the surface of the silicon nanocluster excluding the interface with the silicon oxide film to a plasma nitriding treatment in a temperature range of room temperature to 1000 ° C. The manufacturing method of the base material for semiconductor elements characterized by the above-mentioned. An upper a-Si layer forming step of forming an upper amorphous silicon layer on the silicon oxide film so as to bury the silicon nanoclusters on which the plasma silicon nitride thin film is formed;
An upper Si oxide film forming step of oxidizing the upper amorphous silicon layer and forming an upper silicon oxide film on the silicon oxide film so as to bury the silicon nanoclusters on which the plasma silicon nitride thin film is formed; The method for producing a substrate for a semiconductor element according to claim 4, further comprising: A substrate for a semiconductor device comprising a silicon-containing substrate having a silicon oxide film on a surface layer portion, and a plurality of dot-shaped silicon nanoclusters formed on the silicon oxide film,
The silicon nanocluster has a plasma silicon nitride thin film with a film thickness of 1 nm or less formed by plasma nitridation on the surface layer portion of the surface excluding the interface with the silicon oxide film. Element substrate.   7. The semiconductor element substrate according to claim 6, further comprising an upper silicon oxide film formed on the silicon oxide film so as to bury the silicon nanoclusters.

Images