JP2006243630A - Driving device, image display device, and television device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce variation in quantity of electrons emitted by respective elements even in case of a voltage drop due to wiring resistance of a row wiring line. <P>SOLUTION: A driving device is equipped with a row driving circuit for supplying a row select signal to a row wiring line selected among a plurality of row wiring lines and a column driving circuit for supplying a modulated signal modulated according to input image data to a plurality of column wiring lines, and has an emulation circuit for generating a 2nd potential distribution simulating a 1st potential distribution in a row wiring direction generated as the row select signal is supplied in the row wiring direction of the column driving circuit, a driving voltage output circuit which outputs a driving voltage corrected based upon the 2nd potential distribution generated as a current generated with the driving voltage supplied to the column driving circuit is supplied to the emulation circuit, and a modulating circuit which generates the modulated signal by using image data and the corrected driving voltage. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to voltage drop correction in a display device.

  Conventionally, two types of electron-emitting devices, a hot cathode device and a cold cathode device, are known. Among these, as the cold cathode element, for example, a surface conduction type emission element (SCE element), a field emission type element (FE type), a metal / insulating layer / metal type emission element (MIM type), and the like are known.

  For example, the surface conduction electron-emitting device has an advantage that a large number of devices can be formed over a large area because the structure is particularly simple and easy to manufacture among the cold cathode devices. Therefore, for example, as disclosed in JP-A-64-31332 (Patent Document 1), a method for arranging and driving a large number of elements has been studied.

  As for the application of surface conduction electron-emitting devices, for example, image forming apparatuses such as image display apparatuses and image recording apparatuses, charged beam sources, and the like have been studied.

  In particular, as an application to an image display device, for example, US Pat. No. 5,066,883 (Patent Document 2), JP-A-2-257551 (Patent Document 3), and JP-A-4-28137. As disclosed in (Patent Document 4), an image display device using a combination of a surface conduction electron-emitting device and a phosphor that emits light when irradiated with electrons has been studied. An image display device using a combination of a surface conduction electron-emitting device and a phosphor is expected to have characteristics superior to those of other conventional image display devices. For example, it can be said that it is superior in that it does not require a backlight and has a wide viewing angle as compared with a liquid crystal display device that has become widespread in recent years.

  A method of driving a large number of FE elements side by side is disclosed, for example, in US Pat. No. 4,904,895 (Patent Document 5). As an example of applying the FE type to an image display device, for example, a flat panel display device reported by R. Meyer et al. Is known [R. Meyer: “Recent Development on Microtips Display at LETI”, Tech. Digest of 4th Int. Vacuum Microelectronics Conf., Nagahama, pp. 6-9 (1991)].

  An example in which a large number of MIM types are arranged and applied to an image display device is disclosed in, for example, Japanese Patent Application Laid-Open No. 3-55738 (Patent Document 6).

  The cold cathode devices having various materials, manufacturing methods, and structures have been studied, including those described in the prior art. Furthermore, there are a multi-electron source in which a large number of cold cathode elements are arranged, and an image display device using this multi-electron source.

  For example, a multi-electron source using an electrical wiring method shown in FIG. 13 has been studied. That is, a multi-electron source in which a large number of cold cathode devices are two-dimensionally arranged and these devices are wired in a matrix as shown in the figure.

  In the figure, 4001 schematically shows a cold cathode element, 4002 indicates a row direction wiring, and 4003 indicates a column direction wiring (simple matrix wiring). The row direction wiring 4002 and the column direction wiring 4003 actually have a finite electrical resistance, but are shown as wiring resistances 4004 and 4005 in the drawing.

  In a multi-electron source in which cold cathode elements are wired in a simple matrix, appropriate electric signals are applied to the row direction wiring 4002 and the column direction wiring 4003 in order to output desired electrons. For example, to drive any one row of cold cathode elements in the matrix, the selection voltage Vs is applied to the row direction wiring 4002 of the selected row, and at the same time, the row direction wiring 4002 of the non-selected row is not selected. A voltage Vns is applied.

  In synchronization with this, a drive voltage Ve for applying electrons to the column direction wiring 4003 is applied. According to this method, if the voltage drop due to the wiring resistors 4004 and 4005 is ignored, the voltage (Ve−Vs) is applied to the cold cathode elements in the selected row, and the voltage ( Ve−Vns) is applied.

  If these voltages Ve, Vs, and Vns are set to appropriate values, electrons of a desired intensity should be output only from the cold cathode elements in the selected row, and different driving voltages are applied to the column-direction wirings. If Ve is applied, electrons of different intensities should be output from each element in the selected row.

  However, the multi-electron source in which the cold cathode devices are simply matrix-wired as described above has a problem that a non-uniform distribution occurs in luminance due to the reasons described later, and a high-quality image cannot be obtained. . This occurs as a result of current flowing into the cold cathode electron-emitting devices via the wiring resistance in the row direction and the column direction, and the phenomenon that the voltage applied to each element electrode is different due to the voltage drop due to the wiring resistance. Get up. As a result, non-uniform distribution occurs in the effective voltage applied to each element, and non-uniform distribution occurs in luminance.

  In particular, since currents from all the column directions flow (or flow out) into the selected one of the row direction electrodes, the influence of a voltage drop due to the resistance component of the row direction electrode tends to appear.

  FIG. 14 is a diagram for explaining the cause in more detail, and shows voltages applied to the respective emission elements in the row direction. In the 6 × 6 simple matrix circuit of FIG. 13, voltage is applied from one direction in both the row direction and the column direction. Further, it is assumed that the row wiring and the column wiring have resistance components rx and ry for each element.

  Here, since these cold cathode type electron-emitting devices are arranged at equal intervals in the row direction and the column direction, as long as the width and film thickness of the wiring do not vary in manufacturing, the element unit, row direction, The wiring resistance values are almost equal in the column direction. All the cold cathode electron-emitting devices have substantially the same resistance value. Therefore, as shown in FIG. 14, a larger voltage is applied to an element closer to the voltage application terminal, and an applied voltage is smaller to an element farther from the voltage application terminal. For this reason, a non-uniform voltage distribution occurs in the drive applied voltage, and as a result, a non-uniform distribution also occurs with respect to the amount of electron emission output from the cold cathode electron-emitting device.

  In order to solve the above problems, Japanese Patent Application Laid-Open No. 11-149273 (Patent Document 7) includes an intermediate electrode structure, and by controlling the intermediate electrode, a plurality of cooling wires wired in a matrix form are provided. In an electron source having a cathode type emitting device, it is disclosed to correct variations in the amount of electron emission from each cold cathode type emitting device caused by a voltage drop due to wiring resistance.

  However, in the conventional example, in order to achieve the above-mentioned purpose, it is necessary to count the amount of electrons emitted from the emitting element, and a panel structure having an intermediate electrode is necessary. Further, it is also disclosed that the amount of emitted electrons is controlled by an acceleration voltage applied to an acceleration electrode for accelerating electrons. However, since this acceleration voltage is a high voltage, a circuit for performing the control is expensive. Becomes a problem in terms of cost.

  Other known techniques for correcting the voltage drop include the following.

  Japanese Unexamined Patent Publication No. 2000-306500 (Oguchi et al.) (Patent Document 8) discloses that a voltage drop is corrected using an emulation circuit when energization is activated.

  Japanese Patent Application Laid-Open No. 08-248920 (Suzuki et al.) (Patent Document 9) discloses that a voltage drop amount is obtained by calculation and data is corrected.

  Japanese Unexamined Patent Publication No. 2000-242208 (Ogino et al.) (Patent Document 10) discloses that a voltage drop amount is obtained by calculation and data is corrected.

  Japanese Patent Laying-Open No. 2001-306025 (巽) (Patent Document 11) discloses correction by voltage compensation by a resistor in a column drive circuit.

  Japanese Patent Laid-Open No. 2002-366080 (Ogino et al.) (Patent Document 12) discloses that a voltage drop amount is obtained by calculation to correct a drive voltage.

Japanese Unexamined Patent Application Publication No. 2004-212537 (Patent Document 13) and Japanese Unexamined Patent Application Publication No. 2002-221933 (Patent Document 14) disclose that a voltage drop amount is obtained by calculation and data is corrected.
Japanese Patent Application Laid-Open No. 64-31332 US Pat. No. 5,066,883 JP-A-2-257551 JP-A-4-28137 U.S. Pat. No. 4,904,895 JP-A-3-55738 JP 11-149273 A JP 2000-306500 A Japanese Patent Laid-Open No. 08-248920 JP 2000-242208 A JP 2001-306025 A JP 2002-366080 A JP 2004-212537 A JP 2002-221933 A

  The present invention has been made in view of the above conventional example, and an object thereof is to reduce fluctuations in the amount of electrons emitted from each element even when a voltage drop due to wiring resistance in a row wiring occurs. To do.

In order to achieve the above object, the present invention provides a driving device for driving a matrix panel in which modulation elements are arranged at intersections of a matrix formed by a plurality of row wirings and a plurality of column wirings. A row driving circuit for supplying a row selection signal to the selected row wiring, and a column driving circuit for supplying a plurality of column wirings with a modulation signal modulated in accordance with input image data, An emulation circuit for generating a second potential distribution imitating the first potential distribution in the row wiring direction generated by the supply of the row selection signal in the row wiring direction of the column driving circuit, and the drive supplied to the column driving circuit A drive voltage output circuit for outputting a drive voltage corrected based on a second potential distribution generated by supplying a current generated by the voltage to the emulation circuit; By using the dynamic voltage, and a modulation circuit for generating a modulated signal, characterized in that.

  The present invention can reduce fluctuations in the amount of electrons emitted from each element even when a voltage drop due to wiring resistance in a row wiring occurs.

  The image display device of the present invention includes a liquid crystal display device, a plasma display device, an electron beam display device, and the like. In particular, the electron beam display device is a preferable form to which the present invention is applied from the viewpoint of multi-bit display. . Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. In the present embodiment, an example in which a surface conduction electron-emitting device is used as a cold cathode electron-emitting device will be described.

  [Embodiment 1] FIG. 1 is a block diagram showing a circuit configuration of an image display apparatus according to Embodiment 1 of the present invention. FIG. 2 is a conceptual diagram illustrating the overall configuration of the column drive circuit 104.

  In FIG. 1, reference numeral 101 denotes a display panel having (M × N) surface conduction electron-emitting devices wired in M rows × N columns, each of which is connected to a row wiring. It is connected to an external drive circuit through row terminals Dx1 to DxM and column terminals Dy1 to DyN connected to the column wiring. Although not shown, the high-voltage terminal Hv on the face plate of the display surface of the display panel 101 is also connected to the external acceleration voltage power source 106 to accelerate electrons emitted from the surface conduction electron-emitting device in the face plate direction. It is like that.

  In each of the row terminals Dx1 to DxM, a multi-electron source provided in the display panel 101, that is, a surface conduction electron-emitting device wired in a matrix of M rows × N columns is sequentially driven row by row. A scanning signal is applied. On the other hand, the column terminals Dy1 to DyN control each element of the surface conduction electron-emitting devices in one row selected by the scanning signal in accordance with the input video signal, and thereby the amount of electrons emitted from each device. Then, a modulation signal for modulating in accordance with the displayed image is applied.

  Next, the row driving circuit 102 will be described.

  The row driving circuit 102 is usually integrated into an IC by combining driving circuits corresponding to several row wirings. A total of M switching elements are provided, and each switching element is connected to a row wiring to be scanned (corresponding to a “selected row wiring” of the present invention) based on a scanning signal Tscan input from the control circuit 103. A DC voltage Vs (corresponding to the “row selection signal” of the present invention) is applied to the row terminal Dxi of the emitting element column, and a DC voltage Vns is applied to the row terminal of the emitting element column not being scanned. Each of these switching elements can be easily configured by a switching element such as an FET. The voltages Vs and Vns will be described later.

The control circuit 103 has a function of matching the operation timing of each unit so that appropriate image display is performed based on a video signal input from the outside. A video signal input from the outside includes a case where image data and a synchronization signal are combined, for example, an NTSC signal, and a case where both are separated in advance. In the present embodiment, the latter case will be described. (The well-known synchronization separation circuit is provided for the former image signal, and the image data and the synchronization signal can be separated as in the present embodiment). That is, the control circuit 103 generates Tscan, Tsft, and Tmry control signals for each unit based on a synchronization signal Tsync input from the outside. Note that the synchronization signal generally includes a vertical synchronization signal and a horizontal synchronization signal, but Tsync is used here for the sake of simplicity.

  Next, the operation of the column drive circuit 104 will be described with reference to FIGS. 2 shows the entire configuration of the column drive circuit 104 composed of a plurality of ICs, and in fact, each column drive circuit 104 in FIG. 1 includes a shift register 201, a latch circuit 202, and a pulse width modulation circuit 203. ,It is included.

  Image data (luminance data) input from the outside is input to the shift register 201 in the column driving circuit 104. Similarly, in this column driving circuit, usually, driving circuits corresponding to several column wirings are integrated into an IC. This shift register 201 is for serial / parallel conversion of image data serially input in time series in units of one line of the image, and a control signal (shift clock) Tsft input from the control circuit 103. The digital image data is input and held pixel by pixel in synchronization with. Thus, the image data for one line (corresponding to the drive data for one line (N elements) of the electron-emitting devices) held in the shift register 201 of the column driving circuit 104 is a parallel signal of Id1 to IdN. The data is output to the latch circuit 202 in the column drive circuit 104.

  The latch circuit 202 is a storage circuit for storing only one line of image data necessary for processing, and latches and stores Id1 to IdN simultaneously according to the control signal Tmry sent from the control circuit 103. To do. The image data for one line stored in the latch circuit 202 is output to the pulse width modulation circuit 203 as Id′1 to IdN ′.

  The pulse width modulation circuit 203 generates a voltage pulse having a constant peak value in accordance with the image data Id1 ′ to IdN ′ input from the latch circuit 202. Here, the input luminance data (multi-value data) is generated. A pulse width modulation circuit that outputs a signal having a pulse width corresponding to the above is used. More specifically, the voltage signals Id1 ″ to IdN ″ output from the pulse width modulation circuit 203 are more wide voltage pulses as the luminance level of the image data is larger. For example, the peak value is 10 [V When the maximum luminance is reached, a voltage pulse with a width of 60 [μs] is output. The voltage signals Id1 ″ to IdN ″ are input to the column terminals Dy1 to DyN of the display panel 101. The power supply voltage Ve is supplied from the left and right sides and connected to the adjacent modulation circuit in a forward manner, and defines the voltage pulse voltage output from the column drive circuit 104.

  When each element of the display panel 101 is driven in this way, as described in the conventional example, the voltage applied to each element is as shown in FIG. 14 depending on the current flowing in the row line and the resistance component of the row line. There is a voltage drop.

  Therefore, the voltage supplied to each column drive circuit 104 is supplied to each column drive circuit 104 by a high voltage compensated by the voltage drop by the voltage correction circuit 107.

  Next, detection of a voltage drop value for each column drive circuit and a means for generating a correction voltage will be described.

  FIG. 3 is a block diagram for explaining the voltage correction circuit 107. In the figure, 101 and 104 are the same as in FIG. 1, 301 is a row wiring imitation circuit (corresponding to the “emulation circuit” of the present invention) in the voltage correction circuit 107, and 302 is a current detection and voltage control circuit in the voltage correction circuit 107. (Corresponding to “driving voltage output circuit” of the present invention).

  The row wiring imitation circuit 301 is a circuit in which a resistance value proportional to a single wiring resistance of a row wiring in the panel is constituted by a plurality of resistors.

  The current detection and voltage control circuit 302 is connected to one circuit for every fixed number of column drive circuits 104. A power supply Vc is connected to supply power to the column drive circuit 104 connected via the current detection and voltage control circuit 302. At this time, the current detection and voltage control circuit 302 detects the amount of current supplied to the column drive circuit 104 and outputs a current (use current) proportional to the supply current amount to the row wiring imitation circuit 301.

  Due to the current output from all the current detection and voltage control circuits 302 and the proportional resistance in the row wiring imitation circuit 301, the same as the row wiring being driven on the row wiring imitation circuit 301 (imitation voltage), or A proportional voltage (imitation voltage) is generated.

  The current detection and voltage control circuit 302 supplies the column drive circuit 104 with a voltage obtained by adding the imitation voltage to the set voltage to be originally applied. This voltage is applied to both ends of each column driving circuit.

  The column drive circuit 104 has left and right power supply terminals, and power supply sides such as collectors or sources of adjacent drive elements are sequentially connected. By doing so, the voltage gradually shifts between adjacent drive elements, and matches the different supply voltages at the left and right ends.

  In this way, the driving voltages of all the driven elements can be made constant by raising the voltage of the column wiring as much as the voltage of the row wiring is raised by the resistance.

  This is shown in FIG.

  FIG. 4 is a graph showing the voltage applied to the pixel in the first embodiment of the present invention.

  In this graph, the set voltage corresponds to a staircase-shaped drive waveform consisting of four types, and the column voltage consists of four graphs. Although the row voltage is raised, the voltage applied to the element becomes constant by raising the column voltage along the same curve.

  Next, a specific example of the voltage correction circuit is shown.

  FIG. 5 is a diagram when the voltage correction circuit is configured by an electronic circuit such as an operational amplifier.

  In the figure, 104 is a column drive circuit, 501 is a mimic resistor, 502 is an extraction resistor, 503 is a current detector, and 504 and 505 are voltage adders.

  The column drive circuit 104 in this figure can generate a drive waveform by combining four voltages, and is composed of 24 pieces per panel. Two imitation resistors 501 are arranged per column drive circuit and correspond to a resistance value of 1/48 of the wiring resistance value between the left and right of the row wiring Dx. However, in an actual circuit, since the value of the current flowing through the row wiring is large, the current flowing through the imitation resistor 501 is 1/10 of that of the row wiring, and the resistance value of the imitation resistance 501 is 10 times that of the row wiring. Then, the amount of voltage drop becomes equal. The take-out resistor 502 corresponds to a resistance component between the left end of the row wiring and the row drive circuit, and similarly uses a 10-fold resistance value. The row wiring imitation circuit 301 is configured by 48 imitation resistors and one take-out resistor.

  The current detector 503 is a circuit that outputs one tenth of the current flowing through the column drive circuit 104.

The current detector 503 receives a current flowing through the column drive circuit 104 with a 1Ω resistor, and outputs a current of 1/10 so that a voltage equal to the generated voltage is generated with a 10Ω resistor.

  The voltage adder performs addition with the voltage generated in the mimic circuit and the set voltage Ve, and drives the column drive circuit with the total voltage. When there are four types of set voltages Ve from V1 to V4, four voltage adders are prepared, and the total voltages are supplied to the column drive circuit. The voltage adder 504 supplies V1 to the left end of the leftmost column drive circuit, and the voltage adder 505 supplies V1 to the right end of the same leftmost column drive circuit and the second from the left. V1 is supplied to the left end of the column drive circuit. Similarly, voltage adders from V2 to V4 are prepared, and each is prepared for all the column drive circuits.

  By the way, at the moment when the drive circuit applies the drive voltage to the panel all at once, an inrush current may occur due to the capacitive component of the panel. As a result, when a current proportional to the inrush current flows into the mimic circuit, a voltage exceeding the voltage on the row wiring is temporarily generated on the mimic circuit. In such a case, a circuit for limiting the current output of the current detector is provided, a voltage limit by a diode or the like is provided on the imitation circuit, or a capacitor is provided on the imitation circuit to prevent this.

  FIG. 6 is a graph showing characteristics of the device current (If) and the emission current (Ie) with respect to the device voltage (Vf) applied to the device in the surface conduction electron-emitting device of the present embodiment.

  As shown in FIG. 6, since the emission current is generated only when the element voltage is higher than a certain level (Vth), the current flowing through the unselected row wiring is very small compared to the current flowing through the selected row wiring. .

  In many cases, the current flowing through the non-selected row wirings can be ignored. However, when correction is not possible, it is possible to correct all the row wirings in a non-selected state, and a voltage is applied by the column driving circuit 104 at that time. The current Im flowing through each column wiring is measured. If the column drive voltage is now Ve, it is sufficient to subtract the resistance value of the correction resistor R = Ve / Im from the resistance RL / 48 of the row wiring imitation circuit. Alternatively, the current Im / 24 may be subtracted from the output of the current detection circuit.

  The design parameters such as the drive voltage in the first embodiment are determined as follows.

  As shown in FIG. 6, the surface conduction electron-emitting device used in this embodiment has an electron-emitting device characteristic in which Vth = 8 [V] is a threshold voltage. Therefore, in order to prevent unnecessary light emission on the screen of the display panel, the voltage applied to the electron-emitting device columns connected to the row wiring not scanned is always less than 8 [V]. There is a need. For example, when Ve = 10 [V], Vs = −5 [V] and Vns = 5 [V]. By doing this, among the elements connected to the row wiring being scanned (Vs = -5V is applied), 15 elements are driven by the voltage (10 [V]) applied to the column wiring. [V] is applied, and -5 [V] is applied to an element (0 [V]) that is not driven. Of the elements connected to the row wiring not scanned (Vns = 5 V is applied), 5 [V] is applied to the elements to which the voltage (10 [V]) is applied to the column wiring. -5 [V] is applied to the non-element. The absolute value 5 [V] of these ± 5 [V] is below the threshold voltage Vth = 8 [V] shown in FIG. 6 and therefore satisfies this condition.

  The voltage values for actually driving the row and column wirings of the display panel 101 are determined in consideration of the above conditions based on the rated values of the ICs constituting the row driving circuit 102 and the column driving circuit 104.

Further, using the acceleration voltage power source 106, the acceleration voltage Va to be applied to the phosphor arranged on the face plate (not shown) was determined as follows. That is, the input power to the phosphor necessary for obtaining the desired maximum luminance is calculated based on the luminous efficiency of the phosphor, and the acceleration voltage Va is large so that (Iemax × Va) satisfies the input power. Determined. For example, 10 [KV] is used here. Each voltage value was determined as described above.

  In the first embodiment, the input video signal has been described as a digital video signal that is easier to process. However, the present invention is not limited to this and may be an analog video signal. good. In this case, an A / D conversion circuit for converting the analog signal into a digital signal is required.

  In the first embodiment, a shift register that can easily process a digital signal is used for the parallel-to-serial conversion process. However, the present invention is not limited to this, and for example, storage can be performed by controlling a storage address. A random access memory having a function equivalent to a shift register may be used by sequentially changing addresses.

  As described above, according to the first embodiment, the problem of non-uniformity of the emission current Ie from each element based on the voltage distribution generated in the row wiring is improved, and each element with a substantially uniform voltage distribution is improved. Can be driven.

[Embodiment 2]
Next, as a second embodiment of the present invention, a case where the column drive circuit has only one power supply terminal will be described.

  FIG. 7 is a schematic view of a second embodiment of the present invention.

In the figure, 101 to 103 and 105 to 106 are the same as in FIG. 1, 3101 is a column drive circuit, 3102 is a voltage correction circuit, and 3103 is a data correction circuit.

  The column drive circuit 3101 has power supply terminals at the left and right ends in the first embodiment, whereas the same voltage is applied from one power supply terminal to the drive elements in the circuit.

  The voltage correction circuit 3102 supplies only the voltage on the lower side (left end) of the correction voltage to be applied to the terminals in one column drive circuit.

  The data correction circuit 3103 corrects the data of the video signal by adjusting so as to correct the difference in voltage applied to the elements in the panel.

  FIG. 8 is a graph showing a voltage applied to a pixel in the second embodiment of the present invention.

  In this graph, the column voltage consists of four graphs because the set voltage corresponds to a staircase-shaped drive waveform consisting of four types. The row voltage is rising. On the other hand, the column voltage is raised stepwise to give a voltage close to the voltage to be driven for each column drive circuit.

  The number of walls in the waveform in FIG. 8 (location where the voltage is rapidly changed) matches the number of column drive circuits. Alternatively, when one voltage is assigned to k column drive circuits for cost reduction, it corresponds to 1 / k of the column drive circuits.

  The difference between the upper and lower graphs, that is, the voltage applied to the element is not constant, but the error is slight, indicating that the data correction circuit 3103 can suppress the occurrence of crosstalk by adjusting the data by a small amount. ing.

  In this case, in the conventional example in which correction is performed using only data, the decrease in luminance is large, whereas in the present embodiment, since the amount of data correction is small, the decrease in luminance caused thereby is also suppressed to a slight degree.

  The data correction method in the data correction circuit may be performed in the same manner as in Japanese Patent No. 3311201 and Japanese Patent Application Laid-Open No. 2002-221933, but the voltage drop in each column drive circuit is corrected. As described above, data correction is performed.

  FIG. 9 is a diagram when the voltage correction circuit of the second embodiment is configured by an electronic circuit such as an operational amplifier.

  In FIG. 9, 3101 is a column drive circuit, 501 is an imitation resistor, 502 is an extraction resistor, 503 is a current detector, and 504 and 505 are voltage adders.

  The column drive circuit in this figure can generate a drive waveform by combining four voltages, and is composed of 24 pieces per panel. Unlike the first embodiment, there is only one supply pin for each voltage. Two imitation resistors 501 are arranged per column drive circuit and correspond to a resistance value of 1/48 of the wiring resistance between the left and right of the row wiring Dx. However, in an actual circuit, since the current value flowing through the row wiring is large, the current flowing through the imitation resistor 501 is 1/10 of that of the row wiring, and the resistance value is 10 times that of the row wiring. If it does so, the amount of voltage drops will become 1 /. The take-out resistor 502 corresponds to a resistance component between the left end of the row wiring and the row drive circuit, and similarly uses a 10-fold resistance value. The row wiring imitation circuit 301 is configured by 48 imitation resistors and one take-out resistor.

  The current detector 503 is a circuit that outputs one tenth of the current flowing through the column drive circuit 104.

The current flowing through the column drive circuit 104 is received by a 1Ω resistor, and the current is output so that a voltage equal to the generated voltage is generated by a 10Ω resistor.

  The voltage adder performs addition with the voltage generated in the mimic circuit and the set voltage, and drives the column drive circuit with the total voltage. When there are four types of set voltages from V1 to V4, four voltage adders are prepared, and the total voltages are supplied to the column drive circuit. The voltage adder 504 supplies V1 to the leftmost column drive circuit, and the voltage adder 505 supplies V1 to the second column drive circuit from the left. Similarly, voltage adders from V2 to V4 are prepared, and each is prepared for all the column drive circuits.

  The design parameters such as the drive voltage in the second embodiment are the same as those in the first embodiment. However, it is necessary to determine the value of the power supply voltage Vc so that the element driving voltage of the non-emitting element does not exceed Vth. For example, when Vth = 8 [V], Ve = 10 [V], Vs = −5 [V], and Vns = 5 [V], Vc = 12.5 [V].

[Display device that can use the drive circuit of this embodiment]
FIG. 10 is an external perspective view of the display panel 101 according to the present embodiment, and a part of the display panel 101 is cut away to show the internal structure.

  The row driving circuit 102 in FIG. 1 is connected to Dx1 to DxM of the panel. 1 is connected to Dy1 to DyM of the panel.

In FIG. 10, reference numeral 1005 denotes a rear plate, 1006 denotes a side wall, and 1007 denotes a face plate, and 1005 to 1007 form an airtight container for maintaining the inside of the display panel in a vacuum. When assembling this hermetic container, it is necessary to seal it in order to maintain sufficient strength and hermeticity at the joint of each member. For example, frit glass is applied to the joint, and sealing is achieved by firing at 400 ° C. to 500 ° C. for 10 minutes or more in the air or a nitrogen atmosphere.

  A substrate 1001 is fixed to the rear plate 1005, and N × M surface conduction electron-emitting devices 1002 (corresponding to the “modulation device” of the present invention) are formed on the substrate 1001 (here, N and M are positive integers of 2 or more, and are appropriately set according to the target number of display pixels, for example, N = 3000, M in the case of a display device for display of high-definition television. It is desirable to set a number equal to or greater than 1000. In this embodiment, N = 3072, M = 1024). These N × M surface conduction electron-emitting devices 1002 are simply matrix-wired by M row-directional wirings 1003 and N column-directional wirings 1004. A portion constituted by these 1001 to 1004 is called a multi-electron source.

  A multi-electron source substrate 1001 is fixed to the rear plate 1005 of the hermetic container. When the multi-electron source substrate 1001 has sufficient strength, the multi-electron source substrate 1001 itself may be used as the rear plate of the hermetic container.

  A fluorescent film 1008 is formed on the lower surface of the face plate 1007. Since the display panel 101 of this embodiment is for color display, phosphors of three primary colors red (R), green (G), and blue (B) used in the field of CRT are included in the fluorescent film 1008. They are painted separately. For example, as shown in FIG. 11A, the phosphors of each color are separately applied in a stripe shape, and a black conductor 1010 is provided between the stripes of the phosphors of each color.

  The purpose of providing the black conductor 1010 is to prevent the display color from being shifted even if there is a slight shift in the electron irradiation position, or to prevent the reflection of external light and prevent the display contrast from being lowered. For this reason, the phosphor film is prevented from being charged up by electrons. For the black conductor 1010, graphite or the like is used as a main component.

  Further, the method of separately applying the phosphors of the three primary colors is not limited to the stripe arrangement shown in FIG. 11A, and for example, a delta arrangement as shown in FIG. It may be. Note that when a monochrome display panel is formed, a monochromatic phosphor material may be used for the phosphor film 1008, and a black conductive material is not necessarily used.

  Further, a metal back 1009 known in the field of CRT is provided on the surface of the fluorescent film 1008 on the rear plate side. The purpose of providing the metal back 1009 is to apply an electron acceleration voltage to protect the fluorescent film 1008 from collision of negative ions in order to improve the light utilization rate by specularly reflecting a part of the light emitted from the fluorescent film 1008. This is because the fluorescent film 1008 is caused to act as a conductive path of excited electrons in order to act as an electrode for the purpose. The metal back 1009 was formed by forming a fluorescent film 1008 on the face plate substrate 1007, smoothing the surface of the fluorescent film, and vacuum-depositing aluminum thereon. Note that when a low-voltage phosphor material is used for the phosphor film 1008, the metal back 1009 is not used.

  Although not used in the present embodiment, a transparent electrode made of, for example, ITO is used between the face plate substrate 1007 and the fluorescent film 1008 for the purpose of applying an acceleration voltage or improving the conductivity of the fluorescent film. It may be provided.

Further, the row terminals Dx1 to DxM, the column terminals Dy1 to DyN, and the acceleration electrode terminal Hv are electrically connected in an airtight structure provided to electrically connect the display panel 101 to an electric circuit such as the drive circuit described above. Terminal. The row terminals Dx1 to DxM are electrically connected to the row direction wiring 1003 of the multi electron source, the column terminals Dy1 to DyN are electrically connected to the column direction wiring 1004 of the multi electron source, and the terminal Hv is electrically connected to the metal back 1009 of the face plate. ing.

In order to evacuate the inside of the hermetic container to a vacuum, after assembling the hermetic container, an exhaust pipe (not shown) and a vacuum pump are connected, and the inside of the hermetic container is 10 ⁻⁷ [torr (≈133.32 Pa)]. Exhaust to a degree of vacuum. Thereafter, the exhaust pipe is sealed. In order to maintain the degree of vacuum in the hermetic container, a getter film (not shown) is formed at a predetermined position in the hermetic container immediately before or after sealing. This getter film is, for example, a film formed by heating and vapor-depositing a getter material mainly composed of Ba by a heater or high-frequency heating, and the inside of the hermetic container is 1 × 10 ^{−5 to} 1 by the adsorption action of the getter film. The vacuum degree is maintained at × 10 ^-7 [torr (≈133.32 Pa)].

  The basic configuration of the display panel 101 according to the embodiment of the present invention and the manufacturing method thereof have been described above.

  Next, the manufacturing method of the multi electron source used for the display panel 101 of this embodiment will be described. As long as the multi-electron source used in the image display apparatus according to the present embodiment is an electron source in which surface conduction electron-emitting devices are wired in a simple matrix, the material, shape, or manufacturing method of the surface conduction electron-emitting devices is not limited. However, the inventors of the present invention have found that, among surface conduction electron-emitting devices, an electron emission portion or its peripheral portion formed of a fine particle film has excellent electron emission characteristics and can be easily manufactured. Therefore, it can be said that it is most suitable for use in a multi-electron source of an image display device with high brightness and a large screen. Therefore, in the display panel 101 of the above-described embodiment, a surface conduction electron-emitting device in which the electron emission portion or its peripheral portion is formed from a fine particle film is used. First, the basic configuration, manufacturing method, and characteristics of a suitable surface conduction electron-emitting device will be described, and then the structure of a multi-electron source in which a number of devices are wired in a simple matrix will be described.

  FIG. 12 shows a multi-function configured to display image information provided from various image information sources such as television broadcasting on the display panel 101 using the surface conduction electron-emitting device as an electron source. It is a figure for showing an example of a display.

  In FIG. 12, 101 is the display panel described above, 2101 is a drive circuit for the display panel 101, 2102 is a display panel controller, 2103 is a multiplexer, 2104 is a decoder, 2105 is an input / output interface circuit, 2106 is a CPU, and 2107 is an image generation circuit. 2108 and 2109 and 2110 are image memory interface circuits, 2111 is an image input interface circuit, 2112 and 2113 are TV signal receiving circuits, and 2114 is an input unit.

  The row drive circuit 102 and the column drive circuit 104 in FIG. 1 correspond to the drive circuit 2101.

  Note that, when the display device receives a signal including both video information and audio information such as a television signal, for example, the display device naturally reproduces the audio simultaneously with the display of the video. A description of circuits and speakers related to reception, separation, reproduction, processing, storage, and the like of audio information that is not directly related to the description is omitted. Hereinafter, the function of each part will be described along the flow of the image signal.

First, the TV signal receiving circuit 2113 is a circuit for receiving a TV image signal transmitted using a wireless transmission system such as radio waves or space optical communication. The method of the TV signal to be received is not particularly limited, and various methods such as an NTSC method, a PAL method, and a SECAM method may be used. Further, a TV signal (for example, a so-called high-definition TV including the MUSE system) including a larger number of scanning lines than these is suitable for taking advantage of the display panel suitable for increasing the area and the number of pixels. It is a signal source. The TV signal received by the TV signal receiving circuit 2113 is output to the decoder 2104.

  The TV signal receiving circuit 2112 is a circuit for receiving a TV image signal transmitted using a wired transmission system such as a coaxial cable or an optical fiber. As with the TV signal receiving circuit 2113, the TV signal system to be received is not particularly limited, and the TV signal received by this circuit is also output to the decoder 2104.

  The image input interface circuit 2111 is a circuit for capturing an image signal supplied from an image input device such as a TV camera or an image reading scanner, and the captured image signal is output to the decoder 2104.

  The image memory interface circuit 2110 is a circuit for capturing an image signal stored in a video tape recorder (hereinafter abbreviated as VTR), and the captured image signal is output to the decoder 2104.

  The image memory interface circuit 2109 is a circuit for capturing an image signal stored in the video disk, and the captured image signal is output to the decoder 2104.

  The image memory interface circuit 2108 is a circuit for capturing an image signal from a device that stores still image data, such as a so-called still image disk, and the captured still image data is output to the decoder 2104.

  An input / output interface circuit 2105 is a circuit for connecting the display device to an output device such as an external computer, a computer network, or a printer. In addition to inputting / outputting image data, character data, and graphic information, in some cases, it is also possible to input / output control signals and numerical data between the CPU 2106 of the display device and the outside. .

  The image generation circuit 2107 displays image data or character / graphic information input from the outside via the input / output interface circuit 2105 or image data for display based on image data or character / graphic information output from the CPU 2106. It is a circuit for generating data. In this circuit, for example, a rewritable memory for storing image data, character / graphic information, a read-only memory storing an image pattern corresponding to a character code, and a processor for performing image processing The circuit necessary for image generation is incorporated. Display image data generated by this circuit is output to the decoder 2104, but in some cases, it can also be input / output via an input / output interface circuit 2105 to an external computer network or a printer.

  The CPU 2106 mainly performs operations related to operation control of the display device and generation, selection, and editing of a display image.

  For example, a control signal is output to the multiplexer 2103, and image signals to be displayed on the display panel are appropriately selected or combined. At that time, a control signal is generated for the display panel controller 2102 in accordance with the image signal to be displayed, and the screen display frequency, scanning method (for example, interlaced or non-interlaced), the number of scanning lines on one screen, and the like are displayed. The operation of the apparatus is appropriately controlled.

Further, image data, character / graphic information is directly output to the image generation circuit 2107, or an external computer or memory is accessed via the input / output interface circuit 2105 to output image data, character / graphic information. Enter.

  It should be noted that the CPU 2106 may be involved in other purposes. For example, it may be directly related to a function for generating or processing information, such as a personal computer or a word processor.

  Alternatively, as described above, it may be connected to an external computer network via the input / output interface circuit 2105, and work such as numerical calculation may be performed in cooperation with an external device. The input unit 2114 is used by the user to input commands, programs, data, and the like to the CPU 2106. For example, in addition to a keyboard and a mouse, various input devices such as a joystick, a barcode reader, and a voice recognition device. Can be used.

  The decoder 2104 is a circuit for inversely converting various image signals input from 2107 to 2113 into three primary color signals or luminance signals, I signals, and Q signals. Note that, as indicated by a dotted line in the figure, the decoder 2104 preferably includes an image memory therein. This is because, for example, a MUSE system and other television signals that require an image memory for reverse conversion are handled. Also, by providing an image memory, it becomes easy to display a still image, or in cooperation with the image generation circuit 2107 and the CPU 2106, image processing and editing including image thinning, interpolation, enlargement, reduction, and composition This is because there is an advantage that it can be easily performed.

  The multiplexer 2103 appropriately selects a display image based on a control signal input from the CPU 2106. That is, the multiplexer 2103 selects a desired image signal from the inversely converted image signals input from the decoder 2104 and outputs the selected image signal to the drive circuit 2101. In that case, by switching and selecting an image signal within one screen display time, it is possible to divide one screen into a plurality of regions and display different images depending on the regions as in a so-called multi-screen television.

  The display panel controller 2102 is a circuit for controlling the operation of the drive circuit 2101 based on a control signal input from the CPU 2106.

  First, as a basic operation of the display panel, for example, a signal for controlling an operation sequence of a driving power source (not shown) of the display panel 101 is output to the driving circuit 2101. Further, as for the display panel driving method, for example, a signal for controlling the screen display frequency and the scanning method (for example, interlaced or non-interlaced) is output to the drive circuit 2101.

  In some cases, a control signal related to image quality adjustment such as brightness, contrast, color tone, and sharpness of a display image may be output to the drive circuit 2101. The drive circuit 2101 is a circuit for generating a drive signal to be applied to the display panel 101 and operates based on an image signal input from the multiplexer 2103 and a control signal input from the display panel controller 2102. To do.

The function of each unit has been described above. With the configuration illustrated in FIG. 12, the display apparatus can display image information input from various image information sources on the display panel 101. That is, various image signals such as television broadcasts are inversely converted by the decoder 2104, appropriately selected by the multiplexer 2103, and input to the drive circuit 2101. On the other hand, the display controller 2102 generates a control signal for controlling the operation of the drive circuit 2101 according to the image signal to be displayed. The drive circuit 2101 applies a drive signal to the display panel 101 based on the image signal and the control signal. As a result, an image is displayed on the display panel 101. A series of these operations is comprehensively controlled by the CPU 2106.

  In addition, in this display device, the image memory built in the decoder 2104, the image generation circuit 2107, and the CPU 2106 are involved, so that not only the one selected from a plurality of image information is displayed but also displayed. For image information, for example, image processing such as enlargement, reduction, rotation, movement, edge enhancement, thinning, interpolation, color conversion, image aspect ratio conversion, composition, deletion, connection, replacement, inset, etc. It is also possible to perform image editing including the beginning. Although not particularly mentioned in the description of the present embodiment, a dedicated circuit for processing and editing audio information may be provided in the same manner as the image processing and image editing.

  Therefore, this display device is a television broadcast display device, a video conference terminal device, an image editing device that handles still images and moving images, a computer terminal device, an office terminal device such as a word processor, a game machine, etc. It is possible to combine functions with a single unit, and it has a very wide range of applications for industrial or consumer use.

  Note that FIG. 12 merely shows an example of the configuration of a display device using a display panel using a surface conduction electron-emitting device as an electron source, and it goes without saying that the present invention is not limited to this. For example, a circuit related to a function that is not necessary for the purpose of use among the components shown in FIG. 12 may be omitted. On the contrary, depending on the purpose of use, additional components may be added. For example, when this display device is applied as a videophone, it is preferable to add a transmission / reception circuit including a television camera, an audio microphone, an illuminator, and a modem to the constituent elements. In this embodiment, an example of application to a display device has been described. However, the present invention is not limited to this, and can be applied to any device that forms an image according to an image signal. Is possible. For example, instead of the electron-emitting device, any device that can be driven in a matrix, such as a liquid crystal device, a plasma light-emitting device, or an EL light-emitting device can be applied.

  As described above, according to the present embodiment, even when a voltage drop due to the wiring resistance in the row wiring occurs, the driving for driving the elements in each column so as to compensate for the influence of the voltage drop. By controlling the voltage, fluctuations in the amount of electrons emitted from each element can be reduced, whereby a high-quality image can be displayed.

  This also makes it possible to display an image having a luminance that is extremely faithful to the original image signal over the entire display screen of the display device.

  Further, high-quality image formation is performed by driving each element by compensating for the voltage drop depending on the wiring resistance of the electron source having a plurality of emitting elements wired in a matrix by the potential of the other wiring. Can do.

  In addition, according to the present embodiment, variation in the amount of electron emission from each emitting element caused by a voltage drop depending on the wiring resistance of an electron source having a plurality of emitting elements wired in a matrix is minimized. Therefore, high-quality image formation can be performed.

  Further, according to the present embodiment, the voltage drop depending on the wiring resistance of the row direction wiring applied to the plurality of emitting elements wired in a matrix is compensated by the power supply voltage of the drive circuit that drives the column direction wiring. By doing so, high-quality image formation can be performed.

In the above embodiment, the voltage drop in the row wiring is compensated by changing the voltage value applied to the column wiring. However, the present invention is not limited to this, and the voltage in the column wiring is not limited thereto. The drop may be compensated by changing the voltage value applied to the row wiring.

  Note that the invention can be applied to a system (for example, a copier, a facsimile machine, etc.) consisting of a single device, even if it is applied to a system composed of a plurality of devices (for example, a host computer, interface device, reader, printer, etc.). You may apply.

  Another object of the present invention is to supply a storage medium (or recording medium) in which a program code of software for realizing the functions of the above-described embodiments is recorded to a system or apparatus, and the computer (or CPU) of the system or apparatus. Needless to say, this can also be achieved by reading and executing the program code stored in the storage medium. In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and the storage medium storing the program code constitutes the present invention. Further, by executing the program code read by the computer, not only the functions of the above-described embodiments are realized, but also an operating system (OS) running on the computer based on the instruction of the program code. A case where part or all of the actual processing is performed and the functions of the above-described embodiments are realized by the processing is also included.

  Further, after the program code read from the storage medium is written in a memory provided in a function expansion card inserted into the computer or a function expansion unit connected to the computer, the function is determined based on the instruction of the program code. This includes a case where the CPU or the like provided in the expansion card or the function expansion unit performs part or all of the actual processing, and the functions of the above-described embodiments are realized by the processing.

It is a block diagram which shows the circuit structure of the image display apparatus which concerns on Embodiment 1 of this invention. It is a block diagram which shows the structure of the column drive circuit which concerns on this embodiment. It is a block diagram for description of the voltage correction circuit 107 according to the present embodiment. 4 is a graph showing a voltage applied to a pixel in the first embodiment of the present invention. It is a figure at the time of comprising a voltage correction circuit with electronic circuits, such as an operational amplifier. It is a figure which shows the voltage example applied to each emitting element of the row direction in this Embodiment 1. FIG. It is the schematic of 2nd Embodiment of this invention. 6 is a graph showing a voltage applied to a pixel in the second embodiment of the present invention. FIG. 10 is a diagram when the voltage correction circuit of the second embodiment is configured by an electronic circuit such as an operational amplifier. It is an external appearance perspective view of the display panel which concerns on this embodiment. It is a layout view of phosphors of the display panel according to the present embodiment. It is a block diagram which shows an example of the multifunction display apparatus which concerns on this embodiment. It is a circuit diagram which shows the example of a wiring of a multi electron source. It is a figure which shows the voltage example applied to each emitting element of a row wiring direction.

Explanation of symbols

101 Display Panel 102 Row Drive Circuit 103 Control Circuit 104 Column Drive Circuit 201 Shift Register 202 Latch Circuit 203 Pulse Width Modulation Circuit 301 Row Wiring Imitation Circuit 302 Current Detection & Voltage Control Circuit 501 Imitation Resistance 502 Extraction Resistance 503, 505 Current Detector 504 Voltage adder

Claims (6)

A driving device for driving a matrix panel in which modulation elements are arranged at intersections of matrices formed by a plurality of row wirings and a plurality of column wirings,
A row driving circuit for supplying a row selection signal to a row wiring selected from the plurality of row wirings;
A column driving circuit for supplying a modulated signal modulated in accordance with input image data to the plurality of column wirings;
An emulation circuit for generating, in the row wiring direction of the column drive circuit, a second potential distribution imitating the first potential distribution in the row wiring direction generated by the supply of the row selection signal;
A drive voltage output circuit for outputting a drive voltage corrected based on the second potential distribution generated by supplying a current generated by the drive voltage supplied to the column drive circuit to the emulation circuit;
A drive device comprising: a modulation circuit that generates a modulation signal using the image data and the corrected drive voltage. The drive voltage output circuit outputs a drive voltage corrected independently for each column wiring,
The modulation circuit outputs the modulation signal according to the image data corresponding to each column wiring.
The drive device according to claim 1. The plurality of column wirings are divided into a plurality of blocks for each predetermined number of column wirings,
The drive voltage output circuit is a circuit that is provided for each block and outputs the corrected drive voltage that is common to each block, and the corrected drive is used to compensate for a voltage drop that occurs in each block. Outputting a voltage to the modulation circuit provided for each block;
The drive device according to claim 1. A driving device according to any one of claims 1 to 3,
An image display device comprising: a matrix panel that displays an image according to three color signals output from the modulation circuit.   The image display apparatus according to claim 4, wherein the modulation element is an electron-emitting element, a liquid crystal element, a plasma light-emitting element, or an EL light-emitting element. An image display device according to claim 4 or 5,
A receiving circuit for receiving a television signal and supplying image data to the image display device;
A television device comprising: