JP2006237183A - Method of manufacturing data track to be used in magnetic shift register memory device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an improved method of manufacturing a magnetic data track necessary for building a magnetic shift register memory device. <P>SOLUTION: The magnetic data track can be manufactured by forming a multilayered stack made by stacking a dielectric material and/or a silicon layer alternately. A via having a height of about 10 microns and a cross section of about 100 nm in length and width is formed in the multilayered stack of alternate layers by etching. Then, the via is filled up with a layer of alternately stacked ferromagnetic material and ferrimagnetic metal by electrical plating. The ferromagnetic material layer and the ferrimagnetic material layer are formed of magnetic materials having a different magnetization characteristic, a different magnetic exchange characteristic, or a different magnetic anisotropy. Due to the different magnetic characteristics, a magnetic wall can be fixed to the boundary between these layers. The magnetic wall is formed by the ferromagnetic material occurring on a notch or projection along the wall of the via or by the discontinuity in the ferromagnetic material. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to co-pending US patent application Ser. No. 10 / 458,554 entitled “Shiftable Magnetic Shift Register and Method of Using the Same” and a series of “System and method for Writing to a Magnetic Shift Register”. No. 10 / 458,147. Both of these were filed on June 10, 2003 and are hereby incorporated by reference in their entirety.

  The present invention generally relates to memory storage systems, and more particularly to a memory storage system that stores data using magnetic moments of magnetic domains. In particular, the present invention relates to a method for manufacturing a magnetic data track for use in a magnetic shift register memory device.

  The two most common conventional non-volatile data storage devices are disk drives and solid state random access memory (RAM). A disk drive can store large amounts of data, ie, over 100 GB, at low cost. However, disk drives are inherently unreliable. The hard drive has a fixed read / write head and a moving medium on which data is written. Devices with moving parts tend to be subject to wear and failure. Solid state random access memory currently stores about 1 GB (gigabytes) of data per device and is relatively expensive per storage unit compared to disk drives.

  The most common type of solid state RAM is flash memory. Flash memory utilizes a thin polysilicon layer located in the oxide under the transistor on-off control gate. This polysilicon layer is a floating gate and is separated from the control gate and transistor channel by silicon. Flash memory is relatively slow with read and write times of about 1 microsecond. In addition, flash memory cells may begin to lose data after less than one million write cycles. While this may be sufficient for some applications, flash memory cells may begin to fail in a short time when used constantly for writing new data, such as in a computer's main memory. Furthermore, flash memory access times are too long for computer applications.

  Another form of RAM is a ferroelectric RAM (FRAM). The FRAM stores data based on the direction indicated by the ferroelectric domain. FRAM has much faster access times than flash memory and consumes less energy than standard dynamic random access memory (DRAM). However, the capacity of commercially available memories is currently as small as about 0.25 MB (megabytes). Furthermore, memory storage in FRAM relies on physically moving atoms, resulting in media degradation and memory failure.

  Yet another form of RAM is phase change memory (OUM: OvonicUnified Memory), which stores data using alternating materials between crystalline and amorphous phases. The material used in this application is a chalcogenide alloy. After the chalcogenide alloy has undergone a heating and cooling cycle, it can be programmed to accept one of two stable phases, polycrystalline and amorphous. The chalcogenide alloy can be used as a memory storage device due to the difference in resistance between the two phases. Data access time is about 50 ns. However, the size of these memories is still small, currently about 4 MB. Furthermore, since OUM relies on physically changing the material from crystalline to amorphous, it is likely that the material will eventually degrade or fail.

  Semiconductor magnetoresistive RAM (MRAM) encodes data bits in a ferromagnetic material by utilizing the direction of the magnetic moment of the material. Ferromagnetic atoms respond to external magnetic fields and align their magnetic moments in the direction of the applied magnetic field. When the magnetic field is removed, the magnetic moments of the atoms remain aligned in the induced direction. When a magnetic field is applied in the opposite direction, the atoms realign in the new direction. Usually, the magnetic moments of atoms in a volume of ferromagnetic material are aligned in parallel with each other by magnetic exchange interactions. These atoms then respond together to an external magnetic field, generally as one macro magnetic moment or domain.

  One approach to MRAM uses a magnetic tunneling junction as the memory cell. The magnetic tunnel junction consists of two layers of ferromagnetic material separated by a thin insulating material. The direction of the magnetic domains is fixed in one layer. In the second layer, the direction of the magnetic domains can move in response to the applied magnetic field. As a result, the magnetic domain direction of the second layer is parallel or opposite to the first layer, and data can be stored in the form of 1s and zeros. However, currently available MRAM can only store up to 1 Mb (megabytes), far less than what is needed for most memory applications. Larger memories are currently in development. Furthermore, each MRAM memory cell can only store 1-bit data, which limits the maximum possible memory capacity of such devices.

  Magnetic shift registers replace many conventional memory devices including, but not limited to, magnetic recording hard disk drives and many solid state memories such as DRAM, SRAM, FeRAM, and MRAM. The magnetic shift register provides a large storage capacity comparable to that provided in conventional memory devices, but does not use any moving parts and is as costly as a hard disk drive.

  Briefly, magnetic shift register memory devices store data using the intrinsic and natural properties of domain walls in ferromagnetic materials. A magnetic shift register memory device uses a single read / write device to access multiple bits of data, such as about 100 bits or more. Therefore, hundreds of bits of data can be accessed with a small number of logical elements.

  Magnetic shift register memory devices use spin-based electronics to write and read data in ferromagnetic materials, so the physical properties of magnetic shift register materials are Is unchanged. A shiftable magnetic shift register comprises a data track formed of a thin wire or strip of material made of a ferromagnetic material. The wire may consist of a physically uniform and magnetically homogeneous ferromagnetic material or a layer of different ferromagnetic materials. Information is stored as the direction of the magnetic moment in the magnetic domain at the track. The wire can be magnetized in small sections in one direction or another.

  A current is applied to the track to move the magnetic domain across the read or write element or device in the direction of the current along the track. In a magnetic material having a domain wall, a current passing through the domain wall moves the domain wall in the direction of the current. When the current passes through the magnetic domain, it becomes “spin polarized”. As this spin-polarized current moves across the domain wall to the next domain, this creates spin torque. This spin torque moves the domain wall. The domain wall speed is very fast, about 100 to 500 m / sec.

  In summary, current that has passed through a track (with a series of magnetic domains in alternating directions) can move these domains across read and write elements. The reading device can then read the direction of the magnetic moment. The writing device can write information to the track by changing the direction of the magnetic moment.

  It would be desirable to have an improved method for producing the magnetic data tracks necessary to build a magnetic shift register memory device.

  The present invention satisfies this need and presents a method for manufacturing the magnetic data tracks necessary to build a magnetic shift register memory device.

  The magnetic shift register memory device includes the storage of information in a magnetic wire generally perpendicular to a plane with read and write elements. These read and write elements are constructed using conventional CMOS technology. The magnetic shift register memory is expected to have a density improvement of 100 times that of a conventional CMOS memory. The magnetic wire can be formed as a tall (about 10 microns) and narrow (about 0.1 micron) column, connecting between two of these columns at one end of the column.

  Magnetic data tracks are manufactured by forming a multi-layer stack of alternating layers of different materials formed from silicon or dielectric. Vias having a cross section with a height of about 1 to 10 microns, a length of about 100 nm and a width of about 100 nm are etched into the multilayer stack structure. The via can have an oval, rectangular, square, or any other desired or suitable cross-section. The manufacturing technique for creating these size vias is based on the technique used to manufacture the trench capacitor used by DRAM. Conventional techniques for manufacturing these trench capacitors have achieved dimensions of about 9 to 10 microns deep and about 0.1 microns cross-section. See U.S. Patent Nos. 6,544,838 and 6,284,666. These patents are also incorporated herein by reference.

  In one embodiment, vias can be etched by non-selective etching to form vias with smooth walls. Vias are filled by electroplating layers of alternating types of ferromagnetic or ferrimagnetic metals. The thickness of each layer can be, for example, between about 50 nm and 500 nm. The alternating ferromagnetic or ferrimagnetic layers are made of magnetic materials having different magnetization or magnetic exchange or magnetic anisotropy. These different magnetic properties allow the domain wall to be fixed at the boundary between these layers or within one of these layers.

  In another embodiment, selective etching is performed after the vias are non-selectively etched. This selective etching removes layers of material in the multilayer stack structure at a higher rate than layers of other materials, forming notches or protrusions in the via walls.

  Vias are filled with a homogeneous ferromagnetic material, for example by electroplating or chemical vapor deposition (CVD). The domain wall is formed in the vicinity of a break in a ferromagnetic or ferromagnetic material that occurs in a notch or protrusion along the wall of the via.

  Means are provided for connecting current leads to each end of each data track for the purpose of injecting current to move the domain wall along the data track.

  Various features of the present invention and methods of accomplishing them will be described in further detail with reference to the following description, claims and drawings. In the drawings, reference numbers are reused where appropriate to indicate correspondence between referenced elements.

  The following definitions and descriptions provide background information relevant to the technical field of the present invention and are intended to facilitate understanding of the present invention without limiting its scope.

  Homogeneous magnetic material means a continuous volume of magnetic material, which may have a complex shape, and magnetic properties such as magnetization, magnetic anisotropy, magnetic exchange, and magnetic damping are within the volume. Regardless of their position, they are nominally the same.

  Heterogeneous magnetic material means a continuous volume of magnetic material, which may have a complex shape, for example due to changes in material composition and / or during deposition of this material or depositing material Because of some physical process that subsequently affects the material, magnetic properties such as magnetization, magnetic anisotropy, magnetic exchange, and magnetic damping may vary with position within the volume.

  FIGS. 1 and 2 illustrate an exemplary high level architecture of a magnetic memory system 100, which includes a writing device (also referred to herein as a writing element) 15 and a reading device (referred to herein). (Also referred to as a read element) 20 is provided. Both the reading device 20 and the writing device 15 form the read / write element of the system 100.

  The magnetic shift register 10 comprises a thin data track 11, preferably made of a ferromagnetic material or a ferromagnetic material. The data track 11 can be magnetized in small sections or domains in one direction or another. Information is stored in areas such as magnetic domains 25 and 30 in the data track 11. The alignment parameter of the magnetic material from which the track is made, ie the direction of magnetization or the direction of the magnetic moment, varies from direction to direction. This variation in the direction of the magnetic moment forms the basis for storing information in the data track 11.

  In one embodiment, the magnetic shift register 10 includes a data area 35 and a storage 40 connected by a central area 42. The data area 35 includes a set of continuous magnetic domains such as magnetic domains 25 and 30 for storing data. An additional length is provided to the magnetic shift register 10 in the form of an accumulator 40.

  The storage unit 40 is formed to be long enough to write and read magnetic domains in the central region 42, so that the magnetic domains in the data region 35 can be transferred from the data region 35 through the central region 42 to the writing element 15 and the reading element. When fully moved through 20, all the magnetic domains are accommodated. For this reason, at any given time, a part of the magnetic domain is stored in the data area 35 and a part thereof is stored in the storage unit 40. Therefore, the storage element is formed by the data region 35 and the storage unit 40. , And a central region 42. In one embodiment, the storage unit 40 does not have a magnetic domain in the resting state.

  Thus, at any given time, the data area 35 can be located in a different part of the magnetic shift register 10 and the storage unit 40 is divided into two areas on either side of the data area 35. be able to. Although the data area 35 can be one continuous area, the spatial distribution and range of the magnetic domains in the data area 35 are substantially the same no matter where the data area 35 is located in the shift register 10. can do. In another embodiment, a portion of the storage area can be enlarged, especially while this area moves through the read element 20 and the write element 15. A part or the whole of the data area 35 is moved into the storage unit 40 to access data of a specific magnetic domain.

  The storage unit 40 shown in FIG. 1 has substantially the same size as the data area 35. However, in other alternative embodiments, the storage unit 40 may have a different size than the data area 35. As an example, if more than one read element 20 and write element 15 are used for each magnetic shift register 10, the storage 40 can be much smaller than the data area 35. For example, when two read elements 20 and two write elements 15 are used for one magnetic shift register 10 and are arranged equally along the length of the data area 35, the storage unit 40 is approximately half of the data area 35. Only length is needed.

  A current 45 is applied to the data track 11 to move the magnetic moment in the magnetic domains 25, 30 along the data track 11 and beyond the read device 20 or the write device 15. In a magnetic material having a domain wall, a current passing through the domain wall moves the domain wall in the direction of the current. When the current passes through the magnetic domain, it becomes “spin polarized”. When this spin-polarized current moves through the intervening domain wall and into the next magnetic domain, spin torque is generated. This spin torque moves the domain wall. The speed of the domain wall is very high, ie about 100 to several hundred m / s, so that the process of moving this domain to the required position for the purpose of reading a particular domain or for changing its magnetic state by means of a writing element Can be made extremely short.

  The magnetic domains 25, 30, 31, etc. are moved back and forth (shifted) on the writing device 15 and the reading device 20, and data is stored inside and outside the storage unit 40 as shown in FIGS. The area 35 is moved. In the example of FIG. 3, the data area 35 is initially in the recessed portion of the magnetic shift register 10, that is, on the left side of the central area 42, and there is no magnetic domain in the storage unit 40. FIG. 5 shows the case where the data area 35 is entirely on the right side of the magnetic shift register 10.

  In order to write data to a particular magnetic domain, such as magnetic domain 31, current 45 is applied to magnetic shift register 10 to move magnetic domain 31 over writing device 15 and to align with writing device 15. When a current is applied to the magnetic shift register 10, all magnetic domains in the data area 35 move.

  The movement of the magnetic domains is controlled by both the magnitude and direction of the current and the time for which the current is applied. In one embodiment, a single current pulse of specified shape (magnitude versus time) and duration is applied to move the magnetic domains in the storage region by one increment or step. By applying a series of current pulses, the magnetic domains are moved by the required increment or number of steps. For this reason, the shifted portion 205 (FIG. 4) of the data area 35 is pushed out (shifted or moved) into the storage area 40.

  The direction of movement of the magnetic domains in the data track 11 depends on the direction of the applied current. The length of the current pulse can range from 2 to 300 picoseconds to tens of nanoseconds, depending on the magnitude of the current. The greater the current magnitude, the shorter the required current pulse length. Also, the shape of the current pulse (i.e., the detailed dependence of current versus time on the pulse) can be adjusted to achieve optimal movement of the domain wall. The shape of the current pulse is well-designed in relation to the detailed nature of the track's ferromagnetic material, and the domain wall has no significant energy or driving force to move beyond the next maximum position. It must be moved from one position to the next.

  In order to read data in a particular magnetic domain, such as magnetic domain 25, additional current is applied to magnetic shift register 10 to move magnetic domain 25 over and in alignment with reading device 20. A larger shift portion of the data area 35 is pushed (shifted or moved) into the storage unit 40.

  The reading device 20 and the writing device 15 shown in FIGS. 1 to 5 form part of a control circuit that determines a reference plane on which the reading device 20 and the writing device 15 are arranged. In one embodiment, the magnetic shift register 10 stands upright perpendicular to the outside of the reference plane, generally perpendicular to the reference plane.

  In order to operate the magnetic shift register 10, the control circuit includes logic and other circuitry for various purposes in addition to the read element 20 and the write element 15. Its various purposes include operation of read element 20 and write element 15, supply of current pulses for moving magnetic domains within magnetic shift register 10, and means for encoding and decoding data in magnetic shift register 10. Is included. In one embodiment, the control circuit is manufactured using a CMOS process on a silicon wafer. Preferably, the magnetic shift register 10 is designed to have a small footprint on the silicon wafer so as to maximize the storage capacity of the memory device while using the smallest silicon area to maintain the lowest possible cost. To do.

  In the embodiment shown in FIGS. 1-3, the footprint of the magnetic shift register 10 is largely determined by the area of the wafer occupied by the read element 20 and the write element 15. For this reason, the magnetic shift register 10 comprises a data track 11 that mainly extends in the direction of the outside of the wafer surface. The length of the vertical data track 11 determines the storage capacity of the magnetic shift register 10. The vertical range can be much larger than that of the horizontal data track 11, so that hundreds of magnetic bits can be magnetically shifted despite the extremely small area occupied by the magnetic shift register 10 in the horizontal plane. Can be saved in the register 10 Thus, the magnetic shift register 10 can store more bits for the same silicon wafer area as compared to a conventional solid state memory.

  Although the data track 11 of the magnetic shift register 10 is illustrated as being generally orthogonal to the plane (circuit plane) of the read element 20 and the write element, these data tracks 11 increase density as an example. For purposes or to facilitate the manufacture of these devices, it can be tilted at an angle with respect to this reference plane.

  FIG. 6 shows a method 300 for operating the magnetic shift register 10, and further reference is made to FIGS. Referring to FIG. 3, the memory system 100 determines the number of bits required to move the magnetic domain 25 to either the writing device 15 or the reading device 20 at block 305. Also, at block 310, the memory system 100 determines the direction required to move the magnetic domain 25. In FIG. 3, the magnetic domain 25 is on the left side of the writing device 15 and the reading device 20. For example, a positive current 45 may be required to move the magnetic domain 25 to the right, and a negative current 45 may be required to move the magnetic domain 25 to the left.

  Next, at block 315, the memory system 100 applies the desired current 45 to the magnetic shift register 10. The current 45 is one pulse or a series of pulses, and can move the magnetic domain 25 one bit at a time. In addition, the magnetic domain 25 in the data area 35 is incremented several times during the application of one pulse by changing the length or magnitude of the current duration in the pulse or the pulse shape (current in the pulse versus time). It is also possible to move only. In block 320, the magnetic domains in the data area 35 move in response to the current 45. The magnetic domain 25 stops at the desired device, ie, the writing device 15 or the reading device 20 (block 325).

  Referring to FIGS. 7 and 8, an alternative magnetic shift register 10A can be similar to the magnetic shift register 10 shown in FIGS. 1-5, but possible for the magnetic domains in the magnetic shift register 10A. In order to fix the position, alternating magnetic layers are provided. By fixing the possible positions of the magnetic domains, the specified magnetic domains are prevented from moving.

  The magnetic layer can be made of various ferromagnetic or ferrimagnetic materials. These magnetic materials are selected appropriately based mainly on the magnitude of their magnetization (magnetic moment per volume), exchange parameters, magnetic anisotropy, and damping coefficient. Also, the selection of these materials depends on their ease of manufacture and compatibility with the process used to manufacture the magnetic shift register.

  As shown in region 405 of magnetic shift register 10A, one type of magnetic material may be used for magnetic domains 410, 420 and a different type of magnetic material may be used for interleaved magnetic domains 415, 425. it can. In another embodiment, multiple types of magnetic materials can be used in various material orders.

  The introduction of different ferromagnetic layers in the magnetic shift register 10A results in a local minimum of energy similar to the “potential well”, so that the domain walls in the magnetic domain of different polarity are alternately strong. Lined up at the boundary between the magnetic layers 410, 415, etc. For this reason, the domain range and size are determined by the thickness of the magnetic layer.

  Due to the current pulse 45 applied to the magnetic shift register 10A, the magnetic domains 410, 415, 420, 425 in the region 405 move in the direction of the current 45. However, if the current pulse 45 does not have sufficient amplitude and duration, the magnetic domains 410, 415, 420, 425 may not move across the boundary between two different types of magnetic material. Therefore, the data area 35 can be moved one bit at a time, and the magnetic domain cannot move beyond the desired position.

  In addition to fixing the possible locations of the magnetic domains, using different layers of magnetic material allows for increased tolerances in current amplitude and pulse duration. In this embodiment, the portion of the magnetic shift register 10A that passes over the writing device 15 and the reading device 20 is a layer of a homogeneous magnetic material as shown in FIG. 9 or a different magnetic material as shown in FIG. Can do.

  The length of the alternating magnetic regions 410, 420, etc. and 415, 425, etc. may be different. Furthermore, the length of each type of magnetic regions 410, 420, etc. and 420, 425, etc. is preferably the same throughout the magnetic shift register 10A, but this is not required and these lengths are • It may vary somewhat across register 10A. What is important is to fix the magnetic domain in a defined position with respect to the current induced movement induced by the current pulse by the potential.

  Referring to FIGS. 10 and 11, another magnetic shift register 10B made of a homogeneous magnetic material can be made inhomogeneous by physically changing the width or area of the data track 11. FIG. By physically shaping the magnetic shift register 10B, a local energy minimum can be created in the magnetic shift register 10B.

  In the shaping method of FIGS. 10 and 11, notches such as notches 505 and 506 are provided in the ferromagnetic material of the magnetic shift register 10B. The notches 505, 506 may be open or filled with a material that can be metallic or insulating.

  In one embodiment, these cuts 505, 506 can be evenly spaced. In another embodiment, the spacing between these notches 505, 506 can be non-uniform along the length of the magnetic shift register 10B. The notches 505, 506 are aligned with each other on each side of the data track 511.

  It may be advantageous to manufacture a magnetic shift register that has a notch on only one side of the data track 511. Since the domain walls are fixed using these notches 505 and 506, a sufficient fixed potential can be supplied by only one notch on one side of the data track 511. The notches can be placed on one or more of the four sides of the data track 511 shown in FIGS. 10 and 11 or more. Also, for ease of manufacture, the notches can be provided alternately on each side to obtain a continuous fixed position along the track (eg, all notches on a single side of the track). To form a more dense set of fixed positions along the track than would be possible by positioning).

  In another embodiment, instead of the notches 505, 506, the width of the data track 511 is locally increased to provide a non-narrow protrusion. What is needed is a means of fixing the magnetic domain by changing the local potential on the domain wall.

  In yet another embodiment, the width or area of the data track 511 is alternately formed in successive regions so that the data track 511 is composed of regions of alternate width or area.

  In the magnetic shift register 10B, it is not necessary to uniformly form cuts or protrusions or alternating magnetic regions along its length. A sufficient number of such fixed positions may be formed in the magnetic shift register 10B so that the data area 35 is moved by one increment per current pulse or by a specified number of increments. . For example, only one fixed position per N magnetic domains may be sufficient. Here, N can be 2 or more.

  The storage unit 40 may or may not include these cuts. The bottom 510 of the magnetic shift register 10B across the writing device 15 and the reading device 20 may or may not include these cuts 505, 506.

  In yet another embodiment, the magnetic shift register 10B consists of a combination of different ferromagnetic materials having cuts 505, 506, combining the features of the magnetic shift registers 10A and 10B.

  In general, the data track 11 of the magnetic shift register 10 is manufactured by forming a multilayer stack of alternating layers of silicon and / or dielectric material. Vias having a height of 0.5 to 10 microns and a cross section of about 100 nm in length and 100 nm in width are etched into this multilayer stack of alternating silicon or dielectric layers. Although dimensions are presented throughout, it will be understood that these dimensions are given for illustrative purposes only and that the invention is not limited to these values or dimensions. For example, the via height can range between about 0.5 microns and about 10 microns. Via cross-sections can range between about 10 nm in length and 10 nm in width and about 1 micron in length and 1 micron in width. These vias are then filled with a ferromagnetic or ferrimagnetic material to form the data region 35 and storage 40 of the data track 11 of the magnetic shift register 10 of FIG.

  The via can have an elliptical, rectangular, or square cross section. In the case of a single silicon layer, there are manufacturing techniques to create vias of these dimensions based on the trench capacitors used by DRAM. Conventional techniques for manufacturing these trench capacitors have achieved dimensions of about 1 to 10 microns in depth and about 0.1 microns in cross section. See U.S. Patent Nos. 6,544,838, 6,284,666, 5,811,357, and 6,345,399. These are also incorporated herein by reference. Using these manufacturing techniques, the data track 11 of the magnetic shift register 10 shown in FIGS. 12 to 32 is manufactured.

  FIGS. 12-14 illustrate an embodiment for forming the bottom or central region 42 of the data track 11. For example, an insulator 605 such as silicon dioxide or silicon nitride is formed to a thickness of about 300 nm. A photoresist is applied to the insulator 605 and patterned into a rectangular shape 610. Using standard etching techniques, rectangle 610 is etched to a depth of about 200 nm to form trench 615. For more details on the silicon nitride etch process, see US Pat. No. 6,051,504, and for further details on the silicon dioxide etch process, see US Pat. No. 5,811,357. checking ... These are also incorporated herein by reference.

  In FIG. 14, the material in trench 615 is filled to form block 620. Block 620 may comprise a homogeneous magnetic material corresponding to the central region 42 selected from the group consisting of, for example, a ferromagnetic material and a ferrimagnetic material. In this case, the block 620 is planarized and polished. Exemplary ferromagnetic or ferrimagnetic materials used in block 620 include permalloy, nickel-iron alloys, cobalt-iron alloys, alloys formed from one or more of Ni, Co, and Fe, Ni, Co , And Fe and other elements such as B, Zr, Hf, Cr, Pd, Pt and the like. Alternatively, block 620 is formed from a heterogeneous magnetic material consisting of alternating regions of different ferromagnetic or ferrimagnetic materials, for example, similar to those shown in regions 410, 420, and 415, 425 of FIG. It is also possible. These regions can be formed by additional processing steps not shown in FIGS. This additional processing steps may include additional lithography, patterning, etching, material deposition using, for example, plating or sputter deposition or CVD, and planarization steps. Alternatively, the block 620 can include a sacrificial material that is later removed by etching. The sacrificial material can be formed by low-pressure chemical vapor deposition followed by planarization by chemical mechanical polishing.

  A thin dielectric layer 625, for example silicon nitride, can then be deposited over insulator 605 to serve as a bottom capping layer and, if necessary, protect the trench during subsequent process steps. . The thickness of the bottom capping layer ranges between about 10 and 500 nm. The bottom capping layer 625 can comprise silicon nitride, silicon oxide, or any other suitable dielectric. In another embodiment, the bottom capping layer 625 may not be necessary.

FIG. 16 illustrates the fabrication of a structure that can form two vias and create the data area 35 and storage 40 of the data track 11. Multilayer stack structure 705 is formed of alternating silicon / dielectric or dielectric / dielectric materials (shown as materials A and B). Materials A and B are selected in consideration of etching characteristics. In a preferred embodiment, material A is silicon dioxide (SiO ₂ ) and material B is silicon (Si). Alternatively, the material A includes silicon dioxide and the material B includes silicon nitride (Si ₃ N ₄ ).

  In the example of FIG. 16, the first set of layers, such as layers 710, 715, 720, etc. is formed of material A, such as silicon dioxide. The second set of layers, such as layers 725, 720, 735, etc. are formed of material B, such as silicon or silicon nitride. The first and second sets of layers can be formed using various techniques. For example, a polycrystalline silicon layer can be formed using low pressure chemical vapor deposition and an amorphous silicon layer can be formed using sputter deposition. A thin dielectric layer, such as silicon nitride, can be deposited over the multilayer stack structure 705 to serve as the upper capping layer 740. The thickness of the upper capping layer 740 ranges between about 10 and 500 nm. The top capping layer may consist of silicon nitride, silicon oxide, or any other suitable dielectric.

  Material A and Material B are selected to have different etch rates, allowing the formation of notches or protrusions in the via walls. Although shown with equal thickness in FIG. 16, the layers formed from material A and material B may have different thicknesses.

  The multilayer stack structure 705 can include, for example, about 100 layers of alternating material A and material B, for example, with a total thickness of, for example, about 0.5 to 10 microns or more. For example, the thicknesses of material A and material B forming the layers 710, 715, 720, 725, 730, 735 are equal to the separation distance of the domain walls in the data region 35 or the storage portion 40 of the data track 11.

  Material A and material B are etched to form notches or protrusions. For example, the thickness of one material represented by material A corresponds to the separation distance between the domain walls in the data track 11. Other materials, for example represented by material B, form notches or protrusions in the data area 35 or storage 40 in the data track 11. The structure of such a data track 11 is shown in FIGS. Although layer A and layer B represented by layers 710, 715, 720, 725, 730, 735 are shown with equal thickness, in practice they may be very different thicknesses. The width of each notch or protrusion can range from about 5 nm to 100 nm.

  17, 18, 19, 20, and 21 illustrate the formation of vias 805, 810 in the multilayer stack structure 705. In embodiments utilizing silicon as material B (ie, layers 725, 730, 735), the sidewalls of vias 805, 810 are oxidized to form a thin insulating layer of silicon dioxide (thickness between about 3 nm and 30 nm). Range). Vias 805, 810 can be filled with a homogeneous ferromagnetic or ferrimagnetic material to form data area 35 and storage 40 of data track 11. FIG. 18 shows a cross-sectional view of the multilayer stack structure 705 as viewed perpendicular to the vias 805, 810, illustrating a rectangular cross section of the vias 805, 810. Vias 805, 810 can be formed in a variety of other cross sections. For example, rectangular cross sections as shown in vias 805A and 810A shown in FIG. 19, circular cross sections as shown in vias 805B and 810B shown in FIG. 20, and elliptical cross sections as shown in vias 805C and 810C shown in FIG. It is.

  As shown in the cross-sectional view of FIG. 22, vias 805, 810 etch through multilayer stack structure 705 to block 620 in insulator 605. In the example of FIGS. 17 to 21, the vias 805 and 810 are formed to have flat and smooth walls by a process of etching the vias. In embodiments where material B (ie, layers 725, 730, 735) comprises silicon, a dry etch process with a process selective to silicon relative to silicon dioxide and a process selective to silicon dioxide relative to silicon. The vias 805 and 810 can be formed by alternately performing. The term “selective” is used to indicate that the etchant etches the first material faster than the second material. In other words, in a dry etch process for silicon that is selective to silicon dioxide, silicon is etched at a faster rate than silicon dioxide in order to obtain better etch control. See US Pat. Nos. 6,544,838 and 6,284,666 for further details regarding dry etching processes for silicon selective to silicon dioxide. These patents are also incorporated herein by reference. See U.S. Pat. Nos. 6,294,102 and 5,811,357 for further details on dry etching processes for silicon dioxide selective to silicon. These patents are also incorporated herein by reference.

  When material A is formed of silicon oxide and material B is formed of silicon nitride, vias 805, 810 are processes that preferentially etch silicon nitride over silicon oxide (US Pat. No. 6,461,529 and No. 6,051,504, which are incorporated herein by reference) and a process for preferentially etching silicon dioxide over silicon nitride (US Pat. Nos. 294,102 and 5,928,967, which are also incorporated herein by reference) by performing a dry etching process alternately and continuously. Can be formed similarly. If block 620 is made of a metal such as a ferromagnetic or ferrimagnetic material, the etchant is unlikely to etch significantly into the block 620 material. After the vias 805, 810 are formed, the capping layer 625 is etched to open the contact to the bottom or block 620 of homogeneous ferromagnetic or ferrimagnetic material.

  Prior to etching vias 805, 810, etch capping layer 740 with an appropriate etchant, or depending on the components of layers A and B and layer 740, the layer A or B The capping layer 740 can be etched using one of the etching solutions. A capping layer 740 can be used, for example, to prevent oxidation of the top layer of the stack when the top layer of a multilayer stack structure of alternating silicon and / or dielectric layers is composed of silicon.

23, 24, 25, 26, 27 show the results of using a selective wet etch process after forming vias 805, 810. FIG. 23, 24, 25, 26, and 27, neither the capping layer 740 nor the substrate capping layer 625 is shown in the multilayer stack structure 705. By using a selective wet etch process, material A and material B can be etched at different rates. As an example, hydrofluoric acid (HF) based chemicals (eg buffered or diluted HF) can be used to wet etch silicon dioxide selectively to both silicon oxide and silicon nitride, and silicon dioxide. In order to selectively wet-etch silicon nitride, phosphoric acid H ₃ PO ₄ based chemicals can be used.

  Etching of material A and material B at different rates creates regular variations in the cross-section of vias 805, 810. When filled with a ferromagnetic or ferrimagnetic material, the cross-sectional variation of the vias 805, 810 creates a protrusion or notch in the data area 35 or storage 40 of the data track 11. The magnetic wall can be fixed in the data region 35 and the storage unit 40 by using the protrusion or notch of the magnetic material track 11. The notch or protruding configuration of the vias 805, 810 is selected to obtain the optimum performance of the data track 11 of the magnetic shift register 10. Specifically, the length and depth of the notches or protrusions and their shapes can be varied to vary the fixed potential of the domain wall.

  FIG. 23 shows a cross-section of a portion of via 1002 illustrating a selective etching process in which material A (represented by layers 1004, 1008) is etched faster than material B (represented by layers 1006, 1010). To do. When the via 1002 is filled with a ferromagnetic or ferrimagnetic material, the layers 1004, 1008 form protrusions and the layers 1006, 1010 form notches in the data region 35 or storage 40 of the data track 11.

  FIG. 24 shows a cross-sectional view of a portion of via 1012 where material A (represented by layers 1014, 1018) is etched later than material B (represented by layers 1016, 1020). When the via 1012 is filled with ferromagnetic material or ferromagnetic material, the layers 1014 and 1018 form notches and the layers 1016 and 1020 form protrusions in the data region 35 or storage 40 of the data track 11.

  Material A, material B, and the etching process can be selected to provide shallow notches as shown in FIGS. 23 and 24, or deeper notches as shown by vias 1022 in FIG. Material B (represented by layers 1026, 1030) etches much faster than Material A (represented by layers 1024, 1028).

  Also, as shown in FIGS. 26 and 27, the layer thicknesses of material A and material B may vary. FIG. 26 shows a cross section of via 1032 where the layer of material A (represented by layers 1034, 1038) is thicker than the layer of material B (represented by layers 1036, 1040). When the via 1032 is filled with a ferromagnetic or ferromagnetic material, the layers 1036, 1040 form thin protrusions and the layers 1034, 1038 form wide notches in the data region 35 or storage 40 of the data track 11. .

  FIG. 27 shows a cross section of a via 1042 in which a layer of material A (represented by layers 1046, 1050) is thinner than a layer of material B (represented by layers 1044, 1048). When via 1042 is filled with ferromagnetic material or ferromagnetic material, layers 1046, 1050 form thin notches and layers 1044, 1048 form wide protrusions in data region 35 or storage 40 of data track 11. .

  FIGS. 28 and 29 show a cross-section of one form of data track 11 with vias 1105, 1110 (etched into multilayer stack structure 1115) and trench 1120. To create the trench 1120, the block 620 is filled with a sacrificial dielectric material (FIGS. 12-15). This material is removed by etching when vias 1105 and 1110 are formed. In an alternative embodiment shown in FIG. 29, block 620 comprises ferromagnetic or ferrimagnetic material 1125 that remains after creating vias 1105, 1110.

  As shown in FIG. 28, material A (represented by layers 1130, 1135) is etched at a faster rate than material B (represented by layers 1140, 1145). As a result, the data track 11 formed by the vias 1105, 1110 will have regularly spaced notches and protrusions as well as layers of material A and material B of equal thickness.

  FIGS. 30 and 31 show a track 1215 created by filling vias 1105, 1110, and trench 1120 with a ferromagnetic or ferrimagnetic material, as shown by filled vias 1205, 1210 and bottom region 1220. FIG. . The filled via 1205 corresponds to the data area 35, the filled 1210 corresponds to the accumulator 40, and the bottom area 1220 corresponds to the central area 42.

  Vias 1105, 1110, and trenches 1120 can be filled by various methods such as electroless plating or electroplating. See US Pat. No. 3,702,263 for electroless plating processes and US Pat. No. 4,315,985 for electroplating processes. These patents are also incorporated herein by reference. Alternatively, the block 1125 can include a magnetic material, such as a ferromagnetic or ferrimagnetic material, before filling the vias 1105, 1110. The magnetic material of block 1125 may or may not be the same as that used to fill vias 1105 and 1110. The metal of block 1125 can be used as a seed layer electrode for electroless or electroplating processes. Since electroplating processes are much faster than electroless plating processes, it is desirable to use electroplating processes. In order to perform electroplating, the seed layer electrode must be contacted. This can be accomplished via a sacrificial wire or contact (not shown) or can be a very thin metal layer such as Al deposited on the sidewalls of vias 1105, 1110. After the plating process is complete, the Al metal on the sidewalls can be oxidized and the track heated at a temperature of approximately 300 C to form an insulating aluminum oxide. In the case of FIG. 28 with the sacrificial layer removed, a thin seed layer electrode can be deposited by a process such as chemical vapor deposition before filling the via.

  A process 1300 for manufacturing the track 1215 is illustrated by the process flowchart of FIG. In step 1305, an insulator 605 is formed (FIG. 12). In step 1310, a rectangle 610 is patterned on the insulator 605 (FIG. 12). In step 1315, the rectangle 610 is etched to form a trench 615 (FIG. 13). In step 1320, the trench 615 is filled with a sacrificial dielectric, ferromagnetic, or ferrimagnetic material (FIG. 14). Then, in step 1325, trench 620 is preferably covered by capping layer 625.

  In step 1330, alternating layers of material A and material B are added to insulator 605 to form a multilayer stack structure 705 (FIG. 16). The multi-layer stack structure 705 includes, for example, about 100 layers of alternating materials A and B, and the total thickness can be, for example, about 10 microns. In step 1335, a capping layer 740 is formed on top of the multilayer stack structure 705.

  In step 1340, vias 805, 510 are non-selectively etched through multilayer stack structure 705 to block 620 (FIGS. 17-22). If block 620 is filled with a sacrificial dielectric material, then at step 1340, the sacrificial dielectric material is also removed by etching (FIG. 11).

  In step 1345, an optional selective etching process can be used to selectively etch one material faster than the other to form notches and protrusions in the walls of vias 805, 810 (from FIG. 23). FIG. 29). In step 1350, vias 805, 810 are filled with a ferromagnetic or ferrimagnetic material (FIGS. 30, 31) to form data track 11 of magnetic shift register 10.

  In another embodiment of manufacturing the data track 11, conductive pads are formed in the lower insulating layer and the central region 42 is formed in the upper layer of the multilayer stack structure 705. This manufacturing process is illustrated in FIGS.

  34, 35, 36, and 37 illustrate the manufacture of conductive pads that connect to the data region 35 and storage 40 at the bottom of the data track 11. For example, an insulator 1405 such as silicon nitride or silicon dioxide is formed to a thickness of about 300 nm.

  A photoresist is applied to the insulator 1405 and patterned into a rectangular shape 1410 and 1415. Using standard etching techniques, rectangles 1410, 1415 are etched to a depth of about 200 nm to form trenches 1420, 1425. See US Pat. No. 6,051,504 for the silicon nitride etch process and US Pat. No. 5,811,357 for the silicon dioxide etch process. These patents are also incorporated herein by reference.

  In FIG. 35, the material in trenches 1420, 1425 is filled to form blocks or bottom pads 1430, 1435. Blocks 1430 and 1435 are made of a conductive material and form a conductive pad at the bottom of the data block 11. Exemplary conductive materials used for blocks 1430, 1435 are conductive silicon, copper, and the like. Alternatively, the blocks 1430, 1435 can be made of a sacrificial material that is later removed by etching. The sacrificial material can be made of, for example, silicon dioxide. The sacrificial material is formed by flattening by chemical mechanical polishing after low pressure chemical vapor deposition. Next, a thin dielectric layer such as silicon nitride is deposited on top of the insulator 1405 to function as the capping layer 1440. The thickness of the capping layer 1440 ranges between about 10 and 500 nm. The capping layer 1440 can comprise silicon nitride, silicon oxide, or any other suitable dielectric.

  FIG. 37 illustrates the manufacture of a structure that forms two vias and creates the data area 35 and storage 40 of the data track 11. The multilayer stack structure 1505 is formed from alternating materials, ie, material A and material B. Materials A and B are formed from silicon / dielectric or dielectric / dielectric materials. In a preferred embodiment, material A comprises silicon dioxide and material B is formed from silicon. Silicon can be formed as polycrystalline silicon by a low pressure chemical vapor deposition process or can be formed from amorphous silicon by a sputter deposition process. Alternatively, material A includes silicon dioxide and material B includes silicon nitride.

  In the example of FIG. 37, the first set of layers, such as layers 1510, 1515, 1520, is formed of material A, such as silicon dioxide. A second set of layers, such as layers 1525, 1530, 1535, is formed of material B, such as silicon or silicon nitride. A thin dielectric layer such as silicon nitride is deposited on top of the multi-layer stack structure 1505 to function as the capping layer 1540. The thickness of the capping layer 1540 ranges between about 10 nm and 500 nm. The bottom capping layer 1540 can comprise silicon nitride, silicon oxide, or any other suitable dielectric.

  Material A and Material B are selected to have different etch rates, allowing the formation of notches or protrusions in the via walls. Although shown with equal thickness in FIG. 37, material A and material B may have different thicknesses.

  Multilayer stack structure 1505 includes, for example, about 100 layers of alternating material A and material B, and the total thickness can be, for example, about 10 microns. The thicknesses of the layers 1510, 1515, 1520, 1525, 1530, 1535, etc. correspond to individual magnetic domains or function as domain wall fixing positions in the data area 35 or the storage unit 40 of the data track 11.

  Material A or material B is etched to form notches or protrusions. Layers such as layers 1510, 1515, 1520, 1525, 1530, 1535 are shown with equal thickness, but in practice they may be of different thicknesses. For example, the thickness of one material represented by the material A may correspond to the separation distance between the domain walls in the data track 11. For example, the other material represented by material B forms a notch or protrusion in the data area 35 or storage 40 of the data track. The structure of such a data track 11 is shown in FIGS. Depending on the magnetic properties of the material forming the track, the domain wall can be limited to notches or protrusions, or can be limited to the region between the notches or protrusions.

  FIG. 38 shows the formation of vias 1605, 1610 in the multilayer stack structure 1505. In embodiments using silicon as material B (ie, layers 1525, 1530, 1535), the sidewalls of vias 1605, 1610 are oxidized to form a thin insulator layer of silicon dioxide (thickness between about 3 nm and 30 nm). Range). Vias 1605 and 1610 can be filled with a homogeneous magnetic material, such as a ferromagnetic or ferrimagnetic material, to form data region 35 and storage 40 of data track 11.

  As shown in the cross-sectional view of FIG. 39, vias 1605, 1610 have been etched through the multilayer stack structure 1505 and capping layer 1440 to blocks 1430, 1435. In the example of FIGS. 38 and 39, vias 1605 and 1610 are formed to have flat and smooth walls by a process that non-selectively etches the vias. In embodiments in which material A (ie, layers 1510, 1515, 1520) is comprised of silicon dioxide and material B (ie, layers 1525, 1530, 1535) is comprised of silicon, vias 1605, 1610 are composed of silicon selective to silicon dioxide. It can be formed by alternating a dry etching process and a silicon dioxide dry etching process selective to silicon. See US Pat. Nos. 6,544,838 and 6,284,666 for a process that alternates a silicon dry etch process selective to silicon dioxide. These patents are also incorporated herein by reference. See US Pat. Nos. 6,294,102 and 5,811,357 for a process for alternating a silicon dioxide dry etch process selective to silicon. These patents are also incorporated herein by reference.

  In an alternative embodiment where material A is formed from silicon oxide and material B is formed from silicon nitride, a silicon nitride dry etch process selective to silicon oxide (US Pat. No. 6,461,529). And US Pat. No. 6,051,504, which are hereby incorporated by reference) and a silicon dioxide dry etching process selective to silicon nitride (US Pat. No. 6 , 294,102 and 5,928,967, which patents are hereby incorporated by reference) to form vias 1605 and 1610. . The non-selective etching process etches material A and material B at the same rate. If the blocks 1430, 1435 are composed of a conductor such as conductive silicon, copper, etc., the etching material does not substantially erode the material of the blocks 1430, 1435.

  FIG. 40 shows the results of using a selective etch process on the material with different etch rates. By using a selective etching process, material A and material B of the multilayer stack structure 1505 can be etched at different rates. For example, hydrofluoric acid HF-based chemicals (eg buffered or diluted HF) can be used for wet etching of silicon dioxide selective to silicon, and H3PO4 based chemicals are selected for silicon dioxide. It can be used for wet etching of typical silicon nitride.

  Etching of material A and material B at different rates creates regular variations in the cross-section of vias 1805, 1810. When filled with a ferromagnetic material or ferromagnetic material, cross-sectional variations in the vias 1805, 1810 create protrusions or notches in the data region 35 or storage 40 of the data track 11. The protrusions or notches of the track 11 serve to represent possible boundaries between the magnetic regions of the track 11, i.e., domain walls that are written to the track using, for example, the write element 15 shown in FIG. 2. For this reason, the magnetic domain wall of the track is fixed in the rest state in the data area 35 and the storage unit 40 using these notches or protrusions. The notch or protrusion configuration of the vias 1805, 1810 is selected to provide optimal performance of the data track 11. The configuration of vias 1805, 1810 and the selection of material A and material B thickness can be similar to those of FIGS. 23, 24, 25, 26, 27.

  FIG. 41 shows the result of removing material from the multilayer stack structure 1505 to form a region or upper trench 1905. Removing the material to form region 1905 can be performed, for example, by etching with photoresist or the like (see US Pat. Nos. 6,461,529 and 6,051,504). These patents are hereby incorporated by reference). The region 1905 is then filled with a ferromagnetic or ferrimagnetic material to form the central region 2010 of the data track 11, as shown by the data track 2005 in FIG.

  FIG. 42 shows a data track 2005 created by filling vias 1805, 1810 and regions 1905 with a ferromagnetic or ferrimagnetic material. Vias 1805, 1810 and region 1905 can be filled by various methods such as electroless plating or electroplating. See U.S. Pat. No. 3,702,263 for the electroless plating process and U.S. Pat. No. 4,315,985 for the electroplating process. These patents are also incorporated herein by reference.

  As shown in the cross-sectional views of FIGS. 43 and 44, the vias 2105 and 2110 are etched through the multi-layer stack structure 1505 to blocks 1430 and 1435. Vias 2105 and 2110 contact the blocks 1430 and 1435 to form conductors that connect external circuitry to the data track 2005. In an embodiment where material A is formed from silicon oxide and material B is formed from silicon nitride, vias 2105, 2110 may be a silicon nitride dry etch process (US Pat. No. 6,461) selective to silicon oxide. , 529 and 6,051,504, which are incorporated herein by reference) and silicon dioxide dry etching processes selective to silicon nitride (USA). See Patent Nos. 6,294,102 and 5,928,967, which patents are also incorporated herein by reference).

  In an alternative embodiment, blocks 1430, 1435 are composed of sacrificial dielectric material, which is removed by an etching process that forms vias 2105, 2110. As a result, trenches 2115 and 2120 are formed as shown in FIG.

  45 and 46 show the results of filling the vias 2105 and 2110 with conductive materials such as polysilicon and tungsten up to the blocks 1430 and 1435 (FIG. 45). In an alternative embodiment, trenches 2115, 2120 are filled with the same conductive material that fills vias 2105, 2110 by the same process as that of vias 2105, 2110 to form conductive pads.

  As an example of a technique for forming a conductive connection in data track 2005, the configuration of vias 2105, 2110 is shown. In yet another embodiment, conductors up to blocks 1430 and 1435 can be formed by etching vias 2305 and 2310 through insulator 1405 as shown in FIG. By filling the vias 2305 and 2310 with conductive material, the data track 2005 is electrically connected to the bottom of the insulator 1405 through a metal via to form a current pulse that is transmitted to the track 11, for example. Can be connected to any device.

  A method 2400 for manufacturing the data track 2005 is illustrated by the process flowcharts of FIGS. In step 2405, an insulator 1405 is formed (FIG. 33). In step 2410, rectangles 1410 and 1415 are patterned on the insulator 1405 (FIG. 33). In step 2415, rectangles 1410 and 1415 are etched to form trenches 1420 and 1425 (FIG. 34). In step 2420, trenches 1420, 1425 are filled with a sacrificial dielectric or conductive material (FIG. 35) to form blocks 1430, 1435. Next, in step 2425, a capping layer is applied to the surface of the insulator 1405.

  In step 2430, multiple layers of alternating materials A and B are added to insulator 1450 to form a multilayer stack structure 1505 (FIG. 37). The multilayer stack structure 1505 includes, for example, about 100 layers of alternating materials A and B, and the total thickness can be, for example, about 10 microns. In step 2435, a capping layer 1540 is formed on top of the multilayer stack structure 1505. In step 2440, vias 1605, 1610 are non-selectively etched through multilayer stack structure 1505 to blocks 1430, 1435 (FIGS. 38, 39).

  In step 2445, an optional selective etch process is used to etch one material selectively faster than the other in the walls of vias 1605, 1610 to form notches and protrusions in the walls of vias 1605, 1610. (FIGS. 40 and 41).

  In step 2450, regions 1905 are removed by etching to form trenches 1905 that connect vias 1805 to vias 1810 (FIG. 41). In step 2455, vias 1805, 1810 and trenches 1905 are filled with a ferromagnetic or ferrimagnetic material (FIG. 42) to form a data track 2005.

  In step 2460, vias 2105, 2110 are etched from the top of multilayer stack structure 1505 to blocks 1430, 1435. Blocks 1430 and 1435 are filled with a sacrificial dielectric material, and in step 2460, the sacrificial dielectric material is also etched away (FIG. 44) to form trenches 2115 and 2120. In step 2465, vias 2105, 2110 are filled with a conductive material to form a current path through data track 2005 (FIGS. 45, 46). In step 2460, if the sacrificial dielectric material is etched away from blocks 1430, 1435, then in step 2465, trenches 2115, 2120 are also filled to form conductive pads 2215, 2220.

  50, 51, 52 illustrate an embodiment that forms the bottom or central region 42 of the data track 11. For example, an insulator 2505 such as silicon nitride or silicon dioxide is formed to a thickness of about 300 nm. A photoresist is applied to the insulator 2505 and patterned into a rectangular 2510 shape. Using standard etching techniques, rectangle 2510 is etched to a depth of about 200 nm to form trench 2515. See US Pat. No. 6,051,504 for the silicon nitride etch process and US Pat. No. 5,811,357 for the silicon dioxide etch process. These patents are also incorporated herein by reference.

  The trench 2515 is filled with the material of FIG. 52 to form a block 2520. Block 2520 is made of a ferromagnetic or ferrimagnetic material and corresponds to the central region 42 of the data block 11. If the block 2520 is made of a ferromagnetic or ferrimagnetic material, the block 2520 is planarized and polished. Exemplary ferromagnetic or ferrimagnetic materials used in block 2520 are permalloy, nickel iron, and the like. Alternatively, the block 2520 can comprise a sacrificial material that is later removed by etching. The sacrificial material can be formed by performing chemical mechanical polishing for planarization after low pressure chemical vapor deposition. A thin dielectric layer such as silicon nitride is then deposited on top of the insulator 2505 to function as a capping layer (not shown in FIG. 25). The thickness of the capping layer ranges between about 10 nm and 500 nm. The capping layer may consist of silicon nitride, silicon oxide, or any other suitable dielectric.

  FIG. 53 illustrates the manufacture of a structure that can form two vias and create the data area 35 and storage 40 of the data track 11. Uniform layer structure 2605 (also referred to herein as uniform layer 2605) is formed to a thickness of, for example, about 10 microns. Layer 2605 can be composed of silicon or a dielectric material such as silicon dioxide or silicon nitride. If layer 2605 is formed from silicon, a thin dielectric layer such as silicon nitride can be deposited on top of uniform layer 2605 to function as capping layer 2610 to prevent oxidation of the surface of the silicon layer. it can. The thickness of the capping layer 2610 can range, for example, between about 10 and 500 nm. Bottom capping layer 2610 may comprise silicon nitride, silicon oxide, or any other suitable dielectric.

  FIG. 54 shows the formation of vias 2705, 2710 in the uniform layer 2605. Vias 2705 and 2710 can be filled with a ferromagnetic or ferrimagnetic material to form the data region 35 and storage 40 of the data track 11. In embodiments utilizing silicon as the uniform layer 2605, the sidewalls of vias 2705, 2710 are oxidized to form a thin insulating layer of silicon dioxide (thickness ranges between about 3 nm and 30 nm).

  As shown in the cross-sectional view of FIG. 55, vias 2705 and 2710 have been etched through the uniform layer 2605 to a block 2520 of insulator 2505. Vias 2705 and 2710 are formed to have flat and smooth walls. If the uniform layer 2605 is silicon, the sidewalls of the vias 2705, 2710 are oxidized to form a thin insulating layer of silicon dioxide (thickness ranges between about 3 nm and 30 nm). After the vias 2705, 2710 are formed, the capping layer 2610 is etched to open the contact to the bottom of the homogeneous ferromagnetic or ferrimagnetic material or block 2520. The capping layer 2610 is resistant to oxidation similarly to the insulator 2505. If block 2520 is comprised of a metal such as a ferromagnetic or ferrimagnetic material, the etching material will not etch substantially into block 2520.

  56 and 57 show a cross section of one form of data track 11 with vias 2705, 2710 (uniform layer 2605) and trench 2905. Block 2520 is filled with a sacrificial dielectric material to create trench 2905 (FIG. 52). This material is removed by etching when vias 2705, 2710 are formed. In an alternative embodiment shown in FIG. 57, block 2910 is comprised of a ferromagnetic or ferrimagnetic material that remains after creating vias 2705, 2710.

  FIG. 58 shows a track 3005 created by filling vias 2705, 2710 and trenches 2905 (FIGS. 56, 57) with alternating layers of different types of ferromagnetic or ferrimagnetic materials. Vias 2705, 2710, and trench 2905 can be filled by various methods such as electroless plating or electroplating. See US Pat. No. 3,702,263 for electroless plating processes and US Pat. No. 4,315,985 for electroplating processes. These patents are also incorporated herein by reference. The trench 2905 is filled with one magnetic material or material I to create a block 3010. Block 3010 corresponds to the central region 42 of the data track 11.

  A magnetic material II is then deposited on the layer above block 3010 to form layer 3015. A magnetic material I is then deposited on the layer 3015 to form the layer 3020. Magnetic material I and magnetic material II are alternately deposited in the via to form, for example, a total of about 100 alternating layers. The thickness of each layer, such as layers 3015, 3020, can be between about 50 and 500 nm, for example. The alternating ferromagnetic or ferrimagnetic layers 3015, 3020 are made of magnetic materials having different magnetic properties including magnetization and / or magnetic exchange and / or magnetic anisotropy. These different magnetic properties make it possible to fix the domain walls within the boundaries or layers between these layers.

  Alternatively, before filling vias 2705, 2710, block 2520 may include a material such as a ferromagnetic or ferrimagnetic material. The metal of block 2520 can be used as an electrode for the electroplating process. The magnetic material of block 2520 may or may not be the same as that used to fill vias 2705, 2710.

  Domain walls 3025, 3030 can occur between the alternating magnetic layers. The alternating ferromagnetic or ferrimagnetic layers 3020, 3035 are made of magnetic materials having different magnetization or magnetic exchange or magnetic anisotropy. Due to these different magnetic properties, the domain wall can be fixed at the boundary 3025 between the layers 3020, 3035. For example, a domain wall 3025 is generated between the layer 3020 and the layer 3035. A domain wall 3030 is formed between the layer 3035 and the layer 3040.

  In an alternative embodiment, domain walls 3045, 3050 may occur in each layer of one of the magnetic materials, eg, magnetic material II. The ability to form a layer with a domain wall in a magnetic material depends on the properties of the ferromagnetic or ferrimagnetic material. The arrangement of the domain walls in the data track 11 can be intentionally optimized by the selection of the magnetic material used for the magnetic material I and the magnetic material II.

  As shown in FIGS. 59, 60, 61, the thickness of the layer of magnetic material may vary. For ease of illustration, the capping layer is not shown in FIGS. FIG. 59 shows a data track 3005 consisting of magnetic layers of equal thickness. FIG. 60 shows a data track 3105 consisting of magnetic layers of different thicknesses. In FIG. 60, the layer of magnetic material I (represented by layers 3110, 3115) is thin. The layer of magnetic material II (represented by layers 3120, 3125) is thick. In FIG. 61, the data track 3130 is also composed of magnetic layers having different thicknesses. In FIG. 61, the layer of magnetic material I (represented by layers 3135, 3140) is thick. The layer of magnetic material II (represented by layers 3145, 3150) is thin.

  FIG. 62 shows a method 3200 for manufacturing a data track 3005 composed of layers of different ferromagnetic or ferrimagnetic materials. In step 3205, an insulator 2505 is formed (FIG. 50). In step 3210, a rectangle 2510 is patterned on the insulator 2505 (FIG. 50). In step 3215, the rectangle 2510 is etched to form a trench 2515 (FIG. 51). In step 3220, trench 2515 is filled with a sacrificial dielectric, ferromagnetic, or ferrimagnetic material (FIG. 52) to form block 2520. In step 3225, a uniform layer 2605 is added to the insulator (FIG. 53). The uniform layer 2605 can have a thickness of about 10 microns, for example. In step 3230, a capping layer 2610 is formed on the uniform layer 2605 (FIG. 53). After completing block 2520, a capping layer may also be applied over layer 2505.

  In step 3235, a non-selective etch process is used to etch vias 2705, 2710 through uniform layer 2605 to block 2520 (FIGS. 54, 55, 56, 57). If block 2520 is filled with a sacrificial dielectric material, this sacrificial dielectric material is also etched away at step 3235 (FIG. 56).

  In step 3240, vias 2705, 2710 are filled with alternating magnetic layers of different types of ferromagnetic or ferrimagnetic material (FIG. 58) to form data track 3005. The thickness of the magnetic material layer of the track 3005 may vary widely (FIGS. 59-61).

  The process of creating track 11 using method 3200 is similar to the process of manufacturing track 11 using method 1300, except that multiple layers of magnetic material are used. Similarly, the track 11 can be manufactured using the method 3200. In this embodiment, a uniform dielectric material is used in place of the multi-layer stack structure 1505 and the data track 2005 is filled with alternating layers of magnetic material instead of uniform magnetic material.

  It will be appreciated that the specific embodiments of the present invention described above are merely illustrative of some uses of the principles of the present invention. Numerous modifications can be made to the method of manufacturing data tracks used in the magnetic shift register system described herein without departing from the spirit and scope of the present invention. It will be very clear that the dimensions described herein are given for illustrative purposes only and that there is no intent to limit the scope of the invention to these dimensions.

Fig. 4 illustrates the operation of an exemplary embodiment for writing data to a magnetic shift register using a write element in accordance with the present invention. Fig. 4 illustrates the operation of an exemplary embodiment for writing data to a magnetic shift register using a write element in accordance with the present invention. 3 is a schematic diagram illustrating a method of operation of the magnetic shift register of FIGS. 1 and 2. FIG. 3 is a schematic diagram illustrating a method of operation of the magnetic shift register of FIGS. 1 and 2. FIG. 3 is a schematic diagram illustrating a method of operation of the magnetic shift register of FIGS. 1 and 2. FIG. 3 is a process flowchart illustrating a method of operating the magnetic shift register of FIGS. FIG. 2 represents a schematic diagram illustrating an embodiment of the magnetic shift register of FIG. 1 constructed from multiple types of alternating ferromagnetic materials. FIG. 2 represents a schematic diagram illustrating an embodiment of the magnetic shift register of FIG. 1 constructed from multiple types of alternating ferromagnetic materials. FIG. 2 is a schematic diagram of another embodiment of the shift register of FIG. 1, showing the well or bottom of the shift register as being composed of a single ferromagnetic material. 2 represents a schematic diagram illustrating an embodiment of the magnetic shift register of FIG. 1 constructed to have a cut in a homogeneous ferromagnetic material. FIG. 2 represents a schematic diagram illustrating an embodiment of the magnetic shift register of FIG. 1 constructed to have a cut in a homogeneous ferromagnetic material. FIG. FIG. 2 represents a diagram illustrating the formation of the bottom region of the data track of the magnetic shift register of FIG. FIG. 2 represents a diagram illustrating the formation of the bottom region of the data track of the magnetic shift register of FIG. FIG. 2 represents a diagram illustrating the formation of the bottom region of the data track of the magnetic shift register of FIG. FIG. 2 represents a diagram illustrating the formation of the bottom region of the data track of the magnetic shift register of FIG. FIG. 2 is a diagram showing the formation of a multi-layer stack structure capable of forming a data area and an accumulation part of a data track in the magnetic shift register of FIG. 1. FIG. 2 shows a diagram illustrating the formation of vias in a multilayer stack structure to fill a ferromagnetic or ferrimagnetic material to form the data region and storage of the magnetic shift register of FIG. FIG. 2 shows a diagram illustrating the formation of vias in a multilayer stack structure to fill a ferromagnetic or ferrimagnetic material to form the data region and storage of the magnetic shift register of FIG. FIG. 2 shows a diagram illustrating the formation of vias in a multilayer stack structure to fill a ferromagnetic or ferrimagnetic material to form the data region and storage of the magnetic shift register of FIG. FIG. 2 shows a diagram illustrating the formation of vias in a multilayer stack structure to fill a ferromagnetic or ferrimagnetic material to form the data region and storage of the magnetic shift register of FIG. FIG. 2 shows a diagram illustrating the formation of vias in a multilayer stack structure to fill a ferromagnetic or ferrimagnetic material to form the data region and storage of the magnetic shift register of FIG. FIG. 17 is a cross-sectional view illustrating a via etched to have a planar and smooth wall from the top of the multilayer stack structure of FIG. 16 to the bottom of FIGS. Fig. 4 represents the result of creating a via with a regular variation in cross-section using a selective etching process on the via wall. Fig. 4 represents the result of creating a via with a regular variation in cross-section using a selective etching process on the via wall. Fig. 4 represents the result of creating a via with a regular variation in cross-section using a selective etching process on the via wall. Fig. 4 represents the result of creating a via with a regular variation in cross-section using a selective etching process on the via wall. Fig. 4 represents the result of creating a via with a regular variation in cross-section using a selective etching process on the via wall. 2 shows a cross-section in the form of a data track that can be filled with magnetic material to produce the data track of the magnetic shift register of FIG. 2 shows a cross-section in the form of a data track that can be filled with magnetic material to produce the data track of the magnetic shift register of FIG. Figure 3 shows a data track created by filling vias and bottom trenches with ferromagnetic or ferrimagnetic material. Figure 3 shows a data track created by filling vias and bottom trenches with ferromagnetic or ferrimagnetic material. FIG. 32 is a process flowchart illustrating a method of manufacturing the magnetic shift register of FIG. 1 with a homogeneous magnetic material as shown in FIGS. 30 and 31. FIG. FIG. 2 shows the manufacture of conductive pads that connect to the data area and storage of the data track of the magnetic shift register of FIG. FIG. 2 shows the manufacture of conductive pads that connect to the data area and storage of the data track of the magnetic shift register of FIG. FIG. 2 shows the manufacture of conductive pads that connect to the data area and storage of the data track of the magnetic shift register of FIG. FIG. 2 shows the manufacture of conductive pads that connect to the data area and storage of the data track of the magnetic shift register of FIG. FIG. 2 illustrates the fabrication of a multilayer stack structure in which two vias can be formed to create the data region and storage of the magnetic shift register of FIG. FIG. 2 is a diagram illustrating the formation of vias in a multilayer stack structure to fill a ferromagnetic or ferrimagnetic material to form the data region and storage of the magnetic shift register of FIG. FIG. 39 is a cross-sectional view of the multilayer stack structure of FIG. 38 showing the formation of vias etched from the top of the multilayer stack structure to the conductive pads of FIGS. FIG. 6 is a diagram illustrating a result of creating regular variations in a via cross section using a selective etching process for the via cross section; FIG. 2 is a diagram illustrating the creation of a trench for a magnetic region connecting the data region of the data track of the magnetic shift register of FIG. . FIG. 42 shows a data track produced by filling the vias of FIG. 39 and the region of FIG. 41 with a homogeneous ferromagnetic or ferrimagnetic material. 2 represents a cross section of a via etched into a multi-layer stack structure to form a conductor that connects to the data track of the magnetic shift register of FIG. 2 represents a cross section of a via etched into a multi-layer stack structure to form a conductor that connects to the data track of the magnetic shift register of FIG. FIG. 45 shows a diagram illustrating the result of filling the vias of FIGS. 43 and 44 with a conductive material. FIG. 45 shows a diagram illustrating the result of filling the vias of FIGS. 43 and 44 with a conductive material. FIG. 37 illustrates forming vias to the bottom of the conductors of FIGS. 33-36 and forming short conductive paths in the data track of the magnetic shift register of FIG. FIG. 48 depicts a process flowchart illustrating a method of manufacturing the data track of the magnetic shift register of FIG. 1 with the homogeneous magnetic material shown in FIG. 47. FIG. FIG. 48 depicts a process flowchart illustrating a method of manufacturing the data track of the magnetic shift register of FIG. 1 with the homogeneous magnetic material shown in FIG. 47. FIG. In the data track of FIG. 1, the figure which shows formation of the area | region which connects a data area | region and an accumulation | storage part is represented. In the data track of FIG. 1, the figure which shows formation of the area | region which connects a data area | region and an accumulation | storage part is represented. In the data track of FIG. 1, the figure which shows formation of the area | region which connects a data area | region and an accumulation | storage part is represented. FIG. 2 is a diagram illustrating the fabrication of a uniform layer structure in which two vias can be formed to create the data area and storage portion of the data track of FIG. FIG. 2 shows the formation of vias in a uniform layer structure for the data area and storage portion of the data track of FIG. FIG. 57 is a diagram showing a cross-section of the uniform layer structure and vias of FIG. 54. FIG. 56 depicts a cross section of a trench connecting the via and two vias of FIG. 54. FIG. 56 depicts a cross section of a trench connecting the via and two vias of FIG. 54. FIG. 55 is a diagram illustrating the result of manufacturing the data track of FIG. 1 by filling the vias of FIG. 54 with alternating magnetic material. FIG. 2 represents a diagram illustrating the fabrication of the data track of FIG. 1 with alternating layers of alternating thickness of magnetic material. FIG. 2 represents a diagram illustrating the fabrication of the data track of FIG. 1 with alternating layers of alternating thickness of magnetic material. FIG. 2 represents a diagram illustrating the fabrication of the data track of FIG. 1 with alternating layers of alternating thickness of magnetic material. 2 is a process flowchart illustrating a method of manufacturing the data track of the magnetic shift register of FIG. 1 using alternating layers of magnetic material.

Claims (67)

A method of manufacturing a magnetic shift register with a data track, comprising:
Etching a trench in an insulator substrate;
Filling the trench with a trench material to form a central region;
Forming a multilayer stack structure on the insulator substrate and the trench material;
Forming two vias through the multilayer stack structure to expose the central region;
Filling the two vias with a magnetic material to form a data region and a storage portion, whereby the data region, the central region, and the storage portion form the data track;
A method comprising: The method of claim 1, wherein the trench material comprises a homogeneous magnetic material. The method of claim 2, wherein the homogeneous magnetic material is selected from the group consisting of a ferromagnetic material and a ferrimagnetic material. The homogeneous magnetic material is an alloy formed from one or more of permalloy, nickel-iron alloy, cobalt-iron alloy, Ni, Co, and Fe, B, one or more of Ni, Co, and Fe; 4. The method of claim 3, wherein the method is selected from the group consisting of alloys formed in combination with any one or more of Zr, Hf, Cr, Pd, and Pt. The method of claim 1, wherein the trench material comprises a heterogeneous magnetic material. 6. The method of claim 5, wherein the heterogeneous magnetic material is selected from the group consisting of a ferromagnetic material and a ferrimagnetic material. The method of claim 1, wherein filling the trench material comprises filling the trench with a sacrificial material. The method of claim 1, further comprising forming a bottom protective capping layer on the central region to protect the trench material. 9. The method of claim 8, wherein the bottom protective capping layer comprises a material selected from the group consisting of silicon nitride, silicon oxide, and dielectric. The method of claim 8, wherein the thickness of the bottom protective capping layer ranges between about 10 and 500 nm. The method of claim 1, wherein forming the multilayer stack structure comprises forming the multilayer stack structure with alternating materials A and B. 12. Method according to claim 11, characterized in that materials A and B comprise different materials. 12. Method according to claim 11, characterized in that materials A and B comprise similar materials. Material A is characterized in that it comprises a silicon dioxide (SiO _2), The method of claim 11. 15. A method according to claim 14, characterized in that material B comprises silicon (Si). 12. A method according to claim 11, characterized in that material A comprises silicon dioxide. The method according to claim 16, characterized in that the material B comprises silicon nitride (Si ₃ N ₄ ). The method of claim 1, further comprising forming an upper protective capping layer over the multilayer stack structure and the two vias. The method of claim 18, wherein the top protective capping layer comprises a dielectric material. The method of claim 19, wherein the upper protective capping layer comprises silicon nitride. The method of claim 19, wherein the thickness of the upper protective capping layer ranges between about 10 and 500 nm. 13. A method according to claim 12, characterized in that materials A and B have different etching rates for a preselected etchant. 13. A method according to claim 12, characterized in that the thickness of the materials A and B corresponds to the separation distance of the domain walls in the data track. 24. The method of claim 23, wherein the thicknesses of materials A and B are similar and range between about 0.5 and 10 microns. 24. A method according to claim 23, characterized in that the thicknesses of materials A and B are different. 12. The method of claim 11, further comprising etching materials A and B to form a series of notches corresponding to domain walls along the data track. 12. The method of claim 11, further comprising etching materials A and B to form a series of protrusions corresponding to domain walls along the data track. The method of claim 1, wherein forming the two vias comprises selectively etching the two vias. 29. The method of claim 28, wherein the via comprises an inner sidewall and further comprising forming an insulator layer on the inner sidewall. 30. The method of claim 29, wherein forming an insulator layer on the inner sidewall comprises oxidizing the inner sidewall. The method of claim 30, wherein the insulator layer comprises silicon dioxide. 32. The method of claim 31, wherein the thickness of the insulator layer ranges between about 3 nm and 30 nm. The method of claim 1, wherein forming the two vias comprises forming the two vias having a generally square cross section. The method of claim 1, wherein forming the two vias comprises forming the two vias having a generally rectangular cross section. The method of claim 1, wherein forming the two vias comprises forming the two vias having a generally circular cross section. The method of claim 11, wherein forming the two vias further comprises etching material A selectively with respect to material B using a first etching process. . Forming the two vias further comprises etching material B selectively with respect to material A using a second etching process, alternating with the first etching process; The method of claim 36, characterized. The first etching process is selective to silicon relative to silicon dioxide, and the second etching process is selective to silicon dioxide relative to silicon. 38. The method of claim 37. The first etching process is selective to silicon nitride relative to silicon oxide, and the second etching process is selective to silicon oxide relative to silicon nitride. 38. The method of claim 37. The method of claim 1, wherein filling the trench comprises using an electroless plating process. The method of claim 1, wherein filling the trench comprises using an electroplating process. The method of claim 1, wherein filling the trench material comprises filling the trench with a sacrificial material, and further removing the sacrificial material by etching. A method of manufacturing a magnetic shift register with a data track, comprising:
Etching two lower trenches in an insulator substrate;
Filling the two lower trenches with a conductive trench material to form a conductive pad on top of the data track;
Forming a multilayer stack structure on the insulator substrate and the two lower trench materials;
Forming two vias through the multilayer stack structure to expose the two lower trenches;
Forming an upper trench connecting the two vias in the multilayer stack structure;
Filling the two vias and the upper trench with magnetic material to form a data region, a central region, and a storage portion of the data track;
A method comprising: 44. The method of claim 43, wherein forming the multilayer stack structure comprises forming the multilayer stack structure with alternating materials A and B. 45. The method of claim 44, further comprising forming a bottom protective capping layer over the insulator substrate and the two lower trenches. 46. The method of claim 45, wherein the bottom protective capping layer comprises a dielectric material. The method of claim 46, wherein the bottom protective capping layer comprises silicon nitride. 47. The method of claim 46, wherein the thickness of the bottom protective capping layer ranges between about 10 and 500 nm. 44. The method of claim 43, further comprising forming an upper protective capping layer over the multilayer stack structure before forming the two vias. 44. The method of claim 43, wherein forming the two vias comprises etching the two vias into the multilayer stack structure using a non-selective etching process. The via comprises an inner wall and the step of forming the two vias selectively etches material A faster than material B using a selective etching process, thereby allowing the inner side of the via to 51. The method of claim 50, further comprising selectively etching the walls. 52. The method of claim 51, further comprising filling the two vias with a homogeneous magnetic material. 53. The method of claim 52, wherein the homogeneous magnetic material is selected from the group consisting of a ferromagnetic material and a ferrimagnetic material. 45. The method of claim 44, further comprising forming two conductive vias through the multilayer stack structure to expose the two lower trenches. 55. The method of claim 54, further comprising filling the two conductor vias with a conductive material. 44. The method of claim 43, wherein etching the two lower trenches comprises patterning the shape of the two lower trenches on the insulator substrate. A method of manufacturing a magnetic shift register with a data track, comprising:
Etching a trench in an insulator substrate;
Filling the trench with a trench material to form a central region;
Forming a uniform layer over the insulator substrate and the trench material;
Forming two vias through the uniform layer to expose the central region;
Filling the two vias with alternating layers of magnetic material to form a data region and a storage portion, whereby the data region, the central region, and the storage portion form the data track; When,
A method comprising: 58. The method of claim 57, wherein filling the two vias with alternating layers of magnetic material comprises filling each of the vias with at least two alternating materials. 59. The method of claim 58, wherein forming the two vias comprises etching the two vias into the uniform layer using a non-selective etching process. 60. The method of claim 59, wherein the two alternating materials are selected from the group consisting of a ferromagnetic material and a ferrimagnetic material. 58. The method of claim 57, wherein the uniform layer has a thickness of about 10 microns. 58. The method of claim 57, wherein the uniform layer has a thickness of at least about 10 microns. 58. The method of claim 57, further comprising forming a protective capping layer over the uniform layer. 58. The method of claim 57, wherein the protective capping layer comprises silicon nitride. 58. The method of claim 57, wherein etching the trench in the insulator substrate comprises patterning a shape of the trench in the insulator substrate. 58. The method of claim 57, wherein the uniform layer comprises a material selected from the group consisting of silicon and a dielectric material. 58. The method of claim 57, wherein the uniform layer comprises a material selected from the group consisting of silicon dioxide and silicon nitride.

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