JP2006228687A - Discharge lamp lighting device and lighting apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a discharge lamp lighting device capable of alleviating reduction of switching frequency while securing minimal switch-on time corresponding to the switching characteristics of a switching element, and a lighting device using this. <P>SOLUTION: The discharge lamp lighting device is provided with an integrating circuit 406 which integrates differential signal SUB1 expressing the differential from the established target current value signal ST1, based on a current detection signal SL1 showing the lamp current of a discharge lamp La and a voltage detection signal SLV showing the lamp current of the discharge lamp La, and a control circuit part 40 which increases or decreases the on-duty of the switching element Q1 based on the integration signal SCV by the integrating circuit 406 when the switch-on time exceeds the minimum switch-on time established beforehand in the switch-on and off action by a prescribed period of the switching element Q1 and decreases and increases the on-duty by increasing and decreasing the switch-off time of the switching element Q1 when the switch-on time of the switching element Q1 reaches the minimum switch-on time. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a discharge lamp lighting device and an illumination device using the same.

  FIG. 13 is a block diagram illustrating a configuration of a discharge lamp lighting device according to the background art. A discharge lamp lighting device 101 shown in FIG. 13 includes a power supply unit 102, an inverter circuit 103, a starting circuit 104, and a PWM control unit 105. A discharge lamp La is connected to the outside of the starting circuit 104.

  The power supply unit 102 converts the DC voltage output from the DC power source E connected to the outside into a predetermined DC voltage by stepping up or down according to a control signal from the PWM control unit 105 to convert the DC voltage into a discharge lamp La. The DC-DC converter is supplied with a transformer 106, a switching element 107, a diode 108, and a capacitor 109. The switching element 107 is configured using, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

  The inverter circuit 103 is an inverter circuit that converts the DC voltage output from the power supply unit 102 into an alternating voltage for lighting the discharge lamp La. The starting circuit 104 is a circuit that generates a high voltage for lighting an HID lamp (high pressure discharge lamp) that needs to apply a starting voltage that is much higher than the lighting voltage at the start of discharge.

  In addition, a DC power source E is connected to the outside of the power supply unit 102, the positive electrode of the DC power source E is connected to one end of the primary winding of the transformer 106, and the other end of the DC power source E via the switching element 107. Connected to the negative electrode. A series circuit of a diode 108 and a capacitor 109 is connected in parallel to the secondary winding of the transformer 106, and the voltage across the capacitor 109 is supplied to the inverter circuit 103 as the output voltage of the power supply unit 102. It has become.

  The PWM control unit 105 turns on and off the switching element 107 by PWM (Pulse Width Modulation) control (pulse width modulation control), and supplies power for lighting the discharge lamp La from the power supply unit 102 to the inverter circuit 103.

  When the switching element 107 is turned on / off according to the switching signal from the PWM control unit 105, when the switching element 107 is on, the current I1 flows through the primary winding 110 of the transformer 106, and magnetic energy is stored. When the element 107 is off, a counter electromotive voltage is generated in the secondary winding 111 of the transformer 106, smoothed by the capacitor 109, and supplied to the inverter circuit 103 as a DC voltage. Then, the inverter circuit 103 converts the DC voltage output from the power supply unit 102 into an alternating voltage. Then, an alternating voltage is supplied to the discharge lamp La via the starting circuit 104, and the discharge lamp La is turned on.

  In this case, the PWM control unit 105 sets the on-duty of the switching element 107 to increase or decrease the amount of power supplied to the discharge lamp La according to the lamp current flowing through the discharge lamp La or the lamp voltage applied to the discharge lamp La. Increase or decrease.

  By the way, the discharge lamp La such as an HID lamp is substantially short-circuited because its impedance decreases when the lamp temperature is low. When such a discharge lamp La is in a state close to a short circuit or when the output terminal of the starting circuit 104 is short-circuited due to a failure or the like, the PWM control unit 105 reduces the output power of the power supply unit 102 to a very low level. The switching signal has a very small on-duty for turning on the switching element 107 in order to reduce the level. In particular, when the on / off frequency of the switching signal is increased in order to reduce the size of the power supply unit 102, the on time of the switching signal in a state close to a short circuit as described above becomes a very short time.

  On the other hand, the switching element 107 is switched between on and off states by a switching signal supplied to its control terminal, but has a switching delay time or switching time when the switching element 107 is turned on from off. Therefore, if the ON time of the switching signal becomes too short, the switching element 107 cannot be completely turned on, and the ON resistance remains, which may increase the loss due to the switching element 107.

In view of this, the PWM control unit 105 is known to have a minimum value of the ON time during which the switching element 107 can be completely turned on in the PWM control as a lower limit value so that the ON time is not reduced beyond this lower limit value. It has been. Further, a PWM control unit 105 is also known in which the on-duty is lowered by fixing the on-time and extending the off-time (see, for example, Patent Document 1).
JP 2000-340385 A

  By the way, as described above, in the PWM control, the minimum value of the ON time during which the PWM control unit 105 can completely turn on the switching element 107 is set as the lower limit value so that the ON time is not reduced beyond this lower limit value. In such a case, for example, when the discharge lamp La is in a substantially short-circuited state at a low temperature, or when the output of the power supply unit 102 is in a short-circuited state due to a failure or the like, the on-time reaches a lower limit value. As a result, the on-duty of the switching signal cannot be further reduced, and therefore the output power of the power supply unit 102 cannot be sufficiently reduced. As a result, the discharge lamp La is damaged or the circuit in the discharge lamp lighting device 101 is damaged. Inconvenience that there is a risk of doing.

  Further, when the PWM control unit 105 reduces the on-duty by fixing the on-time and extending the off-time, the on-duty of the switching signal can completely turn on the switching element 107. Since the off time is increased before reaching the minimum value of the on time, the switching frequency is lowered and the circuit components such as the capacitor 109 and the transformer 106 used in the power supply unit 102 are increased in size.

  The present invention has been made in view of such a problem, and a discharge lamp lighting device capable of reducing a decrease in switching frequency while ensuring a minimum on-time according to the switching characteristics of the switching element, and the same It aims at providing the illuminating device using.

  In order to achieve the above-described object, a discharge lamp lighting device according to the first means of the present invention includes a switching element that turns on and off a current input from the outside in a predetermined cycle, and is turned on / off in the on / off operation of the switching element. A power supply unit that increases / decreases the power for lighting the discharge lamp in accordance with an increase / decrease in duty, a current detection unit that detects a current value supplied to the discharge lamp as a detected current value, and a voltage supplied to the discharge lamp A voltage detection unit to detect; a target value setting unit for setting a target current value to be supplied to the discharge lamp based on the voltage detected by the voltage detection unit; and a detection current value detected by the current detection unit and the A difference output unit that outputs a difference signal representing a difference from the target current value set by the target value setting unit; an integration circuit that integrates the difference signal output from the difference output unit; The switching control unit increases or decreases the on-duty in the on / off operation by the cycle based on the integration value by the integration circuit when the on-time in the on / off operation by the cycle exceeds a preset minimum on time, In the on / off operation according to the cycle, when the on time reaches the minimum on time, the on duty is decreased by increasing / decreasing the off time in the on / off operation.

  The above-described discharge lamp lighting device further includes a minimum on-time detection unit that detects an on-time in the on-off operation, and the switching control unit includes a minimum on-time preset by the minimum on-time detection unit. When it is detected that the on detection time is shorter than the on detection time, the off time is changed based on the difference signal output from the difference output unit while maintaining the on time in the on / off operation at a preset minimum on time. Thus, the on-duty is increased or decreased.

  In the above-described discharge lamp lighting device, the minimum on-time detection unit detects that the on-time in the on / off operation is equal to or less than a preset minimum on-detection time based on an integration value by the integration circuit. It is characterized by doing.

  Further, in the above-described discharge lamp lighting device, the difference output unit outputs the difference signal as an instruction to increase / decrease the off time, and the integration circuit outputs the integral value as an instruction to increase / decrease the on-duty, A differential signal correction unit that corrects the differential signal to reduce the increase / decrease instruction amount of the off-time in the differential signal according to the increase / decrease amount in the increase / decrease instruction of the on-duty based on an integral value of an integration circuit; The control unit is characterized by increasing or decreasing the on-duty by changing an off time based on the difference signal corrected by the difference signal correction unit.

  The lighting device according to the second means of the present invention includes a discharge lamp lighting device for lighting a discharge lamp, and a housing that houses the discharge lamp lighting device, and the discharge lamp lighting device is The discharge lamp lighting device according to any one of the above.

  In the discharge lamp lighting device and the lighting device having such a configuration, a difference signal representing a difference between the current value supplied to the discharge lamp and the target current value set based on the voltage supplied to the discharge lamp is obtained by the integration circuit. Integrated. Then, when the ON time exceeds a preset minimum ON time in the ON / OFF operation with a predetermined cycle by the switching control unit, the ON duty in the ON / OFF operation with the cycle is increased or decreased based on the integration value by the integration circuit, and the cycle When the on-time has reached the minimum on-time in the on-off operation, the on-duty is decreased by increasing / decreasing the off-time in the on / off operation, so switching is performed while ensuring the minimum on-time according to the switching characteristics of the switching element. A decrease in frequency can be reduced.

  Embodiments according to the present invention will be described below with reference to the drawings. In addition, the structure which attached | subjected the same code | symbol in each figure shows that it is the same structure, The description is abbreviate | omitted.

(First embodiment)
FIG. 1 is a cross-sectional view illustrating an example of a configuration of a lighting device according to an embodiment of the present invention. A lighting device 1 shown in FIG. 1 is a headlamp used in a vehicle such as an automobile or a motorcycle, for example, and a lamp socket 3 and a reflector 4 are provided inside a lamp housing 2 (housing) fixed to the vehicle body of the vehicle. And the discharge lamp La, and the lamp body lens 5 is attached to the opening provided in the front surface of the lamp housing 2. An opening 6 for replacing the discharge lamp La is provided at the rear of the lamp housing 2, and a removable cap 7 is attached to the opening 6. A discharge lamp lighting device 8 housed in a case is attached to the lower outer side of the lamp housing 2, and the discharge lamp lighting device 8 is connected to a power line CBL 1 for supplying power using, for example, a battery as a DC power source. ing. Further, the discharge lamp lighting device 8 and the lamp socket 3 are connected by a harness CBL2. And by attaching the discharge lamp La to the lamp socket 3, the electric power from the discharge lamp lighting device 8 is supplied to the discharge lamp La, and the discharge lamp La is lighted. And the illuminating device 1 is each arrange | positioned at the right-and-left both sides of the front part in the vehicle body of the vehicle 9 shown, for example in FIG.

  FIG. 3 is a block diagram showing an example of the configuration of the discharge lamp lighting device 8 according to the first embodiment of the present invention. The discharge lamp lighting device 8 shown in FIG. 3 includes a power supply unit 10, an inverter circuit 20, a starting circuit 30, a control circuit unit 40, and a PWM signal generation circuit 50.

  The power supply unit 10 is a predetermined DC voltage by boosting or stepping down the DC input voltage Vin output from the DC power supply E connected to the outside in accordance with the switching signal SPWM from the PWM signal generation circuit 50. A DC-DC converter that converts the output voltage Vout into an inverter circuit 20 and supplies the inverter circuit 20 with a transformer T, a switching element Q1, a diode D1, a capacitor C1, and a current detection circuit 11.

  Further, a DC power source E is connected to the outside of the power supply unit 10, the positive electrode of the DC power source E is connected to one end of the primary winding L1 of the transformer T, and the other end is connected to the DC power source via the switching element Q1. It is connected to the negative electrode of E. A series circuit of a diode D1 and a capacitor C1 is connected in parallel to the secondary winding L2 of the transformer T. The DC voltage generated at both ends of the capacitor C <b> 1 is supplied to the inverter circuit 20 as the output voltage Vout of the power supply unit 10.

  The current detection circuit 11 detects a current I1 flowing through the primary side winding L1 of the transformer T and outputs the current detection signal SI1 to the PWM signal generation circuit 50. The current detection circuit 11 is configured using, for example, a resistor or a Hall element. Yes.

  The inverter circuit 20 switches the output voltage Vout output from the power supply unit 10 by, for example, a bridge circuit configured using a switching element (not shown), converts the output voltage Vout into an alternating voltage, and supplies the alternating voltage to the starter circuit 30. The starting circuit 30 is a circuit that generates a high voltage for lighting an HID lamp (high pressure discharge lamp) that needs to apply a starting voltage that is much higher than the lighting voltage at the start of discharge. The starting circuit 30 is connected to the discharge lamp La attached to the lamp socket 3 via the harness CBL2 and the lamp socket 3 shown in FIG.

  The control circuit unit 40 includes a lamp voltage detection circuit 401 (voltage detection unit), a target value setting unit 402, a lamp current detection circuit 403 (current detection unit), a difference output unit 404, a proportional circuit 405, and an integration circuit. 406, an adder 407, an amplifier 408, a comparator CMP1 (minimum on-time detector), and a switch SW1.

  The lamp voltage detection circuit 401 detects the voltage across the capacitor C1, that is, the output voltage Vout of the power supply unit 10, as a voltage substantially equivalent to the lamp voltage supplied to the discharge lamp La, and a voltage detection signal SLV indicating the voltage. Is output to the target value setting unit 402. The target value setting unit 402 sets a target current value to be supplied to the discharge lamp La from the voltage detection signal SLV output from the lamp voltage detection circuit 401, and outputs a target current value signal STI indicating the target current value as a difference output unit. Output to 404. The lamp current detection circuit 403 detects the output current of the power supply unit 10 as a current substantially equivalent to the lamp current supplied to the discharge lamp La, and outputs a current detection signal SLI indicating the current to the difference output unit 404. .

  The difference output unit 404 is configured using, for example, a subtracter, and detects the detected current value detected by the lamp current detection circuit 403 from the target current value signal STI indicating the target current value set by the target value setting unit 402. A difference signal SUB1 indicating a difference value obtained by subtracting the indicated current detection signal SLI is output to the proportional circuit 405, the integration circuit 406, and the amplifier 408. The proportional circuit 405 is an amplification circuit that amplifies the differential signal SUB1 output from the differential output unit 404 by a gain Kp times and outputs the amplified signal as a proportional signal SKP to the adder 407. In the control circuit unit 40 shown in FIG. 3, the increase of the proportional signal SKP works in the direction of increasing the output voltage Vout of the power supply unit 10.

  The integration circuit 406 is an integration circuit composed of, for example, an operational amplifier OP1, a capacitor C2, and a resistor R1, and the differential signal SUB1 output from the differential output unit 404 is an inverting input of the operational amplifier OP1 via the resistor R1. The non-inverting input terminal of the operational amplifier OP1 is connected to the ground, and the output terminal of the operational amplifier OP1 is connected to the inverting input terminal via the capacitor C2. The integration signal SCV output from the operational amplifier OP1 is output to the adder 407 and the inverting input terminal of the comparator CMP1. In the control circuit unit 40 shown in FIG. 3, the increase of the integration signal SCV is caused to increase the output voltage Vout of the power supply unit 10.

  The adder 407 sets the output voltage Vout of the power supply unit 10 based on the signal obtained by adding the proportional signal SKP output from the proportional circuit 405 and the integrated signal SCV output from the operational amplifier OP1. The voltage control signal SWC is output to the PWM signal generation circuit 50. In the control circuit unit 40 shown in FIG. 3, the increase in the voltage control signal SWC works in a direction to increase the output voltage Vout of the power supply unit 10. The amplifier 408 outputs a signal obtained by multiplying the difference signal SUB1 output from the difference output unit 404 by the gain Kt to the PWM signal generation circuit 50 via the switch SW1 as an off time extension signal SOFF.

  The comparator CMP1 compares the integration signal SCV output from the integration circuit 406 with a preset reference voltage Vrof. In the reference voltage Vrof, the ON time of the switching signal SPWM output from the PWM signal generation circuit 50 to the switching element Q1 has reached the minimum ON time Tmin, which is the minimum ON time that can completely turn on the switching element Q1. In some cases, it is set to a voltage value obtained as the integration signal SCV. If the integration signal SCV exceeds the reference voltage Vrof, the comparator CMP1 turns off the switch SW1 and does not output the off time extension signal SOFF output from the amplifier 408 to the PWM signal generation circuit 50, while the integration signal SCV Is equal to or lower than the reference voltage Vrof, the switch SW1 is turned on, and the off time extension signal SOFF output from the amplifier 408 is output to the PWM signal generation circuit 50.

  That is, the comparator CMP1 detects that the ON time in the ON / OFF operation is less than or equal to the preset minimum ON detection time based on the integration signal SCV output from the integration circuit 406, and turns on the switch SW1 to The off time extension signal SOFF output from 408 is output to the PWM signal generation circuit 50.

  The PWM signal generation circuit 50 changes the duty of the switching signal SPWM for turning on and off the switching element Q1 based on the PWM control according to the voltage control signal SWC output from the control circuit unit 40, and performs voltage control from the power supply unit 10. A control circuit that outputs an output voltage Vout according to the signal SWC, and includes a flip-flop FF1, an oscillator OSC1, and a comparator CMP2. The voltage control signal SWC is input to the non-inverting input terminal of the comparator CMP2, the current detection signal SI1 is input to the inverting input terminal of the comparator CMP2, and the output signal of the comparator CMP2 is output to the reset terminal of the flip-flop FF1. The Further, the off time extension signal SOFF output from the amplifier 408 via the switch SW1 is input to the oscillator OSC1, and the periodic signal CLK1 output from the oscillator OSC1 is output to the set terminal of the flip-flop FF1. Then, the output signal of the flip-flop FF1 is output to the switching element Q1 as the switching signal SPWM.

  The PWM signal generation circuit 50 sets the flip-flop FF1 by the periodic signal CLK1 output from the oscillator OSC1, sets the switching signal SPWM to high level, turns on the switching element Q1, and turns on the primary side winding of the transformer T in the power supply unit 10. The comparator CMP2 detects that the current I1 flowing through the line L1 and the switching element Q1 has reached the value indicated by the switching signal SPWM, resets the flip-flop FF1, turns the switching signal SPWM low, and turns off the switching element Q1. This is a so-called current mode circuit system.

  FIG. 4 is a circuit diagram showing an example of the configuration of the oscillator OSC1. FIG. 5 is a signal waveform diagram for explaining the operation of the oscillator OSC1. The oscillator OSC1 shown in FIG. 4 includes current sources CS1 and CS2, changeover switches SW2 and SW3, a capacitor C3, resistors R2 and R3, and a comparator CMP3 having hysteresis. A series circuit of resistors R2 and R3 is provided between a predetermined reference voltage VSH and the ground, and the reference voltage VSH is divided by the resistors R2 and R3 to generate the reference voltage VSL. Then, the reference voltage VSH is supplied to one contact TB1 of the changeover switch SW3, the reference voltage VSL is supplied to the other contact TB2 of the changeover switch SW3, and either the reference voltage VSH or the reference voltage VSL is selected by the changeover switch SW3. Is supplied to the non-inverting input terminal of the comparator CMP3. The switch SW3 supplies the reference voltage VSH to the non-inverting input terminal of the comparator CMP3 when the periodic signal CLK1 output from the comparator CMP3 is at a high level, and supplies the reference voltage VSL to the non-inverting input terminal of the comparator CMP3 when the periodic signal CLK1 is at a low level. To supply.

  A capacitor C3 and a changeover switch SW2 are connected to the inverting input terminal of the comparator CMP3. The changeover switch SW2 includes contacts TB3 and TB4. The changeover switch SW2 charges the capacitor C3 with the charging current ICHG output from the current source CS1 by switching to the contact TB3 side when the periodic signal CLK1 output from the comparator CMP3 is at a high level, and the periodic signal CLK1 is at a low level. Thus, the charge switched to the contact TB4 side and charged in the capacitor C3 is discharged by the discharge current IDCG from the current source CS2.

  First, if the capacitor C3 is not charged, the charging voltage VC3 is less than the reference voltage VSL, so that the periodic signal CLK1 is set to high level by the comparator CMP3, and the changeover switch SW2 is switched to the contact TB3 side and output from the current source CS1. The charged charging current ICHG is charged by the capacitor C3, and the charging voltage VC3 gradually rises. At the same time, the switch SW3 is switched to the contact TB1 side, and the reference voltage VSH is supplied to the non-inverting input terminal of the comparator CMP3.

  When the charging voltage VC3 reaches the reference voltage VSH, the periodic signal CLK1 is set to a low level by the comparator CMP3, the changeover switch SW2 is switched to the contact TB4 side, and the capacitor C3 is discharged by the discharge current IDCG of the current source CS2. As the charging voltage VC3 gradually decreases, the switch SW3 is switched to the contact TB2 side, and the reference voltage VSL is supplied to the non-inverting input terminal of the comparator CMP3. Further, when the charging voltage VC3 reaches the reference voltage VSL, the periodic signal CLK1 is set to the high level by the comparator CMP3, the changeover switch SW2 is switched to the contact TB3 side, and the capacitor C3 is connected by the charging current ICHG output from the current source CS1. As the battery is charged and the charging voltage VC3 gradually increases, the switch SW3 is switched to the contact TB1 side, and the reference voltage VSH is supplied to the non-inverting input terminal of the comparator CMP3.

  As described above, the periodic signal CLK1 is output from the oscillator OSC1 by repeatedly charging and discharging the capacitor C3. When the switch SW1 is turned on by the comparator CMP1, the off-time extension signal SOFF is input to the current source CS1, and the charging current ICHG output from the current source CS1 is increased or decreased according to the increase / decrease of the off-time extension signal SOFF. As a result, the high-level period Tr of the periodic signal CLK1 is increased or decreased. The high-level period Tr of the periodic signal CLK1 corresponds to the OFF period of the switching element Q1, and accordingly, the switch SW1 is turned on by the comparator CMP1, that is, the ON time of the switching element Q1 is less than the minimum ON detection time. Is detected, the difference signal SUB1 output from the difference output unit 404 is multiplied by the gain by the amplifier 408, and the OFF period of the switching element Q1 is increased or decreased based on the OFF time extension signal SOFF output. The on-duty is reduced. Then, as shown in FIG. 6, the period of the periodic signal CLK1 is increased in accordance with the off time extension signal SOFF.

  Note that the current source CS1 is not limited to the example in which the charging current ICHG is increased or decreased in accordance with the increase / decrease in the off time extension signal SOFF. For example, the on time of the switching element Q1 is less than the minimum on detection time by the comparator CMP1. When detected, the charging current ICHG may be reduced to a preset current value in accordance with the detection signal of the comparator CMP1.

  FIG. 7 is a circuit diagram showing an example of the configuration of the current source CS1. The current source CS1 shown in FIG. 7 includes an operational amplifier OP2, transistors Q2 to Q7, a resistor REX, and a resistor RCHG. The non-inverting input terminal of the operational amplifier OP2 is supplied with the off time extension signal SOFF, the output terminal of the operational amplifier OP2 is connected to the base of the transistor Q2, and the emitter of the transistor Q2 is connected to the inverting input terminal of the operational amplifier OP2. And connected to the ground via a resistor REX.

  The collector of the transistor Q2 is connected to the collector of the transistor Q3. Transistor Q3 and transistor Q4 form a current mirror circuit, and output current ICTR of transistor Q4 is supplied to ground via resistor RCHG. A series circuit of a transistor Q5 and a transistor Q7 is connected in parallel with the transistor Q4, and a voltage obtained by adding a base-emitter voltage VBE of the transistor Q7 to a predetermined reference voltage VREF is applied to the base of the transistor Q7. Yes. Transistors Q5 and Q6 constitute a current mirror circuit, and the output current of transistor Q6 is supplied as charge current ICHG to capacitor C3 via switch SW2.

In the current source CS1 shown in FIG. 7, the charging current ICHG when the off-time extension signal SOFF is zero is given by the following equation (1), where R _CHG is the resistance value of the resistor RCHG.
ICHG = VREF / R _CHG (1)
Further, assuming that the voltage value of the off-time extension signal SOFF is Vexof and the resistance value of the resistor REX is R _EX , the charging current ICHG is given by the following equation (2).
ICHG = (VREF / R _CHG ) − (Vexof / R _EX ) (2)
As shown in Expression (2), the charging current ICHG is increased or decreased according to the voltage value Vexof of the off time extension signal SOFF. Further, the feedback gain in a state where the on-time of the switching element Q1 is equal to or shorter than the minimum on-detection time and the output adjustment is performed by the off-time of the switching element Q1 is set by the gain Kt of the amplifier 408, and the on-time of the switching element Q1 Can be set by the gain Kp of the proportional circuit 405. For example, when the discharge lamp La is cold, the feedback gain can be set, and the steady lighting state. Therefore, it is easy to set an appropriate gain according to each load condition.

  Further, in the periodic signal CLK1 output from the oscillator OSC1 shown in FIG. 4, the low level period Tf is determined by the discharge current IDCG by the current source CS2, and the discharge current IDCG is fixed. It is also fixed. The discharge current IDCG is set so that the period Tf becomes equal to the minimum on-time Tmin of the switching element Q1. Then, the flip-flop FF1 is forcibly set by the periodic signal CLK1 for at least the period Tf, so that the high level period of the switching signal SPWM, that is, the ON time of the switching element Q1 is secured at least the minimum ON time Tmin. The

  Further, as shown in FIG. 6, when the off-time extension signal SOFF is zero, that is, when the on-time of the switching element Q1 exceeds the minimum on-detection time, the periodic signal CLK1 is obtained by Expression (1). The period Tr is determined by adding the period Tr determined by the charging current ICHG to be added and the fixed period Tf.

  The comparator CMP2 in the PWM signal generation circuit 50 shown in FIG. 3 compares the current detection signal SI1 indicating the current value of the current I1 flowing through the switching element Q1 detected by the current detection circuit 12 with the voltage control signal SWC. Since the current I1 gradually increases when the switching element Q1 is turned on, the current detection signal SI1 also gradually increases after the switching element Q1 is turned on. When the current detection signal SI1 reaches the voltage control signal SWC, the output signal of the comparator CMP2 becomes low level, the flip-flop FF1 is reset, the switching signal SPWM is changed to low level, and the switching element Q1 is turned off.

  Thereby, when the ON time of the switching element Q1 exceeds the minimum ON detection time, the ON / OFF cycle of the switching element Q1 is set to the period f1, and the ON time of the switching element Q1 is set according to the voltage control signal SWC. Since it is set, the on-duty can be controlled while keeping the switching cycle constant. When the ON time of the switching element Q1 becomes equal to or shorter than the minimum ON detection time, the ON time of the switching element Q1 becomes the minimum ON time Tmin by the low level time Tf of the periodic signal CLK1 output from the oscillator OSC1. In addition, since the OFF time of the switching element Q1 is extended according to the OFF time extension signal SOFF, the output power of the power supply unit 10 is reduced while ensuring the minimum ON time Tmin according to the switching characteristics of the switching element. It is possible to prevent the discharge lamp La from being damaged or the circuit in the discharge lamp lighting device 8 from being damaged.

  FIG. 8 is a circuit diagram showing another example of the PWM signal generation circuit 50. FIG. 9 is a signal waveform diagram for explaining the operation of the PWM signal generation circuit 50 shown in FIG. The PWM signal generation circuit 50 shown in FIG. 8 includes the oscillator OSC1, the comparator CMP7, and the NAND gate 51 shown in FIG. 4. The sawtooth waveform signal waveform accompanying the charge / discharge operation of the capacitor C3 in the oscillator OSC1 and the voltage control signal SWC. This is a so-called switch mode type PWM control circuit of a triangular wave comparison method that uses a signal obtained by comparing as a switching signal SPWM.

  In the PWM signal generation circuit 50 shown in FIG. 8, the charging voltage VC3 of the capacitor C3 in the oscillator OSC1 is input to the non-inverting input terminal of the comparator CMP7, and the voltage control signal SWC is input to the inverting input terminal of the comparator CMP7. The output terminal is connected to the input terminal of the NAND gate 51.

  Next, the operation of the PWM signal generation circuit 50 shown in FIG. 8 will be described with reference to FIG. First, when the off-time extension signal SOFF is at a low level, that is, when the on-time of the switching element Q1 exceeds the minimum on-detection time, the period of the periodic signal CLK1 is set to the period f1, and thus the charging voltage VC3 Is a sawtooth signal waveform with a period of f1 as the capacitor C3 is charged and discharged. Then, the comparator CMP7 compares the charging voltage VC3 with the voltage control signal SWC. If the charging voltage VC3 is equal to or lower than the voltage control signal SWC, the output signal of the comparator CMP7 becomes low level and inverted by the NAND gate 51, and the switching signal When SPWM is output at a high level and the charging voltage VC3 exceeds the voltage control signal SWC, the output signal of the comparator CMP7 becomes high level, inverted by the NAND gate 51, and the switching signal SPWM is output at low level.

  That is, when the ON time of the switching element Q1 exceeds the minimum ON detection time, the ON duty of the switching element Q1 is increased or decreased according to the increase or decrease of the voltage control signal SWC at the period f1.

  On the other hand, when the voltage control signal SWC decreases to decrease the output voltage Vout of the power supply unit 10 and falls below the lower limit voltage VSL of the charging voltage VC3, the output signal of the comparator CMP7 is fixed at a low level, and the comparator CMP7 The low pulse width in the output signal cannot be made longer than the minimum on-time Tmin. Then, a signal obtained by inverting the periodic signal CLK1 is output from the NAND gate 51 as the switching signal SPWM.

  As a result, even when the output voltage Vout of the power supply unit 10 decreases, a low pulse width in the periodic signal CLK1, that is, an on-time that is equal to or greater than the minimum on-time Tmin can be secured, so the on-time of the switching signal SPWM Is too short, the switching element Q1 cannot be completely turned on, and the on-resistance remains to suppress an increase in loss due to the switching element Q1.

  Next, when the comparator CMP1 of the control circuit unit 40 shown in FIG. 3 detects that the integration signal SCV has become equal to or lower than the reference voltage Vrof, which is a voltage corresponding to the minimum on-time Tmin, and the switch SW1 is turned on, The off-time extension signal SOFF is input to the oscillator OSC1, and the charge current ICHG of the capacitor C3 output from the current source CS1 is decreased according to the off-time extension signal SOFF. As a result, the high pulse width in the periodic signal CLK1 is increased by the comparator CMP1. Inverted by the NAND gate 51, the high pulse width in the switching signal SPWM is increased, the off time in the switching element Q1 is increased, the on-duty is reduced, and the output voltage Vout of the power supply unit 10 is lowered.

  As a result, when it is detected that the voltage is equal to or lower than the reference voltage Vrof, which is a voltage corresponding to the minimum on-time Tmin, the switching element Q1 is turned off while maintaining the on-time of the switching element Q1 at the minimum on-time Tmin. Since the time can be extended according to the off-time extension signal SOFF, the output power of the power supply unit 10 can be reduced while ensuring the minimum on-time Tmin according to the switching characteristics of the switching element, and the discharge lamp La Or damage to the circuit in the discharge lamp lighting device 8 can be suppressed.

(Second Embodiment)
Next, a discharge lamp lighting device according to a second embodiment of the present invention will be described. FIG. 10 is a circuit diagram showing an example of the configuration of the discharge lamp lighting device 8a. The discharge lamp lighting device 8a shown in FIG. 10 differs from the discharge lamp lighting device 8 shown in FIG. 3 in a power supply unit 10a, a control circuit unit 40a, and a PWM signal generation circuit 50a. Note that the description of the inverter circuit 20 and the starting circuit 30 is omitted.

  A power supply unit 10a shown in FIG. 10 includes a resistor R4 connected in series with the switching element Q1 instead of the current detection circuit 11, and detects a current I2 flowing through the secondary winding L2 of the transformer T. 12 is further provided. The resistor R4 is connected in series with the primary side winding L1 of the transformer T via the switching element Q1, and detects the current I1 flowing through the primary side winding L1. The voltage across the resistor R4 is output to the control circuit unit 40a as a current detection signal SI1 indicating the detected value of the current I1 flowing through the primary winding L1.

  The control circuit unit 40a shown in FIG. 10 calculates the difference between the current detection signal SLI (detected current value) and the target current value signal STI (target current value) by the difference output unit 404 like the control circuit unit 40 shown in FIG. Instead of integrating the current obtained by the integration circuit 406, the charging operation and the discharging operation of the integration circuit 427 including the capacitor C4 are switched in accordance with the magnitude comparison result between the current detection signal SLI and the target current value signal STI. It is a thing.

  The control circuit unit 40a includes a current mirror circuit 421, 422, a difference output unit 423, 424, an offset current source CS3, a proportional circuit 426 including a resistor R5, an integration circuit 427, and an off time extension signal generation unit 433. , A lamp voltage detection circuit 401, a target value setting unit 402, and a lamp current detection circuit 403. In FIG. 10, the lamp voltage detection circuit 401, the target value setting unit 402, and the lamp current detection circuit 403 are not shown.

  The off-time extension signal generation unit 433 is a circuit unit that generates the off-time extension signal SOFF, and includes a differential output unit 425, a differential signal correction unit 428, a positive signal extraction unit 429, and an amplifier 430. Yes.

  The current mirror circuit 421 supplies the target current value signal STI output from the target value setting unit 402 to the differential output units 423, 424, and 425 in three systems. The current mirror circuit 422 supplies the current detection signal SLI output from the lamp current detection circuit 403 to the differential output units 423, 424, and 425 in three systems.

  The differential output unit 423 includes resistors R6 and R7, a comparator CMP4, a flip-flop FF2, an oscillator OSC2, constant current sources CS4 and CS5, and a switch SW4. Then, the target current value signal STI output from the current mirror circuit 421 flows to the ground via the resistor R6, so that the voltage generated in the resistor R6 is supplied to the non-inverting input terminal of the comparator CMP4 and output from the current mirror circuit 422. The voltage generated when the current detection signal SLI thus made flows to the ground via the resistor R7 is supplied to the inverting input terminal of the comparator CMP4. Further, the output signal of the comparator CMP4 is synchronized with the period signal of the period T1 output from the oscillator OSC2 by the flip-flop FF2, and is output to the switch SW4.

  The switch SW4 is a changeover switch that is switched according to the output signal of the comparator CMP4 synchronized with the cycle T1 by the flip-flop FF2, and connects the integration circuit 427 to the constant current source CS4 if the output signal of the comparator CMP4 is at a high level. If the output signal of the comparator CMP4 is at a low level, the integration circuit 427 is connected to the constant current source CS5. The constant current source CS4 supplies a constant current set in advance to the integrating circuit 427 via the switch SW4 and charges it. The constant current source CS5 draws a predetermined constant current from the integrating circuit 427 via the switch SW4 and discharges it.

  If the current detection signal SLI is smaller than the target current value signal STI, the output signal of the comparator CMP4 becomes high level, and the integration circuit 427 is connected to the constant current source CS4 by the switch SW4 at a timing synchronized with the cycle T1. The integration circuit 427 is charged by the source CS4, and the voltage of the integration signal SCV, which is the charging voltage of the capacitor C4, increases. On the other hand, if the current detection signal SLI is larger than the target current value signal STI, the output signal of the comparator CMP4 becomes low level, and the integration circuit 427 is connected to the constant current source CS5 by the switch SW4 at a timing synchronized with the cycle T1. The integration circuit 427 is discharged by the source CS5, and the voltage of the integration signal SCV drops. Further, the integration signal SCV of the integration circuit 427 is output to the differential signal correction unit 428 and the PWM signal generation circuit 50a.

  In this case, the charging current of the integrating circuit 427 is a preset constant current output from the constant current source CS4, and the discharging current of the integrating circuit 427 is a preset constant current drawn by the constant current source CS5. Therefore, for example, immediately after the discharge of the discharge lamp La is started, the difference between the current detection signal SLI and the target current value signal STI increases abruptly, and the charge / discharge current of the integration circuit 427 etc. increases abruptly and the integration signal SCV The occurrence of ringing is suppressed. The switch SW4 is switched at a timing synchronized with the cycle T1 by the flip-flop FF2. Therefore, by setting the cycle T1 to be longer than the response time of the switch SW4 and the constant current sources CS4 and CS5, the comparator CMP4 It is possible to prevent the charge / discharge operation of the integration circuit 427 from following the change in the output signal.

  The difference output unit 424 is configured by using, for example, a subtracter, and is obtained by subtracting the target current value signal STI output by the current mirror circuit 421 from the current detection signal SLI output by the current mirror circuit 422. A current corresponding to the difference value is supplied as a difference signal SUB2 to the connection point between the switching element Q1 and the resistor R4 in the power supply unit 10a via the resistor R5.

  The offset current source CS3 superimposes a preset offset current on the difference signal SUB2 output from the difference output unit 424, and supplies it to the connection point between the switching element Q1 and the resistor R4 in the power supply unit 10a via the resistor R5. To do. The resistor R5 is a proportional signal SRV obtained by adding a voltage proportional to the current of the difference signal SUB2 to which the offset current is added by the offset current source CS3 to the current detection signal SI1 indicating the detected value of the current I1 detected by the resistor R4. It functions as a proportional circuit 426 that supplies the PWM signal generation circuit 50a.

  In this case, when the switching element Q1 performs a switching operation according to the switching signal SPWM from the PWM signal generation circuit 50a, the current I1 flowing through the primary winding L1 in the power supply unit 10a is accompanied by the switching operation of the switching element Q1. Since the increase / decrease is repeated, the current detection signal SI1 is a sawtooth signal. Then, a voltage drop due to the difference signal SUB1 output from the difference output unit 424 flowing through the resistor R5, which is the proportional circuit 426, is added to the sawtooth current detection signal SI1, and the PWM signal generation circuit as the proportional signal SRV is added. 50a.

  The difference signal correction unit 428 includes, for example, an amplifier 431 and a voltage / current converter 432. Then, the difference signal correction unit 428 uses the integration signal SCV as an on-duty increase / decrease instruction in the switching element Q1, and generates a correction signal SKS to correct the difference signal SUB3 output from the difference output unit 425 according to the integration signal SCV. Generated and output to the differential output unit 425 as a current signal.

  The difference output unit 424 is configured by using, for example, a subtracter. From the current detection signal SLI output by the current mirror circuit 422, the target current value signal STI output by the current mirror circuit 421 and the difference signal correction unit. A signal obtained by subtracting the correction signal SKS output from 428 is output to the positive signal extraction unit 429 as a difference signal SUB3. The difference signal correction unit 428 determines that the difference signal SUB3 obtained as a result of the calculation by the difference output unit 425 is negative when the integration signal SCV of the integration circuit 427 exceeds the voltage corresponding to the minimum on-time Tmin. The correction signal SKS is generated so as to be a value, and is output to the difference output unit 425.

  The positive signal extraction unit 429 is configured using, for example, a diode or a transistor, cuts the negative side of the differential signal SUB3 output from the differential output unit 425, and outputs only the positive side to the amplifier 430. The amplifier 430 outputs a signal output from the positive signal extraction unit 429, that is, a signal obtained by multiplying the signal SUB4 on the positive side of the difference signal SUB3 by the gain Kt to the PWM signal generation circuit 50a as the off-time extension signal SOFF.

  Thereby, when the integration signal SCV of the integration circuit 427 exceeds the voltage corresponding to the minimum on-time Tmin, that is, when the on-time of the switching element Q1 exceeds the minimum on-time Tmin, the differential signal correction unit 428. Since the difference signal SUB3 is set to a negative value by the correction signal SKS output from, and the negative side of the difference signal SUB3 is cut by the positive signal extraction unit 429, the off-time extension signal SOFF is set to zero, and the PWM signal generation circuit The off time is not extended by 50a.

  On the other hand, when the integration signal SCV of the integration circuit 427 is equal to or lower than the voltage corresponding to the minimum on-time Tmin, that is, when the on-time of the switching element Q1 is equal to or shorter than the minimum on-time Tmin, the difference signal SUB3 is set to a positive value. The differential signal SUB3 is output to the amplifier 430 by the positive signal extraction unit 429, multiplied by the gain Kt, and output to the PWM signal generation circuit 50a as the OFF time extension signal SOFF. As a result, the PWM signal generation circuit 50a outputs the OFF time extension signal. The off time is changed based on SOFF.

  FIG. 11 is a circuit diagram illustrating an example of the configuration of the off-time extension signal generation unit 433 that generates the off-time extension signal SOFF. The off-time extension signal generation unit 433 illustrated in FIG. 11 includes a differential signal correction unit 428, a differential output unit 425, a positive signal extraction unit 429, and an amplifier 430. In the differential signal correction unit 428 shown in FIG. 11, the integration signal SCV obtained by the integration circuit 427 is input to the non-inverting input terminal of the differential amplifier AMP1, and the output terminal of the differential amplifier AMP1 is connected to the base of the transistor Q8. The emitter of the transistor Q8 is connected to the ground via the resistor RKs, and the collector of the transistor Q8 is connected to the wiring W1 that supplies the current detection signal SLI from the current mirror circuit 422.

The offset current Ios is caused to flow to the ground via the resistor RKs by the offset current source CS6 that outputs a predetermined offset current Ios, and the voltage generated in the resistor RKs is input to the inverting input terminal of the differential amplifier AMP1. . Offset current Ios is a voltage the voltage value of the integrated signal SCV when the on-time of the switching element Q1 is minimized on-time Tmin Vrof, if the resistance value of the resistor RKs and _{R Ks,} the following equation (3) Set to meet.

Vrof = Ios × R _Ks (3)
That is, in the state where the transistor Q8 is OFF, the voltage drop of the resistor RKs is set to the voltage Vrof, and the voltage Vrof is input to the inverting input terminal of the differential amplifier AMP1, so that the integration signal SCV is equal to or lower than the voltage Vrof. In the range, that is, in the range where the on-time of the switching element Q1 is less than or equal to the minimum on-time Tmin, the output voltage of the differential amplifier AMP1 is negative and the transistor Q8 is not turned on.

On the other hand, in the range where the integration signal SCV exceeds the voltage Vrof, that is, in the range where the ON time of the switching element Q1 exceeds the minimum ON time Tmin, the output voltage of the differential amplifier AMP1 becomes positive and the transistor Q8 becomes the output voltage of the differential amplifier AMP1. Since a current I _SKS corresponding to the voltage value of the integration signal SCV is caused to flow from the wiring W1 to the ground via the resistor RKs, the current I _SKS corresponding to the voltage value of the integration signal SCV is determined from the current detection signal SLI. Subtracted. That is, the current I _SKS is subtracted from the current detection signal SLI so as to decrease the increase / decrease instruction amount of the off time according to the increase / decrease of the integral signal SCV which is an increase / decrease instruction of the on-duty.

FIG. 12 is an explanatory diagram for explaining the operation of the differential signal correction unit 428. As shown in FIG. 12, in the range where the integration signal SCV is less than or equal to the voltage Vrof, that is, in the range where the on-time of the switching element Q1 is less than or equal to the minimum on-time Tmin, the current I _SKS is zero. To the unit 425.

On the other hand, in a range where integrated signal SCV exceeds voltage Vrof, that is, in a range where switching element Q1 has an on-time exceeding minimum on-time Tmin, current I _SKS increases rapidly according to the voltage value of integrated signal SCV. As a result, the current I _SKS subtracted from the current detection signal SLI increases abruptly. Therefore, when the integration signal SCV exceeds the voltage Vrof, the current supplied to the positive signal extraction unit 429 immediately becomes negative, and the off time is extended. The signal SOFF is set to zero. The increasing rate (slope) of the current I _SKS is set by the resistance value R _Ks of the resistor RKs.

The differential output unit 425 shown in FIG. 11 is a current mirror circuit composed of a transistor Q9 and a transistor Q10. The target current value signal STI output from the current mirror circuit 421 is supplied to the collector of the transistor Q9, and the transistor Q10. Thus, the target current value signal STI is subtracted from the current flowing through the wiring W1, that is, the current obtained by subtracting the current I _SKS from the current detection signal SLI.

As described above, the current obtained by subtracting the current I _SKS and the target current value signal STI from the current detection signal SLI by the difference signal correction unit 428 and the difference output unit 425 is the transistor in the positive signal extraction unit 429 as the difference signal SUB3. It is output to the emitter of Q11.

  The positive signal extraction unit 429 is configured by a transistor Q11 having a predetermined reference voltage Vref applied to the base, and only a signal current in the discharge direction is extracted by a diode function between the emitter and base of the transistor Q11, and the signal SUB4 is obtained. It is output to the amplifier 430.

Amplifier 430 includes a current mirror circuit consisting of transistors Q12, Q13, a current mirror circuit consisting of transistors Q14, Q15, the resistance value is interposed between the emitter and ground of the transistor Q12 and the resistor Rr of _{R r,} and a resistance Rg of the interposed resistance value is _{R g} between the emitter and ground of the transistor Q13, the signal SUB4 from the transistor Q11 to the collector of the transistor Q12 is supplied, the collector of the transistor Q13 is the collector of the transistor Q14 It is connected to the. The gain Kt of the amplifier 430 is set based on the following equation (4).

Kt = R _r / R _g (4)
As a result, a signal obtained by multiplying the signal SUB4 by the gain Kt is output from the collector of the transistor Q15 in the amplifier 430 to the PWM signal generation circuit 50a as the off-time extension signal SOFF.

  A PWM signal generation circuit 50a shown in FIG. 10 is an example of a current mode type PWM signal generation circuit that operates in a so-called current boundary mode, and detects a current I2 flowing through the secondary winding L2 of the transformer T. 12, comparators CMP5 and CMP6, OR gates 504 and 505, a flip-flop FF1, a maximum off time limit timer 502, and a minimum on time limit timer 503.

  Then, the proportional signal SRV obtained by the proportional circuit 426 is input to the inverting input terminal of the comparator CMP6, the integration signal SCV obtained by the integration circuit 427 is input to the non-inverting input terminal of the comparator CMP6, and the output signal of the comparator CMP6 Is output to the reset terminal of the flip-flop FF1 via the OR gate 505. The minimum on-time limit timer 503 secures a minimum on-time Tmin, and further prevents the malfunction of the switching element Q1 being turned off immediately after being turned on due to erroneous detection of the current detection signal SI1, etc. During the minimum on-time Tmin, a high level signal is output to the OR gate 505, and the reset operation of the flip-flop FF1 by the output signal of the comparator CMP6 is prohibited.

  In addition, a preset reference voltage Vriz is input to the inverting input terminal of the comparator CMP5, the current value of the current I2 detected by the current detection circuit 12 is input to the non-inverting input terminal of the comparator CMP5, and the output signal of the comparator CMP5 Is input to one input terminal of the OR gate 504. The reference voltage Vriz is set corresponding to the current I2 flowing through the secondary winding L2 when substantially all of the energy magnetically stored in the primary winding L1 is released to the secondary winding L2. ing.

  Further, the switching signal SPWM output from the flip-flop FF1 is input to the other input terminal of the OR gate 504, and the output signal of the OR gate 504 is input to the set terminal of the flip-flop FF1. The switching signal SPWM that is the output signal of the flip-flop FF1 is output to the maximum off-time limit timer 502, and the output of the maximum off-time limit timer 502 is connected to the set terminal of the flip-flop FF1.

  As a result, when the proportional signal SRV having a sawtooth waveform reaches the integration signal SCV, the switching element Q1 is turned off, and the energy magnetically stored in the primary winding L1 is substantially reduced to the secondary winding L2. The switching element Q1 is turned on at the timing when all are discharged.

  The maximum off time limit timer 502 is a circuit unit that limits the upper limit value of the off time of the switching element Q1 according to the off time extension signal SOFF output from the amplifier 430. The maximum off time limit timer 502 is a low level of the switching signal SPWM output from the flip-flop FF1. The off time is measured based on the time of the level, and when the off time exceeds a preset maximum off time, the flip-flop FF1 is set to turn on the switching element Q1. Thereby, the upper limit of the OFF time of the switching signal SPWM is set, and the switching frequency of the switching element Q1 is suppressed from being equal to or lower than a predetermined frequency set in advance.

  As a result, for example, when the discharge lamp La is a high-intensity discharge lamp load, the lamp voltage is lowered because the lamp is cold, or when the output is short-circuited due to a circuit failure of the discharge lamp lighting device 8a, etc. When Vout decreases, the period during which the energy of the transformer T is discharged to the load side becomes excessively long and may cause an excessive decrease in the switching frequency. However, the maximum OFF time limit timer 502 causes the switching element OFF time to decrease. Exceeding the maximum off time is suppressed, and the switching frequency is suppressed from excessively decreasing.

Further, the maximum off time in the maximum off time limit timer 502 is increased or decreased according to the increase or decrease of the off time extension signal SOFF output from the amplifier 430. Specifically, the off-time extension signal SOFF is zeroed by the off-time extension signal generation unit 433 when the on-time of the switching element Q1 exceeds the minimum on-time Tmin. There is no extension of off-time. On the other hand, when the on-time of the switching element Q1 is less than or equal to the minimum on-time Tmin, the target current value signal STI is subtracted from the current detection signal SLI by the off-time extension signal generation unit 433 and further corrected by the current I _SKS . In response to the off-time extension signal SOFF, the off-time is extended by the PWM signal generation circuit 50a.

  As a result, when the on time of the switching element Q1 exceeds the minimum on detection time while ensuring the minimum on time Tmin of the switching element Q1, the off time of the switching signal SPWM is limited to the preset maximum off time. In addition, the switching frequency of the switching element Q1 is suppressed to be less than or equal to a predetermined frequency set in advance, and when the on-time of the switching element Q1 is less than the minimum on-time Tmin, the switching element Q1 is turned off according to the off-time extension signal SOFF. Since the time is extended, it is possible to reduce the decrease in the switching frequency while securing the minimum on-time according to the switching characteristics of the switching element.

  Further, the off time extension signal SOFF has a maximum off time limit timer because the signal value is increased according to the integration signal SCV by the differential signal correction unit 428 when the on time of the switching element Q1 exceeds the minimum on time Tmin. Whether or not the off time extension control by 502 can be switched continuously can be switched smoothly.

  The difference signal correction unit 428 has a gain Ks so that the difference signal SUB3, which is the result of the difference calculation by the off-time extension signal generation unit 433, becomes negative when the on-time of the switching element Q1 exceeds the minimum on-time Tmin. In this example, only the positive signal of the difference signal SUB3 is extracted, and the off-time extension signal SOFF is set to zero when the on-time of the switching element Q1 exceeds the minimum on-time Tmin. The signal correction unit 428 may be configured to extract a signal corresponding to a case where the ON time of the switching element Q1 exceeds the minimum ON time Tmin after the difference calculation by the difference output unit 425 without applying gain.

  Further, for example, using a control circuit configured with a microcomputer, when the on-time of the switching element Q1 exceeds the minimum on-time Tmin, the on-duty is increased or decreased based on the integration signal SCV from the integration circuit 427. When the on-time of the switching element Q1 reaches the minimum on-time Tmin, control for decreasing the on-duty of the switching element Q1 by increasing / decreasing the off-time may be executed.

It is sectional drawing which shows an example of a structure of the illuminating device which concerns on one Embodiment of this invention. It is a perspective view which shows the vehicle by which the illuminating device shown in FIG. 1 was arrange | positioned. It is a circuit diagram which shows an example of a structure of the discharge lamp lighting device which concerns on the 1st Embodiment of this invention. FIG. 4 is a circuit diagram illustrating an example of a configuration of an oscillator illustrated in FIG. 3. FIG. 5 is a signal waveform diagram for explaining the operation of the oscillator shown in FIG. 4. FIG. 5 is an explanatory diagram for explaining an operation of the oscillator illustrated in FIG. 4. FIG. 5 is a circuit diagram illustrating an example of a configuration of a current source illustrated in FIG. 4. FIG. 4 is a circuit diagram showing another example of the PWM signal generation circuit shown in FIG. 3. It is a signal waveform diagram for demonstrating operation | movement of the PWM signal generation circuit shown in FIG. It is a circuit diagram which shows an example of a structure of the discharge lamp lighting device which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows an example of a structure of the off time extension signal generation part shown in FIG. It is explanatory drawing for demonstrating operation | movement of the difference signal correction | amendment part shown in FIG. It is a circuit diagram which shows the structure of the discharge lamp lighting device which concerns on background art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Illuminating device 2 Lamp body housing 8 and 8a Discharge lamp lighting device 10 and 10a Power supply part 12 Current detection circuit 20 Inverter circuit 30 Start circuit 40 and 40a Control circuit part 50 and 50a PWM signal generation circuit 401 Lamp voltage detection circuit 402 Target Value setting unit 403 Lamp current detection circuit 404 Difference output unit 405, 426 Proportional circuit 406, 427 Integration circuit 407 Adder 423, 424, 425 Difference output unit 428 Differential signal correction unit 429 Positive signal extraction unit 433 Off time extension signal generation unit 502 Maximum off time limit timer 503 Minimum on time limit timer C1, C2, C3, C4 Capacitors CMP1 to CMP7 Comparator CS1, CS2 Current sources CS3, CS6 Offset current source CS4, CS5 Constant current source L1 Primary winding La Discharge lamp Q1 Switching elements Q2-Q 5 transistor R1~R7 resistance T transformer

Claims (5)

A power supply unit that includes a switching element that turns on and off a current input from the outside in a predetermined cycle, and that increases or decreases the lighting power for the discharge lamp according to an increase or decrease in on-duty in the on / off operation of the switching element;
A current detector for detecting a current value supplied to the discharge lamp as a detected current value;
A voltage detector for detecting a voltage supplied to the discharge lamp;
A target value setting unit for setting a target current value to be supplied to the discharge lamp based on the voltage detected by the voltage detection unit;
A difference output unit that outputs a difference signal representing a difference between a detected current value detected by the current detection unit and a target current value set by the target value setting unit;
An integration circuit for integrating the difference signal output from the difference output unit,
The switching control unit increases or decreases the on-duty in the on-off operation according to the cycle based on the integration value by the integration circuit when the on-time exceeds the preset minimum on-time in the on-off operation according to the cycle, A discharge lamp lighting device characterized in that, when an on-time has reached the minimum on-time in the on-off operation, the on-duty is decreased by increasing / decreasing the off-time in the on / off operation. Further comprising a minimum on-time detector for detecting an on-time in the on-off operation,
The switching control unit, when the minimum on-time detecting unit detects that the on-time is equal to or less than a preset minimum on-detection time, sets the on-time in the on-off operation to a preset minimum on-time. 2. The discharge lamp lighting device according to claim 1, wherein the on-duty is increased or decreased by changing an off time based on the difference signal output from the difference output unit while maintaining the above. 3. The minimum on-time detection unit detects that an on-time in the on-off operation is equal to or less than a preset minimum on-detection time based on an integration value obtained by the integration circuit. Discharge lamp lighting device. The difference output unit outputs the difference signal as an instruction to increase or decrease the off time,
The integration circuit outputs the integration value as an instruction to increase or decrease the on-duty,
A differential signal correction unit that corrects the differential signal so as to decrease the increase / decrease instruction amount of the off time in the differential signal according to the increase / decrease amount in the increase / decrease instruction of the on-duty by the integration value of the integration circuit;
The discharge lamp lighting device according to claim 1, wherein the switching control unit increases or decreases the on-duty by changing an off time based on the difference signal corrected by the difference signal correction unit.   The discharge lamp lighting device according to any one of claims 1 to 4, further comprising: a discharge lamp lighting device for lighting a discharge lamp; and a housing that houses the discharge lamp lighting device. There is a lighting device.

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