JP2006223671A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a possible discrepancy in recognition involved in the detection of the putting out of prize game media while curtailing the cost in a game machine which has a game control means and a put-out control means disposed separately. <P>SOLUTION: When the putting out of the game balls is detected by a counting switch 301 for the number of put-out media, if the detection is judged for the putting out of prize balls, a put-out control means turns a prize ball counting signal on for a prescribed period of time. When a full capacity signal is outputted from a full capacity switch or when no VL signal is transmitted with a photocoupler, a status signal is turned off and the shooting is not permitted. On the other hand, when no full capacity signal is outputted from the full capacity switch or the VL signal is transmitted with the photocoupler, the status signal is turned on and the shooting is permitted. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention is a game machine such as a pachinko gaming machine or a slot machine in which a player can play a predetermined game using a game medium and pays out the game medium to the player based on the fact that a payout condition is established. About.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Furthermore, there is provided a variable display unit capable of changing the display state, and configured to give a predetermined game value to the player when the display result of the variable display unit is in a predetermined specific display mode. is there.

  Note that the game value is the right that the state of the variable winning ball device provided in the gaming area of the gaming machine is advantageous for a player who is likely to win a ball, or the advantageous state for a player. In other words, or a condition for winning a prize ball is easily established.

  In a pachinko gaming machine, the combination of a predetermined display mode with a display result of a variable display unit that displays a special symbol is usually referred to as “big hit”. When the big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state where the hit ball is easy to win.

  Game progress in the gaming machine is controlled by game control means including a game control microcomputer. When the payout control means including the payout control microcomputer for controlling the prize ball payout is mounted on a payout control board different from the main board on which the game control means is mounted, the progress of the game is transferred to the main board. Since it is controlled by the mounted game control means, the number of winning balls based on winning is determined by the game control means, and a control signal indicating the number of winning balls is transmitted to the payout control board. Then, the payout control means performs a process of paying out the number of prize balls based on the winning based on the control signal from the game control means. Further, when there is a ball lending request from the prepaid card unit, the payout control means performs a process of paying out the number of lending balls based on the request.

  In the gaming machine, a count switch for detecting the paid-out lending ball and detecting and outputting it to the pay-out control means, and detecting and outputting the paid-out prize ball to the game control means and the pay-out control means. Some of them are provided with a count switch (for example, see Patent Document 1). In the gaming machine configured in this way, the game control means and the payout control means have not paid out based on the detection signal from the count switch that detects the payout of the prize ball transmitted to the game control means and the payout control means. The number of prize balls is managed.

JP 2001-187250 A (paragraphs 0065, 0069, 0152 to 0161, FIGS. 7 and 26)

  As described above, in the gaming machine described in Patent Document 1, the payout control means pays out the number of prize balls based on the winning based on the control signal from the game control means, and from the count switch that detects the payout of the prize ball The detection signal is input to the game control means and the payout control means, and the game control means and the payout control means can both manage the number of unpaid balls based on the input detection signal from the count switch. Has been. In such a case, it is necessary to provide a count switch for detecting the payout of the lending ball that outputs a detection signal only to the payout control means separately from the count switch for detecting the payout of the prize ball. End up. Further, since the detection signal from the count switch that detected the payout of the prize ball is branched and inputted to the game control means and the payout control means, it is inputted to the game control means and the payout control means due to the influence of noise or the like. There is a possibility that the detection signal is distorted, and there is a possibility that the recognition relating to the detection of the payout of the prize ball is different between the game control means and the payout control means.

  Therefore, the present invention aims to reduce costs in a gaming machine in which a game control means and a payout control means are provided separately, and that recognition differences related to detection of payout of premium game media will occur. It is an object to provide a gaming machine that can be prevented.

  The gaming machine according to the present invention allows a player to play a predetermined game by firing a game medium (for example, a game ball) into the game area, and a predetermined winning area (for example, a fixed area provided in the game area). Based on the fact that the game medium is won in the prize-winning entrances 29, 30, 33, 39 and the variable winning ball apparatus 15), a prize game medium (for example, a prize ball) is paid out as a prize, and a rental request from a player is accepted. A gaming machine that pays out a lending game medium (for example, a lending ball) to be lent to a player based on a lending request signal (for example, a BRDY signal, a BRQ signal) from a request receiving device (for example, a prepaid card unit 50). Shooting means for launching toward the game area (for example, a ball hitting device including the launch motor 94) and game control processing for controlling the progress of the game (for example, step S21) S36) a game control board (for example, game control board (main board) 31) on which a game control microcomputer (for example, game control microcomputer 560) is executed, and a payout means (for example, ball payout) for paying out game media Device 97), an input unit (for example, I / O port 372f) to which a lending request receiving device connection signal (for example, VL signal) indicating that the lending request receiving device is connected to the gaming machine is input, and a payout means Based on a payout control microcomputer (eg, payout control microcomputer 370) that executes payout control processing (eg, steps S753 and S756) to be controlled, and a loan request accepting device connection signal from the lending request accepting device. A photocoupler (for example, a photocoupler) that transmits a connection signal to the dispensing control microcomputer. A payout control board (for example, payout control board 37) on which a coupler 151) and capacitors (for example, capacitors 153 and 154) connected between the input unit and the photocoupler are mounted, and a loan request signal from the loan request receiving device A loan request relay board (for example, the interface board 66) that relays and outputs to the payout control board, and payout of a prize game medium as a prize based on establishment of a payout condition by a game (for example, winning of a game ball in a winning area); A payout detecting means (for example, a payout number count switch 301) for detecting a payout of a rented game medium based on the establishment of a payout condition based on the loan request (eg, Y in step S623) and outputting a detection signal to the payout control microcomputer; The game control microcomputer is provided with a payout control microcomputer from a photocoupler. A state signal (for example, a state signal) indicating an output state of the connection signal transmitted to the computer. Based on the state signal input means (for example, the input circuit 68) for inputting the state signal input state and the state signal input state by the state signal input means, the input state to the firing means of the firing control signal for driving the firing means is determined. Launch control means for controlling (for example, a part for executing steps S21 and S22 including a process of outputting a launch motor signal in accordance with an input state of a state signal in the game control microcomputer 560 (see FIG. 22)) and payout by game Based on the establishment of the condition, a payout command signal (for example, a prize ball number command) that can specify the number of prize game media to be paid out together with a take-in signal (for example, a prize ball REQ signal) for instructing to take in the payout command signal. A payout command signal output means for outputting to the payout control microcomputer (for example, a scan in the game control microcomputer 560). The payout control microcomputer includes a payout command signal input means for inputting a payout command signal from the payout command signal output means (for example, a payout control microcomputer). 370, a portion for executing the processing of step S545 in the prize ball REQ interrupt processing) and paying out the number of premium game media specified by the payout command signal input by the payout command signal input means by controlling the payout means A prize game medium payout control means for executing payout processing (for example, payout start waiting processing in the payout control microcomputer 370 (step S610: in particular, steps S631 to S635, S627, S628), payout motor stop wait processing (step S611). ), Payout passing waiting processing (step S612), and A portion for executing the payout motor control process (step S753) and a payout determining means for determining whether the detection signal input from the payout detecting means is a payout of the prize game medium or the rented game medium (for example, payout control) Portion for executing steps S601 to S603 in the microcomputer 370) and when the detection signal is determined by the payout determination means to be due to the payout of the prize game medium (eg, Y in step S602). Counting signal output means for outputting a prize game medium count signal (for example, a prize ball count signal) indicating detection of the payout of the prize game medium (for example, a part for executing step S606 in the payout control microcomputer 370), and a predetermined condition Established (for example, Y or step of step S808) In S811, Y, that is, the occurrence of either the full tank error or the ball out error shown in FIG. 48, the control state related to payout is an error state (for example, the full flag error bit and the ball out error bit of the error flag are set) ) To shift to an error state (for example, a portion for executing steps S809, S812 and S621 in the payout control microcomputer 370) and an input state determination unit for determining an input state of a connection signal transmitted from the photocoupler. (For example, the part that executes step S825 in the payout control microcomputer 370) and the input state determining means determines that the connection signal is not transmitted, the lending request accepting device is not connected to the gaming machine Connection error to notify Connection error notification processing means for executing intelligence processing (for example, a portion for executing steps S574 to S576 in the payout control microcomputer 370: processing for displaying a prepaid card unit unconnected error on the error display LED 374 as shown in FIG. 48) The count signal output means outputs the prize game medium count signal even when the error status setting means has shifted to the error state (for example, the error bit of the error flag is set by the processing of step S621). If it is determined that the error bit is determined, the subsequent payout process is not performed, but even if it is determined that the error bit is set, the processes in steps S602, S603, and S606 are performed). To do.

  A storage state detection means (for example, a full tank switch 48) that outputs a storage detection signal when it is detected that a predetermined amount or more of the game media is stored in the storage unit that stores the paid-out game media; Storage detection that controls the input state of the state signal to the state signal input means to be the same as when the output state of the connection signal is stopped when the storage detection signal is output from the storage state detection means A storage state detection signal is input to the payout control microcomputer, and the payout control microcomputer performs payout control when the storage detection signal is in the input state. The execution of the process may be stopped (for example, Y in step S621).

  Launching that executes a firing stop notification process for notifying that the game control microcomputer is in a firing stop state when the launch control means controls the input state of the launch control signal to the launching means to the firing stop state. It may be configured to include a stop notification processing means (for example, a part for executing a process of transmitting a firing non-permission state notification command when it is determined as N in step S21 in the game control microcomputer 560). .

  A prize game medium payout notification means (for example, a prize ball lamp 51) for notifying that a prize game medium has been paid out by the prize game medium payout control means is provided, and the game control microcomputer inputs a prize game medium count signal. In response to this, a process for notifying the prize game medium payout notifying means that the prize game medium has been paid out by the prize game medium payout control means (for example, a prize ball payout confirmation designation command is sent to the effect control microcomputer 100). May be configured to perform a prize ball notification process (step S24a): see FIG.

  The payout control microcomputer is a lending game medium payout control means (for example, a payout control medium) that executes a lending process for controlling a payout means to pay out a predetermined number of lending game media based on establishment of a payout condition based on a loan request. The microcomputer 370 executes steps S623 to S628, a payout motor stop wait process (step S611), a payout passage wait process (step S612), and a payout motor control process (step S753) in the payout start wait process (step S610). ) And the payout determination means receives a detection signal from the payout detection means when neither the payout process by the prize game medium payout control means nor the lending process by the rental game medium payout control means is executed. (For example, in step S601, the number of payouts is counted. When the switch 301 is turned on, if both step S602 and step S603 are N), it is determined that the detection signal is due to the payout of the prize game medium by the prize game medium payout control means (for example, paid out in step S602). The same processing as when it is determined that the game ball is a prize ball (steps S604 and S606) may be performed.

  The payout control microcomputer is a rented game medium number data storage means (for example, a payout control microcomputer 370) for storing rented game medium number data indicating the number of rented game media to be paid out by the lending process by the rented game medium payout control means. In response to the fact that the payout determining means determines that the detection signal input from the payout detecting means is due to payout of the rented game medium (Y in step S603). Thus, even when the error state setting means shifts to the error state, the rental game medium number data subtracting means (for example, a payout control microcomputer) subtracts the rental game medium number data stored in the rental game medium number data storage means. 370, the portion for executing step S605). It may be.

  The lending request acceptance device connection determination signal transmitted from the photocoupler is branched and input to a payout control microcomputer (eg, payout control microcomputer 370) and a game control microcomputer (eg, game control microcomputer 560). (See FIG. 6).

  According to the first aspect of the present invention, there is provided payout detection means for detecting the payout of the premium game medium and the payout of the rental game medium, and outputting a detection signal to the payout control microcomputer. It is determined whether the detection signal input from the means is a payout of the prize game medium or the rental game medium, and when it is determined that the detection signal is a payout of the prize game medium, the game control microcomputer On the other hand, a prize game medium count signal indicating the detection of the payout of the prize game medium is output, and even if the control state related to the payout is an error state, when the detection signal from the payout detection means is input, the payout detection means If it is determined that the detection signal from the player is due to payout of the prize game medium, the prize game medium count signal is sent to the game control microcode. Since it is configured to output to a computer, it is not necessary to separately provide payout detection means for detecting payout of rental game media and payout detection means for detecting payout of premium game media, thereby reducing the cost of the gaming machine In addition, it is possible to prevent a difference in recognition relating to detection of payout of premium game media. In addition, since the photocoupler for transmitting the lending request receiving device connection signal from the lending request receiving device and the capacitor connected between the photocoupler and the input unit are mounted on the dispensing control board, the lending request receiving device and Since it is no longer necessary to install a capacitor connected to the photocoupler that transmits the connection signal for the lending request acceptance device on the lending request relay substrate that relays signals to and from the payout control board, an unauthorized circuit is installed on the lending request relay substrate It is possible to easily find out what has been done and to prevent fraud. Further, the game control microcomputer is in a state signal input means for inputting a state signal indicating the output state of the connection signal transmitted from the photocoupler to the payout control microcomputer, and the state signal input means is in the state signal input state. Based on the above, the game control microcomputer is based on the state signal input state so that the launch control means controls the input state of the launch control signal for driving the launch means to the launch means. Can be controlled.

  According to a second aspect of the present invention, there is provided a storage state detection means for outputting a full tank detection signal when it is detected that a predetermined amount or more of game media is stored in the storage portion where the paid-out game media are stored. When the full state detection signal is output from the storage state detection means, the state signal input state to the state signal input means is controlled to the same state as when the connection signal output state is stopped. Since it is provided with a state signal control means at the time of full tank detection, the output state of the full tank detection signal can be reflected in the input state of the state signal, and the microcomputer for game control can be simply monitored by monitoring the state signal input state However, even if the output state of the full tank detection signal is not separately monitored, it is possible to appropriately determine whether or not the firing means may be driven if the input state of the state signal is monitored.

  In the invention according to claim 3, when the game control microcomputer controls the input state of the launch control signal to the launching means to the launch stop state by the launch control means, the game control microcomputer notifies the launch stop state. Since it is configured to include the firing stop notification processing means for executing the firing stop notification processing, it becomes possible for the player and the game store clerk to easily recognize that it has been controlled to the firing stop state.

  In the invention according to claim 4, since the game control microcomputer is configured to perform processing for notifying the prize game medium payout notifying means in response to the input of the prize game medium count signal, the prize game medium It is possible to eliminate the need for the payout control microcomputer to control the payout notification means, and the control burden of the payout control microcomputer is reduced, and the prize game medium is paid out in accordance with the actual payout of the prize game medium. This can be notified to a player, a game store clerk, or the like.

  According to the fifth aspect of the present invention, the payout control microcomputer executes a lending process in which a payout control microcomputer executes a lending process in which a predetermined number of lending game media are discharged by controlling a payout means based on establishment of a payout condition based on a lending request. A detection signal is input from the payout detection means when the payout determination means includes the control means, and neither the payout process by the prize game medium payout control means nor the lending process by the rental game medium payout control means is executed. Since the detection signal is determined to be due to the payout of the prize game medium, the prize game medium count signal is transmitted to the game control microcomputer even when an irregular payout is made, and the game control is performed. The microcomputer can perform appropriate processing.

  According to the sixth aspect of the present invention, the rental game medium number data storage means for storing the rental game medium number data indicating the number of loaned game media to be paid out by the payout control microcomputer by the loan game medium payout control means. And the rental game medium even when the error state setting means shifts to the error state in response to the determination by the payout determination means that the detection signal input from the payout detection means is due to the payout of the rental game medium Since the rented game medium number data subtracting means for subtracting the rented game medium number data stored in the number data storage means is included, the unpaid number of rented game media can be managed reliably. .

  In the invention of claim 7, since the lending request acceptance device connection determination signal transmitted from the photocoupler is branched and inputted to the payout control microcomputer and the game control microcomputer, the photocoupler The game control microcomputer can stop the driving of the launching means in accordance with the transmission state of the lending request accepting apparatus connection signal.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. In the following embodiments, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and can be applied to other gaming machines such as a slot machine.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding a game board described later). Is a structure including

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, there is provided a variable display device (special symbol display device) 9 including a plurality of variable display portions each variably displaying a symbol as identification information. The variable display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. In addition, the variable display device 9 is provided with four special symbol start memory display areas (start memory display areas) 18 for displaying the number of effective winning balls that have entered the start winning opening 14, that is, the start memory number. Each time there is a valid start prize, the display color changes (for example, changes from blue display to red display), and the start storage display area is increased by one. Each time the variable display of the variable display device 9 is started, the start memory number display area where the display color is changed is reduced by 1 (that is, the display color is returned to the original). In this example, since the symbol display area and the start memory display area are provided separately, the start memory number can be displayed even during variable display. The start memory display area may be provided in a part of the symbol display area. Further, the display of the start memory number may be interrupted during variable display. In this example, the start memory display area is provided in the variable display device 9. However, a display (special symbol start memory display) for displaying the start memory number may be provided separately from the variable display device 9. Good.

  Below the variable display device 9, a variable winning ball device 15 is provided as a start winning port 14. The winning ball that has entered the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a. A variable winning ball device 15 that opens and closes is provided below the start winning opening 14. The variable winning ball device 15 is opened by a solenoid 16.

  An open / close plate 20 that is opened by a solenoid 21 in a specific gaming state (big hit state) is provided below the variable winning ball device 15. The opening / closing plate 20 is a means for opening and closing a large winning opening (variable winning ball apparatus). Of the winning balls guided from the opening / closing plate 20 to the back of the game board 6, the winning ball entering one (V winning area: special area) is detected by the V count switch 22, and the winning ball from the opening / closing board 20 is counted. 23. On the back of the game board 6, a solenoid 21A for switching the route in the special winning opening is also provided.

  When a game ball wins the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting the left and right lamps (a symbol can be visually recognized when the lamp is lit). For example, if the right lamp is lit when the variable display ends, it is a win. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. In the vicinity of the normal symbol display 10, a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls entered into the gate 32 is provided. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Each time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning holes 29, 30, 33, 39, and winning of game balls to the winning holes 29, 30, 33, 39 is performed by winning hole switches 29a, 30a, 33a, 39a, respectively. Detected. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning opening 14 and the big winning opening also constitute a winning area that accepts game media and allows winning. Around the left and right of the game area 7, there are provided decorative lamps 25 blinking and displayed during the game, and at the lower part there is an outlet 26 for absorbing a game ball that has not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. On the outer periphery of the game area 7, a top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c are provided. Further, a decoration LED is installed around each structure (such as a big prize opening) in the game area 7. The top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration LED are examples of a decorative light emitter provided in the gaming machine.

  In this example, a prize ball lamp 51 that is turned on when a prize ball is paid out is provided in the vicinity of the left frame lamp 28b, and is turned on in the vicinity of the right frame lamp 28c when the supply ball has run out. A ball break LED 52 is provided. As described above, the pachinko gaming machine 1 of this embodiment is provided with lamps and LEDs as light emitters in various places. Further, a prepaid card unit (hereinafter referred to as “card unit”) that enables lending a ball by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown in FIG. 1). .

  The card unit includes, for example, a use indicator lamp that indicates whether or not the card unit is in a usable state, a connection table direction indicator that indicates which side of the pachinko gaming machine 1 corresponds to the card unit, When checking the card insertion indicator lamp indicating that the card is inserted, the card insertion slot into which the card as a recording medium is inserted, and the card reader / writer mechanism provided on the back of the card insertion slot A card unit lock is provided to release the unit.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When the game ball enters the start winning port 14 and is detected by the start port switch 14a, the special symbol starts variable display (variation) on the variable display device 9 if the variable display of the symbol can be started. If the variable display of the symbol cannot be started, the start memory number is increased by one.

  The variable display of the special symbol on the variable display device 9 stops when a certain time has elapsed. If the combination of special symbols at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or a predetermined number (for example, 10) of game balls wins. When a game ball wins the V winning area while the opening / closing plate 20 is opened and is detected by the V count switch 22, a continuation right is generated and the opening / closing plate 20 is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds).

  When the combination of special symbols in the variable display device 9 at the time of stopping is a combination of jackpot symbols (probability variation symbols) with probability fluctuations, the probability of the next jackpot increases. That is, it becomes a more advantageous state for the player in the probability variation state.

  When the game ball wins the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased. That is, the opening time and the number of times of opening of the variable winning ball device 15 can be increased when the stop symbol of the normal symbol is a winning symbol or the stop symbol of the special symbol is a probabilistic symbol. Change to an advantageous state. It should be noted that increasing the number of times of opening is a concept including changing from a closed state to an open state.

  Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. FIG. 2 is a rear view of the gaming machine as seen from the back side.

  As shown in FIG. 2, on the back side of the pachinko gaming machine 1, a ball storage tank 38 is provided on the top of the mechanism plate in the outer frame 2A, and the pachinko gaming machine 1 is installed on the gaming machine installation island. A game ball is supplied to the ball storage tank 38 from above. The game balls in the ball storage tank 38 pass through the guide basket 39 and reach the ball payout device covered with the prize ball case 40A.

  Further, on the back side of the gaming machine, a variable display control unit 49 including an effect control board 80 on which an effect control microcomputer for controlling the variable display device 9 is mounted, and a game on which a game control microcomputer and the like are mounted. A control board (main board) 31 is installed. In addition, a payout control board 37 on which a payout control microcomputer for performing ball payout control is mounted is installed.

  The effect control means for performing variable display control of the variable display device 9 is realized by an effect control microcomputer mounted on the effect control board 80 or a VDP. Further, the gaming machine drives a frame side lamp driver board 35 on which circuits for driving a top frame lamp 28a, a left frame lamp 28b, a right frame lamp 28c, etc. provided on the frame side are mounted, and a speaker 27. A voice control board 70 on which a circuit to be mounted is mounted.

  Further, a power supply board 910 and other boards (not shown) on which power supply circuits for creating DC30V, DC21V, DC12V, and DC5V are mounted are provided. A central relay board 77 is provided for relaying signals output from the main board 31 to other boards.

  The electrical component control boards (payout control board and effect control board) are each equipped with electrical component control means (payout control means and effect control means) including an electric component control microcomputer. The payout control means and the effect control means control electrical components (game device: ball payout device 97, variable display device 9 and the like) provided in the gaming machine according to a command signal (control signal) from the game control means. Further, the light emitters such as lamps and LEDs provided on the frame side, and electrical components such as the speaker 27 are mounted on the frame side lamp driver board 35 and the sound control board 70 in accordance with a control signal from the effect control means. Driven by circuit components. Furthermore, game machines include a board on which a switch is mounted and a board on which a light emitting body such as a lamp or LED (hereinafter also referred to as a lamp / LED) is mounted. The substrate is a printed wiring board on which electrically driven electrical components, circuit components, connection components such as connectors and terminals, and the like are mounted.

  On the back side of the gaming machine, a terminal board 160 provided with terminals for outputting various information to the outside of the gaming machine is installed above. The terminal board 160 includes at least a ball break terminal for introducing the output of the ball break detection switch 167 and outputting it externally, a prize ball terminal and a ball for outputting prize ball information (prize ball control signal) to the outside. A ball lending terminal for externally outputting lending information (ball lending number signal) is provided. Near the center, an information terminal board (information output board) 34 having terminals for outputting various information from the main board 31 to the outside of the gaming machine is installed.

  The game balls stored in the ball storage tank 38 pass through the guide rod 39 and reach the ball payout device covered with the payout case 40A via the curve bag 39. A ball break switch 187 as a game medium break detection means is provided on the upper part of the ball payout device. When the ball break switch 187 detects a ball break, the dispensing operation of the ball dispensing device stops. The ball break switch 187 is a switch for detecting the presence or absence of a game ball in the game ball passage, but the ball break detection switch 167 for detecting the shortage of supply balls in the storage tank 38 is also an upstream portion (the storage tank 38 In the vicinity of the When the ball break detection switch 167 detects the shortage of game balls, the game machine is replenished to the game machine from the supply mechanism provided on the gaming machine installation island.

  Hereinafter, the electrical component control board on which the microcomputer is mounted and the board for inputting a signal from the main board 31 may be collectively referred to as a peripheral board.

  FIG. 3 is a front view (FIG. 3 (A)) and a cross-sectional view (FIG. 3 (B)) showing the ball dispensing device 97 covered with the dispensing case 40A. The ball payout device 97 is fixed to the lower part of the passage body installed between the ball break switch 187 and the ball payout device 97. The passage body has a ball passage for flowing down two rows of game balls whose flow-down direction is converted into the left-right direction by a curve saddle. A ball break switch 187 is installed on the upstream side of the ball passage. In practice, a ball break switch is installed in each ball passage. The ball break switch 187 detects the presence or absence of a game ball in the ball passage. When the ball break switch 187 no longer detects a game ball, the ball discharge device 97 has a payout motor (not shown in FIG. 3). Rotation is stopped and game ball payout is immobilized.

  Further, the ball break switch 187 is locked by a locking piece at a position where it can be detected that 27 to 28 game balls are present in the ball passage.

  In the ball payout device 97, a payout motor (not shown) using a stepping motor rotates, for example, a cam, thereby paying out one winning ball or one game ball based on a ball lending request. Further, below the ball payout device 97, for example, a payout number count switch 301 using a proximity switch is provided. Each time one game ball falls from the ball payout device 97, the payout number count switch 301 is turned on. That is, the payout number count switch 301 detects a game ball actually paid out from the ball payout device 97. Therefore, the payout control means can count the number of game balls actually paid out by the detection signal of the payout number count switch 301. In this example, the payout number count switch 301 detects both the paid-out prize balls and rental balls. That is, the payout of prize balls and the payout of rental balls are detected by the same detection means. Therefore, the number of parts can be reduced, and the cost of the gaming machine can be reduced.

  In this embodiment, the ball payout device 97 is configured to perform both prize ball payout and ball lending. However, a ball payout device for paying out a prize ball and a ball payout device for lending a ball may be provided separately. When separately provided, the payout means is composed of a ball payout device for paying out a prize ball and a ball payout device for lending a ball. Furthermore, for example, it may be configured to change the direction of rotation of the cam or sprocket so as to separate the winning ball payout and the ball lending. The present invention can be applied to any structure other than the structure).

  FIG. 4 is a block diagram showing an example of the circuit configuration of the main board (game control board) 31. FIG. 4 also shows a payout control board 37, an effect control board 80, and the like. A basic circuit (corresponding to game control means) 53 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The basic circuit 53 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, and a game control microcomputer 560 having a CPU 56 for performing control operations in accordance with the program. And an I / O port unit 57. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the RAM 55, and the ROM 54 may be external or built-in. Further, the I / O port unit 57 may be incorporated in the game control microcomputer 560. In this case, the game control microcomputer 560 also includes an I / O port unit.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54. Therefore, hereinafter, the game control microcomputer 560 executes (or performs processing) specifically. Is that the CPU 56 executes control according to the program. The same applies to microcomputers mounted on substrates other than the main substrate 31. The game control means is realized by a basic circuit 53 including a game control microcomputer 560.

  The RAM 55 is a backup RAM as non-volatile storage means that is partly or wholly backed up by a backup power source created on the power supply substrate 910. That is, even if the power supply to the gaming machine is stopped, a part or all of the contents of the RAM 55 is stored for a predetermined period (until the capacitor as the backup power supply is discharged and the backup power supply cannot be supplied). In particular, at least data (special symbol process flag, etc.) corresponding to the game state, that is, the control state of the game control means, and data indicating the number of unpaid winning balls are stored in the backup RAM. Note that the data according to the control state of the game control means is data necessary for restoring the control state before the occurrence of a power failure or the like based on the data when the power supply is restored after a power failure or the like. . In this embodiment, it is assumed that the entire RAM 55 is backed up.

  The basic circuit 53 receives a power-off signal from the power supply board 910. The power-off signal is output from the power supply circuit when the power supply voltage supplied to each unit by the power supply circuit drops below a predetermined value.

  A reset signal from the power supply board 910 is input to the reset terminal of the CPU 56. When the reset signal changes from low level to high level, the CPU 56 starts operation. That is, the processing based on the program stored in the ROM 54 is started.

  The main circuit board 31 is supplied with signals from the gate switch 32a, the start port switch 14a, the V count switch 22, the count switch 23, the winning port switches 29a, 30a, 33a, 39a, and the clear switch 921 to the basic circuit 53. An input driver circuit 58 is also mounted, and the solenoid 16 that opens and closes the variable winning ball apparatus 15, the solenoid 21 that opens and closes the opening / closing plate 20, and the solenoid 21 </ b> A for switching the path in the big prize opening is driven according to a command from the basic circuit 53. A circuit 59 is also mounted.

  Note that a switch common voltage (for example, +12 V) is supplied to each of the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a.

  Further, on the main board 31, in accordance with data given from the basic circuit 53, jackpot information indicating the occurrence of jackpot, effective starting information indicating the number of starting winning balls used to start variable display of symbols in the variable display device 9, An information output circuit 64 is provided for outputting an information output signal such as probability variation information indicating that a probability variation has occurred to an external device such as a hall computer.

  Further, the main board 31 is provided with a decoration lamp 25 that is a light emitter provided on the panel side, a normal symbol display 10 that variably displays a normal symbol, and a lamp circuit 36 that drives a normal symbol start memory display 41. It has been. Note that an LED may be used as the decorative lamp 25.

  The hitting ball launching device for hitting and launching the game ball includes a launch motor 94 controlled by a launch motor drive signal from a circuit on the launch board 90, and the game motor 7 is played by rotating the launch motor 94. Fire towards. A drive signal (shooting motor signal) for driving the firing motor 94 is input from the main board 31 to an AND circuit mounted on the firing board 90. Further, the touch sensor detects that the player is touching the operation knob (hitting ball handle) 5, and a touch sensor signal from the touch sensor is input to an AND circuit mounted on the launch board 90. The AND circuit outputs a drive signal to the firing motor 94 when the firing motor signal and the control signal from the main board 31 are input (when both the firing motor signal and the touch sensor signal are on). Accordingly, when the firing motor signal from the main board indicates an off state, or when the touch sensor signal from the touch sensor circuit indicates an off state, the driving of the firing motor 94 is stopped. Note that the operation knob 5 is provided with a touch ring that adjusts the resilience and is a part that the player contacts. In the gaming machine, the launch board 90 is disposed between the touch ring and the main board 31 and is disposed in the vicinity of the touch ring. Specifically, the wiring length between the touch ring and the launch board 90 is shorter than the wiring length between the launch board 90 and the main board 31.

  The basic circuit 53 (specifically, the game control microcomputer 560) mounted on the main board 31 transmits an effect control command to the effect control board 80 in accordance with the control state. Then, the effect control means (specifically, the effect control microcomputer) executes a process of receiving the effect control command, and controls the light emitter provided on the frame side via the frame side lamp driver board 35. At the same time, the sound output from the speaker 27 is controlled via the sound control board 70. Note that a microcomputer may be mounted on the frame side lamp driver board 35 and the sound control board 70. Further, a command may be directly transmitted from the game control means (specifically, the CPU 56) on the main board 31 to the frame side lamp driver board 35 and the sound control board 70.

  In this embodiment, the effect control means (effect control microcomputer) mounted on the effect control board 80 receives the effect control command from the game control microcomputer 560 via the centralized relay board 77. Then, display control of the variable display device 9 for variably displaying special symbols is performed.

  In addition, the CPU 56 used in this embodiment includes a non-maskable interrupt terminal (NMI terminal) used for generating a non-maskable interrupt (NMI) that cannot be set to interrupt prohibition by software, And an interrupt terminal (INT terminal) used to generate an external interrupt (external interrupt; maskable interrupt that can be disabled by software). However, this embodiment does not use non-maskable interrupts and external interrupts. Therefore, the NMI terminal and the INT terminal are pulled up to VCC (+5 V) through resistors. Therefore, the input levels of the NMI terminal and the INT terminal are always high, and the input level of the NMI terminal and the INT terminal falls from the high level to the low level due to noise, etc., compared to the case of the terminal open state, and an interrupt occurs. The possibility of entering a state is reduced.

  In addition, the main board | substrate 31 is installed in the state accommodated in one board | substrate box in the back side of a gaming machine. The substrate box has a structure that cannot be easily opened.

  FIG. 5 is a block diagram showing components related to payout, such as the payout control board 37 and the ball payout device 97. As shown in FIG. 5, the payout control board 37 has a RAM (not shown) as storage means used as a work memory, a ROM (not shown) storing a payout control program, and controls according to the program. A payout control microcomputer (an example of an electrical component control microcomputer) 370 including a payout control CPU 371 to be executed is mounted. In this embodiment, the payout control microcomputer 370 is a one-chip microcomputer as long as it has at least a built-in RAM, and the ROM may be external or built-in. The payout control CPU 371, RAM, ROM, I / O port, and the like constitute a payout control means. That is, the payout control means is realized by a payout control microcomputer 370 including a RAM, a ROM, and a payout control CPU 371, and an I / O port. The I / O port may be built in the payout control microcomputer 370. At least a part of the RAM in the payout control microcomputer 370 is backed up by a backup power source mounted on the power supply board 910. In this embodiment, it is assumed that all RAM areas are backed up. Therefore, even when power is not supplied to the gaming machine, the storage contents of the RAM are preserved for a predetermined period (until the backup power supply cannot be supplied because the capacitor as the backup power supply is discharged).

  Detection signals from the ball break switch 187, the full switch 48, and the payout count switch 301 are input to the I / O port 372 f of the payout control board 37 via the relay board 72. A detection signal from the payout motor position sensor 295 is input to the I / O port 372e of the payout control board 37 via the relay board 72. The payout motor position sensor 295 is a sensor composed of a light emitting element (LED) and a light receiving element for detecting the rotational position of the payout motor 289, and is used for detecting that the game ball is clogged, that is, so-called ball biting. . The payout control microcomputer 370 mounted on the payout control board 37 receives a detection signal (non-secured detection signal) indicating a ball shortage state from the ball shortage switch 187, and also when a full signal from the full switch 48 is full. When a detection signal (storage detection signal) indicating the tongue state is input, the ball payout process is stopped.

  Further, a detection signal (storage detection signal) indicating a full state from the full tank switch 48 is branched by the payout control board 37, and the payout control microcomputer 370 and the main board 31 (details) as a low level full signal. The output signal is input to the input side of the AND circuit 155 that is input to the main board 31 (see FIG. 6). A drive signal (launch motor signal) from the game control microcomputer 560 to the launch motor 94 is transmitted to the launch motor 94 via the launch board 90.

  In this example, the game control microcomputer 560 is configured to output a launch motor signal for causing the launch motor 94 to input a launch motor drive signal to the launch board 90. The launch board 90 may be configured to always output a launch motor drive signal to the launch motor 94 without receiving a signal from the launch board 90 as long as power is supplied. When the launch board 90 is configured to always output a launch motor drive signal, the launch board 90 is sent to the launch motor 94 in accordance with a signal from the game control microcomputer 560 based on the state signal input state. The firing motor drive signal may be stopped. In this way, even when the launch board 90 is configured to always output a launch motor drive signal to the launch motor 94 if power is supplied, (A full signal may be input to the launch board 90). When the VL signal is stopped, the launch motor drive signal to the launch motor 94 can be stopped.

  When there is a winning at the winning opening, an output circuit 67 of the main board 31 outputs a prize ball number signal indicating the number of prize balls to be paid out (turns on). Then, a prize ball REQ signal (prize ball request signal) for instructing taking in the prize ball number signal is output (turned on).

  In this embodiment, the winning ball number signal is composed of 4-bit data (binary 4-digit data) and is output by four signal lines. Note that the ON state of the signal, that is, the output state is a state where the signal is significant, and turning ON means that the signal receiving side is instructed to start some processing based on the signal. To do. For example, turning on the prize ball number signal and the prize ball REQ signal means instructing the payout control means to recognize the payout number indicated by the prize ball number signal.

  The winning ball number signal is input to the I / O port 372e via the input circuit 373A. The prize ball REQ signal is input to a maskable interrupt terminal (hereinafter also simply referred to as an interrupt terminal) of the payout control CPU 371. The payout control CPU 371 inputs a prize ball number signal via the I / O port 372e in an interrupt process based on the prize ball REQ signal being input to the interrupt terminal, and the number of prize balls indicated by the prize ball number signal. In order to pay out the game ball, the ball paying device 97 is controlled to be driven. A power supply confirmation signal (connection confirmation signal) indicating that the main board 31 is connected is also output from the output circuit 67 of the main board 31.

  In this embodiment, the payout control microcomputer 370 recognizes a prize ball for the main board 31 when the payout of one prize ball is confirmed based on the detection signal from the payout number count switch 301. Send a count signal. Further, the payout control microcomputer 370 means an error related to payout of game balls (an error indicating that game ball payout processing cannot be performed. Or a ball-out condition), a payout error signal is transmitted to the main board 31. The prize ball count signal and the payout error signal are transmitted to the main board 31 via the output port 372b and the output circuit 373B of the payout control board 37. Then, in the main board 31, the data is input to the game control microcomputer 560 via the input circuit 68 and the I / O port 57.

  In addition, a power-off signal indicating that the power supply voltage has dropped below a predetermined value and a clear signal indicating that the clear switch 921 for clearing the contents of the RAM has been operated are input from the power supply board 910 to the input port 372g. Is input.

  The payout control microcomputer 370 receives, via the output port 372b, a prize ball information signal indicating the number of prize balls to be paid and a ball lending number signal indicating the number of balls to be rented to a terminal board (frame external terminal board and board external terminal board). Output to 160). Although a driver circuit is installed outside the output port 372b, the description is omitted in FIG.

  Further, the payout control microcomputer 370 outputs an error signal to the error display LED 374 by the 7 segment LED via the output port 372c. Further, a signal for instructing lighting / extinguishing is output to the ball-out LED 52 via the output port 372b. A detection signal from an error release switch 375 for releasing the error state is input to the input port 372f of the payout control board 37. The error cancel switch 375 is used to cancel the error state by software reset.

  Further, a drive signal from the payout control microcomputer 370 to the payout motor 289 is transmitted to the payout motor 289 in the payout mechanism portion of the ball payout device 97 via the output port 372a and the relay board 72. Although a driver circuit (motor drive circuit) is installed outside the output port 372a, the description is omitted in FIG.

  A card unit control microcomputer is mounted on the card unit 50 installed adjacent to the gaming machine. In addition, the card unit 50 is provided with a usable display lamp, a connecting table direction indicator, a card insertion display lamp, and a card insertion slot. A frequency display LED 60, a ball lending LED 61, a ball lending switch 62, and a return switch 63 provided in the vicinity of the hitting ball supply tray 3 are connected to the interface board (relay board) 66.

  A card lending switch signal indicating that the ball lending switch 62 has been operated and a return switch signal indicating that the return switch 63 has been operated are given to the card unit 50 from the interface board 66 in accordance with the player's operation. . Further, a card balance display signal indicating a prepaid card balance and a ball lending display signal are given from the card unit 50 to the interface board 66. Between the card unit 50 and the payout control board 37, a connection signal (VL signal), a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXS signal), and a pachinko machine operation signal ( PRDY signal) is transmitted / received via the input port 372f and the output port 372d. An interface board 66 is interposed between the card unit 50 and the payout control board 37. Therefore, a signal such as a connection signal (VL signal) is transmitted and received between the card unit 50 and the payout control board 37 via the interface board 66 as shown in FIG.

  When the power of the pachinko gaming machine 1 is turned on, the payout control microcomputer 370 mounted on the payout control board 37 outputs a PRDY signal to the card unit 50. The card unit control microcomputer outputs a VL signal when the power is turned on. The payout control microcomputer 370 determines the connected / unconnected state of the card unit 50 according to the input state of the VL signal. When a card is received in the card unit 50, the ball lending switch is operated and a ball lending switch signal is input, the card unit control microcomputer outputs a BRDY signal to the payout control board 37. When a predetermined delay time elapses from this point, the card unit control microcomputer outputs a BRQ signal to the payout control board 37.

  Then, the payout control microcomputer 370 raises the EXS signal to the card unit 50 and, upon detecting the fall of the BRQ signal from the card unit 50, drives the payout motor 289 to give a predetermined number of rental balls to the player. Pay out. When the payout is completed, the payout control microcomputer 370 causes the EXS signal to the card unit 50 to fall. Thereafter, on the condition that the BRDY signal from the card unit 50 is not in the ON state, a prize ball payout control is executed when a payout command signal is received from the game control means.

  The power supply voltage AC24V used in the card unit 50 is supplied from the payout control board 37. That is, power supply from the power supply board 910 to the card unit 50 is performed via the payout control board 37 and the interface board 66. In this example, a fuse for protecting the card unit 50 is provided in a 24 V AC power supply line for the card unit 50 arranged in the interface board 66, and a voltage higher than a predetermined voltage is supplied to the card unit 50. It is prevented.

  The payout control CPU 371 used in this embodiment generates a non-maskable interrupt terminal (NMI terminal) used for generating a non-maskable interrupt (NMI) and a maskable interrupt. And an interrupt terminal (INT terminal) used for the purpose. However, this embodiment does not use non-maskable interrupts. Therefore, the NMI terminal is pulled up to VCC (+5 V) through a resistor. The maskable interrupt is an interrupt that can be controlled so that no interrupt is generated by software. An interrupt based on a signal input to the interrupt terminal is also called an external interrupt.

  In this embodiment, the case where the card unit 50 is installed adjacent to the gaming machine as a separate body from the gaming machine is taken as an example, but the card unit 50 may be integrated with the gaming machine. . Further, the present invention can be applied even when a game ball corresponding to the amount of money is lent out in accordance with coin insertion.

  FIG. 6 is a block diagram illustrating a circuit configuration example for transmitting a signal transmitted and received between the card unit 50 and the payout control board 37. As shown in FIG. 6, the connection signal (VL signal) from the card unit 50 is input to the payout control board 37 via the interface board 66. The VL signal input to the payout control board 37 is input to the payout control microcomputer 370 via the photocoupler 151 mounted on the payout control board 37. Note that passive elements such as a resistor 152 and capacitors 153 and 154 are connected to the photocoupler 151.

  A photocoupler is an element that transmits a signal using light as a medium by combining a light emitting element and a light receiving element. The photocoupler has a structure in which a light emitting diode and a phototransistor are included in one package. Photocouplers are widely used for removing electrical noise and the like because the input and output are electrically insulated.

  In this example, the output signal from the photocoupler 151 is branched on the payout control board 37 and input to one of the input sides of the AND circuit 155, and is branched to the other input side of the AND circuit 155 at the payout control board 37. One of the full signals is input. The output signal (status signal) from the AND circuit 155 is input to the game control microcomputer 560 mounted on the main board 31. Therefore, when the output signal from the photocoupler 151 is at a low level, or when a low level full signal is output, the status signal to the game control microcomputer 560 is stopped (low level signal). Thus, the output of the launch motor signal from the game control microcomputer 560 to the launch board 90 is stopped, and the launch motor drive signal from the launch board 90 to the launch motor 94 is stopped.

  A unit operation signal (BRDY signal) from the card unit 50 is input to the payout control board 37 via the photocoupler 66a mounted on the interface board 66, and is input to the payout control microcomputer 370. Similarly, a ball lending request signal (BRQ signal) from the card unit 50 is input to the payout control board 37 via the photocoupler 66b mounted on the interface board 66, and is input to the payout control microcomputer 370.

  Further, a ball lending completion signal (EXS signal) from the payout control microcomputer 370 is input to the card unit 50 via the photocoupler 66 c mounted on the interface board 66. Similarly, a pachinko machine operation signal (PRDY signal) from the payout control microcomputer 370 is input to the card unit 50 via a photocoupler 66 d mounted on the interface board 66.

  Since the photocoupler 151 for transmitting the VL signal transmitted from the card unit 50 to the payout control microcomputer 370 is mounted on the payout control board 37 as described above, the resistance connected to the photocoupler 151 Passive elements such as the condenser 152 and the capacitors 153 and 154 can also be mounted on the dispensing control board 37, and no capacitor can be mounted on the interface board 66. Therefore, when any illegal circuit is attached to the interface board 66 or when the interface board 66 is replaced with an illegal board, the illegal action can be easily detected. In other words, if there is a capacitor on the interface board 66 that should not be mounted at all, it can be determined that some kind of fraud is being performed, and therefore fraud can be easily detected. , Will be able to prevent fraud.

  In a conventional gaming machine, a capacitor is mounted on an interface board as described in, for example, Japanese Patent Application Laid-Open No. 2001-347054 (particularly FIG. 11). Therefore, when a fraudulent board having an illegal circuit for inputting an illegal signal to the payout control microcomputer is created on the interface board and the legitimate interface board is replaced with the illegal board, the board is replaced. There was a problem that it was difficult to discover.

  For example, a fraudulent board is equipped with a fraudulent circuit for inputting a signal for executing a payout operation to the payout control board even though no winning is made or a ball lending request is not made. A substrate is assumed. Then, the unauthorized interface board is illegally attached, and a signal output command is issued from the unauthorized interface board to the payout control board by an operation from the outside of the gaming machine (for example, button operation, wireless communication operation). ) May be illegally acquired to illegally acquire game media. When creating an illegal interface board, a capacitor is required to stabilize a circuit (or a signal output from the illegal interface board) mounted on the illegal interface board, and a passive element such as a capacitor is used. Will be mounted on the unauthorized interface board.

  On the other hand, in this example, since the capacitor is not mounted on the interface board 66 at all, it is easily determined whether or not the board is an illegal board only by checking whether or not the capacitor is mounted on the interface board. be able to. In addition, when the capacitors 153 and 154 of the VL signal line are mounted on the payout control board 37, the photocoupler 151 is also mounted on the payout control board 37, and therefore, between the interface board 66 and the payout control board 37. In this case, it is possible to eliminate unnecessary reciprocation of the signal path, and to save space and reduce the number of wires.

  In the example shown in FIG. 6, only the photocoupler 151 to which the resistor 152 and the capacitors 153 and 154 are connected is mounted on the payout control board 37. However, the card unit 50 and the payout control board 37 All the photocouplers 151 and 66a to 66d that transmit signals transmitted and received between them may be mounted on the dispensing control board 37. With this configuration, when there is a photocoupler that should not be mounted at all on the interface board 66, it can be determined that some sort of fraud is being performed.

  Further, as described above, the output of the VL signal (lending request accepting apparatus connection signal) from the photocoupler 151 mounted on the payout control board 37 is branched, and the payout control microcomputer 370 and the launch motor 94 are driven. Therefore, the driving of the firing motor 94 can be stopped according to the transmission state of the VL signal by the photocoupler 151. become. As shown in FIG. 5, the VL signal transmitted by the photocoupler 151 and the full signal are input to the AND circuit 155. The output signal (status signal) of the AND circuit 155 is input to the main board 31. When the state signal input state is turned off, the game control microcomputer 560 stops the firing motor signal. For this reason, in this example, when the VL signal transmitted by the photocoupler 151 is in the off state (low level state), or when the low level full signal is output, the firing motor from the main board 31 is output. The signal is stopped and the firing motor drive signal from the firing substrate 90 to the firing motor 94 is maintained in the OFF state. Therefore, when the photocoupler 151 is not transmitting the VL signal, the driving of the firing motor 94 is stopped.

  FIG. 7 is a block diagram illustrating a connection state of main boards provided in the gaming machine. In this embodiment, the signal from the main board 31 to the peripheral board (excluding the payout control board 37. In addition to the board formed as a board, the terminal board including a plurality of terminals arranged therein is also included). , And output via the centralized relay board 77. In the example shown in FIG. 7, signals to the information terminal board 34, the decorative lamp board 79 (not shown in FIG. 4) on which the decorative lamp 25 is mounted, and the effect control board 80 are output via the centralized relay board 77. The Note that the detection signals of the respective switches (such as the above-described prize opening switch) provided in the gaming machine are input to the main board 31 via the switch relay board 78.

  7 illustrates the information terminal board 34, the decorative lamp board 79, and the effect control board 80, but there are more boards as peripheral boards for inputting signals from the main board 31. FIG. For example, FIG. 7 shows one decorative lamp substrate 79, but a plurality of decorative lamp substrates are provided in accordance with the installation positions of the lamps or LEDs on the game board 6. For example, one or a plurality of decorative lamp substrates mounted with lamps / LEDs provided around the variable display device 9 are provided, and one or more mounted with lamps / LEDs provided around the winning prize opening A plurality of decorative lamp substrates are provided. Even if a larger number of peripheral boards are provided, it is preferable that the signal output from the main board 31 is output to all the peripheral boards via one centralized relay board 77 as illustrated in FIG. . That is, it is preferable that one central relay board 77 is provided for all peripheral boards. Further, a drive signal from a solenoid circuit 59 (see FIG. 4) that outputs a drive signal to a solenoid as an electrical component that is one of the gaming devices may be routed through the centralized relay board 77.

  Although not shown, the central relay board 77 is accommodated in a board box on the back side of the gaming machine. That is, the central relay board 77 is housed in a board box as a housing means and attached to the gaming machine. Further, the central relay board 77 is firmly housed in the board box and has a structure that cannot be easily removed from the gaming machine. The board box has a structure in which a box body in which the central relay board 77 is accommodated is covered with a lid. The box body and the lid are formed of a synthetic resin or the like that can be visually recognized from the outside (for example, transparent). When the lid portion of the substrate box is closed and fixed to the mechanism plate, the surface side of the central relay substrate 77 can be visually recognized through, for example, a transparent lid portion. Further, in the state in which the lid portion of the substrate box is opened, the back surface side of the central relay substrate 77 can be visually recognized through the back surface of the transparent box body, for example. As described above, since the front and back surfaces of the central relay board 77 can be easily seen from the outside of the board box, it is possible to easily investigate whether the central relay board 77 is fraudulent. Note that one side of the central relay board 77 may be fixed to the mechanism plate by a hinge, for example, and the central relay board 77 may be turned around the fixed side so that the rear surface of the central relay board 77 can be visually recognized.

  FIG. 8 is an explanatory diagram showing a signal output unit in the main board 31 and components mounted on the centralized relay board 77. As shown in FIG. 8, in the main board 31, the information output circuit 34 that outputs a signal from the basic circuit 53 (specifically, the output port of the game control microcomputer 560) to the information terminal board 34, and the decorative lamp board 79. The lamp circuit 36 that outputs a signal to the output signal and the output buffer circuit 67 (not shown in FIG. 4) that outputs a signal to the effect control board 80 allow the signal to pass only in the direction toward the central relay board 77 (the central relay board). No signal is allowed to pass in the direction from 77 to the main board 31). As the unidirectional circuit, a transistor or an IC circuit is used. Note that the unidirectional circuit may have a current amplification function.

  The signal output from the main board 31 to the central relay board 77 connects the connector 31A mounted on the main board 31, the connector 77A mounted on the central relay board 77, and the connector 31A and the connector 77A. The signal is transmitted to the central relay board 77 by a cable. The central relay board 77 is a signal direction regulating means that allows a signal input from the main board 31 to pass only in the direction toward the peripheral board (no signal is passed in the direction from the peripheral board to the central relay board 77). The unidirectional circuits 74, 75, and 76 are mounted. As the unidirectional circuits 74, 75, 76, for example, diodes or transistors are used. FIG. 8 illustrates a diode. Unidirectional circuits 74, 75, and 76 are provided for each signal.

  In the example shown in FIG. 8, the signal output to the information output circuit 64 is output via the connector 77 </ b> B mounted on the central relay board 77. A signal output to the decorative lamp substrate 79 is output via a connector 77C mounted on the central relay substrate 77. The signal output to the effect control board 80 is output via the connector 77D mounted on the central relay board 77.

  FIG. 8 shows an example in which a signal is output from the main board 31 to the centralized relay board 77 via a single connector, but centralized relaying from the main board 31 via a plurality of connectors and cables is shown. A signal may be output to the substrate 77. Further, in this embodiment, a signal between the main board 31 and the payout control board 27 does not pass through the central relay board 77, but as a signal between the main board 31 and the payout control board 27, from the main board 31. When there is only a signal directed to the payout control board 27, a signal from the main board 31 to the payout control board 27 may be configured to pass through the central relay board 77.

  In addition to the signal direction regulating means, noise removing components such as a noise filter may be mounted on the centralized relay board 77. That is, in the relay board, all the signals input from the game control board (or main signals such as production control commands and INT signals for which noise countermeasures are particularly required, that is, if they are not input correctly, the game progress is hindered. It is preferable that noise removing means is provided for the signal. By mounting the noise removing component, it is possible to reduce the possibility that noise is added to the signal reaching the peripheral board even if the wiring length between the main board 31 and the peripheral board is long. Further, the centralized relay board 77 may be equipped with an amplifying means for amplifying a signal (for example, a current for the signal) input from the game control board. In the case of such a configuration, amplification processing is performed on the relay board, so that the amplification circuit mounted on the game control board can be eliminated.

  FIG. 9 is a block diagram illustrating a circuit configuration example of the effect control board 80, the lamp driver board 35, and the sound control board 70. The lamp driver board 35 and the sound control board 70 are not equipped with a microcomputer. In the effect control board 80, the effect control CPU 101 in the effect control microcomputer 100 (an example of an electrical component control microcomputer) 100 operates according to a program stored in a ROM (not shown), and is connected via a centralized relay board 77. The effect control command is received via the input driver 102 and the input port 103 in response to the strobe signal (symbol control INT signal) from the main board 31 that is input. Further, the effect control CPU 101 causes the VDP (video display processor) 109 to perform display control of the variable display device 9 using the LCD based on the effect control command. The VDP 109 is sometimes called a GCL (graphic controller LSI).

  Note that the input driver 102 passes the signal input from the centralized relay board 77 only in the direction toward the inside of the effect control board 80 (the signal in the direction from the inside of the effect control board 80 to the centralized relay board 77). It is also a unidirectional circuit as a signal direction regulating means.

  Further, the production control CPU 101 outputs sound number data to the sound control board 70 via the output port 104 and the output driver 110. A bus (including an address bus, a data bus, and a control signal line such as a write / read signal) that is input / output to / from the effect control CPU 101 is extended to the lamp driver board 35 via the bus driver 105.

  In the lamp driver board 35, a bus that is input to and output from the effect control CPU 101 is connected to the output port 352 via the bus receiver 351. A signal for driving each lamp output from the output port 352 is amplified by the lamp driver 354 and supplied to each lamp. A signal for driving each LED output from the output port 352 is amplified by the LED driving circuit 355 and supplied to each LED.

  In this embodiment, lamps / LEDs and effect driving means provided in the gaming machine are controlled by effect control means including effect CPU 101 mounted on effect control board 80. Further, data for controlling the variable display device 9 and lamps / LEDs are stored in the ROM. The effect CPU 101 controls the variable display device 9, the lamp / LED, and the like based on the data stored in the ROM. Then, the lamp / LED and the driving means for presentation are driven via the output port 352 and each drive circuit mounted on the lamp driver board 35. Therefore, when changing the model, it is necessary to make a design change such as changing the number of ports for the lamp driver board 35, but for the effect control board 80, it is only necessary to replace the ROM storing the program. There is no need to make design changes.

  Although the production control board 80, the lamp driver board 35, and the sound control board 70 are independent boards, they are installed in a single box on the back of the gaming machine, for example.

  In the voice control board 70, the sound number data from the effect control board 80 is input to the voice synthesis IC 703 by a digital signal processor, for example, via the input driver 702. The voice synthesis IC 703 reads data corresponding to the sound number data from the voice data ROM 704, generates voice and sound effects corresponding to the read data, and outputs them to the amplifier circuit 705. The amplification circuit 705 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 703 to a level corresponding to the volume set by the volume 706 to the speaker 27.

  The data corresponding to the sound number data stored in the sound data ROM 704 is a collection of data indicating the sound effect or sound output mode in a predetermined time period (for example, a special symbol fluctuation period) in time series. When the voice number IC 703 receives the sound number data, the voice synthesis IC 703 performs sound output control according to the corresponding data in the voice data ROM 704. The sound output control according to the corresponding data is continued until the next sound number data is input. When the next sound number data is input, the speech synthesis IC 703 performs sound output control according to the data in the sound data ROM 704 corresponding to the newly input sound number data.

  In this embodiment, the sound and sound output from the speaker 27 are controlled by the effect control means including the effect control CPU 101, but the effect control means outputs the sound number data to the sound control board 70. . In the voice control board 70, the voice data ROM 704 stores a large amount of data for realizing voice and sound effects that can appear as the game progresses, and these data are associated with the sound number data. . Therefore, the production control means can realize sound output control only by outputting the sound number data. Note that the sound number data is, for example, 1-byte data, and is transferred to the sound control board 70 via a serial signal line or a parallel signal line.

  In this embodiment, one effect control means executes display control of variable display, lighting control of lamps / LEDs (light emitters), and sound generation control from the speaker 27, that is, effect control. The means realizes effect control means, light emitter control means, and sound control means. Therefore, the display effect by the variable display device 9, the effect using the lamp / LED, and the effect by sound can be easily synchronized. However, in order to lighten the burden on the effect control means, a light emitter control microcomputer and a sound control microcomputer are provided, which are game control means or effect control means (in this case, effect control means). The light emitter may be controlled and the sound may be controlled according to the command.

  10 and 11 are explanatory diagrams showing an example of output port assignment in the game control means. As shown in FIG. 10, the output port 0 is an output port for prize ball control signals (CD0 to CD3) transmitted to the payout control board 37. Further, 8-bit data (CD0 to CD7) of the effect control command transmitted to the effect control board 80 is output from the output port 1.

  Further, from the output port 2, a solenoid (large winning port door solenoid) 21 for opening and closing the opening / closing plate 2 of the large winning port, a solenoid (large winning port guide plate solenoid) 21A for switching the route in the large winning port, and a variable A drive signal is output to a solenoid (normal electric accessory solenoid) 16 for opening and closing the winning ball apparatus 15. Further, an effect control INT signal (strobe signal) for the effect control command transmitted to the effect control board 80 is also output. The effect control INT signal is a signal for instructing the effect control means to take in the 8-bit data of the effect control command. Further, each phase signal (shooting motor signal) supplied toward the firing motor 94 by the stepping motor is output from the output port 2. In this example, the launch motor signal output from the output port 2 is supplied to the launch motor 94 via the launch board 90 as a launch motor drive signal.

  Then, various information output signals from the output ports 3 and 4 to the information terminal board 34 and the terminal board 160 through the information output circuit 64, that is, output data of information related to control are output. Although not an information output signal, in this example, a drive signal for the decorative lamp 25 is output from the output port 3.

  FIG. 12 is an explanatory diagram showing an example of bit assignment of input ports in the game control means. As shown in FIG. 12, bits 0 to 7 of the input port 0 are detected by the V count switch 22, the count switch 23, the gate switch 32a, the winning port switches 33a, 39a, 29a, 30a, and the start port switch 14a, respectively. A signal is input. In addition, bits 0 to 4 of the input port 1 respectively include a power-off signal from the power supply monitoring board 910, a detection signal from the clear switch 921 from the power supply board 910, a prize ball count signal from the payout control board 37, and a payout control. A payout error signal from the board 37 and a status signal from the payout control board 37 (specifically, an AND circuit 155) are input. The detection signal from each switch is logically inverted in the input driver circuit 58. The prize ball count signal and the payout error signal are logically inverted in the input circuit 68.

  Next, the operation of the gaming machine will be described. FIG. 13 is a flowchart showing a main process executed by the game control means on the main board 31. When the gaming machine is turned on and the input level of the reset terminal to which the reset signal is input becomes high level, the gaming control microcomputer 560 performs processing for confirming whether the contents of the program are valid. After executing a certain security check process, the main process after step S1 is started. In the main process, the game control microcomputer 560 first performs necessary initial settings.

  In the initial setting process, the game control microcomputer 560 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3).

  The CPU 56 used in this embodiment also includes an I / O port (PIO) and a timer / counter circuit (CTC) as a built-in device (built-in peripheral circuit). The CTC also includes two external clock / timer trigger inputs CLK / TRG2, 3 and two timer outputs ZC / TO0,1.

  Next, the game control microcomputer 560 initializes the built-in device register (settings such as input / output assignment of the built-in device), and sets the CTC (counter / timer) and PIO (parallel input / output port) that are built-in devices. Initialization is performed (step S4). The initialization of PIO is, for example, setting an off state value to all bits of the output port. The initialization of the CTC is a timer mode setting or the like.

  In the game control microcomputer 560 used in this embodiment, the following three modes are prepared as maskable interrupt modes. When a maskable interrupt occurs, the game control microcomputer 560 automatically sets the interrupt disabled state and saves the contents of the program counter in the stack.

  Interrupt mode 0: The built-in device that has issued the interrupt request sends an RST instruction (1 byte) or a CALL instruction (3 bytes) onto the internal data bus of the CPU. Therefore, the game control microcomputer 560 executes the instruction at the address corresponding to the RST instruction or the address specified by the CALL instruction. At the time of resetting, the game control microcomputer 560 automatically enters the interrupt mode 0. Therefore, when setting to interrupt mode 1 or interrupt mode 2, it is necessary to perform a process for setting to interrupt mode 1 or interrupt mode 2 in the initial setting process.

  Interrupt mode 1: In this mode, when an interrupt is accepted, the mode always jumps to address 0038 (h).

  Interrupt mode 2: The address synthesized from the value (1 byte) of the specific register (I register) of the microcomputer 560 for game control and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is It is a mode that indicates a cover address. That is, the interrupt address is an address indicated by 2 bytes in which the upper address is the value of the specific register and the lower address is the interrupt vector. Therefore, an interrupt process can be set at an arbitrary address (although it is skipped). Each built-in device has a function of transmitting an interrupt vector when making an interrupt request.

  Therefore, when the interrupt mode 2 is set, it becomes possible to easily process an interrupt request from each built-in device, and it is possible to install an interrupt process at an arbitrary position in the program. . Furthermore, unlike interrupt mode 1, it is also easy to prepare each interrupt process for each interrupt generation factor. As described above, in this embodiment, the game control microcomputer 560 is set to the interrupt mode 2 in step S2 of the initial setting process.

  Next, the game control microcomputer 560 sets the RAM 55 in an accessible state (step S6).

  Then, the game control microcomputer 560 checks the state of the output signal of the clear switch 921 input via the input port 1 only once (step S7). When ON is detected in the confirmation, the game control microcomputer 560 executes normal initialization processing (steps S10 to S13). When the clear switch 921 is on (when pressed), a low-level clear switch signal is output. Since the clear switch signal is input after being logically inverted, in the input port 1, the clear switch signal is in the high level. Further, for example, the game clerk can easily execute the initialization process by starting the power supply to the gaming machine (for example, turning on the power switch 914) while turning the clear switch 921 on. That is, RAM clear or the like can be performed.

  If the clear switch 921 is not in the on state, whether or not data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) has been performed when power supply to the gaming machine is stopped Confirm (step S8). In this embodiment, when power supply is stopped, a process for protecting data in the backup RAM area is performed. When it is confirmed that such protection processing has been performed, the game control microcomputer 560 determines that there is a backup. When it is confirmed that such a protection process is not performed, the game control microcomputer 560 executes an initialization process.

  Whether or not the protection process has been performed depends on the value of the backup monitoring timer stored in the backup RAM area in the power supply stop process described later according to the execution of the data protection process in the backup RAM area (for example, It is confirmed by whether or not 2). Note that such a confirmation method is merely an example. For example, a flag indicating that the data protection process has been executed is set in the backup flag area in the power supply stop process, and the flag is set in step S8. If it is confirmed that there is a backup, it may be determined that there is backup.

  If it is determined that there is a backup, the game control microcomputer 560 performs a data check (parity check in this example) in the backup RAM area (step S9). In this embodiment, clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count becomes 0, the game control microcomputer 560 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as the checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In step S9, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, the initialization process (the processes of steps S10 to S13) executed when the power is turned on, not when the power supply is stopped. Execute.

  If the check result is normal, the game control microcomputer 560 returns the game state restoration process for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. I do. Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S14), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S15). ). Then, the process proceeds to step S13. The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S14 and S15, the saved contents remain as they are in the portion of the work area that should not be initialized. The portion that should not be initialized is, for example, a portion in which data (such as a special symbol process flag) indicating a gaming state before stopping power supply or data indicating the number of unpaid prize balls is set.

  In the initialization process, the game control microcomputer 560 first performs a RAM clear process (step S10). The entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. For example, if the count value data of the counter for generating the big hit determination random number is left as it is, the big hit determination random number is generated even if the initialization process is executed by unauthorized means. Therefore, it is difficult to aim at the timing at which the count value of the counter matches the jackpot determination value. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12). By the processing of steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol left middle right symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball break An initial value is set for a flag for selectively performing processing according to a control state, such as a flag or a payout stop flag.

  In step S13, the game control microcomputer 560 sets a CTC register built in the CPU 56 so that a timer interrupt is periodically generated every predetermined time (for example, 4 ms). That is, a value corresponding to, for example, 4 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 4 ms.

  When the execution of the initialization process (steps S10 to S13) is completed, the game control microcomputer 560 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18). When the display random number update process and the initial value random number update process are executed, the game control microcomputer 560 disables the interrupt (step S16), and executes the display random number update process and the initial value random number update process. When is finished, the interrupt is permitted (step S19). The display random number is a random number for determining a symbol displayed on the variable display device 9, and the display random number update process is a process for updating the count value of the counter for generating the display random number. It is. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. The initial value random number is a random number for determining an initial value of a count value such as a counter for generating a random number for determining whether or not to make a big hit (a big hit determination random number generation counter). Game control processing described later (game control microcomputer 560 controls itself for game devices such as variable display device 9, variable winning ball device, ball payout device, etc. provided in the gaming machine, or other When the count value of the jackpot determination random number generation counter or the like makes one round in the process of transmitting a command signal to cause the microcomputer to perform control (also referred to as game device control process), an initial value is set in the counter.

  Note that when the display random number update process and the initial value random number update process are executed, the interrupt disabled state is set even when the display random number update process and the initial value random number update process are performed by the timer interrupt process described later. This is to avoid conflict with the processing in the timer interrupt processing. That is, if a timer interrupt is generated during the processing of steps S17 and S18 and the count value of the counter for generating the display random number and the initial value random number is updated during the timer interrupt processing, The continuity of values may be impaired. However, such an inconvenience does not occur if the interrupt disabled state is set during the processes of steps S17 and S18.

  Next, the game control process will be described. FIG. 14 is a flowchart showing the timer interrupt process. If a timer interrupt occurs during execution of the main process, specifically, during execution of the loop process of steps S16 to S19, the game control microcomputer 560 is activated in response to the occurrence of the timer interrupt. Game control processing is executed in the timer interrupt processing. In the timer interrupt process, the game control microcomputer 560 first executes a power-off process (power-off detection process) that detects whether or not a power-off signal is output (whether or not it is turned on) ( Step S20). Further, an excitation pattern output process for the firing motor 94 (output of the patterns of the firing motors φ1 to φ4 to the output port 2) is performed (step S21). In the firing motor control process of step S22, the excitation pattern is stored in the excitation pattern buffer, which is a RAM area. In step S21, the game control microcomputer 560 converts the contents of the excitation pattern buffer into the upper 4 bits of the output port 2. Process to output to.

  Next, the game control microcomputer 560 executes a firing motor control process (step S22). In the firing motor control process, the patterns of the firing motors φ1 to φ4 are stored in the excitation pattern buffer.

  Next, the game control microcomputer 560 inputs detection signals of switches such as the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a via the switch circuit 58. Then, the state determination is performed (switch process: step S23). Specifically, if the state of the input port for inputting the detection signal of each switch is ON, the value of the switch timer provided corresponding to each switch is incremented by one.

  Further, the game control microcomputer 560 executes a process for notifying the player that the prize ball has been paid out in response to the reception of the prize ball count signal from the payout control board 37 (step S24a). ). Specifically, the game control microcomputer 560 executes a process (see FIG. 20) of transmitting a prize ball payout confirmation designation command to the effect control board 80 for designating that the prize ball has been paid out. Further, the game control microcomputer 560 determines whether the ball has run out and the lower plate is full (or either the ball has run out or the lower plate is full) according to the on / off state of the payout error signal from the payout control board 37. Processing for notifying the player that an error has occurred is executed (step S24b). Specifically, when the payout error signal from the payout control board 37 is turned on, the game control microcomputer 560 transmits an error occurrence notification command to notify the occurrence of an error such as a ball break to the effect control board 80. When the process (see FIG. 21) is executed and the payout error signal from the payout control board 37 is turned off, an error release notification command for notifying that an error such as a ball break has been released is transmitted to the effect control board 80. A process (refer FIG. 21) is performed.

  Next, the game control microcomputer 560 performs a process of updating the count value of each counter for generating each determination random number such as a big hit determination random number used for game control (step S25). The game control microcomputer 560 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (steps S26 and S27).

  Furthermore, the game control microcomputer 560 performs a special symbol process (step S28). In the special symbol process control, corresponding processing is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to the gaming state. The value of the special symbol process flag is updated during each process according to the gaming state. The game control microcomputer 560 performs normal symbol process processing (step S29). In the normal symbol process, the corresponding process is selected and executed according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The value of the normal symbol process flag is updated during each process according to the gaming state.

  Next, the game control microcomputer 560 performs a process of setting an effect control command related to the special symbol in a predetermined area of the RAM 55 and sending the effect control command (special symbol command control process: step S30). In addition, a process for setting an effect control command related to the normal symbol in a predetermined area of the RAM 55 and sending the effect control command is performed (normal symbol command control process: step S31).

  Further, the game control microcomputer 560 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (step S32).

  Further, the game control microcomputer 560 executes prize ball processing for setting the number of prize balls based on detection signals from the prize opening switches 29a, 30a, 33a, 39a and the like (step S33). Specifically, a prize ball control signal indicating the number of prize balls is output to the payout control board 37 in response to detection of a prize based on the fact that the prize opening switches 29a, 30a, 33a, 39a, etc. are turned on. The payout control CPU 371 mounted on the payout control board 37 drives the ball payout device 97 according to a prize ball control signal indicating the number of prize balls.

  Then, the game control microcomputer 560 executes a storage process for checking increase / decrease in the number of start winning memories (step S34). In addition, a test terminal process, which is a process for outputting a test signal for enabling the control state of the gaming machine to be confirmed outside the gaming machine, is executed (step S35). In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the game control microcomputer 560 is related to the solenoid in the RAM area of the output port 2. (See FIG. 10) is output to the output port (step S36: solenoid output processing). Thereafter, the interrupt permission state is set (step S37), and the process ends.

  With the above control, in this embodiment, the game control process is started periodically (for example, every 4 ms). In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed. Further, the processing of steps S21 to S37 (excluding steps S32 and S35) corresponds to a game control process for controlling the progress of the game.

  Next, the switch process (step S23) in the main process will be described. In this embodiment, when the ON state of the detection signal of each switch related to winning detection or gate passage continues for a predetermined time, it is determined that the switch is surely turned on, and processing corresponding to the switch on is started. FIG. 15 is an explanatory diagram showing each 1-byte buffer formed in the RAM 55 used in the switching process. The previous port buffer is a buffer in which the previous switch-on / off determination result (for example, 4 ms before) is stored. The port buffer is a buffer in which the contents of port 0 inputted this time are stored. The switch-on buffer is a buffer in which the corresponding bit is set to 1 when switch on is detected and the corresponding bit is set to 0 when switch off is detected.

  FIG. 16 is a flowchart showing a processing example of the switch processing in step S23 in the game control processing. In the switch process, the game control microcomputer 560 first inputs the data input to the input port 0 (see FIG. 12) (step S101), and sets the input data in the port buffer (step S102). Next, an initial value of the weight counter formed in the RAM 55 is set (step S103), and the value of the weight counter is decremented by 1 until the value of the weight counter becomes 0 (steps S104 and S105).

  When the value of the wait counter becomes 0, the data of the input port 0 is input again (step S106), and a logical product is obtained for each bit between the input data and the data set in the port buffer (step S106). S107). Then, the logical product operation result is set in the port buffer (step S108). Of the two input data input from the input port 0 with a time interval of approximately [initial value of weight counter × (processing time of steps S14 and S105)] by the processing of steps S103 to S108, both “ Only the bits that are “1” will be “1” in the port buffer. In other words, if the ON state of the switch detection signal continues for a predetermined period [initial value of wait counter × (processing time of steps S14 and S105)], the corresponding bit in the port buffer becomes “1”.

  Further, the game control microcomputer 560 performs exclusive OR for each bit between the data previously set in the port buffer and the data set in the port buffer (step S109). In the result of the exclusive OR operation, the bit corresponding to the switch for which the previous switch-on / off determination result (for example, 4 ms before) differs from the switch-on / off determination result determined to be on this time is “ 1 ”. The game control microcomputer 560 further performs a logical product for each bit between the exclusive OR operation result and the data set in the port buffer (step S110). As a result, of the bits corresponding to the switches for which the previous switch on / off determination result and the switch on / off determination result determined to be on this time are different (according to the exclusive OR operation result), the current on Only the bit corresponding to the switch determined as (by the logical product operation) remains as “1”.

  Then, the game control microcomputer 560 sets the logical product calculation result in step S110 in the switch-on buffer (step S111), and sets the contents of the port buffer in which the calculation result in step S108 is set in the previous port buffer. (Step S112).

  By the above processing, among the switches that have been on for a predetermined period of time, the switch on / off determination result of the previous time (for example, 4 ms ago) was off, that is, the switch changed from the off state to the on state. The bit corresponding to the switch is “1” in the switch-on buffer.

  Next, control signals transmitted and received between the main board 31 and the payout control board 37 will be described. FIG. 17 is an explanatory diagram showing an example of the contents of the control signal output from the main board 31 to the payout control board 37 and the control signal input from the payout control board 37 to the main board 31. In this embodiment, a plurality of types of control signals are transmitted and received between the main board 31 and the payout control board 37 in order to perform various controls relating to payout control and the like. As shown in FIG. 17, the connection confirmation signal is output when the main board 31 rises (when the game control means starts the game control process), and indicates that the main board 31 has risen with respect to the payout control board 37. This is a signal for notification (connection confirmation signal for the main board 31). The connection confirmation signal indicates that the winning ball can be paid out.

  The prize ball REQ signal is a signal that is in an output state (= on state) at the time of transmission at the time of a prize ball payout request. In addition, the prize ball REQ signal is in a stopped state (off state) after a predetermined period after being in the output state. The award ball number signal is used as a signal (award ball number command) output for designating the number of game balls (1 to 15) for which a payout request is made.

  The state signal is a signal that is in the output state (ON state) when the full signal is not output and the VL signal is transmitted by the photocoupler 151. The state signal is in a stopped state (off state) when the state is full or when the VL signal is not transmitted by the photocoupler 151.

  The award ball count signal is a signal that is turned on when the payout control means confirms the payout of one prize ball, and is turned off after a predetermined period of time has elapsed. The payout error signal is a signal that is turned on when an error state relating to payout occurs and is turned off when the error state is canceled.

  FIG. 18 is a block diagram showing signal lines and the like used for transmission / reception of each control signal shown in FIG. As shown in FIG. 18, the connection confirmation signal, the prize ball REQ signal, and the prize ball control signal are output by the CPU 56 via the output circuit 67 and input to the payout control CPU 371 via the input circuit 373A. The prize ball count signal and the payout error signal are output by the payout control CPU 371 via the output circuit 373B and input to the CPU 56 via the input circuit 68. Further, the status signal is output from the AND circuit 155 mounted on the payout control board 37 via the output circuit 373B and input to the CPU 56 via the input circuit 68. Each of the connection confirmation signal, the prize ball REQ signal, the prize ball count signal, the payout error signal, and the status signal is 1-bit data, and is transmitted through one signal line. Since the prize ball control signal designates 1 to 15 prize ball payouts, it is composed of 4-bit data and transmitted through four signal lines.

  FIG. 19 is a timing chart showing an example of how to output a prize ball number signal. As shown in FIG. 19, when the winning control switch detects a winning game ball, the gaming control microcomputer 560 changes the output state of the winning ball number signal to a state corresponding to the number of winning balls to be paid out according to winning. At the same time, the prize ball REQ signal is turned on. In this embodiment, when a game ball is detected by the start port switch 14a, four prize balls are paid out, and when a game ball is detected by any one of the prize port switches 33a, 39a, 29a, 30a. Seven prize balls are paid out. When a game ball is detected by the V count switch 22 or the count switch 23, 15 prize balls are paid out. Further, as described above, the prize ball number signal is composed of 4 bits, and therefore, the lower 4 bits of the prize ball number commands of 00 (H) to 0F (H) expressed in 8 bits are The prize ball number signal is transmitted from the main board 31 to the payout control board 37. Hereinafter, it may be expressed as “00 (H) to 0F (H) prize ball number signal”, but in reality, the prize ball number signal is represented by 8 bits. This corresponds to the lower 4 bits of 0F (H).

  FIG. 20 is a timing chart showing an example of how to output a prize ball count signal. As shown in FIG. 20, when the payout control counter 370 detects the payout of the game ball, the payout control microcomputer 370 confirms whether or not the detection is the detection of the payout of the winning ball, and detects the payout of the winning ball. If so, the prize ball count signal is turned on for a predetermined period (for example, 0.5 seconds). That is, each time a payout of one prize ball is confirmed, the prize ball count signal is turned on for a predetermined period. Therefore, for example, the payout count switch 301 detects the payout of seven game balls. If the detected game ball is a prize ball, the on / off of the prize ball count signal is repeated seven times.

  The game control microcomputer 560 performs a prize ball payout confirmation designation control indicating that the payout of one prize ball has been confirmed every time a prize ball count signal is received in the above-described prize ball notification process (step S24a). A command (award ball payout confirmation designation command) is transmitted to the effect control board 80 (see the award ball notification process in step S24a). The production control microcomputer 100 mounted on the production control board 80 sends a command signal for controlling the driving (lighting) of the lamp to the frame side lamp driver board 35 based on the received prize ball payout confirmation designation command. (In the command analysis process in step S324, a command signal is output to the frame-side lamp driver board 35 in response to reception of a prize ball payout confirmation designation command). The lamp driver 354 of the frame side lamp driver board 35 executes control for lighting the prize ball lamp 51 for a predetermined period (for example, 0.5 seconds) every time a prize ball payout confirmation designation command is received.

  Note that the present invention is not limited to a configuration in which a prize ball payout confirmation designation command indicating that a prize ball has been paid out is transmitted to the effect control board 80 every time a prize ball count signal is received. When the control microcomputer 560 receives a predetermined number (for example, seven times) of award ball count signals indicating a predetermined number (for example, seven) of winning balls, the predetermined number (for example, seven) of award balls is received. A prize ball payout confirmation designation command indicating that the payout of the ball has been confirmed may be transmitted to the effect control board 80, and the first one of a predetermined number (for example, 7) prize balls to be paid out. A prize ball payout confirmation designation command indicating that a predetermined number (for example, 7) of prize balls has been paid out in response to receiving a prize ball count signal based on detection of a prize ball payout. The It may be transmitted to the output control board 80. In this case, the production control microcomputer 100 confirms the payout of one prize ball as described above when receiving the prize ball payout confirmation designation command indicating that the payout of the predetermined number of prize balls has been confirmed. It is preferable to execute control to turn on the prize ball lamp 51 for a longer period (for example, 3 seconds) than when the prize ball payout confirmation designation command indicating that the game has been received. Note that each time the game control microcomputer 560 receives a prize ball count signal, the game control microcomputer 560 not only transmits a prize ball payout confirmation designation command, but also sends a received prize ball count signal to an external device such as a hall computer. You may make it output the signal which shows having received. If comprised in this way, it will become possible to confirm outside that the prize ball was paid out.

  FIG. 21 is a timing chart showing an example of how to output a payout error signal. As shown in FIG. 21, the payout control microcomputer 370 turns on the payout error signal when the error state is entered, and turns off the payout error signal when the error state is canceled. In this example, a payout error signal is output when an error state occurs due to the occurrence of an error related to payout of a game ball. Specifically, for example, a payout error signal is output when the lower pan is full or the ball is out.

  As shown in FIG. 21, when the game control microcomputer 560 mounted on the main board 31 receives an error signal from the payout control microcomputer 370 (when the error signal is turned on), the effect control board 80 An error occurrence notification command is transmitted as an effect control command. The error occurrence notification command is a command indicating that an error has occurred. In addition, when the error signal from the payout control microcomputer 370 is stopped (when the error signal is turned off), the game control microcomputer 560 notifies the effect control board 80 of an error release as an effect control command. Send a command. The error release notification command is a command indicating that the error state has been released.

  Upon receiving the error occurrence notification command from the game control microcomputer 560, the effect control microcomputer 100 mounted on the effect control board 80 displays an error state on the variable display device 9, and displays an error. A process for informing the state is executed. The notification of the error state is performed by displaying, for example, characters or figures such as “An error has occurred!” In the display area of the variable display device 9. When the production control microcomputer 100 receives the error release notification command from the game control microcomputer 560, the production control microcomputer 100 erases the error display displayed on the variable display device 9 in order to notify that it is in an error state. Then, the notification of the error state is ended. As described above, the error notification is made when an error state occurs, so that the player or the game clerk can be easily notified that the error has occurred.

  FIG. 22 is a flowchart showing an example of the firing motor excitation pattern output process in step S21. In the firing motor excitation pattern output process, the game control microcomputer 560 checks the input state of the state signal (step S21a). If the status signal is ON, the game control microcomputer 560 outputs the excitation motor signal by outputting the excitation pattern for the launch motor 94 stored in the excitation pattern buffer to the upper 4 bits of the output port 2. Processing is performed (step S21b). On the other hand, if the state signal is OFF, the firing motor excitation pattern output process is terminated without performing the firing motor signal output process.

  Note that when the state signal is in the off state, the firing motor control process in step S22 may not be performed. For example, when it is determined in step S21a that the state signal is in the off state, the process may jump to step S23 without performing steps S21b and S22.

  In addition, when the game control microcomputer 560 detects that the state signal input state is turned off, the game control microcomputer 560 transmits a firing non-permission state notification command as an effect control command to the effect control board 80. You may do it. In this case, for example, when it is determined as N in step S21a, if the launch non-permission state is not being notified, a launch non-permission state notification command is transmitted. The firing non-permission state notification command is a command indicating that a launch non-permission state described later is set. Further, when it is detected that the state signal input state is turned on, the game control microcomputer 560 transmits a firing permission state notification command as an effect control command to the effect control board 80. It may be. In this case, for example, when it is determined as Y in step S21a, if the firing non-permission state is being notified, a firing permission state notification command is transmitted. The firing permission state notification command is a command that indicates that the firing non-permitted state is canceled and the fire is permitted.

  When the effect control microcomputer 100 mounted on the effect control board 80 receives the launch non-permission state notification command from the game control microcomputer 560, the variable display device 9 displays a display indicating that the launch is stopped. And performing a process of notifying that the launch is not permitted. The notification of the launch disapproval state is performed, for example, by displaying characters or figures such as “Cannot launch a game ball now!” In the display area of the variable display device 9. In addition, when the production control microcomputer 100 receives the launch permission state notification command from the game control microcomputer 560, the launch control state displayed on the variable display device 9 in order to notify that the launch is not permitted. The permission state display is erased, and the notification that the launch is not permitted is terminated. Thus, if it is set as the structure which alert | reports that it was in the launch disapproval state, it can be easily notified to a player or a game store clerk that it is a state which cannot launch a game ball. In addition, you may make it alert | report that it is a discharge disapproval state not only by the display to the variable display apparatus 9, but with a sound, a lamp | ramp, etc. FIG.

  FIG. 23 is a timing diagram illustrating an example of an output state of the state signal. As shown in FIG. 23, when the full signal is in the on state or when the VL signal is in the off state, the state signal is in the off state. More specifically, when a full tank signal is output from the full switch 148 or when the VL signal is not transmitted by the photocoupler 151, the state signal that is the output signal of the AND circuit 155 is turned off. , The launch is not permitted.

  On the other hand, as shown in FIG. 23, when the full signal is in the off state and the VL signal is in the on state, the state signal is in the on state. More specifically, when the full tank signal is not output from the full switch 148 and the VL signal is transmitted by the photocoupler 151, the state signal that is the output signal of the AND circuit 155 is turned on. Launch permitted.

  “Launch non-permitted state” means a state where driving of the firing motor 94 is prohibited. Specifically, even if a control signal from the touch sensor is input to the firing substrate 90, the firing motor 94 is not driven. When in the “disallowed launching state”, the process of step S21b is not executed and the launching motor signal from the gaming control microcomputer 560 is stopped, so that an operation for launching the game ball by the player is performed. Even if is done, the game ball is not fired.

  “Launch permitted state” means a state in which the firing motor 94 is permitted to be driven. Specifically, if a control signal from the touch sensor is input to the firing substrate 90, the firing motor 94 is driven. When it is in the “permission permitted state”, the process of step S21b is executed, and the launch motor signal from the game control microcomputer 560 is set to the output state, so that an operation for launching the game ball by the player is performed. If so (if the touch sensor signal from the touch sensor is input to the launch board 90), the launch motor drive signal is input from the launch board 90 to the launch motor 94 and the game ball is launched.

  In this example, the game control microcomputer 560 outputs a launch motor signal to the launch board 90 as a drive signal for driving the launch motor 94, and the touch sensor signal from the touch sensor is input to the launch board 90. If so, the firing motor signal input to the firing substrate 90 is output as it is as a firing motor drive signal and input to the firing motor 94. That is, the game control microcomputer 560 outputs a drive signal input to the launch motor 94, and the launch board 90 plays a role of relaying the drive signal.

  However, when the launch board 90 is configured to continuously output the drive signal input to the launch motor 94, the game control microcomputer 560 may change the launch board 90 according to the state signal input state. Output a signal indicating whether it is in a launch-permitted state or a launch-permitted state, and the touch sensor signal from the touch sensor is input on condition that the launch board 90 is in the launch-permitted state. For example, the drive signal input to the firing motor 94 may be continuously output.

  FIG. 24 is a flowchart showing an example of the prize ball processing in step S33. In the prize ball process, the game control microcomputer 560 executes a prize ball number addition process (step S201) and a prize ball control process (step S202). Then, the contents of the port 0 buffer formed in the RAM 55 are output to port 0 (step S203). The contents of the port 0 buffer are updated in the prize ball control process.

  In the winning ball number adding process, a winning ball number table shown in FIG. 25 is used. The prize ball number table is set in the ROM 54. The number of processes (in this example, “7”) is set in the head address of the winning ball number table, and then the lower address of the switch-on buffer, and each switch of the winning opening that will pay out the winning ball by winning. The switch input bit determination value and the number of winning balls are sequentially set corresponding to each switch of the winning opening. The switch input bit determination value is a value corresponding to the bit to which the detection signal of each switch at the input port 0 is input (see FIG. 12). The upper address of the switch-on buffer is a fixed value (for example, 7F (H)).

  FIG. 26 is a flowchart showing the prize ball number adding process. In the winning ball number adding process, the game control microcomputer 560 sets the start address of the winning ball number table as a pointer (step S211). Then, the data at the address pointed to by the pointer (in this case, the number of processes) is loaded (step S212). Next, the upper address (8 bits) of the switch-on buffer is set in the upper 1 byte of the 2-byte check pointer (step S213).

  Then, the pointer value is incremented by 1 (step S214), and the data of the prize ball number table pointed to by the pointer (in this case, the lower address of the switch-on buffer) is set in the lower 1 byte of the check pointer (step S215). The pointer value is increased by 1 (step S216). Next, the address data pointed to by the check pointer, that is, the contents of the switch-on buffer is loaded into the register (step S217), and the loaded contents and the data of the prize ball number table pointed to by the pointer (in this case, the switch input bit judgment value) ) And the logical product (step S218). As a result, 7 bits other than the bit corresponding to the detection signal of the switch to be inspected become 0 in the register loaded with the contents of the switch-on buffer. Then, the pointer value is incremented by 1 (step S219).

  If the calculation result in step S218 is 0, that is, if the detection signal of the switch to be inspected is on, the prize ball number table data pointed to by the pointer (in this case, the prize ball number) is used as the prize ball addition value. (Steps S220 and S221), and the prize ball addition value is added to the contents of the 16-bit total prize ball number storage buffer formed in the RAM 55 (step S222). The total winning ball number storage buffer is formed in the backup RAM. If a carry occurs as a result of the addition, the content of the total number of winning balls storage buffer is set to 65535 (= FFFF (H)) (steps S223 and 224). Further, “formed in RAM” means an area in the RAM.

  In step S225, the number of processes is reduced by 1. If the number of processes is 0, the process ends. If the number of processes is not 0, the process returns to step S214 (step S226). In step S220, when it is confirmed that the calculation result in step S218 is 0, that is, the detection signal of the switch to be inspected is in the OFF state, the process proceeds to step S225.

  FIG. 27 is a flowchart showing the prize ball control process in step S202. In the prize ball control process, the CPU 56 executes any one of steps S231 to S234 according to the value of the prize ball process code.

  FIG. 28 is a flowchart showing the prize waiting process 1 (step S231) executed when the value of the prize ball process code is zero. In the award ball waiting process 1, the CPU 56 sets the award ball waiting output value (30 (H)) in the port 0 buffer (step S243). When the prize ball waiting output value is set in the port 0 buffer, the contents of the port 0 buffer are output to port 0 in step S203, whereby the prize ball REQ signal is turned off, and the connection confirmation signal The on state is maintained (see FIG. 10). In addition, the prize ball control signal enters an invalid command (00 (H)). Next, it is confirmed whether or not the prize ball timer is 0 (step S244). If the prize ball timer is not 0, the value of the prize ball timer is decreased by 1 (step S245), and the process is terminated. The prize ball timer is a timer for measuring the time required for prize ball processing. At this stage, if the value of the prize ball timer is not 0, the next prize ball after the previous payout process is completed. Waiting time until the REQ signal is turned on (time for providing an interval between ON periods of a plurality of prize ball REQ signals when prize ball payout is continuously executed, 00 (H ) Means that the prize ball control signal is being output).

  The prize ball timer is set in step S275 of the prize ball waiting process 3 described later. In addition, after the execution of the prize ball process 3 in step S234 is completed and the previous payout process is completed, the process of steps S243 to S245 sets the prize ball REQ signal to the OFF state and the invalid command as the prize ball control signal. This is a process for outputting (00 (H)).

  If the value of the prize ball timer is 0, the CPU 56 confirms the contents of the total prize ball number storage buffer (step S247). If the value is 0, the process ends. If not, the value of the prize ball process code is set to 1 (step S248), and the process ends.

  FIG. 29 is a flowchart showing a prize ball transmission process (step S232) executed when the value of the prize ball process code is 1. In the prize ball transmission process, the CPU 56 checks whether or not the content of the total prize ball number storage buffer is smaller than the prize ball command maximum value (“15” in this example) (step S251). If the content of the total prize ball number storage buffer is equal to or greater than the prize ball command maximum value, the prize ball command maximum value is set in the prize ball number buffer (step S252). If the content of the total prize ball number storage buffer is smaller than the maximum value of the prize ball command, the content of the total prize ball number storage buffer is set in the prize ball number buffer (step S253).

  Thereafter, the CPU 56 sets the output value (10 (H)) during the prize ball REQ in the output port 0 buffer (step S254). When the output value in the prize ball REQ is set in the output port 0 buffer, the contents of the output port 0 buffer are outputted to the port 0 in step S203, so that the prize ball REQ signal is turned on and the connection confirmation is made. The on state of the signal is maintained (see FIG. 10). Further, the contents of the winning ball number buffer are set in the lower 4 bits of the output port 0 buffer (step S255). Further, a prize ball processing waiting time is set in the prize ball timer (step S256). The award ball processing waiting time is, for example, a time predetermined as a period sufficient for completing the award ball payout control on the payout control board 37. Thereafter, the value of the prize ball process code is set to 2 (step S257), and the process is terminated.

  In this embodiment, the maximum value of the prize ball command is “15”. Accordingly, a prize ball control signal designating the maximum number of payouts of “15” is transmitted to the payout control board 37.

  FIG. 30 is a flowchart showing the winning ball waiting process 2 (step S233) executed when the value of the winning ball process code is 2. In the award ball waiting process 2, the CPU 56 checks whether or not the award ball timer is 0 (step S263). If the prize ball timer is not 0, the value of the prize ball timer is decreased by 1 (step S264), and the process is terminated. If the value of the prize ball timer is not 0 at this stage, it means that the CPU 56 determines that the payout process for the number of prize balls instructed to the payout control means is not completed.

  If the value of the prize ball timer is 0, the CPU 56 determines that the prize ball payout for the number instructed to the payout control means has been completed, and determines the number of prize balls from the contents of the total prize ball number storage buffer. The contents of the buffer (the number of prize balls paid out commanded to the payout control means) are subtracted (step S265). Then, the value of the prize ball process code is set to 3 (step S266), and the process is terminated. Whether or not the number of prize balls paid out to the payout control means has been completed is output for the number of prize balls paid out to the payout control means after outputting the prize ball REQ signal without using the prize ball timer. The determination may be made based on whether or not a prize ball count signal is received.

  In the prize ball transmission process shown in FIG. 29 and the prize ball waiting process 2 shown in FIG. 30, the game control means transmits the prize ball control signal and then receives the prize ball from the payout control means within a predetermined period. When the count signal is not received the number of times corresponding to the number specified by the prize ball control signal, it is configured to perform control for stopping the progress of the game, assuming that an abnormality in communication with the payout control means has occurred. May be.

  The game control means stores the current control state, for example, the output state of the output port, in the RAM 55 before stopping the progress of the game, and then clears the output state of the output port. In addition, in order to prevent a player's disadvantage, you may make it stop the output of a firing motor signal before clearing the output state of an output port. Then, the progress of the game is stopped until the abnormality of communication with the payout control means is resolved. That is, even if a new event (game ball winning or the like) occurs, processing corresponding to the new event is not performed, for example, a newly generated event is stored. Note that the game control means transmits a communication error display command to the effect control means of the effect control board 80 in order to notify the occurrence of communication abnormality using the variable display device 9 or the like before stopping the progress of the game. It may be configured. When the communication abnormality is resolved, the game control means can restore the output port based on the control state stored in the RAM 55.

  FIG. 31 is a flowchart showing the winning ball waiting process 3 (step S234) executed when the value of the winning ball process code is 3. In the award ball waiting process 3, the CPU 56 sets the award ball REQ waiting time in the award ball timer (step S275). Then, the value of the prize ball process code is set to 0 (step S276), and the process is terminated.

  With the above processing, the game control means stores the total number of game balls as prize balls to be paid out based on the establishment of the payout condition in the total prize ball number storage buffer so as to be specified (see step S222). The total award ball number storage buffer corresponds to a prize game medium number storage means capable of storing stored contents for at least a predetermined period by a backup power source even when power supply to the gaming machine is stopped. Further, the game control means transmits a payout command signal designating a payout number of a predetermined number of prize balls to the payout control means based on the number of prize balls stored in the total prize ball number storage buffer (step S253). , S255, S203). Then, when the game control means transmits a payout command signal, it determines from the number of prize balls stored in the total prize ball number storage buffer after determining that the number of prize balls paid out to the number commanded to the payout control means has been completed. A subtraction process for subtracting the number of payouts specified by the payout command signal is performed (see step S265). It is to be noted that, after confirming whether or not the number of prize balls paid out to the number designated to the payout control means has been completed, the payout number is immediately calculated from the number of prize balls stored in the total prize ball number storage buffer. Subtraction processing for subtracting the number of payouts specified by the command signal may be performed. Further, before transmitting the payout command signal, a subtraction process may be performed in which the payout number specified by the payout command signal is subtracted from the number of prize balls stored in the total prize ball number storage buffer.

  In this embodiment, as the prize game medium number storage means for storing the total number of prize game media to be paid out based on the establishment of the payout condition, a total prize ball number storage buffer for storing the total number itself is exemplified. However, the prize game medium number storage means for storing the total number of prize game media in an identifiable manner stores the number of prizes received in each prize area or the number of prizes for each prize area (for example, 4). The number of winning holes 14 corresponding to the number of winning balls, the number of winning holes 33, 39, 29, 30 corresponding to the number of 7 winning balls, and the number of winning prizes corresponding to the number of 15 winning balls, , The number of winning prizes for which the winning ball payout has not ended yet) may be stored.

  Next, the operation of the payout control means (the payout control CPU 371 and peripheral circuits such as ROM and RAM) will be described. FIG. 32 is an explanatory diagram showing an example of output port assignment in the payout control means. As shown in FIG. 32, the output port 0 is an output port for outputting a signal of each phase supplied to the payout motor 289 by the stepping motor. The output port 1 is an output port for outputting a ball break LED 52, an award ball signal output to the outside of the gaming machine, prize ball information, ball lending information, and a gaming machine error status signal.

  The output port 2 is an output port of each segment output of the error display LED 374 by 7 segment LED. The output port 3 is an output port for outputting an EXS signal and a PRDY signal to the card unit 50. The output port 3 is a port for outputting a prize ball count signal, a payout error signal, and a status signal.

  FIG. 33 is an explanatory diagram showing an example of bit assignment of input ports in the payout control means. As shown in FIG. 33, a 4-bit prize ball control signal is input to bits 0 to 3 of the input port 0, and a connection confirmation signal from the main board 31 and a payout motor position are input to bits 5 and 7, respectively. A detection signal of the sensor 295 is input. The prize ball REQ signal from the main board 31 is input to the interrupt terminal of the payout control CPU 371 without going through the input port. In addition, the detection signal of the payout number count switch 301, the operation signal from the error release switch 375, and the detection signal of the full switch 48 are input to bits 1 to 3 of the input port 1, respectively. The VL signal, the BRDY signal, the BRQ signal, and the detection signal of the ball break switch 187 from the card unit 50 are input to bits 4 to 7 of the input port 1, respectively. An output signal and a power-off signal from the clear switch 921 from the power supply board 910 are input to the input port 2.

  FIG. 34 is a timing chart for explaining the communication between the payout control means of the gaming machine and the card unit 50. The payout control means turns on the PRDY signal when power supply to the gaming machine is started and a payout operation is possible. When the power supply is started, the card unit 50 turns on the VL signal as a connection signal. When a card is received in the card unit 50, the ball lending switch is operated and a ball lending switch signal is input, the card unit 50 outputs a BRDY signal to the payout control means. That is, the BRDY signal is turned on. When a predetermined delay time elapses from this point, the card unit 50 outputs a BRQ signal to the payout control means. That is, the BRQ signal is turned on.

  Then, when the payout control means turns on the EXS signal for the card unit 50 and detects the fall (off) of the BRQ signal from the card unit 50, the payout control unit 289 drives the payout motor 289 to set a predetermined number (for example, 25). Pay out the rental balls to the player. Then, when the payout is completed, the payout control means causes the EXS signal to the card unit 50 to fall. That is, the EXS signal is turned off.

  Next, the operation of the payout control means will be described. FIG. 35 is a flowchart showing main processing executed by the payout control means. When power is turned on to the gaming machine and the input level of the reset terminal to which a reset signal is input becomes high, the payout control CPU 371 first performs necessary initial settings. That is, the payout control CPU 371 first sets the interruption prohibition (step S701). Next, the interrupt mode is set to interrupt mode 2 (step S702), and a stack pointer designation address is set to the stack pointer (step S703).

  The payout control CPU 371 initializes the built-in device register (step S704), and initializes CTC and PIO (step S705).

  In this embodiment, one channel of the built-in CTC is used in the timer mode. Accordingly, in the built-in device register setting process in step S704 and the process in step S705, register setting for setting the channel to be used to timer mode, register setting for permitting interrupt generation, and setting an interrupt vector. Register settings are made. The interrupt by the channel is used as a timer interrupt. For example, when it is desired to generate a timer interrupt every 2 ms, a value corresponding to 2 ms is set as an initial value in a predetermined register (time constant register).

  The interrupt vector set for the channel set to the timer mode (channel 3 in this embodiment) corresponds to the start address of the timer interrupt process. Specifically, the start address of the timer interrupt process is specified by the value set in the I register and the interrupt vector. In the timer interruption process, a payout control process for controlling the payout means (including at least a process of driving the ball payout device 97 in accordance with a command signal relating to award ball payout from the main board, and a ball payout device 97 in response to a ball lending request. A process for driving the above may be included).

  In this embodiment, the interruption mode 2 is also set in the payout control CPU 371. Therefore, an interrupt process based on counting up the built-in CTC can be used. Also, an interrupt processing start address can be set according to the interrupt vector sent by the CTC.

  The interrupt based on CTC channel 3 (CH3) count-up is an interrupt generated when the CPU internal clock (system clock) is counted down and the register value becomes “0”, and is used as a timer interrupt. . Specifically, a clock obtained by dividing the operation clock of the CPU 371 is given to the CTC, the register value is subtracted by the input of the clock, and when the register value becomes 0, a timer interrupt occurs.

  Next, the payout control CPU 371 sets the RAM in an accessible state (step S706). Further, 0000 (H) is set as an initial value of the award ball unpaid number counter (step S707). In step S707, a process of setting 0000 (H) as the initial value of the unpaid ball lending counter is also performed. Next, the state of the output signal of the clear switch 921 input via the input port 2 is confirmed only once (step S708). In the confirmation, when it is detected ON, the payout control CPU 371 executes an initialization process (steps S712 to S713). If the clear switch 921 is not in the on state, whether or not data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) has been performed when power supply to the gaming machine is stopped Confirmation is made (step S709). Whether or not the protection process has been performed is a value (for example, 2) corresponding to the value of the backup monitoring timer stored in the backup RAM area in the process when the power supply is stopped executing the data protection process of the backup RAM area It is confirmed by whether or not. Note that such a confirmation method is an example. For example, a flag indicating that data protection processing has been executed is set in the backup flag area in the power supply stop processing, and the flag is set in step S709. If it is confirmed that there is a backup, it may be determined that there is a backup.

  If it is determined that there is a backup, the payout control CPU 371 performs a data check (parity check in this example) in the backup RAM area (step S710). In this embodiment, clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count becomes 0, the payout control CPU 371 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as the checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In step S710, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, the payout control state recovery process is not executed, and the initialization process (the processes in steps S712 to S713) is executed.

  If the check result is normal, the payout control CPU 371 performs payout control state recovery processing. Specifically, the value of the award ball unpaid number counter formed in the backup RAM is set as the award ball unpaid number counter initial value (step S711). And the process after step S712 is performed.

  In the initialization process, the payout control CPU 371 first performs a RAM clear process (step S712). Also, initial values are set in the flags and counters of the RAM area (step S713). The process of step S713 includes a process of setting the initial value of the award ball unpaid number counter in the award ball unpaid number counter. Accordingly, when the payout control state recovery process (step S711) is executed, the value of the unsold prize ball number counter stored in the backup RAM is set again in the unsold prize ball number counter. In other words, the value of the award ball unpaid number counter stored in the backup RAM is used as it is. That is, when the process of steps S712 and S713 is executed without executing the process of step S711, the payout control process is started from the initial state. Further, when the process of step S711 is executed and the processes of steps S712 and S713 are executed, the execution state of the payout control process is returned to the state before the power supply is stopped.

  Then, the CTC register provided in the payout control CPU 371 is set so that a timer interrupt is periodically received (step S716). That is, a value corresponding to the timer interrupt generation interval is set as an initial value in a predetermined register (time constant register). Since interruption is prohibited in step S701 of the initial setting process, interruption is permitted before the initialization process is completed (step S717). Thereafter, a loop process for monitoring the occurrence of a timer interrupt is entered.

  As described above, the built-in CTC of the payout control CPU 371 is set to repeatedly generate a timer interrupt. When a timer interrupt occurs, the payout control CPU 371 executes a timer interrupt process after step S750.

  FIG. 36 is a flowchart showing an example of a timer interrupt process executed by the payout control unit. The payout control CPU 371 first executes a power-off process for monitoring whether or not a power-off signal has been output (step S750). Thereafter, a payout control process after step S751 is executed. In the payout control process, the payout control CPU 371 first performs an input determination process (step S751). In the input determination process, the states of bit 5 of input port 0 and bits 3 to 7 (see FIG. 33) of input port 1 are detected, and the detection result is reflected in a predetermined 1 byte of RAM (referred to as an input state flag). It is processing to do. In the payout control process, when control is performed based on the state of bit 5 of input port 0 and bits 3 to 7 of input port 1, the state of the input state flag is not checked instead of directly checking the state of the input port. Check status. Further, the input determination process includes a process of checking the state of bits 1 and 2 of the input port 1, that is, checking the state of the detection signal of the payout number count switch and the error release switch. Specifically, switch timers (payout number count switch timer, error release switch timer) corresponding to each of them are formed in the RAM, and when it is detected in the input determination process that they are in the ON state, the corresponding switch timer The value of the switch timer is incremented by 1 and when it is detected that the switch is off, the corresponding switch timer value is cleared.

  Next, the payout control CPU 371 executes a payout motor control process (step S753). In the payout motor control process, when the payout motor 289 is to be driven, a process for outputting the patterns of the payout motors φ1 to φ4 to the output port 0 is performed.

  Also, the payout control CPU 371 executes a prepaid card unit control process for communicating with the card unit 50 (step S754). Next, the payout control CPU 371 executes main control communication processing for communicating with the game control means of the main board 31 (step S755). Further, a prize ball lending control process for performing a control for paying out a lending ball in response to a ball lending request from the card unit 50 and a control for paying out the number of award balls indicated by a prize ball control signal from the main board. Is executed (step S756).

  Then, the payout control CPU 371 executes error processing for detecting various errors (step S757). In addition, an information output process for outputting prize ball information and ball rental information output to the outside of the gaming machine is executed (step S758). Further, a predetermined display is performed on the error display LED 374 according to the result of the error processing, and a display control process for turning on the ball break LED 52 is executed (step S759).

  In this embodiment, a RAM area (output port 0 buffer, output port 1 buffer, output port 2 buffer) corresponding to the output state of the output port is provided. The contents of the port 0 buffer, output port 1 buffer, and output port 2 buffer are output to the output port (step S760: output processing). The output port 0 buffer, the output port 1 buffer, and the output port 2 buffer are a payout motor control process (step S753), a prepaid card control process (step S754), a main control communication process (step S755), and an information output process (step S758). And it is updated by the display control process (step S759).

  FIG. 37 is a flowchart showing the payout motor control process in step S753. In the payout motor control process, the payout control CPU 371 executes any one of steps S521 to S526 in accordance with the value of the payout motor control code.

  In the payout motor normal process (step S521) executed when the value of the payout motor control code is 0, the payout control CPU 371 sets the pointer at the head address of the table stored in the ROM. The payout motor normal process setting table stores a payout motor excitation pattern table in which data of excitation patterns (payout motors φ1 to φ4) of each step for rotating the payout motor 289 at the time of ball payout is sequentially set. Yes.

  In the payout motor start preparation process (step S522) executed when the value of the payout motor control code is 1, the payout control CPU 371 sets bits 4 to 7 of the output port 0 buffer corresponding to the output state of the output port 0. Performs processing such as setting the initial value of the excitation pattern.

  In the payout motor slow-up process (step S523) executed when the value of the payout motor control code is 2, the payout control CPU 371 starts the rotation of the payout motor 289 more smoothly than in the case of the constant speed process. Bit 4 of the output port 0 buffer corresponding to the output state of the output port 0 by reading the contents of the payout motor excitation pattern table at a long interval and gradually approaching the time interval in the case of constant speed processing. Set to ~ 7. At the time of reading, the contents of the payout motor excitation pattern table at the address pointed to by the pointer are read and the pointer value is incremented by one.

  In the payout motor constant speed process (step S524) executed when the value of the payout motor control code is 3, the payout control CPU 371 periodically reads the content of the payout motor excitation pattern table and outputs the output state of the output port 0. Are set in bits 4 to 7 of the output port 0 buffer corresponding to.

  In the payout motor brake process (step S525) executed when the value of the payout motor control code is 4, the payout control CPU 371 has a longer interval than in the constant speed process in order to stop the payout motor 289 smoothly. In addition, the contents of the payout motor excitation pattern table are read at a time interval that gradually moves away from the time interval in the case of constant speed processing, and bits 4 to 7 of the output port 0 buffer corresponding to the output state of the output port 0 Set to.

  In the payout motor brake process, the rotation of the payout motor 289 is finally stopped. However, at the time of stoppage, in the payout motor normal process, the stop-time payout motor excitation pattern is repeated to output the output state of the output port 0. Are set in bits 4 to 7 of the output port 0 buffer corresponding to. The stop-time payout motor excitation pattern is a pattern in which at least one phase of the payout motors φ1 to φ4 is excited. Since the excitation pattern given to the payout motor 289 is one type of the stop-time payout motor excitation pattern (it does not change), the payout motor 289 does not rotate. Moreover, since the dispensing motor 289 is excited, it does not rotate easily. Therefore, for example, even if an act that gives vibration to a gaming machine installed in a gaming store is performed, the gaming ball is not paid out. If the excitation is released when the rotation of the payout motor 289 is stopped, the payout motor 289 is not restrained, so that the payout motor 289 vibrates in the rotation direction in accordance with the vibration given from the outside, and the game ball is paid out. There is a possibility.

  In the ball biting payout motor brake process (step S526) executed when the value of the payout motor control code is 5, the payout control CPU 371 smoothes the payout motor 289 in the case of rotation for releasing the ball biting. The payout motor excitation pattern is longer than the rotation of the payout motor 289 for releasing the ball biting, and gradually away from the time interval in the case of constant speed processing. The contents of the table are read and set in bits 4 to 7 of the output port 0 buffer corresponding to the output state of output port 0.

  FIG. 38 is a flowchart showing the main control communication process in step S755. In the main control communication process, the payout control CPU 371 executes any one of steps S531 to S532 according to the value of the main control communication control code. If the value of the main control communication control code is 0 (waiting for reception of a prize ball control signal), the process ends without moving to step S531 or S532.

  FIG. 39 is a flowchart showing a prize ball REQ interrupt process activated in response to the prize ball REQ signal from the main board 31 introduced into the interrupt terminal being turned on (low level). In the prize ball REQ interrupt process, the payout control CPU 371 performs the process without executing the subsequent processes when the error bit (main control unconnected error bit or prize ball REQ signal error bit) is on. Is finished (step S541). In step S541, if any one of the two bits in the error flag is set, it is determined that the error bit is set.

  If the error bit is not set in step S541 and the connection confirmation signal is in the ON state (step S543), the payout control CPU 371 inputs a prize ball control signal via the input port 0, and the prize ball The number of winning balls indicated by the number signal is added to the contents of the winning ball unpaid number counter (step S545). Then, the value of the main control communication control code is set to 1 (step S548), and the process ends. The prize ball unpaid-out counter is formed in a non-volatile (power-backed up in this example) RAM area.

  The prize ball number signal transmitted from the main board 31 is received by the interrupt process as described above.

  It should be noted that even if the error bit (main control unconnected error bit, prize ball REQ signal error bit, or payout case error bit) is on, the prize ball number signal may be received. That is, step S543 to step S545 may be performed without performing the determination in step S541. With this configuration, the prize ball number signal can be received even during an error, and the prize ball number indicated by the prize ball number signal can be added to the contents of the prize ball unpaid number counter. It is possible to prevent the player from being given a disadvantage that a winning ball corresponding to a winning that has occurred is not paid out.

  FIG. 40 is a flowchart illustrating main control communication processing (step S531) executed when the value of the main control communication control code is 1. In the main control communication process, the payout control CPU 371 checks the state of the prize ball REQ signal if the connection confirmation signal is in the on state (step S551) (step S552). If the winning ball REQ signal is off, the winning ball REQ signal error bit is set in the error flag (step S553). This is because it is strange that the prize ball REQ signal is immediately turned off at this stage.

  Next, the payout control CPU 371 sets the prize ball REQ signal off monitoring time in the main control communication control timer (step S557). Then, the value of the main control communication control code is set to 2 (step S558), and the process ends. The main control communication control timer is a timer used for monitoring time related to communication with the game control means of the main board 31.

  FIG. 41 is a flowchart showing a main control communication end process (step S532) executed when the value of the main control communication control code is 2. In the process during main control communication, the payout control CPU 371 ends without performing the processes after step S562 if the error bit (main control unconnected error bit or prize ball REQ signal error bit) is on. (Step S561). If the connection confirmation signal is in the OFF state, the process is terminated without performing the processes after step S563 (step S562). If both error bits are off and the connection confirmation signal is on, it is confirmed whether or not the prize ball REQ signal is off (step S563). When it is turned off, the process proceeds to step S567.

  If the prize ball REQ signal is not turned off, the value of the main control communication control timer is confirmed (step S564). If the value of the main control communication control timer is not 0, the value of the main control communication control timer is decremented by 1 (step S565). If the value of the main control communication control timer is 0, it is determined that the prize ball REQ signal has not been turned off within the monitoring time, and the prize ball REQ signal error bit is set in the error flag (step S566). Transition.

  In step S567, the value of the main control communication control code is set to 0, and the process ends.

  FIG. 42 is a flowchart showing the winning ball lending control process in step S756. In the winning ball lending control process, the payout control CPU 371 confirms that the detection signal of the payout number count switch 301 is turned on (step S601), and lends whether or not the paid gaming ball is a winning ball. It is confirmed whether it is a sphere (steps S602 and S603). In this example, whether or not the game ball is a prize ball is confirmed by whether or not the current payout control state is a prize ball. Whether or not a prize ball is in progress is confirmed, for example, by whether or not a prize ball operating flag in the payout control state flag formed in the RAM is set (step S602). Further, whether or not the game ball is a lending ball is confirmed by whether or not the current payout control state is lending the ball. Whether or not the ball is being lent is confirmed by, for example, whether or not a ball renting operation bit (also referred to as a ball renting operation flag) in the payout control state flag formed in the RAM is set. (Step S603).

  If it is during the winning ball, the value of the winning ball unpaid number counter is decremented by 1 (step S604). If it is not in the winning ball but in the ball lending, the value of the ball lending unpaid-out number counter is decreased by 1 (step S605). Note that the ball rental unpaid number counter is formed in a RAM area provided in the payout control board 37. Further, if the winning ball is not being lent and not being lent, the value of the award ball unpaid-out counter is decremented by 1 assuming that the paid-out gaming ball is a winning ball (step S604).

  When the value of the winning ball unpaid-out counter is decremented by 1, the payout control CPU 371 turns on the winning ball count signal for a predetermined period (step S606). Next, the payout ball detection bit of the payout control state flag formed in the RAM is set (step S607). The payout ball detection bit is a game regardless of whether the payout motor 289 is driven during one award ball payout process (maximum 15 balls) or one ball lending process (25 payouts) in the payout passing waiting process. This is used to detect that no sphere has passed through the payout number counting switch 301. Thereafter, any one of steps S610 to S612 is executed according to the value of the payout control code.

  In the prize ball lending control process, the error bit is checked to determine whether or not to perform a payout operation (one prize ball payout or one ball lending) as shown in FIG. Only in the payout start waiting process. That is, the confirmation process of the payout number count switch 301, the subtraction process of the non-payout number counter, the output process of the prize ball count signal, etc. shown in FIG. 42 are executed without checking the error bit. Therefore, even if an error occurs, the ball lending unpaid-out counter or the winning ball unpaid-out counter is subtracted in accordance with the detection output from the paid-out count switch 301, and the value of the award ball unpaid-out counter When is subtracted, a prize ball count signal is output. Therefore, the number of unpaid game balls can be managed even in an error state. Even if an error state is detected, a prize ball count signal can be output in response to the detection of a payout of a prize ball. Therefore, even in an error state, it is detected on the payout control board 37 side. Information indicating that the winning ball has been paid out can be transmitted to the main board 31 side.

  In the prize ball lending control processing, if there is a detection output from the number-of-payout count switch 301 when neither a prize ball nor a ball is lent, it is determined that the game ball that has been paid out is a prize ball, The value of the payout number counter is subtracted, and a prize ball count signal is output to the main board 31. Therefore, even when an illegal game ball is paid out, a prize ball count signal is transmitted to the game control means (specifically, the game control microcomputer 560) mounted on the main board 31. . Since the game control means manages the number of prize balls to be paid out, if a prize ball count signal indicating the number of prize balls more than the number of prize balls to be originally paid out is received, illegal payout is performed. Can be determined. When it is determined that an illegal game ball has been paid out, the game control means performs the following appropriate processing.

  For example, the game control means performs a process for notifying a player, a game clerk, or the like of the occurrence of an error using the variable display device 9 or the like. Specifically, the game control means transmits an effect control command for notifying the occurrence of an error to the effect control means (specifically, the effect control microcomputer 100), thereby causing an error in the effect control means. Control to display the above on the variable display device 9 is executed. The game control means transmits a lamp control command and a sound control command for informing the error to the lamp control means and the sound control means via the effect control means, so that the error is notified to the lamp control means and the sound control means. You may make it perform lighting of the lamp and LED for alerting | reporting generation | occurrence | production, and audio | voice output. In addition, the game control means performs a process for stopping the progress of the game. Specifically, the game control means saves the current control state, for example, the output state of the output port, in the RAM 55 before stopping the progress of the game, and then clears the output state of the output port so that the abnormal state is Stop playing until it is resolved. Further, the game control means performs a process (step S32) of outputting information indicating that an illegal game ball has been paid out to a hall computer or the like outside the game machine. The game control means sends information indicating the number of prize balls to be paid out and a signal indicating the number of prize balls actually paid out based on the prize ball count signal to a hall computer or the like outside the gaming machine by information output processing. By outputting, it is possible to make the hall computer or the like determine whether or not an illegal game ball has been paid out. All of the above processes may be executed, but at least one of the above processes is executed.

  Further, a new payout control signal may not be transmitted until the game control means receives a prize ball count signal indicating the number of prize balls to be paid out. That is, a new payout control signal is not transmitted until a prize ball count signal indicating the number of prize balls to be paid out is received. Wait for the transmission of the control signal for a predetermined period, and if a prize ball count signal is further received during that period, an error state is set. If no prize ball count signal is received during that period, a new payout control signal is sent. It may be. If comprised in this way, management of the unpaid number of prize balls can be performed reliably.

  FIG. 43 is a flowchart showing a payout start waiting process (step S610) executed when the payout control code is 0. In the payout start waiting process, the payout control CPU 371 does not execute the subsequent processes if the error bit is set (step S621). The error bits in the error flag include a main board non-connection error, a payout case error, and a full tank error bit. The main board unconnected error is set when the connection confirmation signal from the main board 31 is in the OFF state (see step S816). Accordingly, the payout control means starts substantial control on condition that the connection confirmation signal is turned on after power supply to the gaming machine is started.

  On the other hand, if the BRDY signal is not in the on state, processing for paying out a prize ball after step S631 is executed. If the BRDY signal is on and the BRQ signal, which is a ball lending request signal, is on, a ball lending operation flag is set (steps S623 and S624). Then, “25” is set in the unpaid ball lending number counter (step S625), and “25” is set in the payout motor rotation number buffer (step S626).

  The payout motor rotation frequency buffer is referred to in the payout motor control process (step S753). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout motor rotation frequency buffer.

  Thereafter, the payout control CPU 371 sets a value (specifically “1”) corresponding to the payout motor activation preparation process (step S522) to the payout motor control code for selecting the process executed in the payout motor control process. It is set (step S627), the value of the payout control code is set to 1 (step S628), and the process is terminated.

  In step S631, the payout control CPU 371 checks whether or not the value of the award ball non-payout counter is 0 (step S631). If 0, the process ends. The award ball unpaid-out counter is a non-zero value (indicated by the award ball control signal) when the award ball REQ signal is received from the game control means of the main board 31 in step S545 in the award ball REQ interrupt process. Number) is added. If the value of the award ball unpaid number counter is not 0, it is confirmed whether it is 15 or more (step S632). If it is less than 15, the value of the award ball unpaid number counter is set in the payout motor rotation count buffer (step S633), and if it is 15 or more, “15” is set in the payout motor rotation count buffer. Then, a winning ball moving flag is set (step S635), and the process proceeds to step S627.

  FIG. 44 is a flowchart showing a payout motor stop waiting process (step S611) executed when the payout control code is 1. In the payout motor stop waiting process, the payout control CPU 371 checks whether or not the payout operation is completed (step S641). For example, the payout control CPU 371 sets a flag to that effect when the payout motor brake process (step S525) in the payout motor control process ends, and whether the payout operation is completed by checking the flag in step S641. You can check whether or not.

  When the payout operation is completed, the payout control CPU 371 sets the payout passing monitoring time in the payout control monitoring timer (step S642). The payout passing monitoring time is a time that has a margin in the time from when the last payout ball is paid out by the payout motor 289 until it passes through the payout number count switch 301. Then, the value of the payout control code is set to 2 (step S643), and the process ends.

  FIG. 45 is a flowchart showing a payout passing waiting process (step S612) executed when the value of the payout control code is 2. In the payout passing waiting process, when a prize ball is being paid out, it is determined that the payout has been completed normally if the value of the prize ball unpaid number counter is zero. If the value of the award ball unpaid number counter is not 0 even after the predetermined period has elapsed, the state shifts to an error state.

  In this embodiment, after determining that the payout operation period for the prize ball payout process has elapsed, the payout of the next number of prize balls is instructed. It may be configured to instruct the payout of the next prize ball number without any problem. In such a configuration, if the prize ball control signal is received during the prize ball payout, the value of the prize ball unpaid number counter is increased. The value may not be zero. Therefore, when the payout of the number of award balls set in step S633 or step S634 is confirmed (the value of the award ball unpaid number counter is the unpaid prize ball whose grasp control microcomputer 370 knows) It is determined that the payout is normally completed when the total number (the number including the number of prize balls to be paid out this time is a value obtained by subtracting the number set in step S633 or step S634). You may make it do.

  Further, when the ball lending is being paid out, it is determined that the payout has been completed normally if the value of the ball lending unpaid-out counter is 0. If the value of the unpaid ball lending counter is not 0, the state shifts to an error state. In this embodiment, the number of game balls to be paid out in one ball lending and payout operation is 25 (fixed value), and the payout motor 289 is rotated so that 25 game balls are paid out. Therefore, when the value of the unpaid ball lending counter is not 0, the payout has not been completed normally.

  In the payout passage waiting process, the payout control CPU 371 first decrements the value of the payout control timer by 1 (step S651). Then, the value of the payout control timer is confirmed. If the value is not 0 (step S652), that is, if the payout control timer has not timed out, the process is terminated.

  If the payout control timer has timed out (step S652), it is confirmed whether or not the ball lending payout process (ball lending operation) has been executed (step S653). Whether or not the ball lending operation has been executed is confirmed by whether or not the ball lending operation in progress flag in the payout control state flag formed in the RAM is set. When the ball lending operation is not executed, that is, when the prize ball payout process (prize ball operation) is executed, the payout control CPU 371 checks the value of the award ball unpaid number counter (step S654). ). If the value of the award ball unpaid number counter is 0, it is determined that the award ball payout process has been completed normally, and a payout ball detection bit, a prize ball operating flag, and a ball lending operation bit in the payout control status flag Is reset (step S655), the payout control code is set to 0 (step S656), and the process ends.

  If the value of the award ball unpaid number counter is not 0 and the payout ball detection bit is not set (step S658), the payout control CPU 371 will play the game ball even if the payout operation is performed. Is not paid out, a payout count switch non-passing error bit (payout case error bit) is set as a game ball payout failure (step S659).

  As described above, in a configuration in which the payout of the next prize ball number is instructed without waiting for the payout operation period to elapse, even when the payout is completed normally, the value of the prize ball unpaid number counter is 0. It can happen that it is not. Therefore, if the payout ball detection bit is set, that is, if the payout number count switch 301 detects the payout of at least one game ball during the prize ball payout process, it is assumed that the prize ball payout process is normally completed. The process proceeds to step S655. For example, when 15 game balls should be paid out in one prize ball payout process, when only 14 game balls are actually paid out (the number of payout count switch 301 is 14 game balls). In this case, the payout ball detection bit is set, so it is considered that the award ball payout process has been completed normally. It should not have been done, and the shortage will be paid out in the next prize ball payout process, so there will be no disadvantage to the player.

  As described above, if no game ball is paid out even if a payout operation is performed in the payout process, a payout count switch non-passing error bit (payout case error bit) is set as a game ball payout operation failure. Set.

  In the winning ball lending control process, the error bit is checked to determine whether or not to perform a payout operation (one winning ball payout or one ball lending). The payout start shown in FIG. Only in the waiting process. In the payout motor stop waiting process shown in FIG. 44 and the payout waiting process shown in FIG. 45, the error bit is not checked. Therefore, after the process of step S626, S633, or step S634 is performed and the game ball payout process is started, the payout process is not interrupted even if an error occurs. In other words, when an error occurs, the game ball payout process is continued until a point at which the game ball can be cut well (at the time when one prize ball payout or one ball lending ends). The error bit in the error flag checked in step S621 includes an error bit indicating that the connection confirmation signal from the main board 31 has been turned off. Therefore, even when the connection confirmation signal is turned off, the game ball payout process is stopped at a time when it is best to turn it off. When an error occurs after the game ball payout process is started, the payout process may be interrupted even during the process.

  Upon confirming that the ball lending / dispensing process (ball lending operation) has been executed in step S653, the payout control CPU 371 confirms whether or not the value of the unlapped ball lending number counter is 0 (step S657). . If it is 0, it is determined that the ball lending / dispensing process is normally completed, and the process proceeds to step S655.

  If the value of the ball lending unpaid number counter is not 0 and the payout ball detection bit is not set (step S658), the game ball is not paid out even if the payout process is executed (payout). As the number count switch 301 has not detected a game ball), the payout case error bit of the error flag is set (step S659), and the process is terminated.

  As described above, if no game balls are paid out even if a payout operation is performed in the payout process related to the ball lending process, the payout count switch non-passing error bit (payout) is assumed as a game ball payout operation failure. Case error bit) is set.

  FIG. 46 is a timing chart for explaining the ball biting detection process executed in the payout motor control process (step S753). In the payout motor constant speed process (step S524) in the payout motor control process, the payout control CPU 371 monitors the detection signal of the payout motor position sensor 295. The detection signal of the payout motor position sensor 295 is turned on twice, for example, every time the cam that rotates in conjunction with the payout motor 289 rotates once. In order for the detection signal to be output twice each time the cam rotates once, the cam has two locations in the portion that receives light from the light emitting portion in the payout motor position sensor 295 (positions symmetrical with respect to the axis). Is provided with a reflector. The output of the light receiving unit in the dispensing motor position sensor 295 is used as a detection signal.

  Therefore, even if the payout control CPU 371 gives an excitation pattern having a step number of 1/2 rotation or more to the payout motor 289, the detection signal of the payout motor position sensor 295 does not turn on. Actually, the payout motor 289 does not rotate due to foreign matter such as dust adhering to the cam portion and the like, and the game ball is clogged (ball biting has occurred). As a result, the cam rotates. It can be judged that it is not.

  In this embodiment, when the payout motor 289 receives an excitation pattern for 16 steps (2.087 ms per step), it makes one rotation and pays out one game ball. Then, the payout control CPU 371 checks the detection signal of the payout motor position sensor 295 every time the payout control CPU 371 gives an excitation pattern for 8 steps to the payout motor 289, and the payout motor 289 rotates. It is determined whether or not. Then, if the same state is detected five consecutive times (the detection signal of the dispensing motor position sensor 295 is OFF for five consecutive times or ON for five consecutive times), it is determined that ball engagement has occurred. A ball biting release process is executed.

  As shown in FIG. 47, the payout control CPU 371 repeats a process of rotating the payout motor 289 at a high speed and a process of rotating at a low speed a predetermined number of times (for example, 9 times) as shown in FIG. Each time an excitation pattern for 8 steps is given to the payout motor 289, the detection signal of the payout motor position sensor 295 is checked to determine whether the payout motor 289 is rotating. If it is determined by the detection signal that the rotation of the payout motor 289 has been restored, the ball biting release processing is terminated and the normal ball payout processing is returned to.

  If no change occurs in the detection signal of the payout motor position sensor 295 even if the process of rotating at a high speed and the process of rotating at a low speed are performed a predetermined number of times, a ball biting error bit (payout case error bit) in the error flag Set. When the payout case error bit is set, the payout control CPU 371 does not drive the payout motor 289. When the payout case error bit is reset (see step S807 in FIG. 49), the payout control CPU 371 returns to a state in which the payout motor 289 can be driven.

  Thus, the payout control means includes a drive state monitoring means for monitoring the operating state of the payout means, and a drive stop means for stopping the driving of the payout means when the drive state monitoring means detects a malfunction of the payout means. Including.

  Next, error processing will be described. FIG. 48 is an explanatory diagram showing the relationship between the type of error and the display of the LED 374 for error display. As shown in FIG. 48, when the connection confirmation signal from the main board 31 is turned off, the payout control CPU 371 displays “1” on the error display LED 374 as a main board non-connection error. I do. When the disconnection of the payout count switch 301 or a ball clogging occurs at the payout count switch 301, the error display LED 374 is controlled to display “2” as the payout switch abnormality detection error 1. The disconnection of the payout number count switch 301 or the occurrence of ball clogging in the payout number count switch 301 is determined by the detection signal of the payout number count switch 301 not being turned off.

  When the detection signal of the payout number count switch 301 is turned on even though the game ball is not paying out, a control for displaying “3” on the error display LED 374 as a payout switch abnormality detection error 2 is performed. Do. If the detection signal of the payout count switch 301 does not turn on despite the rotation abnormality of the payout motor 289 or the game ball being paid out, “4” is displayed on the error display LED 374 as a payout case error. Control. The specific method for detecting that the detection signal of the payout number count switch 301 is not turned on is as described above. When the prize ball REQ signal is turned on at an improper timing or when the prize ball REQ signal is turned off at an improper timing, “5” is displayed in the error display LED 374 as a prize ball REQ signal error. Control to display. A specific method for detecting that the prize ball REQ signal is turned on or off at an incorrect timing is as described above.

  In addition, when the lower pan is full, that is, when the full switch 48 is turned on, control is performed to display “6” on the error display LED 374 as a full error. When the supply ball is insufficient, that is, when the ball break switch 187 is turned on, control is performed to display “7” on the error display LED 374 as a ball break error.

  Further, when the VL signal from the card unit 50 is turned off, control is performed to display “8” on the error display LED 374 as a prepaid card unit unconnected error. When communication with the card unit 50 is performed at an improper timing, control is performed to display “9” on the error display LED 374 as a prepaid card unit communication error. The prepaid card unit communication error is detected in the prepaid card unit control process (step S754).

  Among the above errors, after a payout switch abnormality detection error 2, a payout case error, or a prize ball REQ signal error occurs, when the error release switch 375 is operated and an operation signal is output from the error release switch 375 (in the ON state) The payout control means returns to the state before the error occurred.

  49 and 50 are flowcharts showing the error process in step S757. In the error processing, the payout control CPU 371 checks the error flag, and the set bits are only payout switch abnormality detection error 2, payout case error and prize ball REQ signal error (any one of the three). It is confirmed whether it is only a bit, or only two bits out of three, or only these three bits (step S801). If only those bits are set, it is confirmed whether or not the operation signal is turned on from the error release switch 375 (step S802). When the operation signal is turned on, the error recovery time is set in the pre-error recovery timer (step S803). The error recovery time is the time from when the error release switch 375 is operated until the actual return from the error state to the normal state.

  If the operation signal from the error release switch 375 is not on, the value of the timer before error recovery is confirmed (step S804). If the value of the timer before error recovery is 0, that is, if the timer before error recovery is not set, the process proceeds to step S808. If the pre-error recovery timer is set, the value of the pre-error recovery timer is decremented by -1 (step S805). If the pre-error recovery timer value becomes 0 (step S806), the payout switch of the error flag is set. The bits of the abnormality detection error 2, the payout case error and the prize ball REQ signal error are reset (step S807), and the process proceeds to step S808.

  When the processing of step S807 is executed, there may be an error bit that is not in the set state among the bits of the payout switch abnormality detection error 2, the payout case error, and the prize ball REQ signal error. There is no problem resetting error bits that are not in the state. As described above, in this embodiment, when an error (see FIG. 48) that causes the setting of the payout switch abnormality detection error 2, the payout case error, or the prize ball REQ signal error bit occurs, an error occurs. The error is released when the release switch 375 is pressed.

  In this example, even in the error state, the processes in steps S601 to S606 shown in FIG. 42 are executed. That is, even when an error relating to payout occurs, if the game ball passes the payout number count switch 301, the value of the award ball unpaid number counter or the ball lending unpaid number counter is subtracted. Therefore, the value of the award ball unpaid number counter or the ball lending unpaid number counter when returning from the error state is a value reflecting the number of game balls actually paid out. That is, even if an error related to payout occurs, the number of game balls actually paid out can be accurately managed. Even when an error relating to payout occurs, if the game ball passes the payout number count switch 301 and the game ball passed through is a prize ball, the prize ball count signal is kept on for a predetermined period. That is, even if an error related to payout occurs, it is possible to perform control for notifying that the winning ball has been paid out, and to notify the player or the like of paying out the winning ball. Even when an error relating to payout has occurred, the game control microcomputer 560 can recognize that the game ball has passed the payout number count switch 301 by the prize ball count signal, Management can be performed reliably.

  Even when it is confirmed that the game ball has passed through the payout count switch 301 during the error state, the payout case error bit is not reset. The bit of the payout case error is reset only when the error release switch 375 is operated (specifically, when an error return time after operation has elapsed) (steps S802 and S807). That is, the state of the payout case error (payout shortage error) is not automatically canceled based on the fact that the game ball has passed the payout number count switch 301, etc. The error is not cleared. Therefore, the game store clerk and the like can surely recognize that a shortage of payout has occurred.

  When the error cancel switch 375 is operated so as to be reset in hardware (reset to the payout control CPU 371), the error cancel switch 375 is operated, for example, a prize ball has not been paid out. The value of the number counter is also cleared. However, in this embodiment, since the payout control means is configured to perform the re-payout operation again by operating the error release switch 375, the payout process is executed reliably, which is disadvantageous to the player. Can not be given.

  Although not shown in FIG. 49, after a predetermined error bit is reset in step S807, processing for setting the value of the payout control code to 0 is executed. By such processing, the game ball payout process is executed again from the beginning, and the game ball is paid out reliably.

  In step S808, the payout control CPU 371 checks the detection signal of the full tank switch 48. If the detection signal of the full tank switch 48 is output (if it is in the ON state), the full tank error bit in the error flag is set (step S809). If the detection signal of the full tank switch 48 is in the OFF state, the full tank error bit is reset (step S810).

  Also, the payout control CPU 371 checks the detection signal of the ball break switch 187 (step S811). If the detection signal of the ball break switch 187 is output (if it is on), the ball break error bit in the error flag is set (step S812). If the detection signal of the ball break switch 187 is OFF, the ball break error bit is reset (step S813). When the ball break error bit is set, the bit corresponding to the ball break LED 52 in the output port 1 buffer is set to a value corresponding to the lighting state in the display control process of step S759.

  Further, as shown in FIG. 50, the payout control CPU 371 checks the state of the connection confirmation signal from the main board 31 (step S815). If the connection confirmation signal is not output (if it is in the off state), The main board unconnected error bit is set (step S816). If the connection confirmation signal is output (if it is on), the main board non-connection error bit is reset (step S817).

  Further, the payout control CPU 371 checks the value of the switch timer corresponding to the payout number count switch 301 among the switch timers in which the state of the detection signal of each switch is set, and the value is the switch on maximum time (for example, “ 240 ") (step S818), the bit of the payout switch abnormality detection error 1 is set in the error flag (step S819). If the value of the switch timer corresponding to the payout number count switch 301 is less than the switch-on maximum time, the bit of the payout switch abnormality detection error 1 is reset (step S820). Note that the value of each switch timer is incremented by 1 when the state of the input port to which the detection signal of each switch is input is switched on in the input determination process of step S751, and cleared by 0 when it is off. Accordingly, the fact that the value of the switch timer corresponding to the payout number count switch 301 exceeds the switch on maximum time means that the payout number count switch 301 is in the on state exceeding the switch on maximum time. Then, it is determined that the game ball is clogged at the disconnection of the payout number count switch 301 or at the portion of the payout number count switch 301.

  Further, the payout control CPU 371, when the value of the switch timer corresponding to the payout number count switch 301 becomes a switch-on determination value (eg, “2”) (step S821), the ball lending operation flag and the winning ball operation If both the middle flags are in the reset state, the game ball passes through the payout number count switch 301 even when the payout operation is not in progress, and the bit of the payout switch abnormality detection error 2 is set in the error flag (steps S822 and S823). .

  Further, the payout control CPU 371 checks the input state of the VL signal from the card unit 50 (step S825). If the VL signal is not input (if it is in the OFF state), the prepaid card unit not yet out of the error flags is displayed. A connection error bit is set (step S826). If the VL signal is input (if it is on), the prepaid card unit unconnected error bit is reset (step S827).

  Further, the payout control CPU 371 checks the state of predetermined error bits (in this example, full error bit, ball out error bit, main control unconnected error bit) in the error flag (step S828a), and the predetermined error If any of the error bits is set, the payout error signal is turned on (step S828b). If all the predetermined error bits are in the reset state, the payout error signal is turned off (step S828c). When the payout error signal is turned on, the game control microcomputer 560 executes an error notification process (see step S24b).

  In the display control process in step S759, notification by display (numerical value display) corresponding to the error bit in the error flag is performed by the error display LED 374.

  In this embodiment, the main board unconnected error is automatically eliminated when the connection confirmation signal is turned on (see steps S815 and S817), but the condition that the error cancel switch 375 is further operated is added. Thus, the error state may be eliminated.

  In this embodiment, a communication error is reported so as to be distinguishable from a communication error with the card unit 50 (a prepaid card unit non-connection error and a prepaid card unit communication error) and other errors (see FIG. 48). ). Therefore, a communication error between the game control unit and the payout control unit is easily identified.

  In this embodiment, the error display LED 374 mounted on the payout control board 37 installed on the back side of the gaming machine is informed that an error relating to the payout has occurred. You may mount an alerting | reporting means in other locations (For example, the payout unit in which the ball payout apparatus 97 etc. were concentratedly arranged). Furthermore, you may make it alert | report by the indicator installed in the front side of the gaming machine. If an error is notified by a display device installed on the front side of the gaming machine, the game shop clerk can more easily recognize the occurrence of the error. Moreover, you may use together the alerting | reporting by error display LED374, and the alerting | reporting by the indicator installed in the front side of the gaming machine.

  FIG. 51 is a flowchart showing the display control process (step S759). In the display control process, the payout control CPU 371 sets the ball break LED output bit in the output port 1 buffer (step S572) when the ball break error bit is set in the error flag (step S571). If the ball break error bit is not set, the ball break LED output bit in the output port 1 buffer is reset (step S573). Note that the contents of the output port 1 buffer are output to the output port 1 in the output process of step S760.

  Further, the payout control CPU 371 loads an error flag (step S574), determines an error code (7SEG display code; see FIG. 48) corresponding to the error bit in the error flag (step S575), and determines the determined error code. The output port 2 is set in the output buffer (step S576).

  Next, the operation of the effect control means mounted on the effect control board 80 will be described. FIG. 52 is a flowchart showing main processing executed by the effect control CPU 101. In the main process, an initialization process is first performed for clearing the RAM area, setting various initial values, initializing a 4 ms timer for determining the display control activation interval, and the like (step S321). Thereafter, the effect control CPU 101 proceeds to a loop process for checking the timer interrupt flag (step S322). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the interrupt processing. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S323), and executes the following effect control process.

  In this embodiment, the timer interrupt takes every 4 ms. That is, the effect control process is started every 4 ms. In this embodiment, only the flag is set in the timer interrupt process, and the specific effect control process is executed in the main process, but the effect control process may be executed in the timer interrupt process.

  In the effect control process, the effect control CPU 101 first executes a command analysis process (step S324) for analyzing the received effect control command, and a counter update process for updating the count value of the counter for generating a random number (step S324). S325). Then, the effect control CPU 101 executes effect control process processing (step S326). In the effect control process, a process corresponding to the current control state is selected and executed from among the processes corresponding to the control state.

  Next, the production control CPU 101 checks whether or not a V blank interrupt has occurred (step S327). Whether or not a V blank interrupt has occurred is confirmed based on an interrupt signal output from the VDP 109 at the start of the V blank. The V blank is the display of the image developed in the display area (not shown) of the VRAM on the display screen of the variable display device 9, and then the image developed next in the display area of the VRAM is displayed on the variable display device 9. This is the period until display starts on the display screen. The VDP 109 outputs an interrupt signal to the effect control CPU 101 at the start of the V blank and issues a V blank interrupt. For example, when an image of 30 frames is displayed per second, a V blank interrupt is applied approximately every 33 ms.

  The effect control CPU 101 includes an interrupt terminal for receiving an interrupt signal from the VDP 109. When the input level of the interrupt terminal falls to a low level, the effect control CPU 101 detects the occurrence of a V blank interrupt as an external interrupt. For example, as shown in FIG. 53, when the production control CPU 101 detects the occurrence of the V blank interrupt, it sets a flag indicating the presence of the V blank interrupt in the register (step S331).

  When there is a V blank interrupt, the effect control CPU 101 executes an image development instruction control process as an interrupt process (step S328). In the image expansion instruction control process, the effect control CPU 101 executes control for instructing the VDP 109 to expand the image data displayed on the display screen of the variable display device 9 to the display area of the VRAM. Note that the VDP 109 develops image data in the display area of the VRAM in accordance with an instruction from the effect control CPU 101. The VDP 109 creates an image signal based on the image data in the display area, outputs the image signal to the variable display device 9, and displays an image frame on the display screen of the variable display device 9. As described above, since a V blank interrupt is generated every 33 ms, the image frame is updated once every 33 ms.

  If there is no V blank interrupt, the process returns to the process of checking the timer interrupt flag in step S702. Even after the image development instruction control process is executed, the process returns to the process of checking the timer interrupt flag in step S702.

  In this embodiment, in the V blank interrupt processing, only flag setting (setting with V blank interrupt) is performed, and specific image development instruction control processing and command transmission processing are executed in the main processing. The image development instruction control process and the command transmission process may be executed by an interrupt process.

  In this embodiment, in the command analysis process (step S324), whether or not the effect control CPU 101 stores the received command (the effect control command from the game control board 31) in the command reception buffer provided in the RAM. If the received command is stored in the command reception buffer, the received command is read from the command reception buffer. Then, the effect control CPU 101 determines the content of the read reception command. When it is determined that the received command is a prize ball payout confirmation designation command, the effect control microcomputer 101 executes a process for notifying the player that one prize ball has been paid out. In this embodiment, as described with reference to FIG. 20, the effect control CPU 101 controls the driving (lighting) of the prize ball lamp 51 in response to receiving the prize ball payout confirmation designation command. Is output to the frame-side lamp driver substrate 35 to execute control for lighting the prize ball lamp 51 for a predetermined period (for example, 0.5 seconds).

  Further, when it is determined that the received command is an error occurrence notification command, the effect control CPU 101 executes a process for notifying a player or the like that a predetermined error state has occurred. Specifically, the effect control CPU 101 sets an error notification in-execution flag indicating that an error occurrence notification process is being executed. When the error notification execution flag is set, the flag is first checked in the effect control process (step S326), the image development instruction control process (step S328), etc., and the execution of these processes is stopped. . Further, when the CPU 101 for effect control is currently controlling image display such as variable display for the VDP 109, the current control state is saved (backed up) in a predetermined area of the RAM. Then, the effect control CPU 101 uses the VDP 109 to display error data in the display area of the VRAM in order to display an error display on the display screen of the variable display device 9 based on the received error occurrence notification command. Executes the control for instructing the deployment of The production control CPU 101 executes such control when the lamp / LED is blinked or a sound effect is emitted from the speaker 27 in order to notify the player or the like of the occurrence of the error state. Control signal (command signal) is output to the frame side lamp driver board 35 and the voice control board 70.

  Further, when it is determined that the received command is an error release notification command, the effect control CPU 101 executes a process for notifying the player or the like that the error state has been released. Specifically, the CPU 101 for effect control erases the error display displayed on the display screen of the variable display device 9, and in the variable display device 9 based on the control state stored in a predetermined area of the RAM. In order to restart the image display from the display state before the error display, the control for instructing the VDP 109 to expand the image data in the display area of the VRAM is executed. The production control CPU 101 executes such control when the lamp / LED blinks or the sound effect is emitted from the speaker 27 in order to notify the player or the like that the error state has been released. A control signal (command signal) for causing the signal to be output is output to the frame side lamp driver board 35 and the voice control board 70. The effect control CPU 101 resets the error notification in-execution flag when executing a process for notifying the player or the like that the error state has been canceled using an effect device such as the variable display device 9. When the error notification execution flag is reset, the effect control process (step S326), the image development instruction control process (step S328), and the like are resumed.

  If the received command is not a prize ball payout confirmation designation command, an error occurrence notification command, or an error release notification command, the effect control CPU 101 performs an effect control process process (step S326) or an image expansion instruction according to the received reception command. This is executed in the control process (step S328).

  As described above, in the above-described embodiment, the payout number count switch 301 for detecting the payout of the game ball without distinguishing the winning ball and the lending ball is provided, and the detection output of the payout number count switch 301 is the payout control means. The payout control means determines whether the payout of the winning ball or the payout of the lending ball is detected when the detection signal from the payout number counting switch 301 is input. When it is determined that the prize ball count signal is transmitted to the game control means, the game control means can more reliably manage the number of prize balls that have not been paid out. Since one payout count switch 301 detects both a prize ball payout and a lending ball payout, the number of parts can be reduced and the cost of the gaming machine can be reduced. With the results.

  Further, in the above-described embodiment, when the detection output of the payout number count switch 301 is input only to the payout control means, and the payout control means inputs a detection signal based on the detection of award ball payout from the payout number count switch 301. In addition, since the award ball count signal is transmitted to the game control means, the detection signal from the count switch that detects the award ball payout is branched and input to the game control means and the payout control means. Unlikely, the detection signals input to the game control means and the payout control means are less likely to be distorted due to the influence of noise or the like, and the game control means and the payout control means recognize the prize ball payout detection. The difference is prevented.

  Further, in the above-described embodiment, the payout control means detects the winning ball payout when the detection signal from the payout number count switch 301 is input even in an error state where the payout of the game ball is stopped. When it is determined that there is a prize ball, a prize ball count signal is transmitted to the game control means, so that a prize ball count signal indicating that a payout of the prize ball has been detected can be reliably transmitted to the game control means. .

  Further, in the above-described embodiment, the payout control means receives the detection signal from the payout number count switch 301 when the award ball is not paid out or the lending ball is not paid out. Since the award ball count signal is transmitted to the game control means as being a prize ball, the award ball count signal can be transmitted to the game control means even when an invalid gaming ball is paid out. Can be processed appropriately.

  In the above-described embodiment, the game control means is configured to subtract the number of payouts specified by the payout command signal regardless of whether or not a prize ball count signal is received, so that it is stored in the total prize ball number storage buffer. It is possible to reduce the control burden of the game control means for executing the subtraction process of the number of prize balls that has been performed.

  In the above-described embodiment, after the payout command signal is transmitted as described above, the signal indicating the completion of the payout process from the payout control board 37 side is received in the total winning ball number storage buffer regardless of whether or not the signal is received. The subtraction process for the number of prize balls stored is executed, and the game control means does not accurately manage the number of unpaid prize balls, but the game control means transmits a payout command signal. After that, in response to receiving the prize ball count signal, the subtraction process for subtracting the number of payouts confirmed to be actually paid out from the number of prize balls stored in the total prize ball number storage buffer is performed. Also good. In this case, each time the game control means receives the prize ball count signal, the game control means may subtract one from the prize ball number stored in the total prize ball number storage buffer. If the configuration is such that the number of unpaid prize balls is managed by bidirectional communication between the game control means and the payout control means as described above, in the game control means based on the prize ball count signal from the payout control means. The number of unpaid prize balls can be managed accurately. In other words, if the management of the number of unpaid balls is not performed using the prize ball count signal, the management of the number of unpaid balls is performed by one-way communication. There is a problem that the number of unpaid prize balls ascertained in the means is not always accurate. As described above, if the configuration is such that the game control means manages the number of unpaid balls in the game control means as described above, the number of unpaid balls can be subtracted when the game is actually paid out. The number of unpaid prize balls can be managed accurately.

  Further, when the configuration is such that the management of the number of unpaid balls has been accurately performed as described above, the number of times corresponding to the number of payouts specified by the payout command signal after the game control means has transmitted the payout command signal. The payout command signal for instructing the next prize ball payout may not be transmitted until the prize ball count signal is received. Specifically, when the game control means transmits a payout command signal instructing the payout of seven prize balls, the game control means receives the prize ball count signal seven times, and then instructs the next prize ball payout. The payout command signal may be transmitted. According to the above configuration, it is possible to prevent the payout command signal transmitted from the game control means to the payout control means and the prize ball count signal transmitted from the payout control means to the game control means from competing. Can do. Therefore, in the payout control means and the game control means, it is possible to prevent the control signal (payout command signal, prize ball count signal) from being lost.

  Further, the payout control means transmits a command acceptance signal indicating that the payout command signal transmitted from the game control means has been received to the game control means, and the game control means accepts the command acceptance transmitted from the payout control means. When the signal is received, the winning ball number stored in the total winning ball number storage buffer may be subtracted. Here, the command acceptance signal corresponds to an acceptance confirmation signal for the payout command signal, and is also referred to as a prize ball BUSY signal. Even in such a configuration, the number of unpaid prize balls can be centrally managed by the game control means. With such a configuration, after the game control means transmits a payout command signal and before receiving the command acceptance signal, that is, when the power interruption occurs before executing the award ball number subtraction process, the power supply is resumed. Since the payout command signal is transmitted again, it is possible to prevent the number of prize balls to be paid out from becoming smaller than the number to be paid out.

  Further, in the above-described embodiment, the game control microcomputer 560 is based on the input state of the state signal indicating the output state of the VL signal transmitted from the photocoupler 151 to the payout control microcomputer 370, and the firing motor 94. Since the input state of the launch motor drive signal for driving the launch motor 94 is controlled, the game control microcomputer 560 controls the drive of the launch motor 94 based on the state signal input state. be able to. That is, when the game control microcomputer 560 detects that the VL signal is not transmitted by the photocoupler 151, the driving of the firing motor 94 can be stopped.

  Further, in the above-described embodiment, when the lower pan full state is detected by the full switch 48 and the full signal is output, the state signal input to the game control microcomputer 560 is the VL signal. Since the game control microcomputer 560 only monitors the input state of the state signal, the firing motor is in the full state of the lower dish. 94 can be stopped. In other words, even if the game control microcomputer 560 does not separately monitor the output state of the full signal, if the input state of the state signal is monitored, the game control microcomputer 560 appropriately determines whether or not the launching means may be driven. Judgment can be made. In this way, by monitoring one signal, it is possible to perform launch control based on the state of a plurality of signals, so the control burden is reduced.

  In the above-described embodiment, the output of the AND circuit 155 in which the full signal and the VL signal are connected to the input side is used as the status signal. However, as shown in FIG. The full signal and the VL signal transmitted by the photocoupler 151 may be branched on the payout control board 37 and input to the game control microcomputer 560, respectively. In this case, the full signal and the VL signal input to the game control microcomputer 560 may be handled as status signals. If comprised in this way, it can distinguish and alert | report whether it became the discharge disapproval state because it became the lower pan full state, or it was set as the discharge disapproval state because the VL signal became the stop state. become. In the case of the above configuration, as shown in FIG. 55, the VL signal transmitted by the photocoupler 151 may be input to the game control microcomputer 560 via the launch board 90.

  In the embodiment described above, the game control means is configured to execute processing for turning on the prize ball lamp 51 in response to reception of the prize ball count signal. Even if it is not controlled by this, it is possible to notify the player or game store clerk that the prize ball has been paid out or that the game ball that has been paid out is a prize ball. In the above example, as a process for turning on the prize ball lamp 51, a process for transmitting a prize ball payout confirmation designation command to the effect control board 80 is executed. When receiving the prize ball payout confirmation designation command, the effect control CPU 101 of the effect control board 80 executes control for lighting the prize ball lamp 51 for a predetermined period. However, the game control means may control the prize ball lamp 51, and the game control means may execute a driving process for turning on the prize ball lamp 51 in response to reception of the prize ball count signal. . Further, it may be notified that a prize ball has been paid out by a light emitter other than the prize ball lamp 51 or a display device.

  In the above-described embodiment, the payout control means transmits a payout error signal to the game control means when the bottom pan full or an out of ball error occurs (turns on). It is possible to make the game control means recognize that an error relating to the payout of the ball has occurred.

  In the embodiment described above, the game control means transmits an error occurrence notification command for notifying the occurrence of an error to the effect control means in response to receiving the payout error signal from the payout control means. Thus, it is possible to cause the effect control means to perform a process of notifying the occurrence of an error, and to make the player easily recognize the occurrence of the error.

  In the above-described embodiment, the game control means transmits the payout command signal to the payout control means even when the game control means receives the payout error signal from the payout control means. When the payout error signal is received, the payout command signal may not be transmitted to the payout control means. Specifically, before executing the process of step S251 in the prize ball transmission process shown in FIG. 29, the game control means confirms whether or not a payout error signal has been received from the payout control means, and payout error If a signal is received, the processing after step S251 is not executed. According to such a configuration, it is possible to reduce the possibility that a payout command signal is missed in the payout control means.

  In the above-described embodiment, the game control means transmits a firing non-permission state notification command for notifying that the fire is not permitted, to the effect control means, in response to detecting that the state signal is turned off. Therefore, it is possible to cause the effect control means to perform a process of notifying that the launch is not permitted, and it is possible for the player to easily recognize that the launch is not permitted.

  In the above-described embodiment, the production control microcomputer 100 of the production control board 80 not only controls the display state of the variable display device 9, but also sends control signals to the frame side lamp driver board 35 and the audio control board 70. To control the lighting / extinguishing of the lamp / LED and the sound output of the speaker 27. However, the present invention is not limited to this configuration, and the frame side lamp driver board 35 and the voice control board 70 are each provided with a lamp control microcomputer and a voice control microcomputer, and the stage control microcomputer responds to the stage control command. The control command and the voice control command are transmitted to the lamp control microcomputer and the voice control microcomputer, respectively, and the lamp / LED is turned on / off and the voice output of the speaker 27 is sent to the lamp control microcomputer and the voice control microcomputer. You may make it perform.

  Further, in the above-described embodiment, when the error bit is set due to occurrence of a ball-out condition, a full-bottom-plate condition, etc. (step S621), step S622 and subsequent steps of the payout start waiting process (see FIG. 43) Is not executed and the game ball payout process is not executed, so that it is possible to prevent the game ball payout process from being executed in an abnormal state. . Therefore, it is possible to prevent a situation in which the game balls are not paid out effectively, for example, a situation in which the ball payout device 97 is unable to pay out the game balls even if the ball payout device 97 tries to pay out the game balls due to a shortage of the ball or a full lower tray.

  In the above embodiment, the payout control means confirms that the game ball has been paid out based on the detection signal of the payout count switch 301, but the game ball is based on the output signal of the payout motor position sensor. You may make it confirm that was paid out.

  In the above embodiment, the ball payout device 97 has a configuration capable of executing both ball lending and prize ball payout. However, even if the mechanism that lends the ball and the mechanism that pays out the prize ball are independent, The invention can be applied.

  In the above embodiment, a signal from the main board 31 to the peripheral board is output to each peripheral board via the central relay board 77. The main board 31 is provided with signal direction restricting means for preventing signal input from the centralized relay board 77 (see FIG. 8). Further, the central relay board 77 is provided with signal direction regulating means for preventing signal input from the peripheral board (see FIG. 8). Furthermore, in an electrical component control board equipped with a microcomputer that inputs a signal from the main board 31 and does not send a signal to the main board 31, the signal is input from the central relay board 77 to the central relay board 77. Signal direction restricting means for preventing signal output is provided (for example, the input buffer circuit 102 shown in FIG. 9).

  Since the signal from the main board 31 to each peripheral board is concentrated on the central relay board 77 and the signal output from the main board 31 to the central relay board 77 is provided with signal direction regulating means, the main board It is possible to effectively prevent the input of an illegal signal that illegally generates a big hit with respect to 31.

  In the above embodiment, the presentation control board 80 is exemplified as an electric component control board on which a microcomputer that inputs signals from the main board 31 and does not send signals to the main board 31 is used. If there is another electrical component control board on which a microcomputer that does not send signals to the main board 31 is input, the signal from the main board 31 also passes through the centralized relay board 77 for that board. In addition, a signal direction regulating means for preventing signal output to the central relay board 77 is provided at a portion where a signal is input from the central relay board 77.

  By adopting the configuration as described above, there is a suspicious point in the operation of the gaming machine and an illegal act (an act of inputting a signal causing an illegal big hit to the main board 31, for example, a peripheral board or a board) In the case where it is suspected that an illegal board is connected to the cable between them, it is only necessary to examine the central relay board 77 other than the main board 31. Even if an illegal signal is sent to the central relay board 77 in order to send an illegal signal to the main board 31, the signal is sent to the main board 31 side by the signal direction regulating means mounted on the central relay board 77. This is because the signal transmission is blocked.

  In addition, since only one centralized relay board 77 needs to be investigated, the number of targets that can be fraudulent can be reduced particularly compared to the case where a large number of relay boards are provided. The investigation time can be shortened compared with the case where the relay boards are arranged in cascade. Further, when the central relay board 77 is inspected, it is easy to investigate that the front and back surfaces of the central relay board 77 can be easily seen from the outside of the board box. Further, the substrate box for storing the central relay substrate 77 has a structure that cannot be easily opened, and when it is opened, it is easily grasped. Therefore, it is easy to find fraudulent acts performed on the central relay board 77.

  In the above embodiment, one central relay board 77 is provided for all peripheral boards, but a plurality of relay boards may be provided in parallel. For example, one relay board may be provided for each peripheral board or for several peripheral boards (not all peripheral boards). In such a case, there is a possibility that the investigation time for fraud may be longer, but there is a merit that it is easy to route the wiring inside the gaming machine.

  In the above embodiment, the central relay board 77 is firmly stored in the board box and cannot be easily detached from the gaming machine. However, instead of using a one-way screw, a general screw is used. A simple fixing method such as fixing with, for example, may be used. In that case, the central relay board 77 is removed from the gaming machine using a screwdriver (driver) as a jig or a coin. Even when a simple fixing method is used, since the front and back surfaces of the central relay board 77 can be easily visually recognized from the outside of the board box, the central relay board 77 can be easily investigated.

  Thus, it is preferable that the central relay board 77 is detachably mounted from the gaming machine by using a predetermined jig (such as a screwdriver or a cutting tool). This is because the central relay board 77 cannot be easily removed, and illegal acts against the central relay board 77 can be prevented.

  Further, as described above, when the central relay board 77 is removed from the gaming machine, it is more preferable that the central relay board 77 is mounted on the gaming machine so that it cannot be mounted (for example, with a one-way screw) in the same manner as the mounting mode before removal. This is because it can be easily recognized that the central relay board 77 has been illegally removed.

  In the above embodiment, the game control means on the main board 31 controls the light emitters provided on the game board 6, but the light emitters provided on the game board 6 are controlled by the game. Even if it is configured to be controlled by a control means other than the means (for example, a production control means or a microcomputer other than the production control microcomputer that controls the light emitter in the game machine), The invention can be applied.

  In the above embodiment, the signal from the main board 31 is routed through the centralized relay board 77, but the peripheral board for the payout control board 37 (the signal is input from the payout control board 37) from the payout control board 37. Each signal output to the circuit board) may be routed through a single relay board on which a unidirectional circuit that passes only in the direction from the payout control main board 37 to the peripheral board is mounted. For example, when a ball-out lamp indicating that the supply ball is out of control is controlled by a dispensing control microcomputer mounted on the dispensing control board 37, those lamps or those lamps are mounted. Each signal including a signal to the board may be routed through one relay board. In such a configuration, as in the prevention and investigation of fraud on the main board 31, it is ensured that the fraud signal is input to the payout control board 37 so that the game ball is illegally paid out. It can be prevented and it becomes easy to investigate whether or not fraudulent activity has been made. Further, as in the case of the main board 31, a plurality of relay boards may be installed in parallel as the relay boards with respect to each peripheral board or a plurality of peripheral boards.

  In the above-described embodiment, the design control board 80 performs the special symbol display control. However, the main board 31 may perform the special symbol display control. In this case, a special symbol display for displaying a special symbol is provided, the main board 31 controls the special symbol display, and the symbol control board 80 controls the variable display device 9 to perform display control of the decorative symbol. That's fine. As the special symbol display, for example, a 7-segment display is used, and the special symbol represented by one or more digits is variably displayed.

  In each of the above embodiments, different expressions such as transmission / reception and output / input are used for the exchange of various signals, but transmission and output or reception and input are used in substantially the same meaning. Needless to say, these expressions are interchangeable. In addition, the transmission / reception of signals having many meanings such as control commands is made transmission / reception, and the transmission / reception and output / input are made of transmission / reception of signals for transmitting information by switching on / off. There are also cases where they are used properly. Even in this case, these expressions are interchangeable.

  In each of the above embodiments, the on / off state of the signal may be a high level state / low level state, and conversely may be a low level state / high level state.

  Note that the pachinko gaming machine of each of the above embodiments mainly has a predetermined game value when the stop symbol of the special symbol variably displayed on the variable display portion 9 based on the start winning is a combination of the predetermined symbols. It is a first type pachinko gaming machine that can be granted to the player, but if there is a winning in a predetermined area of the electric game that is released based on the start winning, the second type that can be given a predetermined gaming value to the player A third type in which a predetermined right is generated or continued if there is a prize for a predetermined electric combination that is released when a stop symbol of a symbol that is variably displayed based on a start winning prize is a combination of a predetermined pattern The present invention can be applied even to a pachinko gaming machine. Furthermore, the present invention can be applied to a slot machine as long as it has a configuration including a main board and a payout control board.

  The present invention can be applied to games such as pachinko gaming machines, and in particular, can be applied to gaming machines in which game control means and payout control means are provided separately.

It is the front view which looked at the pachinko machine from the front. It is the rear view which looked at the gaming machine from the back. It is the front view and sectional drawing which show a ball dispensing apparatus. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the circuit structural example of a payout control board. It is a block diagram which shows the example of a circuit structure for transmitting the signal transmitted / received between a card unit and a payment control board. It is a block diagram which shows the connection state of the main board | substrates provided in the gaming machine. It is explanatory drawing which shows the components mounted in the signal output part in a main board | substrate, and the concentrated relay board | substrate. FIG. 12 is a block diagram illustrating circuit configuration examples of an effect control board, a frame side lamp driver board, and a sound control board. It is explanatory drawing which shows the example of bit allocation of the output port in a game control means. It is explanatory drawing which shows the example of bit allocation of the output port in a game control means. It is explanatory drawing which shows the bit allocation example of the input port in a game control means. It is a flowchart which shows the main process which the microcomputer for game control in a main board | substrate performs. It is a flowchart which shows a timer interruption process. It is explanatory drawing which shows the buffer used by switch processing. It is a flowchart which shows an example of a switch process. It is explanatory drawing which shows an example of the content of a control signal. It is a block diagram which shows the signal wire | line etc. which are used for transmission / reception of a control signal. It is a timing chart showing an example of how to output a prize ball number signal. It is a timing chart showing an example of how to output a prize ball count signal. It is a timing chart showing an example of how to output a payout error signal. It is a flowchart which shows the example of a discharge motor excitation pattern output process. It is a timing chart showing an example of an output state of a state signal. It is a flowchart which shows a prize ball process. It is explanatory drawing which shows the structural example of a prize ball number table. It is a flowchart which shows a prize ball number addition process. It is a flowchart which shows a prize ball control process. It is a flowchart which shows prize ball waiting processing 1. It is a flowchart which shows a prize ball transmission process. It is a flowchart which shows the winning ball waiting process 2. FIG. It is a flowchart which shows prize ball waiting processing 3. It is explanatory drawing which shows the example of bit allocation of the output port in a payout control means. It is explanatory drawing which shows the example of bit allocation of the input port in a payout control means. It is a timing diagram for demonstrating communication between a prepaid card unit and a game machine. It is a flowchart which shows the main process which the microcomputer for payout control performs. It is a flowchart which shows the timer interruption process which the microcomputer for payout control performs. It is a flowchart which shows a payout motor control process. It is a flowchart which shows a main control communication process. It is a flowchart which shows a prize ball REQ interruption process. It is a flowchart which shows the process during main control communication. It is a flowchart which shows a main control communication end process. It is a flowchart which shows a prize ball lending control process. It is a flowchart which shows the payout start waiting process. It is a flowchart which shows a payout motor stop waiting process. It is a flowchart which shows payout passage waiting processing. It is a timing diagram for explaining a ball biting detection process. It is a timing diagram for demonstrating a ball biting cancellation | release process. It is explanatory drawing which shows the relationship between the kind of error, and the display of LED for an error display. It is a flowchart which shows an error process. It is a flowchart which shows an error process. It is a flowchart which shows a display control process. It is a flowchart which shows the main process which the microcomputer for production control performs. It is a flowchart which shows the V blank interruption process which the microcomputer for production control performs. It is a block diagram which shows the other circuit structural example for transmitting the signal transmitted / received between a card unit and a payment control board. It is a block diagram which shows the further another circuit structural example for transmitting the signal transmitted / received between a card unit and a payment control board.

Explanation of symbols

1 Pachinko machine 31 Game control board (main board)
37 Dispensing control board 48 Full switch 56 CPU
80 Production Control Board 90 Launch Board 94 Launch Motor 97 Ball Dispensing Device 101 Production Control CPU
151 Photocoupler 301 Payout Count Switch 371 Payout Control CPU
374 LED for error display
375 Error release switch 560 Microcomputer for game control

Claims (7)

It is possible for a player to play a predetermined game by launching the game medium into the game area. Based on the fact that the game medium has won the predetermined prize area, the prize game medium is paid out as a prize. A gaming machine that pays out a rental game medium to be lent to a player based on a loan request signal from a loan request reception device that has received a loan request,
Launching means for launching the game medium toward the game area;
A game control board equipped with a game control microcomputer for executing a game control process for controlling the progress of the game;
A payout means for paying out the game medium;
An input unit to which a lending request accepting apparatus connection signal indicating that the lending request accepting apparatus is connected to a gaming machine is input, a payout control microcomputer that executes a payout control process for controlling the payout means, and A photocoupler that transmits a connection signal to the payout control microcomputer based on the input of the lending request receiving device connection signal from the lending request receiving device, and is connected between the input unit and the photocoupler. A payout control board with a capacitor mounted thereon;
A lending request relay board that relays the lending request signal from the lending request accepting device and outputs it to a payout control board;
A payout that detects a payout of a prize game medium as a free gift based on establishment of a payout condition by a game and a payout of a rental game medium based on fulfillment of a payout condition by a loan request, and outputs a detection signal to the payout control microcomputer Detecting means,
The game control microcomputer is:
State signal input means for inputting a state signal indicating an output state of a connection signal transmitted from the photocoupler to the payout control microcomputer;
Firing control means for controlling an input state of the firing control signal for driving the firing means to the firing means based on an input state of the state signal by the state signal input means;
A payout command signal for specifying the number of premium game media to be paid out together with a take-in signal for instructing to take out the payout command signal based on the establishment of the payout condition by the game. Including command signal output means,
The dispensing control microcomputer is:
A payout command signal input means for inputting the payout command signal from the payout command signal output means;
A prize game medium payout control means for executing a payout process for controlling the payout means to pay out the number of premium game media specified by the payout command signal input by the payout command signal input means;
A payout determining means for determining whether the detection signal input from the payout detecting means is a payout of the premium game medium or the rented game medium;
A count for outputting a prize game medium count signal indicating detection of payout of the prize game medium to the game control microcomputer when the detection signal is determined by the payout determination means to be the payout of the prize game medium. Signal output means;
An error state setting means for shifting a control state related to payout to an error state when a predetermined condition is satisfied;
Input state determination means for determining an input state of the connection signal transmitted from the photocoupler;
Connection error notification for executing connection error notification processing for notifying that the lending request acceptance device is not connected to a gaming machine when the input state determination means determines that the connection signal is not transmitted Processing means,
The gaming machine characterized in that the counting signal output means outputs the premium game medium counting signal even when the error state setting means has shifted to the error state. A storage state detection means for outputting a storage detection signal when it is detected that a predetermined amount or more of game media is stored in a storage unit storing the paid-out game media;
Storage that controls the state signal input state to the state signal input means to be the same as when the connection signal output state is stopped when a storage detection signal is output from the storage state detection means A detection state signal control means,
The storage detection signal is input to a payout control microcomputer,
The gaming machine according to claim 1, wherein the payout control microcomputer stops execution of payout control processing when the storage detection signal is in an input state. The game control microcomputer performs launch stop notification processing for notifying that the launch stop state is in effect when the launch control means controls the input state of the launch control signal to the launch means to the launch stop state. The gaming machine according to claim 1, comprising stop notification processing means. A prize game medium payout notification means for notifying that a prize game medium has been paid out by the prize game medium payout control means;
The game control microcomputer, in response to the input of the prize game medium count signal, causes the prize game medium payout notifying means to notify that the prize game medium has been paid out by the prize game medium payout control means. The gaming machine according to any one of claims 1 to 3. The payout control microcomputer includes a lending game medium payout control means for executing a lending process for controlling a payout means to pay out a predetermined number of lending game media based on establishment of a payout condition based on a lending request,
The payout determination means receives the detection signal from the payout detection means when neither the payout process by the prize game medium payout control means nor the lending process by the rental game medium payout control means is executed. The gaming machine according to any one of claims 1 to 4, wherein the game machine is determined to be caused by payout of a prize game medium by the prize game medium payout control means. The dispensing control microcomputer
Lending game medium number data storage means for storing lending game medium number data indicating the number of lending game media to be paid out by lending processing by the lending game medium payout control means;
The number of rented game media even when the error state setting means shifts to an error state in response to the determination by the payout determination means that the detection signal input from the payout detection means is due to payout of the rented game media The gaming machine according to claim 5, further comprising: lending game medium number data subtracting means for subtracting lending game medium number data stored in the data storage means. The game according to any one of claims 1 to 6, wherein a lending request acceptance device connection determination signal transmitted from a photocoupler is branched and input to a payout control microcomputer and a game control microcomputer. Machine.

Images