JP2006210543A - Method of evaluating plasma damage layer and method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology to detect even a plasma damage layer having a minor damage which is formed on the principal plane of a silicon substrate. <P>SOLUTION: An interlayer insulation film consisting of, for example, a silicon oxide film is formed on the silicon substrate (steps S1 and S2), and plasma etching is conducted to form a contact hole in the interlayer insulation film (step S3). The plasma etching is conducted until the silicon substrate is exposed. During the plasma etching, the plasma damage layer is formed on the principal plane of the silicon substrate. Then, the silicon substrate is oxidized (step S4) to form an oxide film on the silicon substrate. By measuring the thickness of the oxide film formed on the silicon substrate (step S5), the plasma damage layer is detected and evaluated. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a technique that is effective when applied to a method for evaluating a plasma damage layer, particularly a method for evaluating a plasma damage layer formed on a main surface of a silicon substrate by plasma treatment. The present invention relates to a semiconductor device manufacturing technique.

  In the field of semiconductor memory, flash memory is rapidly spreading. Since this flash memory is a non-volatile memory that can perform electrical batch erasure and electrical writing and does not require a data retention current, it is possible to reduce the size, weight, and power consumption of the mounted device.

  In the field of manufacturing a semiconductor device including the flash memory, the miniaturization of the semiconductor device is rapidly progressing. In particular, in miniaturization of the MIS transistor, it is necessary to realize the miniaturization and ensure the reliability of the MIS transistor. In order to improve the reliability of the MIS transistor, it is necessary that each part constituting the MIS transistor has high reliability.

  An important part of ensuring the reliability of the MIS transistor is, for example, the reliability of the contact portion that is affected by the contact hole forming method. In particular, when a contact hole is formed by plasma etching in an interlayer insulating film formed on a silicon substrate, the main surface of the silicon substrate is exposed to plasma damage by plasma etching, that is, plasma processing, in order to expose the underlying silicon substrate. A layer is formed. For this reason, after the plasma treatment, the plasma damaged layer is removed by etching such as chemical dry etching or wet etching (hereinafter referred to as “light etching”).

In Patent Document 1, in the dry etching (ion plasma etching) process that causes plasma damage, the depth of the plasma damage layer of the underlying film after etching is measured by using optical means, and the damage is based on the measurement result. There is a description for determining the processing conditions of the removal (light etching) step.
JP-A-11-87448

  As described above, in order to improve the reliability of the MIS transistor, it is necessary to completely remove the plasma damage layer (or to remove the plasma damage to the extent that the characteristics of the product after the process is not affected). It is not easy to determine the removal amount appropriately, that is, to detect and measure the plasma damage layer as it is.

  For example, when the base is a single crystal silicon substrate, the plasma damage layer formed on the main surface of the silicon substrate by plasma etching becomes polycrystalline silicon or amorphous silicon. Therefore, it is considered that a change from single crystal to polycrystalline or amorphous cannot be detected with high accuracy.

  In Patent Document 1, the damage of the underlying film immediately after etching is measured using optical means. However, immediately after etching, carbon-based polymer or the like due to etching exists on the surface of the underlying film, and the surface state is not constant. Therefore, it is considered that the measurement accuracy of the plasma damage layer is insufficient.

  In addition, by changing various light etching processing conditions to remove the plasma damage layer and measuring the electrical characteristics of the product after the semiconductor process is completed, the depth of the damage layer generated under the light etching processing conditions, etc. It is also possible to set optimum light etching processing conditions for removing the plasma damage layer from the measurement result. However, the product must be formed in order to measure the electrical characteristics. If the plasma damage layer is not removed, the product will continue to be formed until the electrical characteristics are measured. The yield of the product is reduced due to the failure due to the layer. Therefore, it is necessary to detect whether or not the plasma damage layer has been reliably removed during product completion.

  An object of the present invention is to provide a technique capable of detecting even a very slight damage plasma damage layer formed on a main surface of a silicon substrate.

  Another object of the present invention is to provide a technique capable of reliably detecting a plasma damage layer that affects the characteristics of a semiconductor device during the manufacturing process and improving the manufacturing yield of the semiconductor device.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The method for evaluating a plasma damage layer according to the present invention is a method for evaluating a plasma damage layer formed on a main surface of a silicon substrate by plasma treatment, wherein the silicon substrate is oxidized after the plasma etching, and is applied to the silicon substrate. The thickness of the formed oxide film is measured.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: (a) a step of performing plasma treatment on a main surface of a silicon substrate; (b) a step of oxidizing the silicon substrate; Measuring the thickness of the oxide film.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  By oxidizing a silicon substrate having a plasma damage layer and measuring the oxide film, even a very slight damage plasma damage layer formed on the main surface of the silicon substrate can be detected.

  In addition, by reliably detecting a plasma damage layer that affects the characteristics of the semiconductor device during the manufacturing process, the manufacturing yield of the semiconductor device can be improved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
The plasma damage layer evaluation method of the present invention will be described by applying it to a plasma damage layer formed on the main surface of a silicon substrate by plasma etching when forming a contact hole in an interlayer insulating film on the silicon substrate.

  FIG. 1 is a flowchart for detecting and evaluating a plasma damage layer. As shown in FIG. 1, first, a silicon wafer constituting a single crystal silicon substrate on which, for example, a MIS transistor is formed is prepared (step S1).

  Subsequently, an interlayer insulating film made of, for example, a silicon oxide film is formed on the main surface on the silicon substrate (step S2). This interlayer insulating film can be formed using, for example, a CVD (Chemical Vapor Deposition) method.

  Subsequently, plasma etching is performed to form a contact hole in the interlayer insulating film (step S3). This contact hole is formed by selectively removing the interlayer insulating film using a contact hole forming photoresist mask formed on the interlayer insulating film. Since this plasma etching is performed until the silicon substrate is exposed, a plasma damage layer is formed on the main surface of the silicon substrate.

  Thus, in the present invention, it is assumed that the silicon substrate is exposed by plasma etching after the formation of the interlayer insulating film. Therefore, a plasma damage layer made of polycrystalline silicon or amorphous silicon is formed on the main surface of the underlying single crystal silicon substrate by this plasma etching.

  Subsequently, the silicon substrate on which the plasma damage layer is formed is oxidized (step S4). This oxidation is, for example, thermal oxidation, and an oxide film is formed on the silicon substrate by this oxidation.

  FIG. 2 is a diagram for explaining the oxidation of the plasma damage layer formed on the silicon substrate. As shown in FIG. 2, when single crystal silicon (Si) is oxidized, the Si—Si bond is cut to form an Si—O bond. On the other hand, when, for example, polycrystalline silicon (Si) in a plasma damage layer is oxidized, a reaction in which H or OH of a Si—H or Si—OH bond is replaced with O is mainly used. For this reason, the degree of oxidation differs between single crystal silicon and polycrystalline silicon. That is, there is a difference in oxide film thickness between an oxide film formed on single crystal silicon and an oxide film formed on polycrystalline silicon or amorphous silicon. The present invention is applied to such a different degree of oxidation.

  Subsequently, as shown in FIG. 1, the plasma damage layer formed on the silicon substrate is measured (step S5). That is, in this embodiment, it is possible to evaluate how much the plasma damage layer is by measuring the oxide film thickness formed by oxidizing the silicon substrate after plasma damage. For example, when single crystal silicon and polycrystalline silicon are oxidized under the same conditions, the degree of oxidation is different as described above, so the thickness of the oxide film is greater than that of single crystal silicon. Becomes thicker. Therefore, by measuring the film thickness of the oxide film, even a very slight damage plasma damage layer (polycrystalline silicon or amorphous silicon) formed on the main surface of the silicon substrate can be detected. The extent of the plasma damage layer can be evaluated according to the thickness of the oxide film. For example, an ellipsometer can be used to measure the thickness of the oxide film.

(Embodiment 2)
A method for manufacturing a semiconductor device of the present invention will be described by applying the plasma damage layer evaluation method described in the above embodiment.

  FIG. 3 is a cross-sectional view schematically showing a main part of the semiconductor device shown in the present embodiment. As shown in FIG. 3, first, a silicon substrate (semiconductor wafer), for example, a silicon substrate 1 in which p-type impurities such as boron (B) are introduced into single crystal silicon is prepared. Note that the main surface of the silicon substrate 1 is treated with diluted hydrofluoric acid.

Subsequently, an element isolation region 4 is formed on the main surface of the silicon substrate 1. The element isolation region 4 is
For example, after forming a groove on the main surface of the silicon substrate 1 using an etching technique, a silicon oxide film is deposited using, for example, a CVD (Chemical Vapor Deposition) method so as to fill the groove, and an interlayer is formed. The surface of the insulating film is planarized using a CMP (Chemical Mechanical Polishing) method.

  Subsequently, a p-type well 5 and an n-type well 6 are formed in the silicon substrate 1. The p-type well 5 is formed, for example, by introducing a p-type impurity such as boron or boron fluoride into the silicon substrate 1 using a photolithography technique and an ion implantation method. Similarly, the n-type well 6 is formed by introducing an n-type impurity such as phosphorus (P) or arsenic (As) into the silicon substrate 1 using, for example, a photolithography technique and an ion implantation method. .

  Subsequently, a gate insulating film 2 is formed on the main surface of the silicon substrate 1. The gate insulating film 2 is formed, for example, by thermally oxidizing the silicon substrate 1.

  Subsequently, a gate electrode 3 is formed on the gate insulating film 2. For example, after the gate electrode 3 is formed of polycrystalline silicon using a CVD method, the conductive type is separately formed by using a photolithography technique and an ion implantation method, and then the photolithography technique and the dry etching are performed. It is formed by doing.

  Subsequently, a low concentration n-type impurity diffusion region 7 and a low concentration p-type impurity diffusion region 8 which are semiconductor regions are formed in the silicon substrate 1. The low-concentration p-type impurity diffusion region 8 is formed by introducing a p-type impurity such as boron or boron fluoride into the n-type well 6 in the silicon substrate 1 using, for example, a photolithography technique and an ion implantation method. Is done. Similarly, the low-concentration n-type impurity diffusion region 7 is formed by introducing an n-type impurity such as phosphorus or arsenic into the p-type well 5 in the silicon substrate 1 using, for example, a photolithography technique and an ion implantation method. It is formed.

  Subsequently, sidewalls 9 are formed on the side surfaces of the gate electrode 3 on the main surface of the silicon substrate 1. The sidewall 9 is formed, for example, by forming a silicon nitride film using a plasma CVD method and then anisotropically etching the silicon nitride film. Although the sidewall 9 is formed of a silicon nitride film, the present invention is not limited thereto, and may be formed of, for example, a silicon oxide film, a silicon oxynitride film, or a stacked film of a silicon oxide film and a silicon nitride film.

  Subsequently, a high-concentration n-type impurity diffusion region 10 and a high-concentration p-type impurity diffusion region 11 are formed in a region in the silicon substrate 1 in alignment with the sidewall 9. The high-concentration p-type impurity region 11 is formed using, for example, a photolithography technique and an ion implantation method, and a p-type impurity such as boron is introduced at a higher concentration than the low-concentration p-type impurity diffusion region 8. Similarly, the high-concentration n-type impurity diffusion region 10 is formed by using, for example, a photolithography technique and an ion implantation method, and an n-type impurity such as phosphorus or arsenic has a higher concentration than the low-concentration n-type impurity region 7. Has been introduced. Through the steps so far, the p-channel MIS transistor Qp can be formed in the n-type well 6 and the n-channel MIS transistor Qn can be formed in the p-type well 5.

  Subsequently, an interlayer insulating film 12 made of a silicon oxide film is formed on the main surface of the silicon substrate 1. The interlayer insulating film 12 can be formed using, for example, a CVD method. Thereafter, the surface of the interlayer insulating film 12 is planarized using a CMP method.

  Subsequently, a contact hole 14 is formed in the interlayer insulating film 12 by plasma etching. The contact hole 14 is formed by selectively removing the interlayer insulating film 12 using a contact hole forming photoresist mask (not shown) formed on the interlayer insulating film 12. Since this plasma etching is performed until the silicon substrate 1 is exposed, a plasma damage layer (not shown) is formed on the main surface of the silicon substrate 1.

  As described in the first embodiment, the present invention is based on the premise that the silicon substrate is exposed by plasma etching after forming the interlayer insulating film. Therefore, a plasma damage layer made of polycrystalline silicon or amorphous silicon is formed on the main surface of the underlying single crystal silicon substrate by this plasma etching.

  Subsequently, the plasma damage layer is removed by light etching (wet etching). FIG. 4 is an explanatory diagram schematically showing how plasma damage applied to the silicon substrate 1 is removed by light etching (plasma damage is removed to the extent that it does not affect the characteristics of the product after completion of the process). is there. As shown in FIG. 4, the plasma damage layer can be removed by light etching performed after plasma etching.

  Subsequently, a plug 13 is formed in the interlayer insulating film 12. The plug 13 forms, for example, a titanium / titanium nitride film on the bottom surface and inner wall of the contact hole 14 by using a sputtering method, and further forms a tungsten film by using, for example, a CVD method so as to fill the contact hole 14. It is formed by depositing. The unnecessary titanium / titanium nitride film and tungsten film deposited on the silicon substrate 1 are removed using, for example, a CMP method.

  Subsequently, the wiring 15 is formed on the main surface of the silicon substrate 1. The wiring 15 is formed, for example, by depositing a titanium / titanium nitride film, an aluminum film, or a titanium / titanium nitride film on the main surface of the silicon substrate 1 by sputtering. Subsequently, these films are patterned by using a photolithography technique and an etching technique, and the wiring 15 is formed. After the formation of the wiring 15, the same processes as those for the interlayer insulating film 12, the plug 13, and the wiring 15 described above are repeated to form a wiring in a multilayer on the wiring 15, and finally, a passivation film is used to form the silicon substrate 1. By covering the whole, the CMOS device is almost completed.

  However, in the manufacturing process of the semiconductor device described above, it is not easy to appropriately determine the removal amount of the plasma damage layer, that is, to detect and measure the plasma damage layer as it is. As shown in this embodiment mode, when the base is a silicon substrate, the plasma damage layer formed on the main surface of the single crystal silicon substrate by plasma etching becomes polycrystalline silicon or amorphous silicon. Therefore, it is considered that a change from single crystal to polycrystalline or amorphous cannot be detected with high accuracy. Furthermore, even if a plasma damage layer remains after light etching, it is very slight damage, and it is considered difficult to detect such a plasma damage layer.

  FIG. 5 is a flowchart for detecting and evaluating the plasma damage layer. By applying the plasma damage layer evaluation method of the present invention as shown in FIG. 5, it is possible to detect and evaluate even a plasma damage layer that is very slight damage. By detecting and evaluating the plasma damage layer and feeding it back to the manufacturing process of the semiconductor device, the manufacturing yield of the semiconductor device can be improved. In the present embodiment, a case will be described in which a plasma damage layer is detected and evaluated using a QC (Quality Control) wafer periodically or for each product start.

  As shown in FIG. 5, first, a QC wafer (silicon wafer) constituting the silicon substrate 1 on which the MIS transistors are formed is prepared (step S11). Subsequently, an interlayer insulating film 12 made of a silicon oxide film is formed on the main surface on the silicon substrate 1 (step S12). Subsequently, plasma etching is performed in order to form the contact hole 14 in the interlayer insulating film 12 (step S13). Subsequently, light etching is performed to remove the plasma damage layer (step S14). From the above steps S11 to S14, the same processes as those of the semiconductor device manufacturing process described above are performed.

  Subsequently, the silicon substrate on which the plasma damage layer has been formed is oxidized (step S15). This oxidation is, for example, thermal oxidation, and an oxide film is formed on the silicon substrate by this oxidation. Subsequently, the plasma damage layer is measured (step S16). That is, the thickness of the oxide film in the first embodiment is measured. This is because, as described in the first embodiment, it is possible to evaluate how much the plasma damage layer is based on the degree of the oxide film. For example, an ellipsometer can be used to measure the thickness of the oxide film.

  FIG. 6 is a diagram showing the relationship between the write etch time (horizontal axis) and the oxide film thickness (vertical axis). That is, with reference to the oxide film thickness (1 in FIG. 6) when the silicon substrate is oxidized under plasma etching without plasma etching, the oxide film thickness when the silicon substrate after plasma etching is oxidized under the same conditions (FIG. 6). Shows a change due to the light etching time of about 1.27). As shown in FIG. 6, when the write etch time is extended, the oxide film thickness decreases and finally becomes saturated.

  By creating a calibration curve as shown in FIG. 6 and calculating an appropriate write etch amount from the oxide film thickness measurement result, for example, the host computer can feed back to the write etch apparatus to instruct the conditions. In this way, it is possible to construct a feedback system that automatically changes the light etch processing conditions to appropriate write etch conditions. For example, as shown in FIG. 6, the oxide film thickness ratio must be about 1.06. If the oxide film thickness ratio measured (step S16) is about 1.10, the light etching process is performed. For example, a condition can be instructed from the host computer to the light etching apparatus so as to lengthen the condition of the write etching time (step S14).

  Further, in the measurement of the thickness of the oxide film (step S16), if the thickness is equal to or greater than the reference value, for example, the host computer receives a report to that effect, searches the process history for the etching apparatus that has processed the wafer, It is possible to reconfirm the conditions of the target etching apparatus or to stop the apparatus (step S13). In this way, a feedback system for reconfirming the processing conditions of the plasma etching apparatus can be constructed.

  Therefore, even if the electrical characteristics of the product are not measured after the semiconductor process is completed, it is possible to set the optimum light etching processing conditions, and to create a plasma damage layer that affects the characteristics of the semiconductor device during the manufacturing process. It can detect reliably and can improve the manufacture yield of a semiconductor device.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the above-described embodiment, the case where a silicon substrate is applied as a base has been described, but the present invention can also be applied to other semiconductor substrates.

  In the above embodiment, the case where plasma etching is applied as the plasma processing has been described. However, plasma CVD may be applied. That is, when an insulating film or the like is formed on a silicon substrate by plasma CVD, the plasma damage layer formed on the main surface of the silicon substrate can be evaluated.

  In the second embodiment, the case where the QC wafer is used to evaluate the plasma damage layer after light etching has been described. However, in the method of manufacturing a semiconductor device having an oxidation process immediately after light etching, By measuring the thickness of the oxide film, the plasma damage layer can be evaluated without using a QC wafer.

  In the second embodiment, the case where the instruction to the plasma etching apparatus and the light etching apparatus after the oxide film thickness measurement is automatically performed by the host computer has been described. However, the plasma etching apparatus is manually stopped and the light etching apparatus Processing conditions can also be set.

  The present invention is widely used in the manufacturing industry for manufacturing semiconductor devices.

It is a flowchart for detecting and evaluating the plasma damage layer in Embodiment 1 of this invention. It is a figure for demonstrating the oxidation of the plasma damage layer formed on the silicon substrate. It is sectional drawing which shows typically the principal part of the semiconductor device shown in Embodiment 2 of this invention. It is explanatory drawing which showed typically a mode that the plasma damage given to the silicon substrate was removed by light etching. It is a flowchart for detecting and evaluating a plasma damage layer. It is the figure which showed the relationship between light etching process time and an oxide film thickness.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Gate insulating film 3 Gate electrode 4 Element isolation region 5 P type well 6 N type well 7 Low concentration n type impurity diffusion region 8 Low concentration p type impurity diffusion region 9 Side wall 10 High concentration n type impurity diffusion region 11 High-purity p-type impurity diffusion region 12 interlayer insulating film 13 plug 14 contact hole 15 wiring Qn n-channel type MIS transistor Qp p-channel type MIS transistors S1 to S5, S11 to S16 Steps

Claims (5)

A method for evaluating a plasma damage layer formed on a main surface of a silicon substrate by plasma treatment,
Oxidizing the silicon substrate after the plasma treatment;
A method for evaluating a plasma damage layer, comprising measuring a film thickness of an oxide film formed on the silicon substrate. A semiconductor device manufacturing method including the following steps:
(A) a step of performing plasma treatment on the main surface of the silicon substrate;
(B) oxidizing the silicon substrate;
(C) A step of measuring the thickness of the oxide film formed on the silicon substrate. The method of manufacturing a semiconductor device according to claim 2, further comprising the following steps:
(d) A step of etching and removing the plasma damage layer formed on the main surface of the silicon substrate by the plasma treatment of the step (a) between the step (a) and the step (b). The method of manufacturing a semiconductor device according to claim 3, further comprising the following steps:
(E) A step of controlling the etching processing conditions in the step (d) based on the film thickness measurement result in the step (c). The method of manufacturing a semiconductor device according to claim 2, further comprising the following steps:
(F) A step of confirming the processing conditions of the plasma processing apparatus or stopping the plasma processing apparatus when the thickness of the oxide film is equal to or greater than a reference value based on the measurement result of the step (c).

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