JP2006209072A - Plasma display device, apparatus and method for driving same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method and apparatus for driving a plasma display device capable of precisely controlling a wall charge within a set period. <P>SOLUTION: In a scan electrode drive circuit for the plasma display device, a drain of a first transistor is coupled to a scan electrode, and a driving part of the first transistor is coupled to a gate and a source of the first transistor. The driving part turns on the first transistor to charge a capacitor coupled to the source of the first transistor while reducing the voltage of the scan electrode. When voltage across the capacitor is increased to be not lower than fixed voltage, the first transistor is turned off to float the scan electrode. By repeating the above operation, the voltage of the scan electrode is gradually reduced. In the occurrence of discharge in the case, the voltage of the scan electrode is increased during floating. When the increasing amount of scanning voltage is large, the driving part detects it and makes the capacitor discharge additionally. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a plasma display device, a driving device and a driving method thereof.

  A plasma display device is a flat display device that displays characters or images using plasma generated by gas discharge. Depending on the size of the flat display device, tens to millions of pixels are arranged in a matrix form. It is arranged.

  In general, a driving method of a plasma display device includes a reset period, an address period, and a sustain period when expressed in terms of temporal operation changes.

  The reset period is a period for performing an operation of initializing the state of each cell in order to erase the wall charge state formed by the previous sustain discharge and to smoothly perform the next addressing operation. . The address period is a period in which a cell to be lit and a non-lit cell are selected on the panel and the wall charge is loaded on the lit cell. The sustain period is a period during which discharge for actually displaying an image is performed in a cell selected to be lit.

  Conventionally, a technique has been proposed in which a ramp waveform is applied to the scan electrode in order to erase the wall charge state during the reset period. (For example, refer to Patent Document 1.) That is, after a ramp waveform that gradually rises is applied to the scan electrodes, a ramp waveform that gradually falls is applied. When the ramp waveform is applied, the wall charge state erasure amount largely depends on the slope of the ramp waveform, so that the wall charge state cannot be erased within the set time. .

US Pat. No. 5,745,086

  Accordingly, the present invention has been made in view of such problems, and an object thereof is to drive a new and improved plasma display device capable of erasing the wall charge state within a set time. It is to provide a method and a driving device.

  In order to solve the above problems, according to an aspect of the present invention, a plasma display panel including a plurality of first electrodes and a plurality of second electrodes forming a capacitive load, and a driving voltage applied to the first electrodes. A plasma display device including a driving unit is provided.

  The driving unit includes a first transistor, a first capacitor, a second transistor, and a first switch driving unit. The first transistor has a first main terminal connected to the first electrode and a second main terminal connected to the first end of the first capacitor. The first capacitor receives electric charge from the first electrode forming the capacitive load when the second end is connected to the first power source that supplies the first voltage and the first transistor is turned on. The second transistor is connected between the first end of the first capacitor and a second power source for supplying a second voltage, and the first switch driving unit is connected to the control terminal of the second transistor and connected to the first electrode. Is increased, the voltage at the control terminal of the second transistor is increased.

  According to one embodiment of the present invention, the first switch driver includes a first diode having a cathode connected to the first electrode, a first resistor connected in parallel to the first diode, and an anode of the first diode. A second capacitor having a first end connected, a second capacitor connected to the control terminal of the second transistor, a cathode connected to the second end of the second capacitor, and an anode connected to the second power source; Including diodes.

  In order to solve the above problems, according to another aspect of the present invention, there is provided a plasma display device driving device including a plurality of first electrodes and a plurality of second electrodes forming a capacitive load.

  The driving device of the present invention includes a first transistor, a first capacitor, a discharge path, a second transistor, and a second capacitor. The first transistor has a first main terminal connected to the first electrode, a drive signal having alternating first voltage and second voltage is applied to the control terminal, and is turned on in response to the first voltage. The first capacitor has a first end connected to a second main terminal of the first transistor and a second end connected to a first power source that supplies a third voltage. The discharge path is connected to the first end of the first capacitor, and discharges at least a part of the charge charged in the first capacitor when the driving signal is the second voltage. The second transistor is connected between the first end of the first capacitor and a second power source for supplying a fourth voltage, and the second capacitor is connected between the control terminal of the second transistor and the first main electrode. Thus, the voltage at the control terminal is increased in accordance with the amount of increase in the voltage at the first main electrode.

  In order to solve the above problems, according to another aspect of the present invention, there is provided a driving method of a plasma display device including a plurality of first electrodes and a plurality of second electrodes forming a capacitive load.

  According to the driving method of the present invention, the first transistor having the first main terminal connected to the first electrode is turned on in response to the control signal of the first level. The capacitive load is discharged in response to the conduction of the first transistor, the capacitor connected to the second main terminal of the first transistor is charged, and a discharge is formed between the first electrode and the second electrode. . Then, the first transistor is cut off in response to the increase in the voltage of the capacitor, and the voltage of the first electrode is changed in response to the discharge between the first electrode and the second electrode. The voltage at the control terminal of the second transistor connected to the capacitor is changed in response to the change in the voltage of the first electrode, and the capacitor is discharged in response to the second level control signal.

  According to one embodiment of the present invention, the capacitor is additionally discharged in response to a voltage change at the control terminal of the second transistor.

  As described above, according to the present invention, after the voltage applied to the electrode forming the discharge cell is lowered, the operation for floating the electrode can be repeated for a set time by the drive waveform of the drive circuit. The state of the wall charge can be erased.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
In the present specification and drawings, components having substantially the same functional configuration are denoted by the same reference numerals, and redundant description is omitted.

  In the present invention, when a certain part is connected to another part, not only the case where the part is directly connected but also the other part is placed between the respective parts and electrically connected. This includes cases where

  The wall charge referred to in the present invention means a charge formed near each electrode on a cell wall (for example, a dielectric layer). The wall charge does not actually contact the electrode itself, but here, it is described as being “formed”, “stored”, or “stacked” on the electrode. The wall voltage is a potential difference formed on the wall of the cell by the wall charge.

FIG. 1 is a schematic view of a plasma display device according to an embodiment of the present invention.
As shown in FIG. 1, the plasma display apparatus according to the embodiment of the present invention includes a plasma display panel 100, a controller 200, an address electrode driver 300, a sustain electrode driver 400, and a scan electrode driver 500.

  The plasma display panel 100 includes a plurality of address electrodes (hereinafter referred to as “A electrodes”; A1-Am) extending in the column direction, and a plurality of sustain electrodes (hereinafter referred to as “X electrodes”) extending in the row direction; X1-Xn) and scanning electrodes (hereinafter referred to as “Y electrodes”; Y1-Yn).

  The X electrode (X1-Xn) is formed corresponding to each Y electrode (Y1-Yn), and generally one end of the X electrode or the Y electrode is commonly connected to each drive unit. At this time, the discharge space at the intersection of the A electrode (A1-Am), the X electrode (X1-Xn), and the Y electrode (Y1-Yn) forms a discharge cell.

  The control unit 200 receives a video signal from the outside, and outputs a control signal for driving the driving unit 500 for the A electrode, the X electrode, and the Y electrode. Then, the control unit 200 is driven by dividing one frame into a plurality of subfields each having a luminance weight value, and each subfield is expressed by a reset period, an address period, and a maintenance period if expressed by temporal operation changes. It consists of a period.

  The Y electrode driver 500 sequentially applies a scan pulse to the Y electrode in the address period, and the A electrode driver 300 selects a discharge cell that is lit whenever the scan pulse is applied to each Y electrode. Is applied to each A electrode. That is, the discharge cell formed by the Y electrode to which the scan pulse is applied in the address period and the A electrode to which the address voltage is applied when the scan pulse is applied to the Y electrode is selected as the discharge cell to be lit. The X electrode driver 400 and the Y electrode driver 500 alternately apply sustain discharge pulses to the X electrode and Y electrode during the sustain period, and perform a display operation on the discharge cells selected during the address period.

  Hereinafter, driving waveforms applied to the A electrode (A1-Am), the X electrode (X1-Xn), and the Y electrode (Y1-Yn) in each subfield will be described with reference to FIGS. Hereinafter, a description will be given with reference to a discharge cell formed by one A electrode, X electrode, and Y electrode.

  FIG. 2 is a driving waveform diagram of the plasma display apparatus according to the embodiment of the present invention, and FIG. 3 is a diagram illustrating voltages and discharge currents of the X electrode and the Y electrode according to the driving waveform according to the embodiment of the present invention.

  Referring to FIG. 2, one subfield includes a reset period (Pr), an address period (Pa), and a sustain period (Ps). The reset period (Pr) includes a rising period (Pr1) and a falling period ( Pr2).

  In the rising period (Pr1) of the reset period (Pr), a waveform that gradually increases from the Vs voltage to the Vset voltage is applied to the Y electrode while the X electrode is maintained at 0V. Then, a weak reset discharge occurs from the Y electrode to the A electrode and the X electrode, respectively, (−) wall charges are accumulated on the Y electrode, and (+) wall charges are accumulated on the A electrode and the X electrode.

As shown in FIGS. 2 and 3, the falling period of the reset period (Pr) (Pr2), while maintaining the X electrode to V _e voltage, decreasing the voltage applied to the Y electrode by a predetermined amount After that, the voltage supplied to the Y electrode is cut off, and the Y electrode is floated for a certain period (Tf). Then, the operation of decreasing the voltage of the Y electrode by a certain amount and floating the Y electrode for a certain period (Tf) is repeated.

If the voltage difference between the voltage (V _x ) of the X electrode and the voltage (V _y ) of the Y electrode becomes equal to or higher than the discharge start voltage (V _f ) while this operation is repeated, the X and Y electrodes Discharge occurs between them. That is, a discharge current (Id) flows in the discharge space. Then, after the discharge is started between the X electrode and the Y electrode, if the Y electrode enters a floating state, there is no charge flowing from the external power source, so the voltage of the Y electrode depends on the amount of wall charge. Change.

  That is, the wall charges formed on the X electrode and the Y electrode are erased by the discharge between the X electrode and the Y electrode, and the voltage inside the discharge space rapidly decreases. As a result, the voltage between the Y electrode and the X electrode becomes equal to or lower than the discharge start voltage, and the discharge rapidly disappears.

When the voltage inside the discharge space decreases, the X electrode is fixed at the _Ve voltage, so that the voltage of the floating Y electrode increases by a certain amount as shown in FIG. Therefore, the amount of change in the wall charge directly decreases the voltage inside the discharge space, and the discharge is extinguished by only a small change in the wall charge.

  After that, if the voltage of the Y electrode is decreased again to form a discharge and then the Y electrode is allowed to float, the wall charge is reduced and the strong discharge disappears inside the discharge space as described above. . If the operation of floating the Y electrode by decreasing the voltage of the Y electrode is repeated a predetermined number of times, the wall charges of the X electrode and the Y electrode are erased.

  As described above, since the discharge is extinguished only by a small change in the wall charge, the wall charge can be controlled. Further, in the conventional ramp waveform, the wall charge is controlled by gently lowering the voltage of the Y electrode to prevent strong discharge, so that the reset period (Pr2) must be long due to the slope of the ramp waveform. It was.

  However, in the embodiment of the present invention, since the extinction of strong discharge due to floating is used, the voltage of the Y electrode may be rapidly decreased, and thereby the reset period can be shortened.

  In the embodiment of the present invention, only the falling period (Pr2) of the reset period (Pr) has been described. However, the present invention is not limited to this, and is applied to all cases in which wall charges are controlled using a falling ramp. be able to.

  In the embodiment of the present invention, the waveform in which the voltage of the electrode decreases has been described. However, the mechanism of the rapid extinction of the discharge can be applied to the waveform in which the voltage of the electrode increases.

  That is, instead of applying the rising ramp voltage to the Y electrode or the X electrode, it is possible to repeat the operation of floating the electrode after raising the electrode voltage by a certain amount.

  Hereinafter, a driving circuit capable of repeating the floating operation after the voltage applied to the Y electrode is lowered will be described with reference to FIGS.

  The driving circuit can be formed in the Y electrode driving unit 500 connected to the Y electrode in the driving waveform of FIG.

(First embodiment)
FIG. 4 is a schematic circuit diagram of the drive circuit according to the first embodiment of the present invention, and FIG. 5 is a drive waveform diagram for the drive circuit of FIG. The panel capacitor (Cp) in FIG. 4 is a capacitive load formed between the Y electrode and the X electrode. For convenience of explanation, it is assumed that a ground voltage is applied to the X electrode, which is the second end of the panel capacitor (Cp), and that the panel capacitor (Cp) is charged with a certain amount of charge. To do.

  As shown in FIG. 4, the driving circuit according to the first embodiment of the present invention includes a transistor (M1), a capacitor (Cd), a resistor (R1), a diode (D1), and a switch driving unit 510. Although the transistor (M1) is shown as an n-channel field effect transistor in FIG. 4, other switches having the same or similar function as the transistor (M1) described below may be used instead.

The drain, which is one main terminal of the transistor (M1), is connected to the Y electrode, which is the first end of the panel capacitor (Cp), and the source, which is the other main terminal, is the first end of the capacitor (Cd). It is connected to. The second end of the capacitor (Cd) is connected to a power source that supplies the V _nf voltage.

The positive terminal of the switch driving unit 510 is connected to the gate which is the control terminal of the transistor (M1), and the negative terminal of the switch driving unit 510 is connected to the power source (V _nf ). The switch driving unit 510 outputs a driving signal for driving the transistor (M1) at the positive terminal according to the input control signal (IN1). When the control signal (IN1) is at a high level (T _ON ), this drive signal has a voltage higher than the V _nf voltage by the _Vcc voltage, and when the control signal (IN1) is at a low level (T _OFF ) has a V _nf voltage. A resistor (R2) may be connected between the positive terminal of the switch driver 510 and the gate of the transistor (M1).

  The diode (D1) and the resistor (R1) are connected between the first end of the capacitor (Cd) and the switch driver 510 to form a discharge path through which the capacitor (Cd) can be discharged.

  Next, the operation of the drive circuit of FIG. 4 will be described in detail with reference to FIG. The drive waveform (1) indicated by the solid line in FIG. 5 indicates that discharge occurs between the Y electrode and the X electrode after a certain time (regions II and III), and the drive waveform indicated by the dotted line ( 2) indicates that no discharge occurs between the Y electrode and the X electrode.

As shown in FIG. 5, when the control signal (IN1) is at a high level, the gate voltage of the transistor (M1) becomes higher by _Vcc voltage than the source voltage of the transistor (M1), and the transistor ( M1) conducts. Then, the electric charge charged in the panel capacitor (Cp) moves to the capacitor (Cd). When the capacitor (Cd) is charged, the voltage at the first end of the capacitor (Cd) rises and the source voltage of the transistor (M1) increases.

However, while the gate voltage of the transistor (M1) is maintained at the voltage when the transistor (M1) is turned on, the voltage at the first end of the capacitor (Cd) increases, so the source voltage of the transistor (M1) is relatively Increase. At this time, if the source voltage of the transistor (M1) increases to a certain voltage, the gate / source voltage of the transistor (M1) becomes smaller than the threshold voltage (V _t ) of the transistor (M1), and the transistor (M1) Is cut off.

Thus, if the transistor (M1) is cut off, the voltage supplied to the panel capacitor (Cp) is cut off, so that the Y electrode of the panel capacitor (Cp) is in a floating state. The amount of electric charge (ΔQ _i ) accumulated in the capacitor (Cd) when the transistor (M1) is cut off is expressed by Equation 1. At this time, since the charge transfer from the panel capacitor (Cp) to the capacitor (Cd) is instantaneously performed, the voltage (V _y ) of the Y electrode of the panel capacitor (Cp) instantaneously decreases by a certain amount. . That is, the panel capacitor (Cp) is floated faster than the panel capacitor (Cp) is floated by the level control of the control signal (IN1).

ここで，Ｃｄはキャパシタ（Ｃｄ）のキャパシタンスである。

Here, Cd is the capacitance of the capacitor (Cd).

  Next, when the control signal (IN1) becomes a low level, the output voltage of the switch driver 510 becomes lower than the voltage at the first end of the capacitor (Cd), so that the capacitor (Cd), the diode (D1), the resistance ( R1), and the capacitor Cd is discharged through the path of the switch driver 510.

At this time, since the capacitor (Cd) is discharged in a state where the voltage of (V _cc −V _t ) is charged, the amount (ΔV _d ) by which the voltage of the capacitor (Cd) decreases is as shown in Equation 2. . Even when the control signal (IN1) is at a low level, the transistor (M1) is maintained in the cut-off state.

ここで，Ｒ１は抵抗（Ｒ１）の抵抗値である。

Here, R1 is the resistance value of the resistor (R1).

The amount of electric charge (ΔQ _d ) discharged by the capacitor (Cd) is expressed by Equation 3 according to the time (T _off ) during which the control signal is maintained at the low level, and the electric charge remaining in the capacitor (Cd). The amount (Q _d ) of is

Next, when the control signal (IN1) becomes high level again, the transistor (M1) becomes conductive, and the charge moves from the panel capacitor (Cp) to the capacitor (Cd). If moved to the panel capacitor (Cp) charge only Delta] Q _d from again capacitor (Cd), as described above, the transistor (M1) is interrupted.

  At this time, if the discharge does not occur as in the initial period of the reset period (region I), the voltage of the Y electrode is maintained as it is when the Y electrode is floating. If discharge occurs due to a gradual decrease in the voltage of the Y electrode (regions II and III (1)), the voltage of the Y electrode increases by a certain voltage when the Y electrode is floating.

Thus, when the transistor (M1) is turned on in response to the high level of the control signal (IN1), the voltage (V _y ) of the Y electrode decreases by a constant voltage, and the voltage of the capacitor (Cd) remains constant. By increasing the voltage, the transistor is turned off.

  When the control signal (IN1) becomes a low level, the transistor (M1) is cut off, that is, the capacitor (Cd) is discharged with the Y electrode floating. Therefore, when the control signal (IN1) alternately has a high level and a low level, a waveform is generated in which the operation of lowering the electrode voltage and floating the electrode is repeated.

In FIG. 4, the discharge path may be formed in another path without being connected to the switch driver 510. For example, a switch may be connected between the first end of the capacitor (Cd) and the power source (V _nf ) to be used as a discharge path.

  In the above method, this switch may be turned on during the period of discharging the capacitor (Cd). Further, in order to limit the magnitude of the current discharged by the panel capacitor (Cp), a resistor (R3) can be connected between the panel capacitor (Cp) and the transistor (M1), or an inductor or the like You may connect the element which can restrict | limit the magnitude | size of an electric current.

In general, in the second half of the reset period (fall period) (region III), the amount of one discharge often increases as the discharge proceeds. If the amount of discharge at one time increases, as shown in FIG. 5, a large voltage change occurs due to floating, and the average rate of decrease in the voltage (V _y ) of the Y electrode slows down. As a result, the difference in the rate of decrease in the voltage (V _y ) of the Y electrode when the discharge occurs greatly and when the discharge does not occur becomes significant, so the reset period must be set longer in case the discharge occurs greatly. Don't be.

Hereinafter, an embodiment in which the rate of decrease in the voltage (V _y ) of the Y electrode can be made rapid when the discharge becomes large in the second half of the reset period will be described with reference to FIGS.

(Second Embodiment)
FIG. 6 is a schematic circuit diagram of a drive circuit according to the second embodiment of the present invention, and FIG. 7 is a drive waveform diagram for the drive circuit of FIG.

  As shown in FIG. 6, the driving circuit according to the second embodiment of the present invention further includes a transistor (Q1) and a switch driving unit 520 as compared with the first embodiment. In FIG. 6, the transistor (Q1) is shown as an npn-type bipolar transistor, but another switch having the same or similar function as the transistor (Q1) described below may be used instead. it can.

The collector which is the main terminal of the transistor (Q1) is connected to the connection point of the resistor (R1) and the diode (D1), and the emitter which is the other main terminal is the power supply (V _nf ) of the second end of the capacitor (Cd). ). At this time, the collector of the transistor (Q1) may be connected to the first end of the capacitor (Cd).

The positive terminal of the switch driver 520 is connected to the base which is the control terminal of the transistor (Q1), and the negative terminal of the switch driver 520 is connected to the power source (V _nf ). The switch driving unit 520 outputs a driving signal for driving the transistor (Q1) at the positive terminal according to the input control signal (IN2).

  This drive signal has a level capable of turning on the transistor (Q1) when the control signal (IN2) is at a high level, and the transistor (1) when the control signal (IN2) is at a low level. Q1) has a level that can be cut off. A resistor (R4) may be connected between the base of the transistor (Q1) and the positive terminal of the switch driver 520.

  Next, the operation of the drive circuit of FIG. 6 will be described in detail with reference to FIG. In FIG. 7, since regions I and II are the same as those in FIG. 5, only region III will be described below.

As shown in FIG. 7, if a large discharge occurs in the second half of the reset period (region III) and the voltage (V _y ) of the Y electrode rises significantly when the Y electrode is floating, the control signal (IN2) becomes It alternately has a high level and a low level. The control signal (IN2) has a high level when the control signal (IN1) is at a low level.

  First, when the control signal (IN2) becomes high level while the control signal (IN1) is at low level, the charge accumulated in the capacitor (Cd) is not limited to the discharge path formed by the diode (D1). It is also discharged in the discharge path formed by (Q1).

Then, a larger amount of charge is discharged in the capacitor (Cd) than in the example of the first embodiment, and the amount of charge remaining in the capacitor (Cd) becomes smaller than the amount of charge (Q _d ) in Equation 3.

Next, when the control signal (IN2) becomes low level and the control signal (IN1) becomes high level, the transistor (Q1) is cut off and the transistor (M1) becomes conductive. Since a large amount of charge is discharged in the capacitor (Cd), the amount of charge discharged from the panel capacitor (Cp) to the capacitor (Cd) becomes larger than that in the region II. Therefore, the voltage (V _y ) of the Y electrode of the panel capacitor (Cp) is significantly reduced compared to the region II.

If the above operation is repeated, in region III, the amount of increase in voltage during floating is increased due to large discharge, and the voltage (V _y ) of the Y electrode rapidly decreases when transistor (M1) is turned on. The problem that the speed at which the voltage (V _y ) of the Y electrode decreases decreases can be solved.

  However, in the drive circuit of FIG. 6, a switch drive unit 520 controlled by a control signal (IN2) is additionally formed to drive the transistor (Q1). Hereinafter, a driving circuit capable of controlling the transistor (Q1) without the switch driving unit 520 will be described with reference to FIG.

(Third embodiment)
FIG. 8 is a schematic circuit diagram of a drive circuit according to a third embodiment of the present invention, and FIG. 9 is a drive waveform diagram for the drive circuit of FIG.
As shown in FIG. 8, the driving circuit according to the example of the third embodiment of the present invention includes a switch driving unit 530 that is not driven by the control signal (IN2), unlike the second embodiment.

The switching driver 530 includes two diodes (D2, D3), a resistor (R5), and a capacitor (C1). The cathode of the diode (D2) is connected to the first end of the panel capacitor (Cp), that is, the Y electrode, and the anode of the diode (D2) is connected to the first end of the capacitor (C1). The resistor (R5) is connected in parallel to the diode (D2), and the second end of the capacitor (C1) is connected to the base of the transistor (Q1). The second end of the capacitor (C1) is connected to the cathode of the diode (D3), and the anode of the diode (D3) is connected to the power source (V _nf ).

First, before the control signal (IN1) becomes high level, the voltage (V1) at the first terminal of the capacitor (C1) is the same as the voltage (V _y ) of the Y electrode of the panel capacitor (Cp), and the capacitor ( Assume that the voltage (V2) at the second end of C1) is the same as the V _nf voltage.

At this time, if the transistor (M1) is turned on by the high level control signal (IN1) and the voltage (V _y ) of the panel capacitor (Cp) drops, the diodes (D2, D3) are connected in the forward direction. . Then, as shown in FIG. 9, the voltage across the capacitor (C1) decreases by the amount of decrease in the voltage of the panel capacitor (Cp).

Next, if the voltage (V _y ) of the Y electrode of the panel capacitor (Cp) increases by a certain voltage due to the discharge while the transistor (M1) is cut off, the diodes (D2, D3) are connected in the opposite direction. Is done. Then, as shown in FIG. 9, a current flows through the resistor (R5), and the voltage (V1, V2) of the capacitor (C1) rises.

At this time, if the increase amount of the voltage of the panel capacitor (Cp) becomes larger than a certain voltage as in the region III of FIG. 9, the increase amount of the voltage (V2) at the second end of the capacitor (C1) becomes the transistor ( It becomes larger than the threshold voltage (V _th ) at which Q1) can be conducted. Then, the transistor (Q1) becomes conductive, and the capacitor (Cd) can be additionally discharged.

That is, since the switch driving unit 530 can function as the switch driving unit 520 described with reference to FIGS. 6 and 7, it is not necessary to use a driving unit that uses the control signal (IN2).
When the control signal (IN1) having the high level and the low level alternately is not applied to the switch driver 510, the base voltage of the transistor (Q1) is changed when there is a sudden voltage change of the panel capacitor (Cp). In order to protect, the diode (D3) can be formed of a Zener diode as shown in FIG.

  As described above, the embodiment of the present invention has been described mainly with respect to the method of floating the Y electrode. However, unlike the present invention, the present invention is a discharge cell including a Y electrode, an X electrode, and an A electrode. It can be applied to all methods of floating an electrode.

As mentioned above, although preferred embodiment of this invention was described referring an accompanying drawing, it cannot be overemphasized that this invention is not limited to the example which concerns. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the claims, and these are naturally within the technical scope of the present invention. Understood.

  The present invention can be applied to a plasma display device, a driving device and a driving method thereof.

1 is a schematic view of a plasma display device according to an embodiment of the present invention. It is a drive waveform diagram of the plasma display device according to the embodiment of the present invention. 4 is a diagram illustrating an electrode voltage and a discharge current according to a driving waveform according to an embodiment of the present invention. 1 is a schematic circuit diagram of a drive circuit according to a first embodiment of the present invention. FIG. 5 is a drive waveform diagram for the drive circuit of FIG. 4. FIG. 5 is a schematic circuit diagram of a drive circuit according to a second embodiment of the present invention. FIG. 7 is a drive waveform diagram for the drive circuit of FIG. 6. FIG. 6 is a schematic circuit diagram of a drive circuit according to a third embodiment of the present invention. FIG. 9 is a drive waveform diagram for the drive circuit of FIG. 8.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Plasma display panel 110 Discharge cell 200 Control part 300 Address electrode drive part 400 Sustain electrode drive part 500 Scan electrode drive part 510,520,530 Switch drive part

Claims (16)

In a plasma display panel including a plurality of first electrodes and a plurality of second electrodes forming a capacitive load, and a plasma display device including a driving unit that applies a driving voltage to the first electrodes:
The driving unit includes a first transistor having a first main terminal coupled to the first electrode;
When the first terminal is connected to the second main terminal of the first transistor and the second terminal is connected to the first power source that supplies the first voltage, the first transistor becomes conductive. A first capacitor for receiving charge;
A second transistor connected between a first end of the first capacitor and a second power source for supplying a second voltage;
A first switch driver connected to the control terminal of the second transistor and configured to increase the voltage of the control terminal of the second transistor when the voltage of the first electrode increases;
A plasma display device comprising: The first switch driver includes a first diode having a cathode connected to the first electrode;
A first resistor connected in parallel to the first diode; a second capacitor having a first terminal connected to the anode of the first diode and a second terminal connected to a control terminal of the second transistor;
A second diode having a cathode connected to a second end of the second capacitor and an anode connected to the second power source;
The plasma display device according to claim 1, further comprising:   The plasma display device according to claim 1, wherein the second diode is a Zener diode.   A drive signal having alternately a third voltage at a level capable of conducting the first transistor and a fourth voltage at a level capable of interrupting the first transistor is applied to the control terminal of the first transistor. The plasma display device according to claim 1, wherein:   The driving unit may further include a discharge path that discharges at least a part of electric charges charged in the first capacitor when the driving signal is the fourth voltage. The plasma display apparatus in any one of -4.   6. The plasma display device according to claim 1, wherein the discharge path includes a third diode that cuts off a current in a direction in which the second resistor and the first capacitor are charged.   The driving unit further includes a second switch driving unit that outputs the driving signal to a control terminal of the first transistor according to a control signal, and the discharge path includes output terminals of the first capacitor and the second switch driving unit. The plasma display device according to claim 1, wherein the plasma display device is connected to each other.   The plasma display device according to any one of claims 1 to 7, wherein the first voltage and the second voltage are the same voltage. In a driving apparatus of a plasma display device including a plurality of first electrodes and a plurality of second electrodes forming a capacitive load:
A first transistor having a first main terminal connected to the first electrode and a control signal having a drive signal alternately having a first voltage and a second voltage applied thereto and conducting in response to the first voltage;
A first capacitor having a first terminal connected to the second main terminal of the first transistor and a second terminal connected to a first power source that supplies a third voltage;
A discharge path connected to a first end of the first capacitor and discharging at least a part of the charge charged in the first capacitor when the drive signal is the second voltage;
A second transistor connected between a first end of the first capacitor and a second power source for supplying a fourth voltage;
When the first transistor is cut off and connected between the control terminal of the second transistor and the first main electrode, the control terminal has a voltage corresponding to the amount of change in the voltage of the first main electrode. A second capacitor for changing the voltage;
A driving device for a plasma display device, comprising: A first diode and a first resistor connected in parallel between the first main electrode and the second capacitor;
And a second diode connected between the second capacitor and the second power source;
The driving device of the plasma display device according to claim 9, further comprising:   The plasma display apparatus of claim 9, wherein the first diode has a cathode connected to the first main electrode, and the second diode has an anode connected to the second power source. apparatus.   12. The driving device of the plasma display device according to claim 9, wherein the second diode is a Zener diode. A switch driver that outputs the drive signal in response to a control signal;
And further including a third diode connected between a first end of the first capacitor and an output end of the switch driver;
The drive device of the plasma display device according to claim 9, wherein the drive device is a plasma display device. In a driving method of a plasma display device including a plurality of first electrodes and a plurality of second electrodes forming a capacitive load:
Conducting a first transistor having a first main terminal coupled to the first electrode in response to a first level control signal;
In response to conduction of the first transistor, the capacitive load is discharged to charge a capacitor connected to the second main terminal of the first transistor, and between the first electrode and the second electrode. Forming a discharge;
Shutting off the first transistor in response to an increase in the voltage of the capacitor;
Changing the voltage of the first electrode in response to a discharge between the first electrode and the second electrode;
Changing the voltage of the control terminal of the second transistor coupled to the capacitor in response to a change in the voltage of the first electrode;
Discharging the capacitor in response to a second level control signal;
A method for driving a plasma display device, comprising: Additionally discharging the capacitor in response to a change in voltage at a control terminal of the second transistor;
The method for driving a plasma display device according to claim 14, further comprising:   16. The method of claim 14, wherein the control signal has the first level and the second level alternately.

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