JP2006191168A - Switching amplifier circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switching amplifier circuit with an excellent S/N characteristic. <P>SOLUTION: An LPF is inserted between a loop filter 12 and a comparator 15, so that the switching amplifier circuit is configured to eliminate an LPF from its feedback circuit. As a result, the configuration can obtain an effect of eliminating noise from an input signal X. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a switching amplifier circuit that amplifies an analog signal, and more particularly to improvement in performance of a modulation circuit that controls a switching element.

  The switching amplifier circuit is known as a CLASS-D amplifier, and enables high-efficiency amplification of an analog input signal when used with a PWM modulation circuit or a synchronous and asynchronous delta-sigma modulation circuit. Non-Patent Document 1 and Patent Document describe a high-efficiency switching amplifier circuit for xDSL. The block diagram is shown in FIG. The switching amplifier circuit 101 in FIG. 12 amplifies the loop filter 102 that receives the difference between the feedback signal XFB and the input signal X, the comparator 103 that converts the output signal Y into 1 bit, and the output signal Z of the comparator 103. A digital driver 104 for supplying power to a low impedance load, a feedback terminal XFB (substitute for the sake of convenience with the same symbol as the feedback signal XFB) for filtering the output signal V of the digital driver 104, and a switching amplifier circuit 101 And a low-pass filter 105 disposed between the output terminal V (for the sake of convenience, the same symbol as that of the output signal V is substituted).

  Furthermore, the loop filter 102 includes an integrator 102a to which an input signal X-XFB to the loop filter 102 is input, and an integrator 102b to which an output signal of the integrator 102a is input. In the loop filter 102, the difference between the output signal of the integrator 102a and the output signal of the integrator 102b is calculated, and this becomes the output signal Y of the loop filter 102.

  Hereinafter, the operation principle of the switching amplifier circuit 101 of FIG. 12 will be described. Although the circuit configuration is almost the same as that of a conventional clock-synchronized delta-sigma modulator, the switching amplifier circuit 101 of FIG. 12 operates the comparator 103 asynchronously, and the digital output of the comparator 103 is synchronized with an external clock. (The comparator 103 basically does not require an external clock). By inserting the low-pass filter 105 in the feedback path (between the output terminal V and the feedback terminal XFB), the loop becomes unstable, and the switching amplifier circuit 101 oscillates at a certain frequency determined by the cutoff frequency and the order of the low-pass filter 105. (Hereinafter referred to as limit cycle frequency). Since the comparator 103 outputs a periodic square wave output signal Z with respect to the sine wave input signal, the relationship between the input and output of the switching amplifier circuit 101 is nonlinear. When there is no input signal X, the output signal V of the driver 104 is a periodic square wave with a high level and a low level each with a duty ratio of 50%.

  This oscillation at the limit cycle frequency operates as a dither for the switching amplifier circuit 101, and in a band sufficiently smaller than the limit cycle frequency, the input / output characteristic V / X is linear, and an amplifier circuit with a high dynamic range is realized. Can do.

  By using a description function method (DFM) for a loop composed of the loop filter 102, the comparator 103, the driver 104 which is a digital driver, and the low-pass filter 105, a block combining the comparator 103 and the driver 104 is obtained. It can be considered that the gain of the fundamental wave component of the output signal V is N (A).

Here, it is assumed that the input amplitude (sine wave) of the comparator 103 is A, and the amplitude of the output signal V of the driver 104 is 1 (the peak value is +1 in the positive direction and −1 in the negative direction). At this time, the limit cycle frequency ω _lim can be obtained by solving the following equation. Here, it is assumed that the low-pass filter 105 has a configuration in which n primary low-pass filters having a cutoff frequency _ωfil are connected in series. When an open loop transfer function of a loop composed of the loop filter 102, the comparator 103, the driver 104, and the low-pass filter 105 is J (s) and LOOP (jw) = J (jω) +1 is set, a limit cycle occurs. condition is,

It becomes. Since the imaginary part of LOOP (jw) = 0, the following equation:

Is obtained (atanX≡tan ⁻¹ X). That is, the limit cycle frequency is given as a function of the cut-off frequency ω _fil / 2π of the low-pass filter 105, the order n, and the band ω _int2 of the integrator 102b. Here, the limit cycle frequency is approximately given by the following equation by designing the integrator 102b so that ω _int2 << ω _fil <ω _lim .

That is, the limit cycle frequency can be determined only by the cut-off frequency ω _fil / 2π of the low-pass filter 105 and the order n. The amplitude of the sine wave (limit cycle amplitude) at the input terminal of the comparator 103 is given by the following equation.

Therefore, the limit cycle amplitude A _lim becomes a value depending on the band ω _int1 of the integrator 102a.
European Patent Application Publication No. 1,229,641 (published August 7, 2002) US Pat. No. 5,396,244 (published March 7, 1995) IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO.1, JANUARY 2003, “Highly Efficient xDSL Line Drivers in 0.35um CMOS using a Self-Oscillating Power Amplifier” “Design of a Low-Distortion 22-kHz Fifth-Order Bessel Filter”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 28, NO. 12, DEC. 1993 “A 10.7-MHz 68-dB SNR CMOS Continuous-Time Filter with On-Chip Automatic Tuning”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL 27, NO. 12, DEC. 1992 “An Elliptic Continuous-Time CMOS Filter with On-Chip Automatic Tuning”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-20, NO. 6, DEC. 1985

  However, as described in Patent Document 2, when a low-resolution signal that is noise-shaped is input as an input signal of the switching amplifier circuit, or when noise or tone is included outside the band, the switching amplifier circuit of FIG. In 101, since the low-pass filter is provided only in the feedback loop, there is a problem that the S / N characteristic deteriorates.

  The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to realize a switching amplifier circuit having good S / N characteristics.

  In order to solve the above problems, a switching amplifier circuit of the present invention is a switching amplifier circuit including a filter using an integrator, a low-pass filter, an asynchronous comparator, and a driver for switching amplification. The output terminal is connected to the input terminal of the low-pass filter, the output terminal of the low-pass filter is connected to the input terminal of the comparator, the output terminal of the comparator is connected to the input terminal of the driver, and the input of the switching amplifier circuit The difference between the signal and the output signal of the driver is input to the filter.

  According to the above invention, since the low-pass filter is arranged between the input terminal of the comparator and the output terminal of the filter using the integrator, the low-pass filter operates as an anti-aliasing filter for the input signal of the switching amplifier circuit. To do. Therefore, the out-of-band noise of the input signal of the switching amplifier circuit can be removed. For example, when a noise-shaped low-bit signal is directly input to the switching amplifier circuit through the digital-analog converter, the shaped out-of-band quantization noise is also input simultaneously, but the low-pass filter causes the out-of-band signal to be out of the band. Since quantization noise can also be attenuated, higher performance can be obtained.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

  Moreover, according to said invention, the influence of the noise and distortion which arise from a low-pass filter can be relieve | moderated. In other words, when the low-pass filter is configured using a resistor and a capacitor, the value of the resistor can be increased, so that the circuit area can be reduced.

  Further, according to the above invention, the limit cycle frequency can be prevented from changing greatly under the influence of variations in resistance value and capacitance of the low-pass filter using the resistor and the capacitor, or the limit cycle frequency is input. In order to optimize the trade-off between dynamic range and switching frequency by changing according to the signal amplitude, etc., the resistance of the low-pass filter is changed to a variable resistance composed of a series connection of a resistance and a channel resistance of a MOS transistor, for example. In the case of replacement, even if the resistance value of the channel resistance changes according to the input signal to generate distortion, the switching amplifier circuit can reduce the distortion. Therefore, it becomes easier to automatically adjust the limit cycle frequency than in the prior art.

  In order to solve the above problems, a switching amplifier circuit according to the present invention includes a filter including an integrator, a first low-pass filter, a second low-pass filter, an asynchronous comparator, and a switching amplification driver. An amplifier circuit, wherein an output terminal of the filter is connected to an input terminal of the first low-pass filter, an output terminal of the first low-pass filter is connected to an input terminal of the comparator, and an output terminal of the comparator is The second low-pass filter connected to the input terminal of the driver is provided in a feedback path from the output terminal of the driver to the input terminal of the filter, and is input by the input signal of the switching amplifier circuit and the second low-pass filter. The difference from the filtered driver output signal is It is characterized by being inputted to the serial filter.

  According to the above invention, since the first low-pass filter is arranged between the input terminal of the comparator and the output terminal of the filter using the integrator, the first low-pass filter is used as the input signal of the switching amplifier circuit. It works as an anti-aliasing filter. Therefore, the out-of-band noise of the input signal of the switching amplifier circuit can be removed. For example, when a noise-shaped low-bit signal is directly input to the switching amplifier circuit through the digital-analog converter, the shaped out-of-band quantization noise is also input simultaneously, but the low-pass filter causes the out-of-band signal to be out of the band. Since quantization noise can also be attenuated, higher performance can be obtained.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

  Moreover, according to said invention, the influence of the noise and distortion which arise from a 1st low-pass filter can be relieve | moderated. In other words, when the first low-pass filter is configured using a resistor and a capacitor, the resistance value can be increased, so that the circuit area can be reduced.

  According to the above invention, the limit cycle frequency can be prevented from greatly changing under the influence of variations in the resistance value and capacitance of the first low-pass filter using the resistor and the capacitor, or the limit cycle. In order to change the frequency according to the input signal amplitude or the like and optimize the trade-off between the dynamic range and the switching frequency, the resistor of the first low-pass filter is connected in series with, for example, a resistor and the channel resistance of a MOS transistor. In the case of replacing with a configured variable resistor, the switching amplifier circuit can reduce the distortion even if the resistance value of the channel resistance changes according to the input signal to generate distortion. Therefore, it becomes easier to automatically adjust the limit cycle frequency than in the prior art.

  Further, according to the above invention, since the second low-pass filter is provided in the feedback path from the driver output terminal to the filter input terminal using the integrator, it is out of the band included in the driver output signal. The signal can be reduced and the dynamic range required for the integrator can be relaxed.

  In order to solve the above problems, a switching amplifier circuit of the present invention is a switching amplifier circuit including a filter using an integrator, a low-pass filter, an asynchronous comparator, and a driver for switching amplification. The difference between the output signal and the output signal of the driver is input to the low-pass filter, the output terminal of the low-pass filter is connected to the input terminal of the comparator, the output terminal of the comparator is connected to the input terminal of the driver, The difference between the output signal of the driver and the input signal of the switching amplifier circuit is input to the filter.

  According to the above invention, since the low-pass filter is arranged between the input terminal of the comparator and the output terminal of the filter using the integrator, the low-pass filter operates as an anti-aliasing filter for the input signal of the switching amplifier circuit. To do. Therefore, the out-of-band noise of the input signal of the switching amplifier circuit can be removed. For example, when a noise-shaped low-bit signal is directly input to the switching amplifier circuit through the digital-analog converter, the shaped out-of-band quantization noise is also input simultaneously, but the low-pass filter causes the out-of-band signal to be out of the band. Since quantization noise can also be attenuated, higher performance can be obtained.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

  Moreover, according to said invention, the influence of the noise and distortion which arise from a low-pass filter can be relieve | moderated. In other words, when the low-pass filter is configured using a resistor and a capacitor, the value of the resistor can be increased, so that the circuit area can be reduced.

  Further, according to the above invention, the limit cycle frequency can be prevented from changing greatly under the influence of variations in resistance value and capacitance of the low-pass filter using the resistor and the capacitor, or the limit cycle frequency is input. In order to optimize the trade-off between dynamic range and switching frequency by changing according to the signal amplitude, etc., the resistance of the low-pass filter is changed to a variable resistance composed of a series connection of a resistance and a channel resistance of a MOS transistor, for example. In the case of replacement, even if the resistance value of the channel resistance changes according to the input signal to generate distortion, the switching amplifier circuit can reduce the distortion. Therefore, it becomes easier to automatically adjust the limit cycle frequency than in the prior art.

  In addition, according to the above invention, since a direct feedback path is provided to directly apply the driver output signal to the input terminal of the low-pass filter, the cutoff frequency of the low-pass filter compared to the conventional case when a certain limit cycle frequency is realized. Can be lowered. That is, the anti-aliasing function can be strengthened. In addition, a stable limit cycle amplitude can be realized.

  In order to solve the above problems, a switching amplifier circuit according to the present invention includes a filter including an integrator, a first low-pass filter, a second low-pass filter, an asynchronous comparator, and a switching amplification driver. An amplifier circuit, wherein the second low-pass filter is provided in a feedback path from an output terminal of the driver to an input terminal of the filter and an input terminal of the first low-pass filter, and an output signal of the filter; The difference from the driver output signal filtered by the second low-pass filter is input to the first low-pass filter, the output terminal of the first low-pass filter is connected to the input terminal of the comparator, and the comparator Is connected to the input terminal of the driver, Serial input signal of the switching amplifier circuit, the difference between the output signal of the second of said driver being filtered by the low-pass filter is characterized in that it is input to the filter.

  According to the above invention, since the first low-pass filter is arranged between the input terminal of the comparator and the output terminal of the filter using the integrator, the first low-pass filter is used as the input signal of the switching amplifier circuit. It works as an anti-aliasing filter. Therefore, the out-of-band noise of the input signal of the switching amplifier circuit can be removed. For example, when a noise-shaped low-bit signal is directly input to the switching amplifier circuit through the digital-analog converter, the shaped out-of-band quantization noise is also input simultaneously, but the low-pass filter causes the out-of-band signal to be out of the band. Since quantization noise can also be attenuated, higher performance can be obtained.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

  Moreover, according to said invention, the influence of the noise and distortion which arise from a 1st low-pass filter can be relieve | moderated. In other words, when the first low-pass filter is configured using a resistor and a capacitor, the resistance value can be increased, so that the circuit area can be reduced.

  According to the above invention, the limit cycle frequency can be prevented from greatly changing under the influence of variations in the resistance value and capacitance of the first low-pass filter using the resistor and the capacitor, or the limit cycle. In order to change the frequency according to the input signal amplitude or the like and optimize the trade-off between the dynamic range and the switching frequency, the resistor of the first low-pass filter is connected in series with, for example, a resistor and the channel resistance of a MOS transistor. In the case of replacing with a configured variable resistor, the switching amplifier circuit can reduce the distortion even if the resistance value of the channel resistance changes according to the input signal to generate distortion. Therefore, it becomes easier to automatically adjust the limit cycle frequency than in the prior art.

  Further, according to the above invention, since the second low-pass filter is provided in the feedback path from the driver output terminal to the filter input terminal using the integrator, it is out of the band included in the driver output signal. The signal can be reduced and the dynamic range required for the integrator can be relaxed.

  Further, according to the above invention, there is provided a direct feedback path for adding the output signal of the driver to the input terminal of the first low-pass filter through the second low-pass filter without passing the filter using the integrator. When realizing the limit cycle frequency, the cut-off frequency of the first low-pass filter can be made lower than in the prior art. That is, the anti-aliasing function can be strengthened. In addition, a stable limit cycle amplitude can be realized.

  In order to solve the above problems, a switching amplifier circuit of the present invention is a switching amplifier circuit including a filter using an integrator, a low-pass filter, an asynchronous comparator, and a driver for switching amplification. The difference between the output signal and the output signal of the comparator is input to the low pass filter, the output terminal of the low pass filter is connected to the input terminal of the comparator, the output terminal of the comparator is connected to the input terminal of the driver, The difference between the input signal of the switching amplifier circuit and the output signal of the driver is input to the filter.

  According to the above invention, since the low-pass filter is arranged between the input terminal of the comparator and the output terminal of the filter using the integrator, the low-pass filter operates as an anti-aliasing filter for the input signal of the switching amplifier circuit. To do. Therefore, the out-of-band noise of the input signal of the switching amplifier circuit can be removed. For example, when a noise-shaped low-bit signal is directly input to the switching amplifier circuit through the digital-analog converter, the shaped out-of-band quantization noise is also input simultaneously, but the low-pass filter causes the out-of-band signal to be out of the band. Since quantization noise can also be attenuated, higher performance can be obtained.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

  Moreover, according to said invention, the influence of the noise and distortion which arise from a low-pass filter can be relieve | moderated. In other words, when the low-pass filter is configured using a resistor and a capacitor, the value of the resistor can be increased, so that the circuit area can be reduced.

  Further, according to the above invention, the limit cycle frequency can be prevented from changing greatly under the influence of variations in resistance value and capacitance of the low-pass filter using the resistor and the capacitor, or the limit cycle frequency is input. In order to optimize the trade-off between dynamic range and switching frequency by changing according to the signal amplitude, etc., the resistance of the low-pass filter is changed to a variable resistance composed of a series connection of a resistance and a channel resistance of a MOS transistor, for example. In the case of replacement, even if the resistance value of the channel resistance changes according to the input signal to generate distortion, the switching amplifier circuit can reduce the distortion. Therefore, it becomes easier to automatically adjust the limit cycle frequency than in the prior art.

  Further, according to the above invention, since the difference between the output signal of the filter and the output signal of the comparator is input to the low pass filter, the influence of the driver delay on the limit cycle frequency is reduced. Therefore, a stable limit cycle frequency can be obtained even when the driver delay is large and the driver delay changes due to process variations.

  In order to solve the above problems, a switching amplifier circuit according to the present invention includes a filter including an integrator, a first low-pass filter, a second low-pass filter, an asynchronous comparator, and a switching amplification driver. An amplifier circuit, wherein the second low-pass filter is provided in a feedback path from an output terminal of the comparator to an input terminal of the first low-pass filter, and the output signal of the filter and the second low-pass filter The difference from the output signal of the comparator filtered by is input to the first low-pass filter, the output terminal of the first low-pass filter is connected to the input terminal of the comparator, and the output terminal of the comparator is the driver Switching amplifier connected to the input terminal of The difference between the input signal and the output signal of the driver of the road is characterized in that it is input to the first filter.

  According to the above invention, since the low-pass filter is arranged between the input terminal of the comparator and the output terminal of the filter using the integrator, the low-pass filter operates as an anti-aliasing filter for the input signal of the switching amplifier circuit. To do. Therefore, the out-of-band noise of the input signal of the switching amplifier circuit can be removed. For example, when a noise-shaped low-bit signal is directly input to the switching amplifier circuit through the digital-analog converter, the shaped out-of-band quantization noise is also input simultaneously, but the low-pass filter causes the out-of-band signal to be out of the band. Since quantization noise can also be attenuated, higher performance can be obtained.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

  Moreover, according to said invention, the influence of the noise and distortion which arise from a low-pass filter can be relieve | moderated. In other words, when the low-pass filter is configured using a resistor and a capacitor, the value of the resistor can be increased, so that the circuit area can be reduced.

  Further, according to the above invention, the limit cycle frequency can be prevented from changing greatly under the influence of variations in resistance value and capacitance of the low-pass filter using the resistor and the capacitor, or the limit cycle frequency is input. In order to optimize the trade-off between dynamic range and switching frequency by changing according to the signal amplitude, etc., the resistance of the low-pass filter is changed to a variable resistance composed of a series connection of a resistance and a channel resistance of a MOS transistor, for example. In the case of replacement, even if the resistance value of the channel resistance changes according to the input signal to generate distortion, the switching amplifier circuit can reduce the distortion. Therefore, it becomes easier to automatically adjust the limit cycle frequency than in the prior art.

  Further, according to the above invention, since the difference between the output signal of the filter and the output signal of the comparator is input to the low pass filter, the influence of the driver delay on the limit cycle frequency is reduced. Therefore, a stable limit cycle frequency can be obtained even when the driver delay is large and the driver delay changes due to process variations.

  In order to solve the above problems, a switching amplifier circuit of the present invention includes a filter using an integrator, a first low-pass filter, a second low-pass filter, a third low-pass filter, an asynchronous comparator, and a switching amplifier. The second low-pass filter is provided in a feedback path from the output terminal of the comparator to the input terminal of the first low-pass filter, and the output signal of the filter; The difference between the output signal of the comparator filtered by the second low-pass filter is input to the first low-pass filter, the output terminal of the first low-pass filter is connected to the input terminal of the comparator, and the comparator Is connected to the input terminal of the above driver. The third low-pass filter is provided in a feedback path from the output terminal of the driver to the input terminal of the filter, and the input signal of the switching amplifier circuit and the driver of the driver filtered by the third low-pass filter. A difference from the output signal is input to the filter.

  According to the above invention, since the low-pass filter is arranged between the input terminal of the comparator and the output terminal of the filter using the integrator, the low-pass filter operates as an anti-aliasing filter for the input signal of the switching amplifier circuit. To do. Therefore, the out-of-band noise of the input signal of the switching amplifier circuit can be removed. For example, when a noise-shaped low-bit signal is directly input to the switching amplifier circuit through the digital-analog converter, the shaped out-of-band quantization noise is also input simultaneously, but the low-pass filter causes the out-of-band signal to be out of the band. Since quantization noise can also be attenuated, higher performance can be obtained.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

  Moreover, according to said invention, the influence of the noise and distortion which arise from a low-pass filter can be relieve | moderated. In other words, when the low-pass filter is configured using a resistor and a capacitor, the value of the resistor can be increased, so that the circuit area can be reduced.

  Further, according to the above invention, the limit cycle frequency can be prevented from changing greatly under the influence of variations in resistance value and capacitance of the low-pass filter using the resistor and the capacitor, or the limit cycle frequency is input. In order to optimize the trade-off between dynamic range and switching frequency by changing according to the signal amplitude, etc., the resistance of the low-pass filter is changed to a variable resistance composed of a series connection of a resistance and a channel resistance of a MOS transistor, for example. In the case of replacement, even if the resistance value of the channel resistance changes according to the input signal to generate distortion, the switching amplifier circuit can reduce the distortion. Therefore, it becomes easier to automatically adjust the limit cycle frequency than in the prior art.

  Further, according to the above invention, since the difference between the output signal of the filter and the output signal of the comparator is input to the low pass filter, the influence of the driver delay on the limit cycle frequency is reduced. Therefore, a stable limit cycle frequency can be obtained even when the driver delay is large and the driver delay changes due to process variations.

  Further, according to the above invention, since the third low-pass filter is provided in the feedback path from the driver output terminal to the filter input terminal using the integrator, it is out of the band included in the driver output signal. The signal can be reduced and the dynamic range required for the integrator can be relaxed.

  In order to solve the above problems, the switching amplifier circuit of the present invention is characterized in that the low-pass filter is a time-continuous low-pass filter.

  According to the above invention, by using the time continuous low-pass filter, there is an effect that the aliasing and distortion due to sampling do not occur.

  In order to solve the above problems, the switching amplifier circuit of the present invention is characterized in that the first low-pass filter is a time-continuous low-pass filter.

  According to the above invention, by using the time continuous low-pass filter, there is an effect that folding and distortion due to sampling do not occur.

  In order to solve the above problems, the switching amplifier circuit of the present invention is characterized in that the second low-pass filter is a time-continuous low-pass filter.

  According to said invention, there exists an effect that there is no aliasing and distortion by sampling by using a time continuation type low pass filter.

  In order to solve the above problems, the switching amplifier circuit of the present invention is characterized in that the second low-pass filter and the third low-pass filter are time-continuous low-pass filters.

  According to said invention, there exists an effect that there is no aliasing and distortion by sampling by using a time continuation type low pass filter.

  In the switching amplifier circuit of the present invention, in order to solve the above problems, the filter uses one or more time-continuous integrators and one or more discrete-time integrators as the integrator. It is said.

  According to the above invention, a time continuous integrator is used in a place where the occurrence of aliasing due to sampling is to be avoided, and an integrator is used by using a discrete time integrator in which characteristics are difficult to vary in other places. There is an effect that it is possible to reduce S / N degradation and characteristic variation due to the filter.

  In order to solve the above problems, the switching amplifier circuit of the present invention is configured such that the input signal of the switching amplifier circuit is a synchronous delta-sigma modulator that converts a multi-bit digital signal into an oversampled low-bit digital signal; The low-bit digital signal is an output signal from a digital-analog converter having means for converting the low-bit digital signal into an analog signal.

  According to the above invention, a multi-bit digital signal is converted into a low-bit digital signal through a synchronous delta-sigma modulator, converted into an analog signal, and then input to the switching amplifier circuit. Even if the analog signal contains noise shaped by the synchronous delta-sigma modulator, the high-frequency component is removed in the switching amplifier circuit, so that an excellent S / N characteristic can be obtained. Play.

  In addition, with the above-described configuration, it is not necessary to provide a filter for removing out-of-band noise between the digital-analog converter and the switching amplifier circuit, and low power consumption and low circuit area can be realized.

  In order to solve the above problems, the switching amplifier circuit of the present invention is characterized in that the low-pass filter includes a variable resistor related to a cutoff frequency, and a resistance value of the variable resistor is controlled.

  According to the above invention, even if there is a manufacturing variation in the cut-off frequency of the low-pass filter, the cut-off frequency can be adjusted to a predetermined value by controlling the resistance value of the variable resistor. There is an effect that the limit cycle frequency of the loop including the path and the feedback path from the driver to the filter can be made constant.

  Further, by controlling the cut-off frequency of the low-pass filter according to the input signal amplitude of the switching amplifier circuit, the dynamic range and average switching frequency of the switching amplifier circuit can be controlled according to the input signal.

  In order to solve the above problem, the switching amplifier circuit of the present invention is characterized in that the first low-pass filter includes a variable resistor related to a cutoff frequency, and a resistance value of the variable resistor is controlled.

  According to the above invention, even if there is a manufacturing variation in the cutoff frequency of the first low-pass filter, the cutoff frequency can be adjusted to a predetermined value by controlling the resistance value of the variable resistor. There is an effect that the limit cycle frequency of the loop including the path to the driver and the feedback path from the driver to the filter can be made constant.

  In the switching amplifier circuit of the present invention, in order to solve the above-mentioned problem, the second low-pass filter is configured by using one or more inductors and one or more capacitors, and the second low-pass filter. It is characterized by driving a load from the output terminal.

  According to the above invention, the load is driven from the output terminal of the LC low-pass filter that can be provided in the feedback loop by providing the first low-pass filter. Therefore, unlike the load driving from the output terminal of the LC low-pass filter that can be arranged only outside the feedback loop in the past, it is possible to realize a switching amplifier circuit that is not affected by the influence of the frequency characteristics or distortion of the LC low-pass filter. There is an effect that can be done.

  In the switching amplifier circuit of the present invention, in order to solve the above-described problem, the third low-pass filter includes one or more inductors and one or more capacitors, and the third low-pass filter It is characterized by driving a load from the output terminal.

  According to the above invention, the load is driven from the output terminal of the LC low-pass filter that can be provided in the feedback loop by providing the first low-pass filter. Therefore, unlike the load driving from the output terminal of the LC low-pass filter that can be arranged only outside the feedback loop in the past, it is possible to realize a switching amplifier circuit that is not affected by the influence of the frequency characteristics or distortion of the LC low-pass filter. There is an effect that can be done.

  In order to solve the above problems, a switching amplifier circuit of the present invention is a switching amplifier circuit including a low-pass filter, an asynchronous comparator, and a driver for switching amplification, and an output terminal of the low-pass filter is connected to the comparator. The output terminal of the comparator is connected to the input terminal of the driver, and the difference between the input signal of the switching amplifier circuit and the output signal of the driver is input to the low-pass filter. .

  According to the above invention, since the low-pass filter that determines the limit cycle frequency of the loop including the low-pass filter, the comparator, and the driver is arranged before the input terminal of the comparator, the low-pass filter is used as the input signal of the switching amplifier circuit. Works as an anti-aliasing filter. Therefore, the out-of-band noise of the input signal of the switching amplifier circuit can be removed. For example, when a noise-shaped low-bit signal is directly input to the switching amplifier circuit through the digital-analog converter, the shaped out-of-band quantization noise is also input simultaneously, but the low-pass filter causes the out-of-band signal to be out of the band. Since quantization noise can also be attenuated, higher performance can be obtained.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

  Further, according to the above invention, the low-pass filter performs both filtering of the input signal of the switching amplifier circuit and filtering of the feedback signal, so that it is possible to reduce the circuit area and the noise due to the resistance element.

  In order to solve the above problems, the switching amplifier circuit of the present invention is characterized in that the low-pass filter is a third-order or higher time continuous low-pass filter.

  According to the above invention, since the third-order or higher time continuous low-pass filter is used, the function as an anti-aliasing filter is sufficiently enhanced.

  As described above, the switching amplifier circuit of the present invention is a switching amplifier circuit including a filter using an integrator, a low-pass filter, an asynchronous comparator, and a driver for switching amplification, and an output terminal of the filter is Connected to the input terminal of the low-pass filter, the output terminal of the low-pass filter is connected to the input terminal of the comparator, the output terminal of the comparator is connected to the input terminal of the driver, and the input signal of the switching amplifier circuit and the The difference from the driver output signal is input to the filter.

  As described above, there is an effect that a switching amplifier circuit having good S / N characteristics can be realized.

Each embodiment has a great feature in that a low-pass filter is arranged in front of the comparator.
(Embodiment 1)
An embodiment of the present invention will be described below with reference to FIGS.

  FIG. 1 shows a configuration of a switching amplifier circuit 1 according to the present embodiment. The switching amplifier circuit 1 includes a subtractor 11 that calculates the difference between the input signal X of the switching amplifier circuit 1 and the output signal V of the switching amplifier circuit 1, and a loop filter that includes an integrator that integrates the output signal of the subtractor 11. 12, a subtractor 13 for calculating the difference between the output signal Y0 and the output signal V of the loop filter 12, a low-pass filter 14 for filtering the output signal Y1 of the subtractor 13, and an output signal Y2 of the low-pass filter 14 Is converted to 1 bit, and a driver 16 that is a digital driver for performing switching amplification of the output signal Z of the comparator 15 to generate an output signal V and transmitting it to a load is provided.

  Further, in the present embodiment, the order of the integrator in the loop filter 12 is second order, the front side of the two integrators is the integrator 12a, and the rear side is the integrator 12b. Further, an adder 12c for calculating the sum of the output signal of the integrator 12a and the output signal of the integrator 12b is provided, and the output signal of the adder 12c becomes the output signal Y0 of the loop filter 12.

  Further, the order of the low-pass filter 14 is assumed to be the third order. Further, the comparator 15 is an asynchronous type that does not require an external clock input.

  FIG. 2 shows a specific circuit configuration of the switching amplifier circuit 1.

  In the figure, the loop filter of the transfer function H (s) includes a plurality of resistors, a capacitor, and two operational amplifiers. That is, the integrator 12a has a configuration in which the input resistor R1 and the feedback capacitor C1 are connected to the operational amplifier 12A, and the integrator 12b has the input resistor R2 and the feedback capacitor C2 connected to the operational amplifier 12B. It is a configuration. The input resistor R1 to which the input signal X is input and the input resistor R1 to which the output signal V of the driver 16 is input are provided separately. Thereby, the subtractor 11 generates the input signal X and the output signal V. The difference is calculated. The output terminal of the operational amplifier 12A is connected to one end of the resistor Ra1, and the output terminal of the operational amplifier 12B is connected to one end of the resistor Ra2 through an inverting amplifier 12V having a gain of -1. The other end of the resistor Ra1 and the other end of the resistor Ra2 are connected to each other and connected to the input terminal of the inverting amplifier 17 having a gain of -1. The output signal of the operational amplifier 12A is input to the input terminal of the inverting amplifier 17 via the resistor Ra1, and the output signal of the operational amplifier 12B is input to the inverting amplifier 17 via the inverting amplifier 12V and the resistor Ra2. The sum of the output signal of 12a and the output signal of the integrator 12b is calculated.

  On the other hand, the low-pass filter 14 of the transfer function LPF (s) has a configuration in which primary active filters are connected in three stages in series. The configurations of the low-pass filters LPF2 (s) and LPF3 (s) shown in FIG. 2 are the same as those of LPF1 (s). Here, the active filter includes a plurality of resistors, a capacitor, and one operational amplifier. That is, the active filter has a configuration in which the input resistor R4, the feedback resistor RLP1, and the capacitor CLP1 are connected to the operational amplifier 14A. The output signal of the inverting amplifier 17 is input to the input resistor R4, and the output signal V of the driver 16 is fed back to the operational amplifier 14A via the input resistor R3. The difference between the output signal Y0 and the output signal V of the driver 16 is calculated.

  In this embodiment, the low-pass filter 105 is not provided in the feedback path from the driver 104 to the loop filter 102 as shown in FIG. 12, but the low-pass filter 14 is provided between the loop filter 12 and the comparator 15. Even in this case, the open-loop transfer function of the loop composed of the loop filter 12, the low-pass filter 14, the comparator 15, and the driver 16 can be described in the same way as in FIG. 12, and similarly generates a limit cycle. Can be made. And in this Embodiment, the improvement with respect to this limit cycle is made. This will be described below.

  A loop transfer function from the output signal V in FIG. 1 to the signal Y1 at the input terminal of the low-pass filter 14 can be given by the following equation by appropriately selecting the values of the resistors and capacitors constituting the loop filter 12 of FIG. .

  Further, the transfer characteristic of the three-stage low-pass filter 14 in FIG. 2 is given by the following equation. However, the cutoff frequencies of LPF1 (s) to LPF3 (s) are all assumed to be the same.

  Therefore, the limit cycle frequency and limit cycle amplitude can be obtained by solving the following equations.

N (A) is given by Equation (1) described above. By considering the imaginary part of equation (8), the following equation is obtained.

  Here, by designing so as to satisfy the following two expressions, the influence of the characteristic variation of the integrators 12a and 12b on the limit cycle frequency can be reduced.

  As a result, the limit cycle frequency is an expression that depends only on the cutoff frequency of the low-pass filter 14 as in the following expression.

As can be seen from a comparison between Equation (4) and Equation (11) in the conventional configuration, when a low-pass filter having the same order and the same cut-off frequency is used, the limit cycle frequency is approximately _{ωlim1 in the} conventional configuration. = Ω _file · tan (π / 6), but in the case of the configuration of FIG. 1, ω _lim2 = ω _file · tan (π / 3), and a limit cycle frequency three times higher than the conventional one is obtained. That is, when realizing the same limit frequency, the cut-off frequency of the low-pass filter 14 can be lowered. The limit cycle amplitude is given by the following equation.

  The above expression is an expression that does not depend on the characteristics of the integrators 12a and 12b by approximation to the rightmost side. A stable limit cycle amplitude can be obtained as compared with the prior art.

  Here, problems that occur in the conventional switching amplifier circuit are listed.

  (1) As described in Patent Document 2, when a low-resolution signal shaped as noise is input as an input signal of the switching amplifier circuit, or when noise or tone is included outside the band, the switching amplification of FIG. In the circuit 101, since the low-pass filter is provided only in the feedback loop, there is a problem that the S / N characteristic is deteriorated.

  (2) Further, in the switching amplifier circuit 101 of FIG. 12, in order to realize a high S / N, it is necessary to reduce noise due to the resistance of the low-pass filter 105, that is, to reduce the resistance value. Since the cut-off frequency of the low-pass filter 105 is determined by the limit cycle frequency, it is necessary to increase the capacitance value as much as the resistance value is reduced, resulting in a problem that the circuit area of the low-pass filter 105 increases. This is because, in an integrated circuit, the resistance can be realized with a relatively small area, but a large area is required to realize a high capacity.

  (3) In addition, since the characteristics of circuit elements (resistance, capacitor, transistor) constituting the low-pass filter 105 vary, the limit cycle frequency also varies. When the limit cycle frequency varies, the average switching frequency of the driver of the switching amplifier circuit 101 varies, so that the power efficiency varies. In addition, the distortion characteristics in the case of large amplitude input deteriorate. In order to make the limit cycle frequency constant, it is necessary to keep the time constant of the low-pass filter 105 constant. The resistance constituting the low-pass filter 105 is realized by connecting the resistor and the transistor in series, and the resistance value can be made variable by controlling the gate potential of the transistor, and the time constant of the filter can be corrected. . However, in the switching amplifier circuit 101 of FIG. 12, since the low-pass filter 105 is arranged in the feedback path, the distortion generated in the low-pass filter 105 appears directly at the output terminal V, so that the distortion performance is extremely deteriorated. Occurs.

  (4) Further, when the order of the loop filter 102 is increased in the switching amplifier circuit 101 of FIG. 12, since the loop filter 102 is realized by a time-continuous integrator, the filter characteristics greatly change due to variations in resistance value and capacitance value. As a result, the distortion characteristics and limit cycle frequency of the switching amplifier circuit 101 change greatly, and there is a problem that it is difficult to realize a circuit with stable characteristics. This is because when the loop filter 102 is realized by an integrated circuit, the absolute values of the resistance value and the capacitance value each vary by about ± 20%.

  (5) Furthermore, in the switching amplifier circuit 101 of FIG. 12, when the cutoff frequency of the low-pass filter 105 is high, there is a problem that the influence of the delay of the driver 104 on the limit cycle frequency becomes large.

  In the configuration of FIG. 2, the noise / distortion component due to the low-pass filter 14 appearing in the output signal V is the noise of the resistors R3, R4, RLP1 used in the low-pass filter 14 (LPF1 to LPF3), and the noise / distortion effective of the operational amplifier. The amplitude is obtained by multiplying the absolute value of the inverse characteristic 1 / H (s) of the loop filter 12, and the loop filter 12 has a large gain in a desired band. Can be small. That is, in order to achieve the same noise performance, the resistance values of the resistors R3, R4, and RLP1 can be increased as compared with the conventional case. Therefore, the capacitance value of the capacitor CLP1 can be reduced, and the circuit area can be reduced. Moreover, since the distortion of the operational amplifier 14A used in the low-pass filter 14 may be large, a simple operational amplifier can be used and the design time can be shortened.

  Further, as described above, the limit cycle frequency depends on the cut-off frequency of the low-pass filter 14, but when the low-pass filter 14 is realized by an integrated circuit, the limit cycle frequency is increased due to the influence of variations in resistance value and capacitance value. It will change. In order to avoid this, it is possible to correct the variation by replacing the resistance of the low-pass filter 14 with a series connection of the resistance and the channel resistance of the MOSFET and changing the channel resistance. At this time, the resistance value of the channel resistance changes according to the input signal and generates distortion. However, as described above, the distortion generated by the low-pass filter 14 can be reduced. Therefore, the circuit shown in FIG. 1 can be considered as a circuit in which the limit cycle frequency is easily adjusted as compared with the conventional circuit.

  The above is summarized as follows.

  By arranging the low-pass filter 14 between the input terminal of the comparator 15 and the output terminal of the loop filter 12, the low-pass filter 14 operates as an anti-aliasing filter for the input signal X of the switching amplifier circuit 1. Therefore, the out-of-band noise of the input signal X can be removed. When a noise-shaped low-bit output as described in Patent Document 2 is directly input to the switching amplifier circuit 1 of FIG. 1 through a digital-analog converter, the shaped out-of-band quantization noise is also input at the same time. However, since the low-pass filter 14 can also attenuate the quantization noise outside the band, higher performance can be obtained.

  As described above, a switching amplifier circuit with good S / N characteristics can be realized.

  3 and 4 show the simulation results. FIG. 3 is a simulation result of the spectrum of the output signal V when the 1-bit signal noise-shaped by the fifth-order synchronous delta-sigma modulator in FIG. The desired signal in the band is a sine wave of -60 dBFS, and the output period of the 1-bit signal is 5.6 MHz. On the other hand, FIG. 4 is a simulation result of the spectrum of the output signal V when the 1-bit signal noise-shaped by the fifth-order synchronous delta-sigma modulator in FIG. The desired signal in the band is a sine wave of -60 dBFS, and the output period of the 1-bit signal is 5.6 MHz.

  In the above two simulations, the same circuit parameters were used for each block. That is, only the arrangement of the low-pass filter is different, but the other parameters are exactly the same. 3 and 4, solid lines, broken lines, and alternate long and short dash lines represent the spectrum of the output signal V, the cumulative sum of output noise from zero frequency, and the ratio of the desired signal and the cumulative sum of output noise. In the result of FIG. 3, SNDR (Signal to Noise + Distortion Ratio) in the voice band (0 to 20 kHz) = 50.5 dB, but in the result of FIG. 4, SNDR = 16.89 dB. From a comparison between FIG. 3 and FIG. 4, it can be seen that the low-pass filter has less low-frequency noise and better characteristics when placed in front of the comparator.

  Moreover, in this Embodiment, as mentioned above, the influence of the noise and distortion which arise from the low-pass filter 14 can be relieved. In other words, since the resistance value of the low-pass filter 14 can be increased, the circuit area can be reduced. Further, as described above, it becomes easy to tune variations in the resistance value and the capacitance value of the low-pass filter 14.

  Further, in the present embodiment, by providing a direct path for directly applying the output signal V to the input terminal of the low-pass filter 14, the cutoff frequency of the low-pass filter is made lower than before when realizing a certain limit cycle frequency. it can. That is, the anti-aliasing function can be strengthened. In addition, a stable limit cycle amplitude can be realized.

In FIG. 1, the direct path may not be provided. Further, although an RC integrator is used as a specific example of the loop filter 12 of FIG. 1, a gmC integrator or a switched capacitor integrator (detailed in the third embodiment) may be used. The configuration of the loop filter 12 may be a fedforward type as shown in FIG. 2 or a distributed feedback type (configuration described in non-patent literature). The configuration of the loop filter employed in the delta-sigma analog-digital converter is basically applicable to the loop filter 12 of FIG. 1, and the above embodiment is shown as an example. In the configuration of FIG. 2, a single-ended circuit configuration is shown for simplification of description, but a fully differential circuit can be easily realized as well. At this time, an amplifier (inverting amplifier) having a gain of -1 can be realized by crossing the differential signals, so that the inverting amplifiers 12V and 17 shown in FIG. 2 are not necessary. Further, although all the low-pass filters 14 are arranged in front of the input terminals of the comparator 15, a part of the low-pass filters 14 may be inserted into the feedback path (refer to the third embodiment for this). The low-pass filter 14 is configured as an active filter using an operational amplifier, but may be configured as a passive filter. Further, when the input signal X is small and the distortion characteristic at the time of a large input signal does not matter, the loop filter 12 is unnecessary. Details in this case are shown in the second embodiment.
(Embodiment 2)
The following will describe another embodiment of the present invention with reference to FIG.

  FIG. 5 shows a configuration of the switching amplifier circuit 2 according to the present embodiment. The switching amplifier circuit 2 includes a low-pass filter 21 that is a passive low-pass filter that outputs the output signal Y using the input signal X and the inverted output signal XFB of the driver 23 as input signals, and an input terminal at the output terminal of the low-pass filter 21. A comparator 22 that is connected and outputs an output signal Z, and a driver 23 that is a digital driver that outputs an output signal V with an input terminal connected to the output terminal of the comparator 22 are provided. In the present embodiment, the order of the low-pass filter 21 is third order, the low-pass filter having a configuration in which the capacitor C1 is connected between one end of the rear side of the resistor R1 to which the input signal X is input and GND, and the resistor R2. A low-pass filter having a configuration in which a capacitor C2 is connected between one end on the rear stage side and GND and a low-pass filter having a configuration in which a capacitor C3 is connected between one end on the rear stage side of the resistor R3 and GND are connected in series. It is a connected configuration.

  The output signal V of the driver 23 becomes an output signal XFB by the inverting amplifier 24 having a gain of −1, and is input to another resistor R1 provided separately from the resistor R1 to which the input signal X is input. The other resistor R1 is paired with the capacitor C1 to form a low-pass filter, whereby the difference between the input signal X and the output signal XFB is input to the first-stage low-pass filter. Yes. The comparator 22 is an asynchronous comparator that does not require an external clock. This configuration corresponds to a configuration in which the loop filter 12 including an integrator is removed from the configuration of the first embodiment. Since the operation principle is the same as that described in the first embodiment, a detailed description thereof is omitted.

  The switching amplifier circuit 2 of FIG. 5 has the following effects.

  Since the low-pass filter 21 is disposed between the input terminal of the input signal X and the input terminal of the comparator 22, the low-pass filter 21 operates as an anti-aliasing filter for the input signal X. Therefore, the out-of-band noise of the input signal X can be removed. In particular, when a third-order or higher time continuous low-pass filter is used as the low-pass filter 21, the function as an anti-aliasing filter is sufficiently enhanced.

  When the low-bit digital output noise-shaped as described in Patent Document 2 is directly input as an input signal X to the switching amplifier circuit 2 of FIG. 5 through a digital-analog converter, the low-pass filter 21 performs high-frequency shaping. Since the generated noise can be attenuated, higher performance can be obtained. Further, since both the filtering of the input signal X and the filtering of the output signal XFB which is a feedback signal are performed, it is possible to reduce the circuit area and the noise due to the resistance element.

In the configuration of FIG. 5, a single-ended circuit configuration is shown for simplification of explanation, but a fully differential circuit can be easily realized in the same manner. At this time, an amplifier having a gain of -1 (inverting amplifier) can be realized by crossing the differential signals, so that the inverting amplifier 24 shown in FIG. 5 is not necessary. In the present embodiment, the low-pass filter 21 is a passive filter composed of a resistor and a capacitor, but it can also be realized as an active filter using an operational amplifier.
(Embodiment 3)
The following will describe another embodiment of the present invention with reference to FIGS.

  FIG. 6 shows a configuration of the switching amplifier circuit 3 according to the present embodiment.

  A subtractor 31 for calculating a difference between the input signal X and the feedback signal XFB, a first loop filter 32 whose transfer function is represented by H1 (s), and a second whose transfer function is represented by H2 (z). Loop filter 33, zero order hold circuit 34 whose transfer function is represented by H3 (s), and an adder for calculating the sum of the output signal of the zero order hold circuit 34 and the output signal of the first loop filter 32 35, a first low-pass filter 36 for filtering the output signal Y1 of the adder 35, a comparator 37 for converting the output signal Y2 of the first low-pass filter 36 into 1 bit, and an output signal Z of the comparator 37 as a load The driver 38, which is a digital driver that performs switching amplification to transmit to the driver, and the output signal V of the driver 38 is filtered and the above subtraction And a second low-pass filter 39 for feedback to 31. In addition, a switch SW 1 for sampling the time continuous output signal of the first loop filter 32 is provided on the upstream side of the second loop filter 33 and the zero order hold circuit 34.

  In the present embodiment, the order of the first loop filter 32 is primary, the order of the second loop filter 33 is primary, the order of the first low-pass filter 36 is secondary, and the second low-pass filter 39. Is the first order. Further, the comparator 37 is an asynchronous type that does not require an external clock input.

  FIG. 7 shows a specific circuit configuration of the switching amplifier circuit 3 of FIG.

  In FIG. 7, the first loop filter 32 includes a plurality of resistors and capacitors and an operational amplifier circuit. In other words, the operational amplifier 32A is connected to the input resistor R1 and the feedback capacitor C1.

  Further, a capacitor C2s is provided between the output terminal of the first loop filter 32 and the input terminal of the operational amplifier 33A of the second loop filter 33. The switch SW1 connects the capacitor C2s to the output terminal of the first loop filter 32 and the ground potential in the period φ1 during which the capacitor C2s samples the output signal of the first loop filter 32, and causes the capacitor C2s to sample. It is provided as a toggle switch that connects the capacitor C2s to the ground potential and the inverting input terminal of the operational amplifier 33A in the period φ2 during which the signal is held in the zero order. A feedback capacitor C2f is connected to the operational amplifier 33A. Thus, a block in which the switch SW1, the second loop filter 33, and the zero order hold circuit 34 are combined is configured.

  The output terminal of the first loop filter 32 is connected to the same location via the resistor Ra2, and the output terminal of the operational amplifier 33A is connected to the same location via the resistor Ra1, thereby forming the adder 35. Yes.

  On the other hand, the first and second low-pass filters 36 and 39 are passive filters each composed of a resistor and a capacitor. The first low-pass filter 36 has a configuration in which a capacitor CLP1 is connected between one end on the front stage side of the resistor RLP2 and GND, and a capacitor CLP2 is connected between one end on the rear stage side of the resistor RLP2 and GND. The second low-pass filter 39 has a configuration in which a capacitor CLP3 is connected between one end of the resistor RLP3 on the feedback destination side and GND.

  At a frequency sufficiently lower than the sampling frequency of the second loop filter 33 (ω << 1 / Ts), the transfer characteristic of the first-order second loop filter 33 is given by the following equation.

Here, a2 = C2s / C2f. On the other hand, the transfer characteristic of zero order hold is given by the following equation.

  Accordingly, the transfer characteristic of the second loop filter 33 and the sample and hold circuit is given by the following equation.

  That is, by increasing the sampling frequency (1 / Ts), the first and second loop filters 32 and 33 and the zero-order hold circuit 34 in FIG. 7 can transmit approximately the same transmission as the loop filter 12 in FIG. It can be seen that it exhibits characteristics. The principle of operation is the same as that of the switching amplifier circuit 1 of FIG.

  The circuits shown in FIGS. 6 and 7 further have the following effects compared to the configuration of the first embodiment.

  When a large input signal X is input, the output signal V is usually distorted. In order to reduce this distortion, it is necessary to increase the order of the loop filter 12 of FIG. 1 and increase the gain of the loop filter 12 in a desired band. However, when the loop filter 12 is configured using a time-continuous type (transfer characteristic is represented by s) integrator, the resistance value and the capacitance value vary due to the integration, resulting in characteristic deterioration. On the other hand, in the case of a discrete-time type (transfer characteristic represented by z) integrator, the characteristic of the integrator is determined by the capacitance ratio a2 and the sampling time, and therefore the characteristic does not vary even when integrated. Therefore, by using the configuration of FIG. 7, a high-order loop filter that is not easily affected by variations can be easily realized.

  Here, the output signal V is a time-continuous signal having a high-frequency component. In order to avoid aliasing due to the sampling operation, the first loop filter 32 is preferably configured using a time-continuous integrator. Further, when the first loop filter 32 has a second or higher order, the order of the first loop filter 32 is preferably the first order (one integrator) because it is affected by characteristic variations. The variation in resistance value and capacitance value of the first loop filter 32 is caused by the frequency characteristics of the transfer function (loop gain) from the terminal to which the output signal V is connected (terminal to which the input signal X is connected) to the output signal Y1. 7 is not easily affected by variations in the resistance value and the capacitance value of the first loop filter 32.

  As described above, the entire loop filter may be configured using one or more time-continuous integrators and one or more discrete-time integrators. By using time-continuous integrators where it is desired to avoid aliasing due to sampling, and using discrete-time integrators where characteristics are difficult to vary at other locations, S / N degradation and characteristic variations due to loop filters Can be reduced.

  The output signal V has a large power near the limit cycle frequency. Further, it includes a lot of high frequency noise generated by the power source of the driver 38 and the driver 38 itself. Therefore, when the low-pass filter is not disposed in the feedback path and the low-pass filter is disposed only immediately before the comparator 36 as in the first embodiment, the above-described noise component is aliased by the sampling operation of the second loop filter 33. May be folded back into the band to deteriorate the characteristics. Therefore, when the switched capacitor circuit is arranged in the loop filter as shown in FIG. 7, it is preferable to arrange the low-pass filter separately before the input of the comparator 36 and the feedback path.

Although the single-end circuit configuration is shown in the configuration of FIG. 7 for the sake of simplicity of explanation, a fully differential circuit can be easily realized in the same manner. In this embodiment, the low-pass filter 36 is a passive filter composed of a resistor and a capacitor, but it can also be realized as an active filter using an operational amplifier. Further, in the present embodiment, the direct feedback path as shown in the first embodiment is not provided. However, similar to the first embodiment, the feedback path from the output signal XFB to the output signal Y1 is provided. The effect similar to that shown in the first embodiment can be obtained.
(Embodiment 4)
The following will describe another embodiment of the present invention with reference to FIGS.

  In the first embodiment, it has been described that the limit cycle frequency greatly depends on the performance. It was also stated that the limit cycle frequency depends on the cut-off frequency and order of the low-pass filter. In order to optimize the tradeoff between the dynamic range and the switching frequency by making the limit cycle frequency of the first embodiment less susceptible to process variations or changing the limit cycle frequency according to the input signal amplitude or the like Needs to automatically adjust the cut-off frequency of the low-pass filter.

  FIG. 8 shows a configuration in which the resistance value of the first-order low-pass filter LPF1 (same for LPF2 and LPF3) in FIG. 2 is variable. The cutoff frequency of the filter LPF can be changed.

  MOSFET: M1 is inserted between a terminal VX that is a connection point between the resistors RLP1 and RLP2 and a terminal VIT that is a connection point between the capacitor CLP1 and the inverting input terminal of the operational amplifier 14A. However, the resistor RLP1 corresponds to the resistor R4 in FIG. 2, and the resistor RLP2 corresponds to the resistor RLP1 in FIG. By increasing the voltage value of the control voltage VCTL1, which is the gate voltage of the MOSFET M1, the resistance value (channel resistance) between the source and drain of the MOSFET M1 can be lowered. The channel resistance is a variable resistance.

  On the other hand, the MOSFET M2 is inserted between the terminal VX and a certain reference voltage (here, ground potential). By increasing the voltage value of the control voltage VCTL2, which is the gate voltage of the MOSFET: M2, the resistance value (channel resistance) between the source and drain of the MOSFET: M2 can be lowered, and the terminal VX and the terminal VIT are indirectly The resistance value can be increased. The channel resistance is a variable resistance.

  As described above, by making the resistance value variable by using the MOSFETs M1 and M2, the voltage change at the terminal VX can be made smaller than the input / output signal amplitude of the low-pass filter in FIG. 8, and the distortion can be reduced. It can be carried out.

  The transfer characteristic of the low-pass filter of FIG. 8 is given by the following equation.

Here, it is assumed that R _eq1 and R _eq2 are resistance values (channel resistance values) between the drains and sources of MOSFETs M1 and M2, respectively. Therefore, the time constant of the low-pass filter LPF can be changed from C _LP1 · R _LP2 to ∞ by changing the control voltage VCTL1 and the control voltage VCTL2.

Next, FIG. 9 shows an example of a circuit that generates the control voltage VCTL1 and the control voltage VCTL2. The control voltage generation circuit of FIG. 9 includes a switched capacitor resistor R_SCREF composed of a switch and a capacitor that operate with a reference clock, and two MOSFETs M1D.M of the same size as the MOSFETs M1 and M2 of FIG. An integrator composed of M2D, a resistor R1, a capacitor Cint1, and an operational amplifier; a low-pass filter LPFRC (s) composed of a resistor R _LP and a capacitor C _LP for removing the high frequency of the integrator output; A buffer circuit for buffering the output of the low-pass filter LPFRC (s), an inverting amplifier circuit AMPINV for inverting the output of the buffer circuit with respect to a certain reference voltage, and a voltage for generating the reference voltage The generation circuit BIAGEN is formed. The output of the buffer circuit and the output of the inverting amplifier circuit are connected to the gate terminals of MOSFETs M1D and M2D, respectively, and generate the control voltage VCTL1 and the control voltage VCTL2.

  Details of the circuit operation of FIG. 9 can be easily understood by referring to Non-Patent Document 2 and Non-Patent Document 3, for example, and thus the description is omitted.

  By applying the automatic control circuit using the feedback loop as described above to the switching amplifier circuit shown in the first to third embodiments, a stable limit cycle frequency can be obtained and the influence of process variations on characteristics can be reduced. It becomes possible.

Also, a circuit that automatically adjusts the limit cycle frequency to the frequency of the external clock using a low-pass filter with a variable cutoff frequency as shown in FIG. 8 and an automatic adjustment method using a PLL circuit as shown in Non-Patent Document 4 is easy. Can be realized.
(Embodiment 5)
The following will describe another embodiment of the present invention with reference to FIGS. The configuration of FIGS. 10 and 11 is basically the same as the configuration of FIG. Differences will be described below.

  FIG. 10 shows a configuration of the switching amplifier circuit 4 according to the present embodiment.

  In FIG. 10, the difference between the output signal Y0 of the loop filter 12 and the output signal Y3 of the comparator 15 is input as the input signal Y1 of the low-pass filter 14. At this time, the loop transfer characteristic corresponding to the equation (6) is given by the following equation.

Here, τ _d represents the delay of the driver 16. An expression corresponding to the expression (9) is given by the following expression.

  Assuming equation (10) as in the first embodiment, the limit cycle frequency is given by equation (11).

  Therefore, in the configuration of FIG. 10, the influence of the delay of the driver 16 on the limit cycle frequency is reduced. Therefore, a stable limit cycle frequency can be obtained even when the driver delay is large and the driver delay changes due to process variations. This means that the problem (5) of the prior art described in the first embodiment is solved.

  In the configuration of FIG. 10, a low-pass filter may be provided in the feedback path from the output terminal of the comparator 15 to the input terminal of the low-pass filter 14. At this time, the low-pass filter 14 is a first low-pass filter, and the low-pass filter provided in the feedback path is a second low-pass filter.

  Further, in the above configuration, a low-pass filter may be provided in the feedback path from the output terminal of the driver 16 to the input terminal of the loop filter 12. At this time, the low-pass filter is a third low-pass filter. According to this, since the third low-pass filter functions as a low-pass filter for the output signal V, the high-frequency component of the signal V fed back from the driver 16 to the loop filter 12 can be reduced. The required dynamic range can be relaxed.

  Further, in FIG. 11, a low-pass filter LPF_LC (s) composed of an inductor and a capacitor is added between the output terminal of the driver 16 and the terminal from which the output signal V is output, compared to the structure of FIG. It is a configuration. The low-pass filter 14 is a first low-pass filter, and the low-pass filter LPF_LC (s) is a second low-pass filter. However, the load is driven from the output terminal of the low-pass filter LPF_LC (s).

  Considering the same as in the first embodiment, the limit cycle frequency is determined by the characteristics of the low-pass filters LPF (s) and LPF_LC (s). In a digital audio CLASS-D amplifier or the like, an LC low-pass filter is often used to remove noise outside the audio band without degrading power efficiency, but the LC filter is arranged outside the feedback loop. This is because if a low-pass filter having a low cut-off frequency is arranged in the feedback loop, the circuit oscillates and desired characteristics cannot be obtained. In the switching amplifier circuit 5 of the present embodiment, LPF_LC (s) can be included in the loop, so that it is possible to realize a switching amplifier circuit that is not affected by the frequency characteristics of the LC filter or the distortion of the LC filter. . One or more inductors and capacitors may be provided.

  Further, since the low-pass filter LPF_LC (s) functions as a low-pass filter for the output signal of the driver 16, the high-frequency component of the signal fed back from the driver 16 to the loop filter 12 and the low-pass filter 14 can be reduced. The dynamic range required for the filter 12 can be relaxed.

  Each embodiment has been described above. In each of the above embodiments, each low-pass filter is preferably a time continuous low-pass filter. By using the time continuous low-pass filter, unlike the case of using the discrete-time low-pass filter, distortion due to sampling does not occur.

  As an example of the input signal X of each switching amplifier circuit, a synchronous delta-sigma modulator that converts a multi-bit digital signal into an oversampled low-bit digital signal, and the low-bit digital signal that is converted into an analog signal. And an output signal from a digital-to-analog converter provided with a means. According to this, since the number of output bits of the synchronous delta-sigma modulator is larger than 1, the high frequency component of the quantization noise included in the output signal shaped by the modulator has an output bit number of 1 bit. It can be suppressed smaller than the case. Therefore, in a system in which a multi-bit digital signal is converted into a low-bit digital signal through a synchronous delta-sigma modulator and converted to an analog signal and then input to the switching amplifier circuit, the multi-bit digital signal is synchronized with the analog signal input to the switching amplifier circuit. Even if the quantization noise shaped by the delta-sigma modulator is included, the high-frequency component of the quantization noise can be suppressed to be small, so that the high-frequency component is further reduced in the switching amplifier circuit, Good S / N characteristics can be obtained.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The present invention can be suitably used for a digital audio amplifier.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates a first embodiment of the present invention and is a block diagram illustrating a configuration of a switching amplifier circuit. FIG. 2 is a block diagram illustrating a detailed configuration of the switching amplifier circuit of FIG. 1. It is a graph which shows the characteristic of the switching amplifier circuit of FIG. It is a graph which shows the characteristic of the conventional switching amplifier circuit. FIG. 7 is a block diagram illustrating a configuration of a switching amplifier circuit according to a second embodiment of the present invention. FIG. 9 is a block diagram illustrating a configuration of a switching amplifier circuit according to a third embodiment of the present invention. FIG. 7 is a block diagram showing a detailed configuration of the switching amplifier circuit of FIG. 6. FIG. 9 is a circuit diagram illustrating a configuration of a low-pass filter provided in a switching amplifier circuit according to a fourth embodiment of the present invention. It is a circuit diagram which shows the structure which generates the control voltage supplied to MOSFET of the low-pass filter of FIG. FIG. 9 is a block diagram illustrating a first configuration of a switching amplifier circuit according to a fifth embodiment of the present invention. FIG. 24 is a block diagram illustrating a second configuration of the switching amplifier circuit according to the fifth embodiment of the present invention. It is a block diagram which shows a prior art and shows the structure of a switching amplifier circuit.

Explanation of symbols

1-5 Switching amplifier circuit 12 Loop filter (filter using integrator)
12a, 12b Integrator 14, 21 Low-pass filter 15, 22, 37 Comparator 16, 23, 38 Driver 36 Low-pass filter (first low-pass filter)
39 Low-pass filter (second low-pass filter)
X input signal V output signal L1 inductor C1 capacitor

Claims (19)

A switching amplifier circuit including a filter using an integrator, a low-pass filter, an asynchronous comparator, and a driver for switching amplification,
The output terminal of the filter is connected to the input terminal of the low-pass filter, the output terminal of the low-pass filter is connected to the input terminal of the comparator, the output terminal of the comparator is connected to the input terminal of the driver, and the switching amplification A switching amplifier circuit, wherein a difference between an input signal of the circuit and an output signal of the driver is input to the filter. A switching amplifier circuit including a filter using an integrator, a first low-pass filter, a second low-pass filter, an asynchronous comparator, and a driver for switching amplification,
The output terminal of the filter is connected to the input terminal of the first low-pass filter, the output terminal of the first low-pass filter is connected to the input terminal of the comparator, and the output terminal of the comparator is connected to the input terminal of the driver. Connected,
The second low-pass filter is provided in a feedback path from an output terminal of the driver to an input terminal of the filter, and an input signal of the switching amplifier circuit and an output signal of the driver filtered by the second low-pass filter A switching amplifier circuit, wherein the difference between the two is input to the filter. A switching amplifier circuit including a filter using an integrator, a low-pass filter, an asynchronous comparator, and a driver for switching amplification,
The difference between the output signal of the filter and the output signal of the driver is input to the low-pass filter, the output terminal of the low-pass filter is connected to the input terminal of the comparator, and the output terminal of the comparator is connected to the input terminal of the driver. A switching amplifier circuit, wherein a difference between an output signal of the driver and an input signal of the switching amplifier circuit is input to the filter. A switching amplifier circuit including a filter using an integrator, a first low-pass filter, a second low-pass filter, an asynchronous comparator, and a driver for switching amplification,
The second low-pass filter is provided in a feedback path from an output terminal of the driver to an input terminal of the filter and an input terminal of the first low-pass filter,
The difference between the output signal of the filter and the output signal of the driver filtered by the second low-pass filter is input to the first low-pass filter,
The output terminal of the first low-pass filter is connected to the input terminal of the comparator, the output terminal of the comparator is connected to the input terminal of the driver,
A switching amplifier circuit, wherein a difference between an input signal of the switching amplifier circuit and an output signal of the driver filtered by the second low-pass filter is input to the filter. A switching amplifier circuit including a filter using an integrator, a low-pass filter, an asynchronous comparator, and a driver for switching amplification,
The difference between the output signal of the filter and the output signal of the comparator is input to the low pass filter,
The output terminal of the low-pass filter is connected to the input terminal of the comparator, the output terminal of the comparator is connected to the input terminal of the driver,
The switching amplifier circuit, wherein a difference between an input signal of the switching amplifier circuit and an output signal of the driver is input to the filter. A switching amplifier circuit including a filter using an integrator, a first low-pass filter, a second low-pass filter, an asynchronous comparator, and a driver for switching amplification,
The second low-pass filter is provided in a feedback path from an output terminal of the comparator to an input terminal of the first low-pass filter;
The difference between the output signal of the filter and the output signal of the comparator filtered by the second low-pass filter is input to the first low-pass filter, and the output terminal of the first low-pass filter is the input of the comparator. The output terminal of the comparator is connected to the input terminal of the driver,
The switching amplifier circuit, wherein a difference between an input signal of the switching amplifier circuit and an output signal of the driver is input to the first filter. A switching amplifier circuit including a filter using an integrator, a first low-pass filter, a second low-pass filter, a third low-pass filter, an asynchronous comparator, and a driver for switching amplification,
The second low-pass filter is provided in a feedback path from an output terminal of the comparator to an input terminal of the first low-pass filter;
The difference between the output signal of the filter and the output signal of the comparator filtered by the second low-pass filter is input to the first low-pass filter, and the output terminal of the first low-pass filter is the input of the comparator. The output terminal of the comparator is connected to the input terminal of the driver,
The third low-pass filter is provided in a feedback path from the output terminal of the driver to the input terminal of the filter;
A switching amplifier circuit, wherein a difference between an input signal of the switching amplifier circuit and an output signal of the driver filtered by the third low-pass filter is input to the filter.   6. The switching amplifier circuit according to claim 1, wherein the low-pass filter is a time continuous low-pass filter.   8. The switching amplifier circuit according to claim 2, wherein the first low-pass filter is a time continuous low-pass filter.   7. The switching amplifier circuit according to claim 2, wherein the second low-pass filter is a time continuous low-pass filter.   8. The switching amplifier circuit according to claim 7, wherein the second low-pass filter and the third low-pass filter are time-continuous low-pass filters.   8. The switching amplifier circuit according to claim 1, wherein the filter uses one or more time-continuous integrators and one or more discrete-time integrators as the integrator. .   The input signal of the switching amplifier circuit includes a synchronous delta-sigma modulator that converts a multi-bit digital signal into an oversampled low-bit digital signal, and means for converting the low-bit digital signal into an analog signal. 8. The switching amplifier circuit according to claim 1, wherein the switching amplifier circuit is an output signal from a digital-analog converter. The low-pass filter includes a variable resistor related to the cutoff frequency,
6. The switching amplifier circuit according to claim 1, wherein a resistance value of the variable resistor is controlled. The first low-pass filter includes a variable resistor related to a cutoff frequency,
8. The switching amplifier circuit according to claim 2, wherein a resistance value of the variable resistor is controlled.   3. The second low-pass filter is configured using one or a plurality of inductors and one or a plurality of capacitors, and drives a load from an output terminal of the second low-pass filter. Or the switching amplifier circuit of 4.   8. The third low-pass filter is configured by using one or a plurality of inductors and one or a plurality of capacitors, and drives a load from an output terminal of the third low-pass filter. The switching amplifier circuit according to 1. A switching amplifier circuit comprising a low-pass filter, an asynchronous comparator, and a driver for switching amplification,
The output terminal of the low-pass filter is connected to the input terminal of the comparator, the output terminal of the comparator is connected to the input terminal of the driver, and the difference between the input signal of the switching amplifier circuit and the output signal of the driver is the low-pass filter. A switching amplifier circuit which is input to a filter.   19. The switching amplifier circuit according to claim 18, wherein the low-pass filter is a third-order or higher time continuous low-pass filter.

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