JP2006178923A5 - - Google Patents

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JP2006178923A5
JP2006178923A5 JP2005198969A JP2005198969A JP2006178923A5 JP 2006178923 A5 JP2006178923 A5 JP 2006178923A5 JP 2005198969 A JP2005198969 A JP 2005198969A JP 2005198969 A JP2005198969 A JP 2005198969A JP 2006178923 A5 JP2006178923 A5 JP 2006178923A5
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Prior art keywords
performance
storage device
data
host device
management unit
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JP2005198969A
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Japanese (ja)
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JP4874588B2 (en
JP2006178923A (en
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Priority to JP2005198969A priority Critical patent/JP4874588B2/en
Priority claimed from JP2005198969A external-priority patent/JP4874588B2/en
Publication of JP2006178923A publication Critical patent/JP2006178923A/en
Publication of JP2006178923A5 publication Critical patent/JP2006178923A5/ja
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Claims (14)

データを記憶する半導体メモリと、
外部からの要求に応じて前記半導体メモリにデータを書き込む指示を行うコントローラと、
前記コントローラ内に設けられ、性能に応じて分類された複数の性能クラスのうちの1つの性能クラスの情報を保持するレジスタと、
を具備し、
外部からの命令に応答して、前記1つの性能クラスの情報を外部に出力するように構成されている記憶デバイスであって、
前記1つの性能クラスは、前記複数の性能クラス毎に規定されている最小性能を前記記憶デバイスが満足していることを示している、
ことを特徴とする記憶デバイス。
A semiconductor memory for storing data;
A controller that issues an instruction to write data to the semiconductor memory in response to an external request;
Provided in said controller, and Relais register to hold information of one performance class of a plurality of performance classes classified according to the performance,
Comprising
A storage device configured to output information of the one performance class to the outside in response to an instruction from the outside ;
The one performance class indicates that the storage device satisfies the minimum performance defined for each of the plurality of performance classes.
A storage device characterized by that.
前記レジスタが、前記半導体メモリおよび前記コントローラの性能に関する性能パラメータ情報をさらに保持することを特徴とする請求項1に記載の記憶デバイス。   The storage device according to claim 1, wherein the register further holds performance parameter information related to performance of the semiconductor memory and the controller. 前記性能パラメータ情報は、前記メモリ内でのデータの移動に要する移動速度と、前記記憶デバイスを用いるホスト機器が用いる、記憶領域の管理単位領域の大きさと、の少なくとも1つを含むことを特徴とする請求項2に記載の記憶デバイス。   The performance parameter information includes at least one of a moving speed required for moving data in the memory and a size of a management unit area of a storage area used by a host device using the storage device. The storage device according to claim 2. ファイル情報の更新の前後においてデータ書き込みについて同じ書き込み性能を維持するように構成されていることを特徴とする請求項1に記載の記憶デバイス。   2. The storage device according to claim 1, wherein the storage device is configured to maintain the same writing performance for data writing before and after the file information is updated. 前記半導体メモリと、前記コントローラと、を覆う外囲器と、
前記外囲器上に設けられ、前記性能クラスを表示する表示部と、
をさらに具備することを特徴とする請求項1に記載の記憶デバイス。
An envelope covering said semiconductor memory, and said controller, and
Provided on the envelope, a display unit for displaying the previous SL performance class,
The storage device according to claim 1, further comprising:
複数のデータ転送レートモードをサポートし、
複数の性能クラスのうちの1つを示す性能クラス情報を記憶している記憶デバイスとの間でデータを転送し、
前記性能クラス情報から計算される最大のデータ転送レートモード、またはそれ以下のデータ転送レートモードの少なくとも1つのデータ転送レートモードが選択可能である、
ことを特徴とするホスト機器。
Supports multiple data transfer rate modes,
Transferring data to and from a storage device storing performance class information indicating one of a plurality of performance classes;
The maximum data transfer rate mode calculated from the performance class information, or at least one data transfer rate mode lower than that can be selected.
A host device characterized by that.
前記記憶デバイスから前記記憶デバイスの性能に関する性能パラメータを読み出し、前記性能パラメータを用いて計算を行うことを特徴とする請求項6に記載のホスト機器。   The host apparatus according to claim 6, wherein a performance parameter related to performance of the storage device is read from the storage device, and calculation is performed using the performance parameter. 前記半導体メモリのメモリ領域を、それぞれが複数の書き込み単位領域からなる複数の管理単位領域によって管理し、
複数の前記管理単位領域内の使用状態に応じて、複数の前記管理単位領域を、前記性能パラメータを用いて、要求される性能でのデータの書き込みが可能な適合管理単位領域と不可能な不適管理単位領域とに分類する、
ことを特徴とする請求項7に記載のホスト機器。
Managing the memory area of the semiconductor memory by a plurality of management unit areas each consisting of a plurality of write unit areas;
Depending on the usage state in the plurality of management unit areas, the plurality of management unit areas can be changed to conformity management unit areas where data can be written with the required performance using the performance parameters and improper improperness. Categorized as management unit area,
The host device according to claim 7.
前記適合管理単位領域をリアルタイム書き込みに用いることを特徴とする請求項8に記載のホスト機器。   9. The host device according to claim 8, wherein the conformity management unit area is used for real-time writing. ホスト機器が前記記憶デバイスに書き込みデータを転送する際の平均データ転送レートと前記適合管理単位領域の数とを用いて、前記要求される性能でのデータの書き込みが可能な残存記録時間を計算することを特徴とする請求項9に記載のホスト機器。 The remaining recording time during which data can be written with the required performance is calculated using the average data transfer rate when the host device transfers the write data to the storage device and the number of the adaptive management unit areas. The host device according to claim 9. 前記記憶デバイスの前記性能クラス情報が“0”の場合、この記憶デバイスに前記性能クラスが定義されていないと判定することを特徴とする請求項6に記載のホスト機器。   The host device according to claim 6, wherein when the performance class information of the storage device is “0”, it is determined that the performance class is not defined in the storage device. 前記記憶デバイスの性能が前記ホスト機器が求める第1性能を満たすことができない場合、前記第1性能より低い第2性能で前記記憶デバイスにデータを書き込むことを特徴とする請求項6に記載のホスト機器。   7. The host according to claim 6, wherein when the performance of the storage device cannot satisfy the first performance required by the host device, data is written to the storage device with a second performance lower than the first performance. machine. 前記記憶デバイスにデータを書き込めない間、書き込み要求されている書き込みデータを前記ホスト機器のバッファで保存することを特徴とする請求項6に記載にホスト機器。 The host device according to claim 6, wherein write data requested to be written is stored in a buffer of the host device while data cannot be written to the storage device. 外囲器と、
前記外囲器上に設けられ、ホスト機器に設定された前記性能クラスを表示する表示部と、
をさらに具備することを特徴とする請求項6に記載のホスト機器。
An envelope,
A display unit provided on the envelope and displaying the performance class set in the host device;
The host device according to claim 6, further comprising:
JP2005198969A 2004-07-12 2005-07-07 Storage device and host device Active JP4874588B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005198969A JP4874588B2 (en) 2004-07-12 2005-07-07 Storage device and host device

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2004204028 2004-07-12
JP2004204028 2004-07-12
JP2004342275 2004-11-26
JP2004342275 2004-11-26
JP2005198969A JP4874588B2 (en) 2004-07-12 2005-07-07 Storage device and host device

Publications (3)

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JP2006178923A JP2006178923A (en) 2006-07-06
JP2006178923A5 true JP2006178923A5 (en) 2007-06-07
JP4874588B2 JP4874588B2 (en) 2012-02-15

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JP2008152464A (en) 2006-12-15 2008-07-03 Toshiba Corp Storage device
JP5166118B2 (en) 2008-05-21 2013-03-21 株式会社東芝 Method for controlling semiconductor memory
US8266371B2 (en) 2008-07-30 2012-09-11 Panasonic Corporation Non-volatile storage device, host device, non-volatile storage system, data recording method, and program
JP5175703B2 (en) 2008-12-11 2013-04-03 株式会社東芝 Memory device
KR20110032606A (en) 2009-09-23 2011-03-30 삼성전자주식회사 Electronic device controller for improving performance of the electronic device
CN104583973B (en) 2012-08-07 2017-09-08 松下知识产权经营株式会社 Tape deck, record system and recording method
JP5976608B2 (en) 2012-10-30 2016-08-23 株式会社東芝 Memory device
JP7263017B2 (en) * 2019-01-15 2023-04-24 キヤノン株式会社 Recording control device and its control method
WO2020179851A1 (en) * 2019-03-05 2020-09-10 パナソニックIpマネジメント株式会社 Recording control system, control device, recording control method, and recording medium
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