JP2006173505A - Semiconductor wafer, heating control method therefor, and burn-in system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To eliminate temperature variation within a wafer surface at the burn-in measurement time on a wafer level so that stable temperature control may be implemented. <P>SOLUTION: The structure of a semiconductor wafer 1 is formed by separating multiple semiconductor devices 2 through scribing lanes 3, and a heating element 4 heating each semiconductor device 2 is provided at least either in each semiconductor device 2 or in the scribe lane 3. In this way, it is possible at the time of measuring the burn-in to control the heating of the semiconductor device 2 by using the heating element 4, thus enabling the temperature on the wafer plane to be uniform. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor wafer, a heating control method thereof, and a burn-in apparatus, and more particularly, to a temperature control mechanism for burn-in that collectively inspects a plurality of semiconductor devices formed on a semiconductor wafer in a wafer state.

  In general, a plurality of semiconductor integrated circuits are formed on a semiconductor wafer through a diffusion process, divided into individual semiconductor devices, and each divided semiconductor device is electrically connected to a lead frame by a bonding wire, and resin Molded with ceramics and ceramics.

  In general, in order to prevent troubles after mounting a semiconductor device, a power supply voltage due to a rating or slight overvoltage is applied to the semiconductor device, and a signal close to actual operation is applied to each signal input terminal for several hours to a predetermined high temperature state. A burn-in test is performed.

  Conventionally, burn-in has been performed on a semiconductor device in a product state, but in recent years, it has begun to be performed in a semiconductor wafer state. This is because the defect in the process is found before assembly, thereby shortening the inspection time in the subsequent process, reducing the inspection cost, and improving the productivity.

For temperature control during burn-in, the temperature of the metal plate in close contact with the semiconductor wafer is monitored by a temperature sensor (thermocouple), heated by a heater placed at the top of the device, and air cooled by a cooling fan from above or from the side. Heating and cooling control of adjusting to a set temperature is performed (see Patent Documents 1 and 2).
JP 2000-138269 A Japanese Patent Laid-Open No. 2-153533

  When an electric load is applied to the semiconductor wafer during burn-in and a current flows through each semiconductor device, the temperature of the semiconductor wafer rises due to self-heating of the semiconductor device. Among the semiconductor devices of a semiconductor wafer, there are circuit defective devices due to process defects, etc., so the distribution of non-defective devices and defective devices is individual for each semiconductor wafer, and within the wafer surface during burn-in The temperature distribution at the self-heating point and the non-heating point in the case is also various.

  With respect to such semiconductor wafers, the conventional temperature control system as described above may have increased the wafer diameter, so it is difficult to level the temperature variation within the wafer surface, and the temperature varies from one semiconductor wafer to another. Temperature control corresponding to the distribution is also very difficult.

  An object of the present invention is to eliminate temperature variations in the wafer surface during burn-in measurement at the wafer level and to enable stable temperature control.

  In order to solve the above problems, a semiconductor wafer of the present invention is formed by separating a plurality of semiconductor devices from each other via a scribe lane, and heating elements for heating the semiconductor device are provided in the semiconductor device and the scribe lane. It is provided in at least one. Thereby, heating control of each semiconductor device can be performed by the heating element at the time of burn-in measurement, and a uniform temperature can be achieved within the wafer surface.

  Preferably, the heating element is configured so that each semiconductor device can be individually heated. A temperature monitoring element is provided for each of the heating elements. A current resistance element can be used as the temperature monitoring element. It is preferable that a control line and a switch element for controlling heating by each heating element are provided in the scribe lane.

  The semiconductor wafer heating control method of the present invention monitors the temperature distribution of the entire surface of the semiconductor wafer while energizing each semiconductor device when the semiconductor wafer is burned-in in the wafer state. The heating by the plurality of heating elements is individually controlled so that the temperature of the entire surface of the wafer is uniform.

For example, the temperature distribution on the entire surface of the semiconductor wafer is monitored by a temperature monitor element provided inside or outside the semiconductor wafer.
Also, the semiconductor wafer heating control method of the present invention predicts the heat generation of each semiconductor device from the good / bad information of the semiconductor device from the previous process when the semiconductor wafer is burned in the wafer state, and based on the prediction result. Thus, the heating by a plurality of heating elements is individually controlled so that the temperature of the entire surface of the semiconductor wafer becomes uniform.

For example, a defective semiconductor device is heated by a heating element.
Control of heating by each heating element can be performed by a current applied to the heating element.
The burn-in apparatus of the present invention is a burn-in apparatus for burning in the above-described semiconductor wafer in a wafer state, and a wafer in which a semiconductor wafer, a wafer tray, and a contact sheet collectively connected to a connection portion on the semiconductor wafer are integrated. A relay for supplying an electrical signal from the outside to a semiconductor integrated circuit of each semiconductor device of a semiconductor wafer through a processing chamber provided with a wafer cassette storage section for storing the cassette and a contact sheet of the wafer cassette stored in the wafer cassette storage section A heating mechanism for heating each of a plurality of heating elements that heat the semiconductor wafer of the board and the wafer cassette, and a low-temperature location from the good / bad information of the semiconductor device from the previous process, and feeding back to the heating mechanism The entire surface of the semiconductor wafer Degrees is characterized by comprising a first temperature control means for individually controlling the heating by the heating elements to be uniform.

  The burn-in apparatus of the present invention is a burn-in apparatus for burning in the above-described semiconductor wafer in a wafer state, and the semiconductor wafer, the wafer tray, and the contact sheet collectively connected to the connection portion on the semiconductor wafer are integrated. An external electrical signal is applied to a semiconductor integrated circuit of each semiconductor device of a semiconductor wafer through a contact sheet of the wafer cassette stored in the wafer cassette storage section into a processing chamber provided with a wafer cassette storage section for storing the wafer cassette. A relay board, a heating mechanism for heating a plurality of heating elements for heating the semiconductor wafer of the wafer cassette, a temperature monitoring mechanism for monitoring the temperature distribution of the entire surface of the semiconductor wafer, and the temperature monitoring mechanism Semiconductor wafer A first temperature control means for detecting a low temperature location from the temperature distribution and feeding back to the heating mechanism to individually control the heating by each heating element so that the temperature of the entire surface of the semiconductor wafer becomes uniform; Features.

  Further, an auxiliary heater provided outside the wafer cassette, a supply / exhaust fan for flowing a cooling airflow in a direction along the wafer cassette, and the auxiliary heater and the supply / exhaust fan are independently driven to drive the semiconductor wafer. And a second temperature control means for controlling the temperature.

  Since the semiconductor wafer of the present invention is provided with a heating element on the wafer itself so that the heating temperature can be controlled, temperature variation within the wafer surface can be eliminated, burn-in measurement temperature can be stabilized, and measurement quality can be improved. Can be achieved. If a scribe lane is used as an installation position of a heating element or the like, it can be applied regardless of the type of semiconductor wafer.

  In controlling the heating temperature, the temperature distribution on the entire surface of the semiconductor wafer can be monitored, and heating by the heating elements can be individually controlled based on the monitoring result. Moreover, the heat generation of each semiconductor device can be predicted from the good / bad information of the semiconductor device from the previous process, and the heating by the heat generating element can be individually controlled based on the prediction result.

  In this way, since the heating temperature can be controlled by the semiconductor wafer itself, the burn-in apparatus can be controlled only by a simple cooling temperature control, and the temperature adjustment mechanism and thus the burn-in apparatus as a whole can be reduced in size and cost. An apparatus configuration in which processing chambers for storing semiconductor wafers one by one is provided in multiple stages is possible, and temperature stability can be ensured even if processing chambers are densely provided.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 shows a configuration of a semiconductor wafer in one embodiment of the present invention. FIG. 1A is a plan view of the semiconductor wafer, and FIGS. 1B and 1C are partially enlarged views of the semiconductor wafer.

As shown in FIG. 1A, a plurality of semiconductor devices 2 on which a pattern of an integrated circuit is formed are arranged on a semiconductor wafer 1 in multiple rows vertically and horizontally via a scribe lane 3.
As shown in FIG. 1B, in the scribe lane 3, a pair of heating elements 4 and temperature monitoring elements 5 are provided for each semiconductor device 2. The heating element 4 is arranged in a U shape along three sides so as to surround the semiconductor device 2, and the temperature monitoring element 5 is arranged along the other one side.

  As shown in FIG. 1C, a pair of heating elements 4 and temperature monitoring elements 5 are also provided in the semiconductor device 2. The heating element 4 and the temperature monitoring element 5 in the semiconductor device 2 are arranged so that their electrical junctions 4a and 5a are not close to the electrical junctions 4a and 5a of the heating element 4 and the temperature monitoring element 5 in the scribe lane 3. ing.

Although FIG. 1 shows an example in which the heating element 4 and the temperature monitoring element 5 are arranged in both the scribe lane 3 and the semiconductor device 2, only one of them may be provided.
As shown in FIG. 1D, the semiconductor wafer 1 may be provided with a switch element 31 and a control line 32 of the switch element 31 in addition to the heat generating element 3 on the scribe lane 5 where the integrated circuit pattern is not formed. Good. By passing a current through the control line 32, the switch element 31 operates, and the amount of heat generated by the heat generating element 3 can be controlled.

FIG. 2 is an exploded perspective view of a wafer cassette containing the semiconductor wafer 1.
The wafer cassette 6 includes a semiconductor wafer 1, a wafer tray 7 that vacuum-sucks the back surface of the semiconductor wafer 1, and probe terminals (to the electrical joints 4a and 5a of the heating element 4 and the temperature monitoring element 5 of the semiconductor wafer 1). And a contact sheet 8 on which is formed). A DUT board 9 connected to the contact sheet 8 by a connector (not shown) to supply and draw out an electric signal is also attached.

FIG. 3 is a sectional view of a burn-in unit provided in the burn-in apparatus.
The burn-in unit 10 is provided with a storage section 11a for storing the wafer cassette 6 in the processing chamber 11, and a relay board 12 for establishing electrical connection between the wafer cassette 6 stored in the storage section 11a and the outside of the apparatus. Is provided. Above the storage part 11a, cooling fins 13 are arranged so as to contact the wafer tray 6 of the wafer cassette 6, and an upper cooling fan 14 is arranged above them. An auxiliary lower heater 15 is disposed below the storage portion 11a, and a lower cooling fan 16 is disposed below the auxiliary lower heater 15. Reference numeral 15a denotes a base.

  With the above configuration, at the time of burn-in measurement in which a plurality of semiconductor devices 2 of the semiconductor wafer 1 are collectively inspected (screened), the wafer cassette 6 is accommodated in the accommodating portion 11a of the burn-in unit 10, and the relay board 12 and the DUT substrate are externally provided. 9. A voltage / current is applied to the heating element 4 through the contact sheet 8 to heat the semiconductor wafer 1.

  At that time, the resistance value of each temperature monitoring element 5 in the semiconductor device 2 and the scribe lane 3 is monitored outside the apparatus through the contact sheet 8, the DUT board 9 and the relay board 12, and the temperature monitor at each position is determined from the resistance value. The temperature distribution of the entire surface of the semiconductor wafer 1 is examined by estimating the temperature of the element 5. This temperature distribution is based on a self-heating point caused by a non-defective device and a non-heating point caused by a defective device.

  When a variation in the temperature distribution is detected, the whole surface of the semiconductor wafer 1 is soaked by applying a current voltage to the heat generating element 4 at a portion having a low resistance value to assist the heat generation. The current voltage applied at this time is controlled by applying a constant current voltage to the heat generating element 4 at a low resistance value or by applying a resistance value of the temperature monitoring element 5 to the heat generating element 4 at a low resistance value. Is applied by gradually increasing the voltage and current until the temperature becomes equal to that of the surrounding temperature monitoring element 5. In this way, by controlling the temperature of the heating elements 4 associated with each semiconductor device 2 individually, it is possible to ensure the thermal uniformity of the entire wafer surface.

  When there is no temperature variation, outside air is introduced and applied to the upper cooling fins 13 in contact with the wafer tray 7 by the upper cooling fan 14, thereby controlling the predetermined burn-in temperature. In addition, the lower heater 15 and the lower cooling fan 16 are independently controlled to the burn-in temperature. The reason why the lower heater 15 and the lower cooling fan 16 are also used is as follows. The heat generated by the semiconductor wafer 1 reaches 150 ° C. or higher, which is too high as a burn-in temperature. When the temperature is 130 ° C. or higher, deterioration of members such as a contact sheet occurs. Therefore, it is necessary to cool the whole and maintain it at a predetermined constant temperature. For this purpose, cooling is performed by the cooling fans 14 and 16 from above and below. There is a temperature difference between the upper and lower portions of the storage portion 11a, and the lower heater 15 may be used together to bring the upper portion of the semiconductor wafer 1 to a predetermined temperature. By such a temperature control function of the burn-in unit 10, the temperature of all the semiconductor devices 2 of the semiconductor wafer 1 can be controlled more uniformly and stably to an appropriate burn-in temperature.

  With the recent high integration, the number of devices per 300 mm wafer is about 2000 chips, and the required heat generation amount has reached about 1 kW to 5 kW. In order to realize this heat generation amount by the heating element 4, it is desirable to use a resistance element capable of flowing a current of about 10 V per element and about 50 mA to 250 mA.

  As such a resistance element, a copper wiring resistance or a diffusion resistance (diode) formed by a multilayer wiring technique can be used in each semiconductor device 2, and a polysilicon resistance having a high resistance and a low temperature dependence of the resistance value is used. May be. In the recent multilayer wiring technology, the wiring density is made constant for the purpose of stabilizing the yield, and there are useless wirings. Therefore, it is convenient to utilize the surplus wiring.

  The structure in which the heating element 4 and the temperature monitoring element 5 are provided in the scribe lane 3 is applicable regardless of the type of the semiconductor wafer 1 because the scribe lane 3 is finally cut off. Since the semiconductor wafer 1 itself is provided with a heating control mechanism as described above, the heating control mechanism provided outside the semiconductor wafer 1 is a simple mechanism that cools the entire wafer tray without considering temperature variations in the wafer surface. Even with this mechanism, stable burn-in temperature control is possible, and the burn-in unit 10 and thus the burn-in apparatus can be downsized.

  However, the temperature monitoring element 5 does not necessarily have to be provided on the semiconductor wafer 1 and can be provided outside the wafer, for example, on the wafer tray 7 or the contact sheet 8. It is also possible not to provide the temperature monitoring element 5 corresponding to the heating element 4.

  When the temperature monitoring element 5 corresponding to the heating element 4 is not provided, the low temperature portion is predicted from the good / bad information of the semiconductor device from the previous process and fed back to the heating mechanism so that the temperature of the entire surface of the semiconductor wafer 1 is uniform. Thus, heating by each heating element 4 is individually controlled.

FIG. 4 is a schematic configuration diagram in the burn-in apparatus, and FIG. 5 is a schematic overall configuration diagram of the burn-in apparatus.
As shown in FIGS. 4 and 5, the burn-in unit 10 described above is provided in multiple stages in the vertical direction in the main body 17 of the burn-in apparatus. For each burn-in unit 10, the burn-in control device 18 manages and executes the burn-in measurement conditions such as temperature and applied voltage / current and the measurement program through the burn-in data server 19, and measures the burn-in measurement results before measurement. Manage data after measurement. In addition, in order to control the in-plane soaking of the semiconductor wafer 1 of the wafer cassette 6 housed in each burn-in unit 10 by the burn-in control device 18, information on good and bad data from the previous process using a network. To get.

  An air supply port 20 is formed in the lower portion of the main body 17, and an air supply path 21 following the air supply port 20 is formed between the burn-in units 10, and an independent exhaust path 22 for exhausting each burn-in unit 10. The one-way airflow flows in the main body 17 so that the burn-in units 10 are not affected.

  In each burn-in unit 10, an air supply port 10a communicating with the air supply path 21 is formed in the upper and lower portions of the processing chamber 11, and an upper cooling fan 14 and a lower cooling fan 16 are installed so as to cover each air supply port 10a. Has been. An exhaust port 10b communicating with the exhaust path 22 is formed on the side of the processing chamber 11, and an exhaust fan 23 is installed so as to cover the exhaust port 10b.

  For this reason, the gas that has entered the main body 17 from the air supply port 20 flows through the air supply path 21 between the burn-in units 10 and is drawn into the burn-in units 10 through the air supply port 10a by the upper cooling fan 14. 1, the relay board 12 supporting the semiconductor wafer 1 is cooled by being drawn through the air supply port 10 a by the lower cooling fan 16, and the heated air is thereby heated by the exhaust fan 23 through the exhaust port 10 b. It is discharged to the exhaust path 15.

  As described above, the temperature control mechanism for leveling the in-plane temperature variation of the semiconductor wafer 1 and the temperature for controlling the temperature of the semiconductor wafer 1 by controlling the cooling fans 14 and 16 and the exhaust fan 23 independently. By providing the control mechanism, each burn-in unit 10 can appropriately control the semiconductor wafer 1 to the burn-in set temperature. Further, in the burn-in apparatus in which a plurality of burn-in units 10 are integrated, even if the burn-in units 10 are densely provided, it is possible to eliminate temperature interference between the burn-in units 10 and to stably control the set temperature.

  Since the semiconductor wafer of the present invention can be heated and controlled by itself, it is useful for improving the quality of measurement when performing burn-in measurement at the wafer level and for reducing the size of the burn-in apparatus.

Configuration diagram of a semiconductor wafer in an embodiment of the present invention Disassembled perspective view of wafer cassette assembled for each semiconductor wafer Sectional drawing of the burn-in unit of the burn-in apparatus in one Embodiment of this invention Schematic configuration diagram inside the burn-in device including the burn-in unit of FIG. Schematic overall configuration diagram of the burn-in apparatus including the burn-in unit of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Semiconductor device 3 Scribe lane 4 Heating element 5 Temperature monitoring element 6 Wafer cassette 7 Wafer tray 8 Contact sheet
10 Burn-in unit
11 treatment room
12 Relay board
13 Cooling fin
14 Top cooling fan
15 Lower heater
16 Lower cooling fan
17 Body
18 Burn-in control device
19 Burn-in data server
20 Air inlet
21 Air supply path
22 Exhaust channel
23 Exhaust fan

Claims (13)

  A semiconductor wafer in which a plurality of semiconductor devices are formed separately from each other via a scribe lane, and a heating element for heating the semiconductor device is provided in at least one of the semiconductor device and the scribe lane.   The semiconductor wafer according to claim 1, wherein the heating element is configured to individually heat each semiconductor device.   The semiconductor wafer according to claim 1, wherein a temperature monitoring element is provided for each of the heating elements.   The semiconductor wafer according to claim 1, wherein the temperature monitoring element is a current resistance element.   The semiconductor wafer according to claim 1, wherein a control line and a switch element for controlling heating by each heating element are provided in the scribe lane.   When the semiconductor wafer according to claim 1 is burned in in a wafer state, the temperature distribution of the entire surface of the semiconductor wafer is monitored while each semiconductor device is energized, and the temperature of the entire surface of the semiconductor wafer is made uniform based on the monitoring result. A semiconductor wafer heating control method for individually controlling heating by a plurality of heating elements.   7. The method for controlling heating of a semiconductor wafer according to claim 6, wherein the temperature distribution on the entire surface of the semiconductor wafer is monitored by a temperature monitor element provided inside or outside the semiconductor wafer.   When the semiconductor wafer according to claim 1 is burned in in a wafer state, the heat generation of each semiconductor device is predicted from the good / bad information of the semiconductor device from the previous process, and the temperature of the entire surface of the semiconductor wafer is determined based on the prediction result. A semiconductor wafer heating control method for individually controlling heating by a plurality of heating elements so as to be uniform.   9. The method of controlling heating of a semiconductor wafer according to claim 8, wherein the defective semiconductor device is heated by a heating element.   The heating control method for a semiconductor wafer according to claim 6 or 8, wherein the heating control by each heating element is performed by a current applied to the heating element. A burn-in apparatus for burning in the semiconductor wafer according to claim 1 in a wafer state,
A processing chamber provided with a storage section for storing a wafer cassette in which a semiconductor wafer, a wafer tray, and a contact sheet collectively connected to a connection section on the semiconductor wafer are integrated;
A relay board connected to the contact sheet of the wafer cassette stored in the storage unit;
A heating mechanism for heating each of a plurality of heating elements for heating the semiconductor wafer by applying an electrical signal to the semiconductor wafer through the relay board;
A first part that predicts a low-temperature location from the good / bad information of the semiconductor device from the previous process and instructs the heating mechanism to individually control the heating by each heating element so that the temperature of the entire surface of the semiconductor wafer becomes uniform. A burn-in device comprising temperature control means. A burn-in apparatus for burning in the semiconductor wafer according to claim 1 in a wafer state,
A processing chamber provided with a storage section for storing a wafer cassette in which a semiconductor wafer, a wafer tray, and a contact sheet collectively connected to a connection section on the semiconductor wafer are integrated;
A relay board connected to the contact sheet of the wafer cassette stored in the storage unit;
A heating mechanism for heating each of a plurality of heating elements for heating the semiconductor wafer by applying an electrical signal to the semiconductor wafer through the relay board;
A temperature monitoring mechanism that takes out an electrical signal from the semiconductor wafer through the relay board and monitors the temperature distribution of the semiconductor wafer;
A first temperature that detects a low temperature location from the temperature distribution of the semiconductor wafer by the temperature monitoring mechanism and feeds back to the heating mechanism to individually control heating by each heating element so that the temperature of the entire surface of the semiconductor wafer becomes uniform. And a burn-in device comprising control means.   An auxiliary heater for heating the semiconductor wafer from the outside, a supply / exhaust fan for flowing a cooling airflow along the wafer cassette, and a second for controlling the temperature of the semiconductor wafer by independently driving the auxiliary heater and the supply / exhaust fan The burn-in apparatus according to claim 11, further comprising a temperature control unit.

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