JP2006165397A - Manufacturing method of circuit board, and the circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a circuit board excellent in connection reliability between a conductor post and a connection pad, having little distortion of an internal layer circuit and waviness of the circuit board. <P>SOLUTION: The manufacturing method of the circuit board is for electrically joining a first substrate including a first base material having a first conductor circuit provided on one of surfaces, the conductor post communicating with the first conductor circuit and provided in a hole passing through the first base material and having a brazing material at its tip, and an adhesive layer provided on a surface opposite to the surface equipped with the first conductor circuit of the first base material, with a second substrate equipped with a second conductor circuit on one of surfaces of a second base material. The method has a joining step of laminating at least one first substrate and at least one second substrate, heating them with substantially no pressure applied or under a low pressure of 0.5 MPa or less to melt the brazing material, and joining the conductor post with the second conductor circuit via the brazing material. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a circuit board manufacturing method and a circuit board.

  With the recent increase in the density of electronic devices, circuit boards such as flexible printed wiring boards used in the electronic devices are becoming more and more multilayered. As a technique for stacking such multilayer circuit boards, a build-up method is employed. The build-up method is a method in which interlayer connection is made between single layers while a resin layer composed of only a resin and a conductor layer are stacked.

  This build-up method is broadly divided into a method of forming an interlayer connection after forming a via hole in the resin layer, and a method of stacking the resin layer after forming an interlayer connection portion. The interlayer connection portion is divided into a case where the via hole is formed by plating, a case where the via hole is formed by a conductive paste, and the like.

As a technology that enables stacked vias and enables high density and simplified wiring design, a fine via hole for interlayer connection is formed in a resin layer with a laser, and the via hole is filled with a conductive adhesive such as copper paste. A method of obtaining an electrical connection with a conductive adhesive is disclosed. (For example, refer to Patent Document 1).
However, in this method, since the electrical connection between layers is performed with a conductive adhesive, the reliability may not be sufficient. In addition, advanced technology for embedding a conductive adhesive in a fine via hole is required, and it is difficult to cope with further miniaturization of the wiring pattern.

Therefore, instead of using a method of embedding a conductive adhesive in a via hole, a technique using a metal protrusion (conductor post) is used. However, even when a conductor post is used, a method is disclosed in which the conductor post physically removes the interlayer adhesive and connects to the connection pad when the interlayer connection is made (see, for example, Patent Document 2).
However, in this method, it is difficult to completely remove the interlayer adhesive between the conductor post and the connection pad, and the reliability may be insufficient.

Further, by using the conductor post having a solder layer formed at the tip, the conductor post is passed through an uncured resin layer and an uncured adhesive layer at a temperature lower than the melting temperature of the solder, and 2 There is also a method of forming a solder joint by pressurizing at about 5 MPa, curing the adhesive layer, and further melting and cooling the solder (see, for example, Patent Document 3).
However, when the circuit board is manufactured by connecting the layers by pressurization in this way, there is a phenomenon that the inner layer circuit is distorted or the circuit board is wavy due to the distortion of the inner layer circuit. In particular, the more the number of inner layer circuits to be stacked, the more the distortion and undulation tend to become more prominent.

JP-A-8-316598 JP 11-54934 A JP-A-8-195560

  An object of the present invention is to provide a method of manufacturing a circuit board that is excellent in connection reliability between a conductor post and a connection pad, and has less distortion of an inner layer circuit and less undulation of the circuit board.

Such an object is achieved by the present invention described in the following (1) to (11).
(1) A first base material provided with a first conductor circuit on one surface side, and provided in a hole that is electrically connected to the first conductor circuit and penetrates the first base material, and is brazed at a tip portion. A first substrate comprising: a conductor post having a material; and an adhesive layer provided on a surface of the first base material opposite to the surface on which the first conductor circuit is provided; And a second substrate provided with a second conductor circuit on the surface side thereof, and a method for manufacturing the circuit substrate, wherein at least one first substrate and at least one second substrate are provided. And the brazing material is melted by heating in a state of substantially no pressure or a low pressure of 0.5 Mpa or less, and the conductor post and the second conductor circuit are joined via the brazing material. A method for manufacturing a circuit board, comprising the step of bonding.
(2) A first base material provided with a first conductor circuit on one surface side, and a conductive material connected to the first conductor circuit and provided in a hole penetrating the first base material, and brazed at a tip portion A first substrate comprising: a conductor post having a material; and an adhesive layer provided on a surface of the first base material opposite to the surface on which the first conductor circuit is provided; A circuit board manufacturing method for electrically joining a second board provided with a second conductor circuit on the surface side thereof, wherein two or more sets of the first board and the second board are overlaid. These are heated and heated under substantially no pressure or under a low pressure of 0.5 Mpa or less to melt the brazing material, and the conductor post and the second conductor circuit are joined via the brazing material. A method for manufacturing a circuit board, comprising a bonding step.
(3) The method for manufacturing a circuit board according to (1) or (2), further including a curing step of curing the adhesive layer after the joining step.
(4) The method for manufacturing a circuit board according to any one of (1) to (3), wherein the heating rapidly heats to a melting temperature at which both the adhesive layer and the brazing material are melted.
(5) The method for manufacturing a circuit board according to (4), wherein the rapid heating is performed at a heating rate of 20 ° C./min or more.
(6) The method for manufacturing a circuit board according to any one of (1) to (5), wherein the heating is performed using a hot plate heated to a target temperature in advance.
(7) The method for manufacturing a circuit board according to any one of (1) to (6), wherein the circuit board is further held for a predetermined time at the melting temperature or higher after the heating.
(8) The circuit board manufacturing method according to any one of (1) to (7), wherein the conductor post and the second conductor circuit are joined in a vacuum in the joining step.
(9) The circuit board according to any one of (1) to (8), wherein the conductor post and the second conductor circuit are joined by forming a fillet with the brazing material.
(10) The method for manufacturing a circuit board according to any one of (1) to (9), wherein the circuit board has a dummy circuit portion.
(11) A circuit board obtained by the method for manufacturing a circuit board according to any one of (1) to (10).

According to the present invention, it is possible to provide a method of manufacturing a circuit board that is excellent in connection reliability between the conductor posts and the connection pads, and has less distortion of the inner layer circuit and less undulation of the circuit board.
Further, when the heating in the joining step is rapidly heated to a melting temperature at which both the adhesive layer and the brazing material are melted, distortion of the inner layer circuit particularly in a multilayer circuit board having four or more layers and the circuit board Waves can be reduced.
In addition, when the solder post and the second conductor circuit are joined by forming a fillet, the connection post is particularly excellent in connection reliability.

The circuit board manufacturing method and circuit board of the present invention will be described below.
In the method for manufacturing a circuit board according to the present invention, a first base material provided with a first conductor circuit on one surface side, and a hole that is electrically connected to the first conductor circuit and penetrates the first base material. A first substrate comprising: a conductor post provided with a brazing material at a tip; and an adhesive layer provided on a surface opposite to the surface of the first base material on which the first conductor circuit is provided; A circuit board manufacturing method for electrically joining a second substrate having a second conductor circuit provided on one surface side of a second base material, wherein the at least one first substrate and at least one A plurality of the second substrates are superposed, and these are heated in a pressurized state at a pressure of substantially no pressure or 0.5 Mpa or less to melt the brazing material, and the conductor post and the second conductor circuit, It has the joining process which joins a solder | pewter via a brazing material.
Moreover, the circuit board of the present invention is obtained by the method for manufacturing a circuit board described above.

FIG. 1 is a schematic diagram showing an example of a temperature-pressure profile of the circuit board manufacturing method of the present invention. FIG. 2 is a side view showing an example of the first substrate. FIG. 3 is a side view showing an example of a state in which the first substrate and the second substrate are stacked. FIG. 4 is a side view showing an example of a state in which the conductor post and the second conductor circuit are joined via a brazing material. FIG. 5 is a side view showing an example of a circuit board having a three-layer structure having a dummy circuit. FIG. 6 is a side view showing an example of a circuit board having a six-layer structure.
As shown in FIG. 1, in the circuit board manufacturing method of the present invention, a laminating step (1A) for laminating the adhesive layer on the first substrate, and a laminating step for laminating the first substrate and the second substrate. (2A), a joining step (3A) for joining the conductor post and the second conductor circuit via a brazing material, and a curing step (4A) for curing the adhesive layer.

  Hereinafter, each step will be described.

In the laminating step (1A), the adhesive layer 14 is provided on one side of the first substrate 12 including the conductor post 13 having the brazing material 131 at the tip.
And the 1st base material 12 in which the 1st conductor circuit 11 as shown in FIG. 2 was provided, and it is electrically connected with the 1st conductor circuit 11, and is provided in the hole which penetrates the 1st base material 12, and is provided in the front-end | tip part. A first substrate 1 having a conductor post 13 having a brazing material 131 and an adhesive layer 14 provided on the surface opposite to the surface on which the first conductor circuit 11 of the first base material 12 is provided is obtained. .
Examples of the laminating method include a method in which a film-like adhesive component is bonded to the surface of the first substrate 12 opposite to the surface on which the first conductor circuit 11 is provided.
The laminating temperature (T1) is not particularly limited, but is preferably 60 to 120 ° C, particularly preferably 80 to 100 ° C.

As the first substrate 12, for example, a polyimide film, a polyether ether ketone film, a polyether sulfone film, a resin film such as a liquid crystal polymer film, a laminated board such as an epoxy resin laminated board, a phenol resin laminated board, or a cyanate resin laminated board Etc. Among these, a resin film represented by a polyimide film is preferable. Thereby, heat resistance can be improved. Furthermore, flexibility can be exhibited.
Although the thickness of the 1st base material 12 is not specifically limited, 9-100 micrometers is preferable and 12-25 micrometers is especially preferable. When the thickness is within the above range, the plating time for forming the conductor post 13 can be shortened.

Examples of the material constituting the first conductor circuit 11 include copper foil and aluminum. Among these, copper foil is preferable. Thereby, an arbitrary wiring pattern can be easily formed.
Although the thickness of the 1st conductor circuit 11 is not specifically limited, 5-70 micrometers is preferable and 9-35 micrometers is especially preferable. When the thickness is within the above range, the circuit formability by the etching process is particularly excellent. Furthermore, it is excellent also in the handleability (handleability) of the 1st base material 12 after forming the 1st conductor circuit 11. FIG.

Examples of the material constituting the adhesive layer 14 include an epoxy resin adhesive and an acrylic resin adhesive. Among these, an epoxy resin adhesive having flux activity is preferable. Thereby, especially adhesiveness with the 1st base materials 12, such as the above-mentioned polyimide film, is excellent.
Although the thickness of the adhesive bond layer 14 is not specifically limited, 5-50 micrometers is preferable and 10-30 micrometers is especially preferable. When the thickness is within the above range, it is particularly excellent in both adhesion and suppression of bleeding of the adhesive.

  The conductor post 13 forms a copper post by, for example, a paste or a plating method. Then, it coat | covers with the metal or alloy which is the brazing material 131. FIG. The height of the conductor post 13 is not particularly limited, but it is preferable to project 2-30 μm from the surface of the first substrate 12 opposite to the surface on which the first conductor circuit 11 is formed, and in particular, project 5-15 μm. It is preferable to make it. When the height is within the above range, the connection stability between the conductor post 13 and the second conductor circuit 21 is particularly excellent. Further, the work time can be shortened.

  The brazing material 131 is made of, for example, a metal or an alloy. The metal is preferably made of, for example, tin. The alloy is preferably a brazing material 131 composed of at least two kinds of metals selected from tin, lead, silver, zinc, bismuth, antimony, and copper. Examples include tin-lead, tin-silver, tin-zinc, tin-bismuth, tin-antimony, tin-silver-bismuth, and tin-copper, but are not limited to metal combinations and compositions, The best one can be selected. The coating thickness of the brazing material 131 is not particularly limited, but is preferably 2 μm or more, and particularly preferably 3 to 20 μm. When the thickness is within the above range, the connection between the conductor post 13 and the second conductor circuit 21 is excellent in stability, thereby further improving the reliability.

  Note that the laminating step (1A) and the laminating step (2A) described later need not be performed continuously, and the first substrate 1 may be formed in advance.

Next, in the stacking step (2A), the first substrate 1 and the second substrate 2 are stacked (temporary bonding). Specifically, as shown in FIG. 3, a part of the brazing material 131 at the tip of the conductor post 13 of the first substrate 1 and a part of the second conductor circuit 21 of the second substrate 2 are in contact with each other. It is in a state.
In the stacking step (2A), the first substrate 1 and the second substrate 2 are stacked and pressed at a predetermined temperature (T2) and a predetermined pressure (P2). The press atmosphere is not particularly limited even in a vacuum, in an inert gas atmosphere, or in the air.
The predetermined temperature (T2) is not particularly limited as long as the adhesive layer 14 is softened. Specifically, the predetermined temperature (T2) is preferably 80 to 180 ° C, particularly preferably 100 to 160 ° C. When the temperature is within the above range, the adhesion between the first substrate 1 and the second substrate 2 is particularly excellent.
The predetermined pressure (P2) is not particularly limited as long as it is a pressure at which the molten adhesive layer 14 is embedded around the second conductor circuit 21. Specifically, the predetermined pressure (P2) is preferably 0.3 to 1.5 MPa. In particular, 0.5 to 1.0 MPa is preferable. When the pressure is within the above range, the embedding property of the adhesive layer 14 in the circuit is particularly excellent.
The pressing time (S2) is not particularly limited, but is preferably 0.5 to 10 minutes, and particularly preferably 1 to 3 minutes.

  In the laminating step (2A), after pressing the first substrate 1 and the second substrate 2 as described above, the heating is stopped, the pressure is released, the laminated body is taken out, and a bonding step (3A) described later is performed. To do. The lamination step (2A) and the joining step (3A) are preferably performed continuously, but may be performed in separate steps.

Next, in the joining step (3A), the brazing material 131 at the tip end portion of the conductor post 13 is melted to perform interlayer connection with the second conductor circuit 21.
In the joining step (3A), the first substrate 1 and the second substrate 2 are overlapped, and these are heated in a pressurized state (P3) at substantially no pressure or a low pressure of 0.5 MPa or less. 131 is melted, and the conductor post 13 and the second conductor circuit 21 are joined via the brazing material 131.
Here, the reason why the joining step (3A) is performed by heating in a pressurized state at substantially no pressure or a low pressure of 0.5 MPa or less is as follows.
Conventionally, the interlayer connection between the conductor post and the inner layer circuit has been performed at a high pressure of 2.5 MPa or more. However, when the interlayer connection is performed at such a high pressure, pressure is concentrated on the contact portion between the conductor post and the inner layer circuit, so that the inner layer circuit is distorted or the entire circuit board is bent due to the distortion of the inner layer circuit. In some cases, it was deformed due to undulation or undulation.
On the other hand, in this invention, the 1st board | substrate 1 and the 2nd board | substrate 2 are piled up, these are heated by the pressurization state of substantially no pressure or a low pressure of 0.5 Mpa or less, and the conductor post 13 and 2nd. Since the bonding with the conductor circuit 21 is performed, it is possible to prevent the pressure from being concentrated on one point of the second substrate 2. Thereby, it is possible to prevent the circuit board from being deformed.

  Furthermore, in the present invention, since the joining step (3A) is performed by heating in a pressure state at substantially no pressure or a low pressure of 0.5 MPa or less, it is possible to prevent the adhesive layer 14 from exuding. . Thereby, a circuit board with less variation in interlayer thickness can be obtained.

The “substantially no pressure” refers to a state in which no external stress is applied other than the weight of the plate such as a press, or a state in which the plate is not used.
Even if no pressure is applied, the inner layer circuit will not be distorted as long as it is under a low pressure of 0.5 MPa or less. The upper limit value of the pressure state at the low pressure is more preferably 0.4 MPa or less, and most preferably 0.05 to 0.3 MPa. When the pressure is within the above range, a circuit board having a small variation in interlayer thickness can be obtained.

  The heating temperature (T3a) is not particularly limited as long as it is a temperature at which the brazing material 131 is melted. Specifically, the heating temperature (T3a) is preferably 230 ° C. or higher, and particularly preferably 240 to 270 ° C. When the temperature is within the above range, the connection reliability between the conductor post 13 and the second conductor circuit 21 through the brazing material 131 is excellent. That is, as shown in FIG. 4, the brazing material 131 has a fillet shape.

Moreover, although the said heating is not specifically limited, It is preferable to heat rapidly to the temperature which both the adhesive bond layer 14 and the brazing | wax material 131 fuse | melt. Thereby, distortion of the inner layer circuit can be particularly prevented with respect to the multilayer circuit board having four or more layers.
Conventionally, in the joining step, the conductor post and the inner layer circuit are joined by heating to a temperature near the melting temperature of the brazing material at a temperature increase rate of about 10 ° C./min to melt the brazing material. However, according to this method, the adhesive layer softens while heating (not reaching the melting temperature of the brazing material), whereas the brazing material remains solid (solid state). For this reason, the pressure applied to the substrate during the heating is concentrated on the conductor post portion via the brazing material and is applied to the inner layer circuit, which may increase the distortion of the inner layer circuit. Furthermore, since the curing reaction of the adhesive layer progresses rapidly from the point where the temperature exceeds about 150 ° C., and the brazing material starts to melt, the curing of the adhesive layer is almost completed, so the interlayer connection may become unstable. there were.
In contrast, when the adhesive layer 14 and the brazing material 131 are both rapidly heated to a temperature at which both the adhesive layer 14 and the brazing material 131 are melted, the adhesive layer 14 is melted (softened) and the brazing material 131 is melted. Can be prevented. That is, since both the adhesive layer 14 and the brazing material 131 are in a molten state, it is considered that the stress of the conductor post 13 is dispersed. Therefore, the distortion of the inner layer circuit can be reduced, and as a result, the circuit board can be prevented from being deformed.

  The heating rate of the rapid heating is not particularly limited, but is preferably 20 ° C./min or more, particularly preferably 50 ° C./min or more, and most preferably 60 to 200 ° C./min. When the rate of temperature rise is within the above range, both the melting of the brazing material 131 and the melting of the adhesive layer 14 occur, so that the connectivity between the conductor post 13 and the second conductor circuit 21 is excellent.

Although the said heating is not specifically limited, You may perform using the hot plate heated up to melting temperature (T3) previously. Also by this, the conductor post 13 and the second conductor circuit 21 can be connected via the brazing material 131. The target temperature is not particularly limited as long as the brazing material 131 is melted, but is preferably 185 to 280 ° C, and particularly preferably 230 to 270 ° C. When the temperature is within the above range, the brazing material 131 is melted before the adhesive layer 14 is cured, and the brazing material 131 forms a fillet, whereby the connectivity reliability between the conductor post 13 and the second conductor circuit 21 is improved. Excellent.
In addition, before heating to a melting temperature beforehand, you may heat once to a predetermined target temperature, and you may heat to the said melting temperature then (The heating in two steps may be sufficient).

After the heating, it is preferable to hold for a predetermined time (S3) at a temperature (T3) equal to or higher than the melting temperature. Thereby, the brazing material 131 spreads uniformly, and the connection reliability between the conductor post 13 and the second conductor circuit 21 is improved.
In addition, the adhesion between the first substrate 1 and the second substrate 2 can be improved. Furthermore, the adhesive layer 14 can be semi-cured (temporarily cured) to the extent that the entire layer is stabilized to some extent.
The temperature (T3) equal to or higher than the melting temperature is not particularly limited, but is preferably 240 to 280 ° C, particularly preferably 250 to 270 ° C.
The predetermined time (S3) is not particularly limited, but is preferably 0.25 to 10 minutes, and particularly preferably 0.5 to 8 minutes.

  After holding for the predetermined time (S3), in the present embodiment, in order to perform the next curing step separately, it is once cooled to about room temperature. Then, a curing step (4A) for curing the semi-cured adhesive layer 14 is performed. The conditions for curing the adhesive layer 14 in the curing step (4A) are not particularly limited, but the curing temperature (T4) × curing time (S4) is preferably 150 to 220 ° C. × 30 to 150 minutes, particularly 160 to 180. C. x 45 to 120 minutes is preferable. When the curing condition is within the above range, the adhesive layer 14 can be sufficiently cured.

The circuit board of the present invention can be obtained by such a method.
In the above embodiment, the circuit board has a two-layer structure as shown in FIG. 4, but the present invention is not limited to this, and the circuit board has a three-layer structure having a conductor circuit 31 as shown in FIG. 3. A circuit board (flexible circuit board) having a multilayer structure such as a circuit board 4 having a six-layer structure as shown in FIG.
The circuit board 3 of the present invention may have a dummy circuit 32 in addition to the conductor circuit 31 as shown in FIG. The dummy circuit 32 is a circuit that does not participate in signal transmission. The dummy circuit 32 can further prevent the inner layer circuit from being deformed.
Moreover, although not shown in figure, you may have a dummy conductor post which does not participate in a connection with a conductor circuit.

In the above embodiment, the adhesive layer 14 is formed by the method of laminating, but is not limited to this, and examples thereof include a method of applying an adhesive component dissolved in a solvent.
In the above embodiment, the second substrate 2 is composed of the second conductor circuit 21 and the second base material 22. However, the present invention is not limited to this. For example, the second substrate 2 is a multilayer circuit substrate. In the case of constituting the inner layer circuit, the case of constituting the core layer of the multilayer circuit board can be mentioned. When the inner layer circuit or the core layer is configured as described above, the second substrate 2 may have conductor posts and other conductor circuits in addition to the second conductor circuit 21 and the second base material 22. Further, a dummy circuit and a dummy conductor post may be provided.
The first substrate 1 may also have a dummy circuit or a dummy conductor post.

EXAMPLES Next, although this invention is demonstrated in detail based on an Example and a comparative example, this invention is not limited to this.
Example 1
(First board-Fabrication of outer printed wiring board-)
An opening with a diameter of 50 μm is formed by UV laser from the surface of the insulating substrate side of the first substrate (Ube Industries Upicel SE1310) with a 12 μm thick copper foil on a 25 μm thick polyimide resin insulating substrate. Then, desmearing was performed using a dry desmear apparatus. After electrolytic copper plating is performed in the opening to make the copper post 10 μm higher than the surface of the insulating layer on the opposite side of the copper foil, brazing material (solder plating, tin-lead eutectic) is applied to a thickness of 15 μm, Conductor posts were formed. Next, the copper foil was etched to form a wiring pattern. Next, a 25 μm thick thermosetting adhesive sheet with a flux function (interlayer adhesive sheet made by Sumitomo Bakelite) was laminated with a vacuum laminator, and then processed into an outer shape to a laminated size (120 × 170 mm) to form a first substrate. (Outer layer printed wiring board) was obtained.

(Second board a-Production of inner layer printed wiring board-)
An opening with a diameter of 50 μm is formed by UV laser from the surface of the insulating base side of the second base material a (Upi Kosei SE1310 made by Ube Industries) with a 12 μm thick copper foil on an insulating base material of polyimide resin with a thickness of 25 μm. Formed and desmeared with dry desmear. Electrolytic copper plating is performed in the opening, and the copper post is made 10 μm higher than the surface of the insulating base on the opposite side of the copper foil, and then the brazing material (solder plating, tin-lead eutectic) is 15 μm thick. To form a conductor post. Next, the copper foil was etched to form a wiring pattern and a pad for receiving the conductor post of the first substrate. Next, a 25-μm thick thermosetting adhesive sheet with a flux function (interlayer adhesive sheet made by Sumitomo Bakelite) is formed by laminating with a vacuum laminator, and then processed into an outer shape into a laminated part size (120 × 170 mm). A second substrate a (inner layer printed wiring board) was obtained.

(Second board b-Preparation of core layer flexible wiring board-)
Drill a 2nd base material b (core base material) (Mitsui Chemical's NEX23FE (25T)) with a 12 μm thick copper foil on both sides of an insulating base material of polyimide resin film with a thickness of 25 μm. After forming the holes, the front and back were electrically connected by direct plating and electrolytic copper plating. Next, the copper foil was etched to form a pad for receiving the wiring pattern and the conductor post.
Next, the surface coating layer is formed on the wiring pattern corresponding to the flexible portion with a coverlay film (CVA0525 manufactured by Arisawa Seisakusho) in which a 25 μm thick epoxy resin adhesive is applied in advance to a 12.5 μm thick polyimide. Formed. Finally, it cut | disconnected to lamination | stacking size (120 * 170mm), and obtained the 2nd board | substrate b (core layer flexible wiring board).

(Manufacture of multilayer flexible circuit boards)
1. Lamination process 1st board | substrate (outer layer printed wiring board), 2nd board | substrate a (inner layer printed wiring board), 2nd board | substrate b (core layer flexible wiring board), 2nd board | substrate a (inner layer printed wiring board), The first substrate (outer layer printed wiring board) was laid up in this order using a jig with a pin guide for alignment. Then, it heated so that it might become 250 degreeC partially with a spot heater, the said 1st board | substrate, the said 2nd board | substrate a, and the said 2nd board | substrate were partially bonded temporarily, and positioning was performed.
Next, it was heated and pressure-molded at 150 ° C. and 0.5 MPa for 60 seconds with a vacuum press, and press-molded until the conductor post contacted the conductor pad. At this time, the periphery of the circuit of the second substrate a (inner printed wiring board) having the conductor pads was filled with an adhesive without bubbles.

2. Joining Step Next, the obtained laminate was heated with a reflow apparatus under the following conditions to join the conductor post and the second conductor circuit via solder.
The heating conditions were such that the temperature rise rate was 100 ° C./min when the temperature of the laminate was from room temperature to 260 ° C. The maximum temperature was 265 ° C., and the temperature was maintained at 260 ° C. or higher for 60 seconds.
Moreover, in order to join in a substantially non-pressurized state, it is arranged on the top and bottom of the laminate with two caulking plates (about 82 g, caulking plate size 130 mm × 180 mm, thickness 1 mm), and sandwiches the laminating body. And put into the reflow equipment.
Thereby, the conductor post and the pad of the inner printed wiring board, and the conductor post and the pad of the core layer flexible wiring board were joined via the solder in the reflow apparatus. Here, in the joining of the conductor post and the pad via the solder, the solder is melt-bonded to form a solder fillet.

3. Curing Step Next, in order to cure the adhesive with a flux function, the adhesive layer was cured by heating at 180 ° C. for 60 minutes.

4). Surface treatment of outermost layer A liquid resist (SR9000W manufactured by Hitachi Chemical Co., Ltd.) was printed on both surfaces of the outer layer, exposed and developed to give a surface coating, and openings were also formed. Next, the opening was subjected to gold plating as a surface treatment to finally obtain a six-layer multilayer flexible circuit board.

(Example 2)
Example 2 was the same as Example 1 except that the second substrate a was not used and the heating conditions in the bonding step were as follows.
Instead of a reflow device, on the hot plate, the temperature of the laminated body is from room temperature to 260 ° C. so that the rate of temperature increase is 10 ° C./min (about 82 g, the size of the plate is 130 mm × 180 mm, thickness 1 mm), and the laminate was heated and pressurized in a substantially non-pressurized state.

(Example 3)
Example 1 was performed except that the pressurizing conditions in the joining process were as follows.
Instead of using a reflow device, it was heated to 260 ° C. at a temperature rising speed of 100 ° C./min with a press, and pressurized under a low pressure of 0.2 MPa.

Example 4
Example 2 was the same as Example 1 except that the second substrate a was not used and the heating and pressurizing conditions in the bonding step were as follows.
Instead of the reflow device, the press was heated from room temperature to 260 ° C. at a temperature rising speed of 10 ° C./min, and pressurized in a low pressure state of 0.2 MPa.

(Example 5)
Example 3 was the same as in Example 3 except that the temperature increase rate in the press was as follows.
The heating rate of the press was 50 ° C./min.

(Example 6)
Except for placing dummy circuits (a dummy circuit was formed so that the remaining copper ratio other than the signal wiring part would be 50%) and dummy conductor posts on the outer layer printed wiring board, inner layer printed wiring board, and core layer flexible wiring board In the same manner as in Example 3.

(Comparative Example 1)
Example 1 was the same as in Example 1 except that the heating and pressurizing conditions in the joining step were as follows.
Instead of the reflow device, the temperature was increased by 15 ° C./min with a press and the pressure was increased to 2.5 MPa.

(Comparative Example 2)
It was made to be the same as that of the comparative example 1 except having made the heating conditions in a joining process as follows.
The temperature was increased by a press at a rate of 100 ° C./min and the pressure was increased to 2.5 MPa.

The circuit board obtained in each example and comparative example was evaluated as follows. The evaluation items are shown together with the contents. The obtained results are shown in Table 1.
1. Inner-layer circuit distortion The inner-layer circuit distortion was evaluated by preparing a cross-section and observing with a microscope. Each code is as follows.
A: There is no distortion or undulation of the layer, and there is no problem in conduction and interlayer connection.
○: There are some distortions and undulations in the layer, but there is no problem with conduction and interlayer connection.
[Delta]: Less than 1% of the whole area where there is distortion and undulation of the layer and no conduction is obtained.
X: The place where there is distortion and undulation of the layer, and no electrical continuity is 1% or more of the whole.

2. Heat resistance The heat resistance was evaluated by observing the appearance twice through reflow treatment (260 ° C. or more for 15 seconds, maximum 265 ° C.).
A: There was no abnormality such as swelling and peeling over the entire substrate.
○: Peeling occurred in addition to the product portion around the substrate.
(Triangle | delta): The swelling and peeling of a magnitude | size of less than 1 mm generate | occur | produced in the product part of the board | substrate.
X: Abnormalities such as swelling and peeling having a size of 1 mm or more occurred in the product portion of the substrate.

3. Connection reliability Connection reliability was evaluated by performing a thermal shock test (hot oil 260 ° C. 10 seconds⇔normal temperature 20 seconds 100 cycles), measuring its appearance and conduction resistance.
A: There is no abnormality in the appearance, and the rate of change from the initial value of the conduction resistance is less than ± 5%.
A: There is no abnormality in the appearance, and the rate of change from the initial value of the conduction resistance is ± 5% or more and less than ± 8%.
(Triangle | delta): There is no abnormality in an external appearance and the change rate from the initial value of conduction | electrical_connection resistance is more than +/- 8% and less than +/- 10%.
X: Abnormality such as swelling and peeling in appearance, or change rate from initial value of conduction resistance is ± 10% or more.

4). Adhesiveness Adhesiveness was evaluated in accordance with peel strength between layers JIS C 5016.

5. Amount of seepage of adhesive layer The amount of seepage of adhesive layer was evaluated by measuring the length of the adhesive layer with a measuring microscope.

As is clear from Table 1, the multilayer circuit boards obtained in Examples 1 to 6 had less distortion of the inner layer circuit. This also showed that the circuit board was less corrugated. Particularly, in Examples 1 and 6, even in the case of a 6-layer multilayer circuit board, the distortion of the inner layer circuit was small.
Moreover, Examples 1-6 were excellent in the peel strength, and there were also few amounts of the oozing-out of the adhesive component.
The multilayer circuit boards obtained in Examples 3 and 6 were particularly excellent in connection reliability.

  According to the present invention, it is possible to obtain a circuit board with less distortion of the inner layer circuit and less undulation of the circuit board. The circuit board manufacturing method of the present invention is preferably used for manufacturing a flexible circuit board among circuit boards, and particularly preferably used for a method for manufacturing a multilayer flexible circuit board.

It is a schematic diagram which shows an example of the temperature-pressure profile of the manufacturing method of the circuit board of this invention. It is a side view showing an example of the 1st substrate. It is a side view which shows an example of the state which laminated | stacked the 1st board | substrate and the 2nd board | substrate. It is a side view which shows an example of the state which has joined the conductor post and the 2nd conductor circuit through the brazing material. It is a side view which shows an example of the circuit board of the 3 layer structure which has a dummy circuit. It is a side view which shows an example of the circuit board of 6 layer structure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st board | substrate 11 1st conductor circuit 12 1st base material 13 Conductor post 131 Brazing material 14 Adhesive bond layer 2 2nd board | substrate 21 2nd conductor circuit 22 2nd base material 3 Circuit board of 3 layer structure 31 Conductor circuit 32 Dummy Circuit 4 6-layer circuit board

Claims (11)

A first base material provided with a first conductor circuit on one surface side;
A conductor post which is electrically connected to the first conductor circuit and is provided in a hole penetrating the first base material and having a brazing material at a tip portion;
A first substrate comprising: an adhesive layer provided on a surface opposite to the surface on which the first conductor circuit of the first base material is provided;
A circuit board manufacturing method for electrically joining a second board provided with a second conductor circuit on one surface side of a second base material,
At least one said 1st board | substrate and at least 1 said 2nd board | substrate are piled up, these are heated by the pressurization state in the pressure state of substantially no pressure or 0.5 Mpa or less, and a brazing material is fuse | melted. A method of manufacturing a circuit board, comprising: a joining step of joining the conductor post and the second conductor circuit through a brazing material. A first base material provided with a first conductor circuit on one surface side;
A conductor post which is electrically connected to the first conductor circuit and is provided in a hole penetrating the first base material and having a brazing material at a tip portion;
A first substrate comprising: an adhesive layer provided on a surface opposite to the surface on which the first conductor circuit of the first base material is provided;
A circuit board manufacturing method for electrically joining a second board provided with a second conductor circuit on one surface side of a second base material,
Two or more sets of the first substrate and the second substrate are stacked, and the brazing material is melted by heating them in a state of substantially no pressure or a low pressure of 0.5 Mpa or less, A method of manufacturing a circuit board, comprising: a joining step of joining the conductor post and the second conductor circuit through a brazing material.   The method for manufacturing a circuit board according to claim 1, further comprising a curing step of curing the adhesive layer after the joining step.   4. The method for manufacturing a circuit board according to claim 1, wherein the heating is performed rapidly to a melting temperature at which both the adhesive layer and the brazing material are melted.   The circuit board manufacturing method according to claim 4, wherein the rapid heating is performed at a temperature rising rate of 20 ° C./min or more.   6. The method of manufacturing a circuit board according to claim 1, wherein the heating is performed using a hot plate heated to a target temperature in advance.   The method for manufacturing a circuit board according to claim 1, wherein after the heating, the holding is further performed at a temperature equal to or higher than the melting temperature for a predetermined time.   The method for manufacturing a circuit board according to claim 1, wherein in the joining step, the conductor post and the second conductor circuit are joined in a vacuum.   The circuit board according to any one of claims 1 to 8, wherein the conductor post and the second conductor circuit are joined by forming a fillet with the brazing material.   The method for manufacturing a circuit board according to claim 1, wherein the circuit board has a dummy circuit portion.   A circuit board obtained by the method for manufacturing a circuit board according to claim 1.

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